target/riscv: Merge m/vsstatus and m/vsstatush into one uint64_t unit
mstatus/mstatush and vsstatus/vsstatush are two halved for RISCV32.
This patch expands mstatus and vsstatus to uint64_t instead of
target_ulong so that it can be saved as one unit and reduce some
ifdefs in the code.
Signed-off-by: Yifei Jiang <jiangyifei@huawei.com>
Signed-off-by: Yipeng Yin <yinyipeng1@huawei.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20201026115530.304-2-jiangyifei@huawei.com
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index aaef6c6..e33f6cd 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -446,8 +446,8 @@
static int write_mstatus(CPURISCVState *env, int csrno, target_ulong val)
{
- target_ulong mstatus = env->mstatus;
- target_ulong mask = 0;
+ uint64_t mstatus = env->mstatus;
+ uint64_t mask = 0;
int dirty;
/* flush tlb on mstatus fields that affect VM */
@@ -480,19 +480,20 @@
#ifdef TARGET_RISCV32
static int read_mstatush(CPURISCVState *env, int csrno, target_ulong *val)
{
- *val = env->mstatush;
+ *val = env->mstatus >> 32;
return 0;
}
static int write_mstatush(CPURISCVState *env, int csrno, target_ulong val)
{
- if ((val ^ env->mstatush) & (MSTATUS_MPV)) {
+ uint64_t valh = (uint64_t)val << 32;
+ uint64_t mask = MSTATUS_MPV | MSTATUS_GVA;
+
+ if ((valh ^ env->mstatus) & (MSTATUS_MPV)) {
tlb_flush(env_cpu(env));
}
- val &= MSTATUS_MPV | MSTATUS_GVA;
-
- env->mstatush = val;
+ env->mstatus = (env->mstatus & ~mask) | (valh & mask);
return 0;
}
@@ -1105,7 +1106,8 @@
static int write_vsstatus(CPURISCVState *env, int csrno, target_ulong val)
{
- env->vsstatus = val;
+ uint64_t mask = (target_ulong)-1;
+ env->vsstatus = (env->vsstatus & ~mask) | (uint64_t)val;
return 0;
}