commit 1b72973d39b601b3766d157d3d9bf99033c35e7f
author Nicholas Piggin <npiggin@gmail.com> Mon Nov 13 22:23:06 2023 +1000
committer Nicholas Piggin <npiggin@gmail.com> Fri Feb 23 23:24:43 2024 +1000
tree ef00a1af5d29dcd787d476f98bddbe6dd884dbdf
parent 2ab03484819d529184927314f3b541d7c2221b4a

target/ppc: 440 optimise tlbwe TLB flushing

Have 440 tlbwe flush only the range corresponding to the addresses
covered by the software TLB entry being modified rather than the
entire TLB. This matches what 4xx does.

Tested-by: BALATON Zoltan <balaton@eik.bme.hu>
Acked-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>

target/ppc/mmu_helper.c

diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c
index 923779d..ba965f1 100644
--- a/target/ppc/mmu_helper.c
+++ b/target/ppc/mmu_helper.c
@@ -864,7 +864,7 @@
 
     /* Invalidate previous TLB (if it's valid) */
     if (tlb->prot & PAGE_VALID) {
-        tlb_flush(env_cpu(env));
+        ppcemb_tlb_flush(env_cpu(env), tlb);
     }
 
     switch (word) {