commit 15bb4eac129931329e3b4d1493331b780d2a92f4
author Filip Navara <filip.navara@gmail.com> Thu Oct 15 12:55:26 2009 +0200
committer Aurelien Jarno <aurelien@aurel32.net> Sat Oct 17 23:52:17 2009 +0200
tree 5a38bfdd1a59e8fe14f1f66ef0948d7b615373f4
parent 194576157afb34f7ce69cde800bf9715c730b39f

target-arm: fix TANDC and TORC instructions

Uninitialized register was used instead of proper TCG variable.

Signed-off-by: Filip Navara <filip.navara@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

target-arm/translate.c

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 8c5afb7..454d67f 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -1898,6 +1898,7 @@
         if ((insn & 0x000ff00f) != 0x0003f000)
             return 1;
         gen_op_iwmmxt_movl_T1_wCx(ARM_IWMMXT_wCASF);
+        gen_op_movl_T0_T1();
         switch ((insn >> 22) & 3) {
         case 0:
             for (i = 0; i < 7; i ++) {
@@ -1944,6 +1945,7 @@
         if ((insn & 0x000ff00f) != 0x0003f000)
             return 1;
         gen_op_iwmmxt_movl_T1_wCx(ARM_IWMMXT_wCASF);
+        gen_op_movl_T0_T1();
         switch ((insn >> 22) & 3) {
         case 0:
             for (i = 0; i < 7; i ++) {