commit | 152f0bf0c90130cbe4aeaa1c74f586fb9606647c | [log] [tgz] |
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author | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | Wed Mar 16 17:46:42 2022 +0100 |
committer | Peter Maydell <peter.maydell@linaro.org> | Fri Mar 18 11:31:20 2022 +0000 |
tree | 8297858a8cc3a04da343c60f6f2ec7072cbd5f12 | |
parent | 4a7319b750d2a465c9697fb0c72584c5d4e9073a [diff] |
hw/misc: Add a model of the Xilinx ZynqMP CRF Add a model of the Xilinx ZynqMP CRF. At the moment this is mostly a stub model. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20220316164645.2303510-4-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>