commit 11e66bca8ab0985e988e7c2fd019b743d79b4732
author Blue Swirl <blauwirbel@gmail.com> Sun Sep 11 15:05:41 2011 +0000
committer Blue Swirl <blauwirbel@gmail.com> Wed Oct 26 17:18:58 2011 +0000
tree a7ab48fcba8f7f02ad81708c3452ef6fa7dcbe9e
parent ec0ceb1759317a8c0e4b4fd63087aca8ecb6cf96

Sparc: convert interrupt helpers to trace framework

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>

trace-events

diff --git a/trace-events b/trace-events
index 7b5aa91..0cc1f66 100644
--- a/trace-events
+++ b/trace-events
@@ -609,3 +609,10 @@
 mmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64""
 mmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64""
 mmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at %"PRIx64" -> %"PRIx64", mmu_idx=%d tl=%d primary context=%"PRIx64" secondary context=%"PRIx64""
+
+# target-sparc/int_helper.c
+int_helper_set_softint(uint32_t softint) "new %08x"
+int_helper_clear_softint(uint32_t softint) "new %08x"
+int_helper_write_softint(uint32_t softint) "new %08x"
+int_helper_icache_freeze(void) "Instruction cache: freeze"
+int_helper_dcache_freeze(void) "Data cache: freeze"