target/sh4: Remove target_ulong uses in superh_cpu_get_phys_page_debug
The CPUClass::get_phys_page_debug() handler takes a 'vaddr' address
type since commit 00b941e581b ("cpu: Turn cpu_get_phys_page_debug()
into a CPUClass hook").
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20251008064814.90520-5-philmd@linaro.org>
diff --git a/target/sh4/helper.c b/target/sh4/helper.c
index 55ab1dc..f5c37c2 100644
--- a/target/sh4/helper.c
+++ b/target/sh4/helper.c
@@ -231,11 +231,11 @@
/* Find the corresponding entry in the right TLB
Return entry, MMU_DTLB_MISS or MMU_DTLB_MULTIPLE
*/
-static int find_tlb_entry(CPUSH4State * env, target_ulong address,
+static int find_tlb_entry(CPUSH4State *env, vaddr address,
tlb_t * entries, uint8_t nbtlb, int use_asid)
{
int match = MMU_DTLB_MISS;
- uint32_t start, end;
+ vaddr start, end;
uint8_t asid;
int i;
@@ -291,7 +291,7 @@
/* Find itlb entry
Return entry, MMU_ITLB_MISS, MMU_ITLB_MULTIPLE or MMU_DTLB_MULTIPLE
*/
-static int find_itlb_entry(CPUSH4State * env, target_ulong address,
+static int find_itlb_entry(CPUSH4State *env, vaddr address,
int use_asid)
{
int e;
@@ -309,7 +309,7 @@
/* Find utlb entry
Return entry, MMU_DTLB_MISS, MMU_DTLB_MULTIPLE */
-static int find_utlb_entry(CPUSH4State * env, target_ulong address, int use_asid)
+static int find_utlb_entry(CPUSH4State *env, vaddr address, int use_asid)
{
/* per utlb access */
increment_urc(env);
@@ -326,7 +326,7 @@
MMU_IADDR_ERROR, MMU_DADDR_ERROR_READ, MMU_DADDR_ERROR_WRITE.
*/
static int get_mmu_address(CPUSH4State *env, hwaddr *physical,
- int *prot, target_ulong address,
+ int *prot, vaddr address,
MMUAccessType access_type)
{
int use_asid, n;
@@ -393,7 +393,7 @@
}
static int get_physical_address(CPUSH4State *env, hwaddr* physical,
- int *prot, target_ulong address,
+ int *prot, vaddr address,
MMUAccessType access_type)
{
/* P1, P2 and P4 areas do not use translation */