commit 0c88f93788d33795a4c14a0ca999607a6546f8b8
author Peter Maydell <peter.maydell@linaro.org> Tue Mar 14 17:08:04 2023 +0000
committer Peter Maydell <peter.maydell@linaro.org> Tue Mar 21 11:54:39 2023 +0000
tree 59cc43088c23acbe8dbf743112fe71077c67148b
parent 0b903369951cac12ccdfc66a7520b413eca1bb62

hw/char/cadence_uart: Fix guards on invalid BRGR/BDIV settings

The cadence UART attempts to avoid allowing the guest to set invalid
baud rate register values in the uart_write() function.  However it
does the "mask to the size of the register field" and "check for
invalid values" in the wrong order, which means that a malicious
guest can get a bogus value into the register by setting also some
high bits in the value, and cause QEMU to crash by division-by-zero.

Do the mask before the bounds check instead of afterwards.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1493
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com>
Reviewed-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Qiang Liu <cyruscyliu@gmail.com>
Message-id: 20230314170804.1196232-1-peter.maydell@linaro.org