commit 07c485ce78b60de7a40e4606f1f95d9c492d52ed
author blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> Sat Feb 21 17:29:14 2009 +0000
committer blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> Sat Feb 21 17:29:14 2009 +0000
tree 927eb066ac7818aeba2c6c7dd6986a77069b3de4
parent 415fc9061894a04e7a5a01fcafe3745b9064a93a

Turn MMU off on reset

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6637 c046a42c-6fe2-441c-8c8c-71466251a162

target-ppc/helper.c

diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index fc62a63..e02dcb0 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -2735,12 +2735,12 @@
     msr |= (target_ulong)1 << MSR_VR; /* Allow altivec usage */
     msr |= (target_ulong)1 << MSR_SPE; /* Allow SPE usage */
     msr |= (target_ulong)1 << MSR_PR;
-    env->msr = msr & env->msr_mask;
 #else
     env->nip = env->hreset_vector | env->excp_prefix;
     if (env->mmu_model != POWERPC_MMU_REAL)
         ppc_tlb_invalidate_all(env);
 #endif
+    env->msr = msr & env->msr_mask;
     hreg_compute_hflags(env);
     env->reserve = (target_ulong)-1ULL;
     /* Be sure no exception or interrupt is pending */