commit | 07741e67542d061b45628a5de60637b006ca2de5 | [log] [tgz] |
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author | Philippe Mathieu-Daudé <f4bug@amsat.org> | Fri Dec 04 23:16:45 2020 +0100 |
committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | Sun Dec 13 20:26:02 2020 +0100 |
tree | bd41aa3ae517b298e95b7046fd4379939986e372 | |
parent | 8de0f2804676decfa82ce51ef18293523e67af32 [diff] |
hw/mips/malta: Rewrite CP0_MVPConf0 access using deposit() PTC field has 8 bits, PVPE has 4. We plan to use the "hw/registerfields.h" API with MIPS CPU definitions (target/mips/cpu.h). Meanwhile we use magic 8 and 4. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201204222622.2743175-6-f4bug@amsat.org>