)]}'
{
  "commit": "0559e60669bae9c047cd5cf6f9be38ea7ced39b2",
  "tree": "5e509288283e6b6f46548b4cd9ac3806560aa42e",
  "parents": [
    "6330be8da44cf11e429197187e814299eff881cd"
  ],
  "author": {
    "name": "Jamin Lin",
    "email": "jamin_lin@aspeedtech.com",
    "time": "Tue Jun 04 13:44:30 2024 +0800"
  },
  "committer": {
    "name": "Cédric Le Goater",
    "email": "clg@redhat.com",
    "time": "Sun Jun 16 21:08:54 2024 +0200"
  },
  "message": "aspeed/smc: support different memory region ops for SMC flash region\n\nIt set \"aspeed_smc_flash_ops\" struct which containing\nread and write callbacks to be used when I/O is performed\non the SMC flash region. And it set the valid max_access_size 4\nby default for all ASPEED SMC models.\n\nHowever, the valid max_access_size 4 only support 32 bits CPUs.\nTo support all ASPEED SMC model, introduce a new\n\"const MemoryRegionOps *\" attribute in AspeedSMCClass and\nuse it in aspeed_smc_flash_realize function.\n\nSigned-off-by: Troy Lee \u003ctroy_lee@aspeedtech.com\u003e\nSigned-off-by: Jamin Lin \u003cjamin_lin@aspeedtech.com\u003e\nReviewed-by: Cédric Le Goater \u003cclg@redhat.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "df0c63469cd7f1146652d83f08561a47857ebe94",
      "old_mode": 33188,
      "old_path": "hw/ssi/aspeed_smc.c",
      "new_id": "129d06690d36a76c4f1d1d65957f7ffbb93574a2",
      "new_mode": 33188,
      "new_path": "hw/ssi/aspeed_smc.c"
    },
    {
      "type": "modify",
      "old_id": "d305ce2e2feaac82f61dc18499ff52e87ef37959",
      "old_mode": 33188,
      "old_path": "include/hw/ssi/aspeed_smc.h",
      "new_id": "234dca32b0172799d362f3abfdd99e4d6c9f376b",
      "new_mode": 33188,
      "new_path": "include/hw/ssi/aspeed_smc.h"
    }
  ]
}