commit 029b0283dfe64c38e48f9dd9aad0dc6d254c4ea4
author Richard Henderson <richard.henderson@linaro.org> Sat Nov 04 18:31:59 2023 -0700
committer Richard Henderson <richard.henderson@linaro.org> Wed Jun 05 09:08:39 2024 -0700
tree 25df031c4500638fd437912c34b7bc72b8b7f81c
parent 680af1b4a523cd7f15690cad7afb069e6efbbec0

target/sparc: Implement XMULX

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

target/sparc/helper.h

diff --git a/target/sparc/helper.h b/target/sparc/helper.h
index 4ae9786..fe0d8bc 100644
--- a/target/sparc/helper.h
+++ b/target/sparc/helper.h
@@ -135,6 +135,8 @@
 DEF_HELPER_FLAGS_2(fcmpne8, TCG_CALL_NO_RWG_SE, i64, i64, i64)
 DEF_HELPER_FLAGS_2(fcmpule8, TCG_CALL_NO_RWG_SE, i64, i64, i64)
 DEF_HELPER_FLAGS_2(fcmpugt8, TCG_CALL_NO_RWG_SE, i64, i64, i64)
+DEF_HELPER_FLAGS_2(xmulx, TCG_CALL_NO_RWG_SE, i64, i64, i64)
+DEF_HELPER_FLAGS_2(xmulxhi, TCG_CALL_NO_RWG_SE, i64, i64, i64)
 #endif
 #undef VIS_HELPER
 #undef VIS_CMPHELPER

target/sparc/insns.decode

diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode
index 508175e..1d54de5 100644
--- a/target/sparc/insns.decode
+++ b/target/sparc/insns.decode
@@ -391,6 +391,8 @@
     ADDXCcc     10 ..... 110110 ..... 0 0001 0011 .....    @r_r_r
     UMULXHI     10 ..... 110110 ..... 0 0001 0110 .....    @r_r_r
     LZCNT       10 ..... 110110 00000 0 0001 0111 .....    @r_r2
+    XMULX       10 ..... 110110 ..... 1 0001 0101 .....    @r_r_r
+    XMULXHI     10 ..... 110110 ..... 1 0001 0110 .....    @r_r_r
 
     ALIGNADDR   10 ..... 110110 ..... 0 0001 1000 .....    @r_r_r
     ALIGNADDRL  10 ..... 110110 ..... 0 0001 1010 .....    @r_r_r

target/sparc/translate.c

diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 2a38152..971e7da 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -90,6 +90,8 @@
 # define gen_helper_fxtoq                ({ qemu_build_not_reached(); NULL; })
 # define gen_helper_fxtos                ({ qemu_build_not_reached(); NULL; })
 # define gen_helper_pdist                ({ qemu_build_not_reached(); NULL; })
+# define gen_helper_xmulx                ({ qemu_build_not_reached(); NULL; })
+# define gen_helper_xmulxhi              ({ qemu_build_not_reached(); NULL; })
 # define MAXTL_MASK                             0
 #endif
 
@@ -5088,6 +5090,8 @@
 TRANS(FPCMPUGT8, VIS3B, do_rdd, a, gen_helper_fcmpugt8)
 
 TRANS(PDISTN, VIS3, do_rdd, a, gen_op_pdistn)
+TRANS(XMULX, VIS3, do_rrr, a, gen_helper_xmulx)
+TRANS(XMULXHI, VIS3, do_rrr, a, gen_helper_xmulxhi)
 
 static bool do_env_ddd(DisasContext *dc, arg_r_r_r *a,
                        void (*func)(TCGv_i64, TCGv_env, TCGv_i64, TCGv_i64))

target/sparc/vis_helper.c

diff --git a/target/sparc/vis_helper.c b/target/sparc/vis_helper.c
index c21522c..c927a05 100644
--- a/target/sparc/vis_helper.c
+++ b/target/sparc/vis_helper.c
@@ -20,6 +20,7 @@
 #include "qemu/osdep.h"
 #include "cpu.h"
 #include "exec/helper-proto.h"
+#include "crypto/clmul.h"
 
 target_ulong helper_array8(target_ulong rs1, target_ulong rs2)
 {
@@ -509,3 +510,13 @@
 
     return r.ll;
 }
+
+uint64_t helper_xmulx(uint64_t src1, uint64_t src2)
+{
+    return int128_getlo(clmul_64(src1, src2));
+}
+
+uint64_t helper_xmulxhi(uint64_t src1, uint64_t src2)
+{
+    return int128_gethi(clmul_64(src1, src2));
+}