commit 028e2a7b876631eff165cac59eb43bdb2dcc213b
author Richard Henderson <richard.henderson@linaro.org> Fri May 18 17:48:08 2018 +0100
committer Peter Maydell <peter.maydell@linaro.org> Fri May 18 17:48:08 2018 +0100
tree 57d7c599b16fb58b73a0201136dc94f4a2ac9004
parent 516e246a1a292f6c6f6aad5451799accbb08acd9

target/arm: Implement SVE Predicate Misc Group

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

target/arm/cpu.h

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index df21e14..8488273 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -540,6 +540,7 @@
 
 #ifdef TARGET_AARCH64
         /* Store FFR as pregs[16] to make it easier to treat as any other.  */
+#define FFR_PRED_NUM 16
         ARMPredicateReg pregs[17];
         /* Scratch space for aa64 sve predicate temporary.  */
         ARMPredicateReg preg_tmp;
@@ -2975,4 +2976,7 @@
     return &env->vfp.zregs[regno].d[0];
 }
 
+/* Shared between translate-sve.c and sve_helper.c.  */
+extern const uint64_t pred_esz_masks[4];
+
 #endif