)]}'
{
  "commit": "01f13ee24578e7a1ab91bb6b2dac1c84c1902bf2",
  "tree": "303e57194cf65b8f7ed37a502e1a1bf0814fe643",
  "parents": [
    "032a443be6ae472d9b2cb19ed03afe302f47e47f"
  ],
  "author": {
    "name": "BALATON Zoltan",
    "email": "balaton@eik.bme.hu",
    "time": "Sun Nov 26 23:49:31 2023 +0100"
  },
  "committer": {
    "name": "Philippe Mathieu-Daudé",
    "email": "philmd@linaro.org",
    "time": "Tue Nov 28 14:26:37 2023 +0100"
  },
  "message": "hw/isa/vt82c686: Route PIRQ inputs using via_isa_set_irq()\n\nThe chip has 4 pins (called PIRQA-D in VT82C686B and PINTA-D in\nVT8231) that are meant to be connected to PCI IRQ lines and allow\nrouting PCI interrupts to the ISA PIC. Route these in\nvia_isa_set_irq() to make it possible to share them with internal\nfunctions that can also be routed to the same ISA IRQs.\n\nFixes: 2fdadd02e675caca4aba4ae26317701fe2c4c901\nSigned-off-by: BALATON Zoltan \u003cbalaton@eik.bme.hu\u003e\nMessage-ID: \u003c8c4513d8b78fac40e6d4e65a0a4b3a7f2f278a4b.1701035944.git.balaton@eik.bme.hu\u003e\nSigned-off-by: Philippe Mathieu-Daudé \u003cphilmd@linaro.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "6fad8293e6592923f78e9ed5e46e03cab89250eb",
      "old_mode": 33188,
      "old_path": "hw/isa/vt82c686.c",
      "new_id": "a3eb6769fc62368b74627cd02732a5fe7d38d5bf",
      "new_mode": 33188,
      "new_path": "hw/isa/vt82c686.c"
    }
  ]
}