)]}'
{
  "commit": "d861447b0b0297db5fbe28878f8568a93fcfa965",
  "tree": "c4337e0d785550676ff63da8d2cd6e350bbf9683",
  "parents": [
    "adb4caf765cc977c8de6534d0bf77df9dd243e41"
  ],
  "author": {
    "name": "Anup Patel",
    "email": "anup.patel@oss.qualcomm.com",
    "time": "Thu Apr 23 10:53:37 2026 +0530"
  },
  "committer": {
    "name": "Anup Patel",
    "email": "anup@brainfault.org",
    "time": "Tue May 12 09:55:58 2026 +0530"
  },
  "message": "lib: sbi_irqchip: Allow marking hardware interrupts as reserved\n\nSome of the hardware interrupts may be special so allow irqchip\ndrivers to make these hardware interrupts as reserved. Introduce\nsbi_irqchip_register_reserved() for this purpose.\n\nSigned-off-by: Anup Patel \u003canup.patel@oss.qualcomm.com\u003e\nLink: https://lore.kernel.org/r/20260423052339.356900-5-anup.patel@oss.qualcomm.com\nSigned-off-by: Anup Patel \u003canup@brainfault.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "9035dcefde4b7a83803dd75c47356c1b5d2086bc",
      "old_mode": 33188,
      "old_path": "include/sbi/sbi_irqchip.h",
      "new_id": "880ff49f793831f87c7484f439a88cc9ba83d2bf",
      "new_mode": 33188,
      "new_path": "include/sbi/sbi_irqchip.h"
    },
    {
      "type": "modify",
      "old_id": "ea684303712d685b9fb15f2135d150eec9e943f6",
      "old_mode": 33188,
      "old_path": "lib/sbi/sbi_irqchip.c",
      "new_id": "15ea2211d863424d648a8a8da14d2b8f556aa523",
      "new_mode": 33188,
      "new_path": "lib/sbi/sbi_irqchip.c"
    },
    {
      "type": "modify",
      "old_id": "877255f86ece40b0539318c15af0569dc9f1fdae",
      "old_mode": 33188,
      "old_path": "lib/utils/irqchip/imsic.c",
      "new_id": "521d17fe4229831b608b876cd8d7c7a631401c94",
      "new_mode": 33188,
      "new_path": "lib/utils/irqchip/imsic.c"
    }
  ]
}