)]}'
{
  "commit": "b63606f98180cb92cc7c47c42b63bf92a21dfdee",
  "tree": "37d67109b474509e9fce3f861eae0ff8b04355b9",
  "parents": [
    "5d248a013281ea80be3375cfc19e8ca541d33c34"
  ],
  "author": {
    "name": "Evgeny Voevodin",
    "email": "evvoevod@tenstorrent.com",
    "time": "Thu May 07 18:08:03 2026 +0000"
  },
  "committer": {
    "name": "Anup Patel",
    "email": "anup@brainfault.org",
    "time": "Sat May 09 12:59:43 2026 +0530"
  },
  "message": "lib: sbi: Add Smrnmi extension macros for registers and bits\n\nAdd CSR definitions (MNSCRATCH, MNSTATUS, MNEPC, MNCAUSE) and bit definitions\n(MNSTATUS_NMIE, MNSTATUS_MNPV, MNSTATUS_MNPP). Also add SBI_HART_EXT_SMRNMI to\nthe hart extension enumeration.\n\nSigned-off-by: Evgeny Voevodin \u003cevvoevod@tenstorrent.com\u003e\nReviewed-by: Anup Patel \u003canup@brainfault.org\u003e\nLink: https://lore.kernel.org/r/1c6feb6d359b9827b3c2ad8f4f0e0a4dfd1de911.1778176768.git.evvoevod@tenstorrent.com\nSigned-off-by: Anup Patel \u003canup@brainfault.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "3c1d5256e9b8f081bf35676636989d3bd1aab7d6",
      "old_mode": 33188,
      "old_path": "include/sbi/riscv_encoding.h",
      "new_id": "18f7b4a74442fa99c187d716b3ac6ad4795e3bad",
      "new_mode": 33188,
      "new_path": "include/sbi/riscv_encoding.h"
    },
    {
      "type": "modify",
      "old_id": "a788b34cd52e50c7e222a4cd64538349997d7da9",
      "old_mode": 33188,
      "old_path": "include/sbi/sbi_hart.h",
      "new_id": "937cdf298499f149b5ba277a42c7aaecfb97cea5",
      "new_mode": 33188,
      "new_path": "include/sbi/sbi_hart.h"
    },
    {
      "type": "modify",
      "old_id": "99e13990aa6046234cc51f2ad8035991fd9a1620",
      "old_mode": 33188,
      "old_path": "lib/sbi/sbi_hart.c",
      "new_id": "4aefb759b98379136837d1c782a240c871975828",
      "new_mode": 33188,
      "new_path": "lib/sbi/sbi_hart.c"
    }
  ]
}