)]}'
{
  "commit": "255df5d8022ada847e81bc68a81e0828e693f6ba",
  "tree": "761e4ac2b249d03d7e519bc582b7dbf2091bc6ae",
  "parents": [
    "0d81a78ec54be2f7c62906b1aa945240ce519c6b"
  ],
  "author": {
    "name": "Anup Patel",
    "email": "anup.patel@oss.qualcomm.com",
    "time": "Thu Apr 23 10:53:35 2026 +0530"
  },
  "committer": {
    "name": "Anup Patel",
    "email": "anup@brainfault.org",
    "time": "Tue May 12 09:55:58 2026 +0530"
  },
  "message": "lib: sbi_irqchip: Keep the handler list in sorted order for irqchip\n\nLet\u0027s keep the handler list in sorted order for irqchip so that\nit is easier to allocate unused hardware interrupts based on the\nsorted list.\n\nSigned-off-by: Anup Patel \u003canup.patel@oss.qualcomm.com\u003e\nLink: https://lore.kernel.org/r/20260423052339.356900-3-anup.patel@oss.qualcomm.com\nSigned-off-by: Anup Patel \u003canup@brainfault.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "503958e1975423a0b2381a8da9e16163f0b368a4",
      "old_mode": 33188,
      "old_path": "lib/sbi/sbi_irqchip.c",
      "new_id": "f9e2eb5afc8a7698b87f2c7f8f8a73215ad1e3ed",
      "new_mode": 33188,
      "new_path": "lib/sbi/sbi_irqchip.c"
    }
  ]
}