[efi] Update to current EDK2 headers
Signed-off-by: Michael Brown <mcb30@ipxe.org>
diff --git a/src/include/ipxe/efi/AArch64/ProcessorBind.h b/src/include/ipxe/efi/AArch64/ProcessorBind.h
index 909b5cd..d0cb86a 100644
--- a/src/include/ipxe/efi/AArch64/ProcessorBind.h
+++ b/src/include/ipxe/efi/AArch64/ProcessorBind.h
@@ -1,24 +1,18 @@
/** @file
Processor or Compiler specific defines and types for AArch64.
- Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __PROCESSOR_BIND_H__
#define __PROCESSOR_BIND_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
///
/// Define the processor type so other code can make processor based choices
@@ -28,53 +22,102 @@
//
// Make sure we are using the correct packing rules per EFI specification
//
-#ifndef __GNUC__
-#pragma pack()
+#if !defined (__GNUC__) && !defined (__ASSEMBLER__)
+ #pragma pack()
#endif
-#if _MSC_EXTENSIONS
- //
- // use Microsoft* C compiler dependent integer width types
- //
- typedef unsigned __int64 UINT64;
- typedef __int64 INT64;
- typedef unsigned __int32 UINT32;
- typedef __int32 INT32;
- typedef unsigned short UINT16;
- typedef unsigned short CHAR16;
- typedef short INT16;
- typedef unsigned char BOOLEAN;
- typedef unsigned char UINT8;
- typedef char CHAR8;
- typedef signed char INT8;
+#if defined (_MSC_EXTENSIONS)
+
+//
+// Disable some level 4 compilation warnings (same as IA32 and X64)
+//
+
+//
+// Disabling bitfield type checking warnings.
+//
+ #pragma warning ( disable : 4214 )
+
+//
+// Disabling the unreferenced formal parameter warnings.
+//
+ #pragma warning ( disable : 4100 )
+
+//
+// Disable slightly different base types warning as CHAR8 * can not be set
+// to a constant string.
+//
+ #pragma warning ( disable : 4057 )
+
+//
+// ASSERT(FALSE) or while (TRUE) are legal constructs so suppress this warning
+//
+ #pragma warning ( disable : 4127 )
+
+//
+// This warning is caused by functions defined but not used. For precompiled header only.
+//
+ #pragma warning ( disable : 4505 )
+
+//
+// This warning is caused by empty (after preprocessing) source file. For precompiled header only.
+//
+ #pragma warning ( disable : 4206 )
+
+//
+// Disable 'potentially uninitialized local variable X used' warnings
+//
+ #pragma warning ( disable : 4701 )
+
+//
+// Disable 'potentially uninitialized local pointer variable X used' warnings
+//
+ #pragma warning ( disable : 4703 )
+
+//
+// use Microsoft* C compiler dependent integer width types
+//
+typedef unsigned __int64 UINT64;
+typedef __int64 INT64;
+typedef unsigned __int32 UINT32;
+typedef __int32 INT32;
+typedef unsigned short UINT16;
+typedef unsigned short CHAR16;
+typedef short INT16;
+typedef unsigned char BOOLEAN;
+typedef unsigned char UINT8;
+typedef char CHAR8;
+typedef signed char INT8;
+
#else
- //
- // Assume standard AARCH64 alignment.
- //
- typedef unsigned long long UINT64;
- typedef long long INT64;
- typedef unsigned int UINT32;
- typedef int INT32;
- typedef unsigned short UINT16;
- typedef unsigned short CHAR16;
- typedef short INT16;
- typedef unsigned char BOOLEAN;
- typedef unsigned char UINT8;
- typedef char CHAR8;
- typedef signed char INT8;
+
+//
+// Assume standard AARCH64 alignment.
+//
+typedef unsigned long long UINT64;
+typedef long long INT64;
+typedef unsigned int UINT32;
+typedef int INT32;
+typedef unsigned short UINT16;
+typedef unsigned short CHAR16;
+typedef short INT16;
+typedef unsigned char BOOLEAN;
+typedef unsigned char UINT8;
+typedef char CHAR8;
+typedef signed char INT8;
+
#endif
///
/// Unsigned value of native width. (4 bytes on supported 32-bit processor instructions,
/// 8 bytes on supported 64-bit processor instructions)
///
-typedef UINT64 UINTN;
+typedef UINT64 UINTN;
///
/// Signed value of native width. (4 bytes on supported 32-bit processor instructions,
/// 8 bytes on supported 64-bit processor instructions)
///
-typedef INT64 INTN;
+typedef INT64 INTN;
//
// Processor specific defines
@@ -83,7 +126,7 @@
///
/// A value of native width with the highest bit set.
///
-#define MAX_BIT 0x8000000000000000ULL
+#define MAX_BIT 0x8000000000000000ULL
///
/// A value of native width with the two highest bits set.
@@ -93,7 +136,12 @@
///
/// Maximum legal AARCH64 address
///
-#define MAX_ADDRESS 0xFFFFFFFFFFFFFFFFULL
+#define MAX_ADDRESS 0xFFFFFFFFFFFFFFFFULL
+
+///
+/// Maximum usable address at boot time (48 bits using 4 KB pages)
+///
+#define MAX_ALLOC_ADDRESS 0xFFFFFFFFFFFFULL
///
/// Maximum legal AArch64 INTN and UINTN values.
@@ -102,6 +150,11 @@
#define MAX_UINTN ((UINTN)0xFFFFFFFFFFFFFFFFULL)
///
+/// Minimum legal AArch64 INTN value.
+///
+#define MIN_INTN (((INTN)-9223372036854775807LL) - 1)
+
+///
/// The stack alignment required for AARCH64
///
#define CPU_STACK_ALIGNMENT 16
@@ -109,8 +162,8 @@
///
/// Page allocation granularity for AARCH64
///
-#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000)
-#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x10000)
+#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000)
+#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x10000)
//
// Modifier to ensure that all protocol member functions and EFI intrinsics
@@ -121,18 +174,18 @@
// When compiling with Clang, we still use GNU as for the assembler, so we still
// need to define the GCC_ASM* macros.
-#if defined(__GNUC__) || defined(__clang__)
- ///
- /// For GNU assembly code, .global or .globl can declare global symbols.
- /// Define this macro to unify the usage.
- ///
- #define ASM_GLOBAL .globl
+#if defined (__GNUC__) || defined (__clang__)
+///
+/// For GNU assembly code, .global or .globl can declare global symbols.
+/// Define this macro to unify the usage.
+///
+#define ASM_GLOBAL .globl
- #define GCC_ASM_EXPORT(func__) \
+#define GCC_ASM_EXPORT(func__) \
.global _CONCATENATE (__USER_LABEL_PREFIX__, func__) ;\
.type ASM_PFX(func__), %function
- #define GCC_ASM_IMPORT(func__) \
+#define GCC_ASM_IMPORT(func__) \
.extern _CONCATENATE (__USER_LABEL_PREFIX__, func__)
#endif
@@ -147,7 +200,7 @@
@return The pointer to the first instruction of a function given a function pointer.
**/
-#define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID *)(UINTN)(FunctionPointer)
+#define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID *)(UINTN)(FunctionPointer)
#ifndef __USER_LABEL_PREFIX__
#define __USER_LABEL_PREFIX__
diff --git a/src/include/ipxe/efi/Arm/ProcessorBind.h b/src/include/ipxe/efi/Arm/ProcessorBind.h
index efe3bf1..6d558a2 100644
--- a/src/include/ipxe/efi/Arm/ProcessorBind.h
+++ b/src/include/ipxe/efi/Arm/ProcessorBind.h
@@ -1,22 +1,16 @@
/** @file
Processor or Compiler specific defines and types for ARM.
- Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __PROCESSOR_BIND_H__
#define __PROCESSOR_BIND_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
///
/// Define the processor type so other code can make processor based choices
@@ -26,61 +20,110 @@
//
// Make sure we are using the correct packing rules per EFI specification
//
-#ifndef __GNUC__
-#pragma pack()
+#if !defined (__GNUC__) && !defined (__ASSEMBLER__)
+ #pragma pack()
+#endif
+
+#if defined (_MSC_EXTENSIONS)
+
+//
+// Disable some level 4 compilation warnings (same as IA32 and X64)
+//
+
+//
+// Disabling bitfield type checking warnings.
+//
+ #pragma warning ( disable : 4214 )
+
+//
+// Disabling the unreferenced formal parameter warnings.
+//
+ #pragma warning ( disable : 4100 )
+
+//
+// Disable slightly different base types warning as CHAR8 * can not be set
+// to a constant string.
+//
+ #pragma warning ( disable : 4057 )
+
+//
+// ASSERT(FALSE) or while (TRUE) are legal constructs so suppress this warning
+//
+ #pragma warning ( disable : 4127 )
+
+//
+// This warning is caused by functions defined but not used. For precompiled header only.
+//
+ #pragma warning ( disable : 4505 )
+
+//
+// This warning is caused by empty (after preprocessing) source file. For precompiled header only.
+//
+ #pragma warning ( disable : 4206 )
+
+//
+// Disable 'potentially uninitialized local variable X used' warnings
+//
+ #pragma warning ( disable : 4701 )
+
+//
+// Disable 'potentially uninitialized local pointer variable X used' warnings
+//
+ #pragma warning ( disable : 4703 )
+
#endif
//
-// RVCT does not support the __builtin_unreachable() macro
+// MSFT doesn't support the __builtin_unreachable() macro
//
-#ifdef __ARMCC_VERSION
+#if defined (_MSC_EXTENSIONS)
#define UNREACHABLE()
#endif
-#if _MSC_EXTENSIONS
- //
- // use Microsoft* C compiler dependent integer width types
- //
- typedef unsigned __int64 UINT64;
- typedef __int64 INT64;
- typedef unsigned __int32 UINT32;
- typedef __int32 INT32;
- typedef unsigned short UINT16;
- typedef unsigned short CHAR16;
- typedef short INT16;
- typedef unsigned char BOOLEAN;
- typedef unsigned char UINT8;
- typedef char CHAR8;
- typedef signed char INT8;
+#if defined (_MSC_EXTENSIONS)
+//
+// use Microsoft* C compiler dependent integer width types
+//
+typedef unsigned __int64 UINT64;
+typedef __int64 INT64;
+typedef unsigned __int32 UINT32;
+typedef __int32 INT32;
+typedef unsigned short UINT16;
+typedef unsigned short CHAR16;
+typedef short INT16;
+typedef unsigned char BOOLEAN;
+typedef unsigned char UINT8;
+typedef char CHAR8;
+typedef signed char INT8;
#else
- //
- // Assume standard ARM alignment.
- // Need to check portability of long long
- //
- typedef unsigned long long UINT64;
- typedef long long INT64;
- typedef unsigned int UINT32;
- typedef int INT32;
- typedef unsigned short UINT16;
- typedef unsigned short CHAR16;
- typedef short INT16;
- typedef unsigned char BOOLEAN;
- typedef unsigned char UINT8;
- typedef char CHAR8;
- typedef signed char INT8;
+//
+// Assume standard ARM alignment.
+// Need to check portability of long long
+//
+typedef unsigned long long UINT64;
+typedef long long INT64;
+typedef unsigned int UINT32;
+typedef int INT32;
+typedef unsigned short UINT16;
+typedef unsigned short CHAR16;
+typedef short INT16;
+typedef unsigned char BOOLEAN;
+typedef unsigned char UINT8;
+typedef char CHAR8;
+typedef signed char INT8;
#endif
///
/// Unsigned value of native width. (4 bytes on supported 32-bit processor instructions,
/// 8 bytes on supported 64-bit processor instructions)
///
-typedef UINT32 UINTN;
+typedef UINT32 UINTN;
///
/// Signed value of native width. (4 bytes on supported 32-bit processor instructions,
/// 8 bytes on supported 64-bit processor instructions)
///
-typedef INT32 INTN;
+typedef INT32 INTN;
//
// Processor specific defines
@@ -89,12 +132,12 @@
///
/// A value of native width with the highest bit set.
///
-#define MAX_BIT 0x80000000
+#define MAX_BIT 0x80000000
///
/// A value of native width with the two highest bits set.
///
-#define MAX_2_BITS 0xC0000000
+#define MAX_2_BITS 0xC0000000
///
/// Maximum legal ARM address
@@ -102,12 +145,22 @@
#define MAX_ADDRESS 0xFFFFFFFF
///
+/// Maximum usable address at boot time
+///
+#define MAX_ALLOC_ADDRESS MAX_ADDRESS
+
+///
/// Maximum legal ARM INTN and UINTN values.
///
#define MAX_INTN ((INTN)0x7FFFFFFF)
#define MAX_UINTN ((UINTN)0xFFFFFFFF)
///
+/// Minimum legal ARM INTN value.
+///
+#define MIN_INTN (((INTN)-2147483647) - 1)
+
+///
/// The stack alignment required for ARM
///
#define CPU_STACK_ALIGNMENT sizeof(UINT64)
@@ -115,8 +168,8 @@
///
/// Page allocation granularity for ARM
///
-#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000)
-#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x1000)
+#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000)
+#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x1000)
//
// Modifier to ensure that all protocol member functions and EFI intrinsics
@@ -127,40 +180,45 @@
// When compiling with Clang, we still use GNU as for the assembler, so we still
// need to define the GCC_ASM* macros.
-#if defined(__GNUC__) || defined(__clang__)
- ///
- /// For GNU assembly code, .global or .globl can declare global symbols.
- /// Define this macro to unify the usage.
- ///
- #define ASM_GLOBAL .globl
+#if defined (__GNUC__) || defined (__clang__)
+///
+/// For GNU assembly code, .global or .globl can declare global symbols.
+/// Define this macro to unify the usage.
+///
+#define ASM_GLOBAL .globl
- #if !defined(__APPLE__)
- ///
- /// ARM EABI defines that the linker should not manipulate call relocations
- /// (do bl/blx conversion) unless the target symbol has function type.
- /// CodeSourcery 2010.09 started requiring the .type to function properly
- ///
- #define INTERWORK_FUNC(func__) .type ASM_PFX(func__), %function
+ #if !defined (__APPLE__)
+///
+/// ARM EABI defines that the linker should not manipulate call relocations
+/// (do bl/blx conversion) unless the target symbol has function type.
+/// CodeSourcery 2010.09 started requiring the .type to function properly
+///
+#define INTERWORK_FUNC(func__) .type ASM_PFX(func__), %function
- #define GCC_ASM_EXPORT(func__) \
+#define GCC_ASM_EXPORT(func__) \
.global _CONCATENATE (__USER_LABEL_PREFIX__, func__) ;\
.type ASM_PFX(func__), %function
- #define GCC_ASM_IMPORT(func__) \
+#define GCC_ASM_IMPORT(func__) \
.extern _CONCATENATE (__USER_LABEL_PREFIX__, func__)
#else
- //
- // .type not supported by Apple Xcode tools
- //
- #define INTERWORK_FUNC(func__)
+//
+// .type not supported by Apple Xcode tools
+//
+#define INTERWORK_FUNC(func__)
- #define GCC_ASM_EXPORT(func__) \
+#define GCC_ASM_EXPORT(func__) \
.globl _CONCATENATE (__USER_LABEL_PREFIX__, func__) \
- #define GCC_ASM_IMPORT(name)
+#define GCC_ASM_IMPORT(name)
#endif
+#elif defined (_MSC_EXTENSIONS)
+//
+// PRESERVE8 is not supported by the MSFT assembler.
+//
+#define PRESERVE8
#endif
/**
@@ -173,12 +231,10 @@
@return The pointer to the first instruction of a function given a function pointer.
**/
-#define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID *)(UINTN)(FunctionPointer)
+#define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID *)(UINTN)(FunctionPointer)
#ifndef __USER_LABEL_PREFIX__
#define __USER_LABEL_PREFIX__
#endif
#endif
-
-
diff --git a/src/include/ipxe/efi/Base.h b/src/include/ipxe/efi/Base.h
index 26c90c1..b0093c6 100644
--- a/src/include/ipxe/efi/Base.h
+++ b/src/include/ipxe/efi/Base.h
@@ -6,107 +6,48 @@
environment. There are a set of base libraries in the Mde Package that can
be used to implement base modules.
-Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#ifndef __BASE_H__
#define __BASE_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
//
// Include processor specific binding
//
#include <ipxe/efi/ProcessorBind.h>
-#if defined(_MSC_EXTENSIONS)
+#if defined (_MSC_EXTENSIONS)
//
// Disable warning when last field of data structure is a zero sized array.
//
-#pragma warning ( disable : 4200 )
+ #pragma warning ( disable : 4200 )
#endif
-/**
- Verifies the storage size of a given data type.
-
- This macro generates a divide by zero error or a zero size array declaration in
- the preprocessor if the size is incorrect. These are declared as "extern" so
- the space for these arrays will not be in the modules.
-
- @param TYPE The date type to determine the size of.
- @param Size The expected size for the TYPE.
-
-**/
-#define VERIFY_SIZE_OF(TYPE, Size) extern UINT8 _VerifySizeof##TYPE[(sizeof(TYPE) == (Size)) / (sizeof(TYPE) == (Size))]
-
-//
-// Verify that ProcessorBind.h produced UEFI Data Types that are compliant with
-// Section 2.3.1 of the UEFI 2.3 Specification.
-//
-VERIFY_SIZE_OF (BOOLEAN, 1);
-VERIFY_SIZE_OF (INT8, 1);
-VERIFY_SIZE_OF (UINT8, 1);
-VERIFY_SIZE_OF (INT16, 2);
-VERIFY_SIZE_OF (UINT16, 2);
-VERIFY_SIZE_OF (INT32, 4);
-VERIFY_SIZE_OF (UINT32, 4);
-VERIFY_SIZE_OF (INT64, 8);
-VERIFY_SIZE_OF (UINT64, 8);
-VERIFY_SIZE_OF (CHAR8, 1);
-VERIFY_SIZE_OF (CHAR16, 2);
-
-//
-// The following three enum types are used to verify that the compiler
-// configuration for enum types is compliant with Section 2.3.1 of the
-// UEFI 2.3 Specification. These enum types and enum values are not
-// intended to be used. A prefix of '__' is used avoid conflicts with
-// other types.
-//
-typedef enum {
- __VerifyUint8EnumValue = 0xff
-} __VERIFY_UINT8_ENUM_SIZE;
-
-typedef enum {
- __VerifyUint16EnumValue = 0xffff
-} __VERIFY_UINT16_ENUM_SIZE;
-
-typedef enum {
- __VerifyUint32EnumValue = 0xffffffff
-} __VERIFY_UINT32_ENUM_SIZE;
-
-VERIFY_SIZE_OF (__VERIFY_UINT8_ENUM_SIZE, 4);
-VERIFY_SIZE_OF (__VERIFY_UINT16_ENUM_SIZE, 4);
-VERIFY_SIZE_OF (__VERIFY_UINT32_ENUM_SIZE, 4);
-
//
// The Microsoft* C compiler can removed references to unreferenced data items
// if the /OPT:REF linker option is used. We defined a macro as this is a
// a non standard extension
//
-#if defined(_MSC_EXTENSIONS) && !defined (MDE_CPU_EBC)
- ///
- /// Remove global variable from the linked image if there are no references to
- /// it after all compiler and linker optimizations have been performed.
- ///
- ///
- #define GLOBAL_REMOVE_IF_UNREFERENCED __declspec(selectany)
+#if defined (_MSC_VER) && _MSC_VER < 1800 && !defined (MDE_CPU_EBC)
+///
+/// Remove global variable from the linked image if there are no references to
+/// it after all compiler and linker optimizations have been performed.
+///
+///
+#define GLOBAL_REMOVE_IF_UNREFERENCED __declspec(selectany)
#else
- ///
- /// Remove the global variable from the linked image if there are no references
- /// to it after all compiler and linker optimizations have been performed.
- ///
- ///
- #define GLOBAL_REMOVE_IF_UNREFERENCED
+///
+/// Remove the global variable from the linked image if there are no references
+/// to it after all compiler and linker optimizations have been performed.
+///
+///
+#define GLOBAL_REMOVE_IF_UNREFERENCED
#endif
//
@@ -114,29 +55,28 @@
// warnings.
//
#ifndef UNREACHABLE
- #if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ > 4)
- ///
- /// Signal compilers and analyzers that this call is not reachable. It is
- /// up to the compiler to remove any code past that point.
- /// Not implemented by GCC 4.4 or earlier.
- ///
- #define UNREACHABLE() __builtin_unreachable ()
+ #ifdef __GNUC__
+///
+/// Signal compilers and analyzers that this call is not reachable. It is
+/// up to the compiler to remove any code past that point.
+///
+#define UNREACHABLE() __builtin_unreachable ()
#elif defined (__has_feature)
#if __has_builtin (__builtin_unreachable)
- ///
- /// Signal compilers and analyzers that this call is not reachable. It is
- /// up to the compiler to remove any code past that point.
- ///
- #define UNREACHABLE() __builtin_unreachable ()
+///
+/// Signal compilers and analyzers that this call is not reachable. It is
+/// up to the compiler to remove any code past that point.
+///
+#define UNREACHABLE() __builtin_unreachable ()
#endif
#endif
#ifndef UNREACHABLE
- ///
- /// Signal compilers and analyzers that this call is not reachable. It is
- /// up to the compiler to remove any code past that point.
- ///
- #define UNREACHABLE()
+///
+/// Signal compilers and analyzers that this call is not reachable. It is
+/// up to the compiler to remove any code past that point.
+///
+#define UNREACHABLE()
#endif
#endif
@@ -147,26 +87,26 @@
//
#ifndef NORETURN
#if defined (__GNUC__) || defined (__clang__)
- ///
- /// Signal compilers and analyzers that the function cannot return.
- /// It is up to the compiler to remove any code past a call to functions
- /// flagged with this attribute.
- ///
- #define NORETURN __attribute__((noreturn))
- #elif defined(_MSC_EXTENSIONS) && !defined(MDE_CPU_EBC)
- ///
- /// Signal compilers and analyzers that the function cannot return.
- /// It is up to the compiler to remove any code past a call to functions
- /// flagged with this attribute.
- ///
- #define NORETURN __declspec(noreturn)
+///
+/// Signal compilers and analyzers that the function cannot return.
+/// It is up to the compiler to remove any code past a call to functions
+/// flagged with this attribute.
+///
+#define NORETURN __attribute__((noreturn))
+ #elif defined (_MSC_EXTENSIONS) && !defined (MDE_CPU_EBC)
+///
+/// Signal compilers and analyzers that the function cannot return.
+/// It is up to the compiler to remove any code past a call to functions
+/// flagged with this attribute.
+///
+#define NORETURN __declspec(noreturn)
#else
- ///
- /// Signal compilers and analyzers that the function cannot return.
- /// It is up to the compiler to remove any code past a call to functions
- /// flagged with this attribute.
- ///
- #define NORETURN
+///
+/// Signal compilers and analyzers that the function cannot return.
+/// It is up to the compiler to remove any code past a call to functions
+/// flagged with this attribute.
+///
+#define NORETURN
#endif
#endif
@@ -177,20 +117,20 @@
#ifndef ANALYZER_UNREACHABLE
#ifdef __clang_analyzer__
#if __has_builtin (__builtin_unreachable)
- ///
- /// Signal the analyzer that this call is not reachable.
- /// This excludes compilers.
- ///
- #define ANALYZER_UNREACHABLE() __builtin_unreachable ()
+///
+/// Signal the analyzer that this call is not reachable.
+/// This excludes compilers.
+///
+#define ANALYZER_UNREACHABLE() __builtin_unreachable ()
#endif
#endif
#ifndef ANALYZER_UNREACHABLE
- ///
- /// Signal the analyzer that this call is not reachable.
- /// This excludes compilers.
- ///
- #define ANALYZER_UNREACHABLE()
+///
+/// Signal the analyzer that this call is not reachable.
+/// This excludes compilers.
+///
+#define ANALYZER_UNREACHABLE()
#endif
#endif
@@ -203,20 +143,40 @@
#ifndef ANALYZER_NORETURN
#ifdef __has_feature
#if __has_feature (attribute_analyzer_noreturn)
- ///
- /// Signal analyzers that the function cannot return.
- /// This excludes compilers.
- ///
- #define ANALYZER_NORETURN __attribute__((analyzer_noreturn))
+///
+/// Signal analyzers that the function cannot return.
+/// This excludes compilers.
+///
+#define ANALYZER_NORETURN __attribute__((analyzer_noreturn))
#endif
#endif
#ifndef ANALYZER_NORETURN
- ///
- /// Signal the analyzer that the function cannot return.
- /// This excludes compilers.
- ///
- #define ANALYZER_NORETURN
+///
+/// Signal the analyzer that the function cannot return.
+/// This excludes compilers.
+///
+#define ANALYZER_NORETURN
+ #endif
+#endif
+
+///
+/// Tell the code optimizer that the function will return twice.
+/// This prevents wrong optimizations which can cause bugs.
+///
+#ifndef RETURNS_TWICE
+ #if defined (__GNUC__) || defined (__clang__)
+///
+/// Tell the code optimizer that the function will return twice.
+/// This prevents wrong optimizations which can cause bugs.
+///
+#define RETURNS_TWICE __attribute__((returns_twice))
+ #else
+///
+/// Tell the code optimizer that the function will return twice.
+/// This prevents wrong optimizations which can cause bugs.
+///
+#define RETURNS_TWICE
#endif
#endif
@@ -227,58 +187,50 @@
///
/// Private worker functions for ASM_PFX()
///
-#define _CONCATENATE(a, b) __CONCATENATE(a, b)
-#define __CONCATENATE(a, b) a ## b
+#define _CONCATENATE(a, b) __CONCATENATE(a, b)
+#define __CONCATENATE(a, b) a ## b
///
/// The __USER_LABEL_PREFIX__ macro predefined by GNUC represents the prefix
/// on symbols in assembly language.
///
-#define ASM_PFX(name) _CONCATENATE (__USER_LABEL_PREFIX__, name)
+#define ASM_PFX(name) _CONCATENATE (__USER_LABEL_PREFIX__, name)
-#if __APPLE__
- //
- // Apple extension that is used by the linker to optimize code size
- // with assembly functions. Put at the end of your .S files
- //
- #define ASM_FUNCTION_REMOVE_IF_UNREFERENCED .subsections_via_symbols
+#ifdef __APPLE__
+//
+// Apple extension that is used by the linker to optimize code size
+// with assembly functions. Put at the end of your .S files
+//
+#define ASM_FUNCTION_REMOVE_IF_UNREFERENCED .subsections_via_symbols
#else
- #define ASM_FUNCTION_REMOVE_IF_UNREFERENCED
+#define ASM_FUNCTION_REMOVE_IF_UNREFERENCED
#endif
-#ifdef __CC_ARM
- //
- // Older RVCT ARM compilers don't fully support #pragma pack and require __packed
- // as a prefix for the structure.
- //
- #define PACKED __packed
-#else
- #define PACKED
-#endif
+#define PACKED
///
/// 128 bit buffer containing a unique identifier value.
/// Unless otherwise specified, aligned on a 64 bit boundary.
///
typedef struct {
- UINT32 Data1;
- UINT16 Data2;
- UINT16 Data3;
- UINT8 Data4[8];
+ UINT32 Data1;
+ UINT16 Data2;
+ UINT16 Data3;
+ UINT8 Data4[8];
} GUID;
///
/// 4-byte buffer. An IPv4 internet protocol address.
///
typedef struct {
- UINT8 Addr[4];
+ UINT8 Addr[4];
} IPv4_ADDRESS;
///
/// 16-byte buffer. An IPv6 internet protocol address.
///
typedef struct {
- UINT8 Addr[16];
+ UINT8 Addr[16];
} IPv6_ADDRESS;
//
@@ -295,8 +247,8 @@
/// _LIST_ENTRY structure definition.
///
struct _LIST_ENTRY {
- LIST_ENTRY *ForwardLink;
- LIST_ENTRY *BackLink;
+ LIST_ENTRY *ForwardLink;
+ LIST_ENTRY *BackLink;
};
//
@@ -306,17 +258,17 @@
///
/// Datum is read-only.
///
-#define CONST const
+#define CONST const
///
/// Datum is scoped to the current file or function.
///
-#define STATIC static
+#define STATIC static
///
/// Undeclared type.
///
-#define VOID void
+#define VOID void
//
// Modifiers for Data Types used to self document code.
@@ -354,17 +306,25 @@
/// Boolean false value. UEFI Specification defines this value to be 0,
/// but this form is more portable.
///
-#define FALSE ((BOOLEAN)(0==1))
+#define FALSE ((BOOLEAN)(0==1))
///
/// NULL pointer (VOID *)
///
+#if defined (__cplusplus)
+ #if defined (_MSC_EXTENSIONS)
+#define NULL nullptr
+ #else
+#define NULL __null
+ #endif
+#else
#define NULL ((VOID *) 0)
+#endif
//
// Null character
//
-#define CHAR_NULL 0x0000
+#define CHAR_NULL 0x0000
///
/// Maximum values for common UEFI Data Types
@@ -378,70 +338,78 @@
#define MAX_INT64 ((INT64)0x7FFFFFFFFFFFFFFFULL)
#define MAX_UINT64 ((UINT64)0xFFFFFFFFFFFFFFFFULL)
-#define BIT0 0x00000001
-#define BIT1 0x00000002
-#define BIT2 0x00000004
-#define BIT3 0x00000008
-#define BIT4 0x00000010
-#define BIT5 0x00000020
-#define BIT6 0x00000040
-#define BIT7 0x00000080
-#define BIT8 0x00000100
-#define BIT9 0x00000200
-#define BIT10 0x00000400
-#define BIT11 0x00000800
-#define BIT12 0x00001000
-#define BIT13 0x00002000
-#define BIT14 0x00004000
-#define BIT15 0x00008000
-#define BIT16 0x00010000
-#define BIT17 0x00020000
-#define BIT18 0x00040000
-#define BIT19 0x00080000
-#define BIT20 0x00100000
-#define BIT21 0x00200000
-#define BIT22 0x00400000
-#define BIT23 0x00800000
-#define BIT24 0x01000000
-#define BIT25 0x02000000
-#define BIT26 0x04000000
-#define BIT27 0x08000000
-#define BIT28 0x10000000
-#define BIT29 0x20000000
-#define BIT30 0x40000000
-#define BIT31 0x80000000
-#define BIT32 0x0000000100000000ULL
-#define BIT33 0x0000000200000000ULL
-#define BIT34 0x0000000400000000ULL
-#define BIT35 0x0000000800000000ULL
-#define BIT36 0x0000001000000000ULL
-#define BIT37 0x0000002000000000ULL
-#define BIT38 0x0000004000000000ULL
-#define BIT39 0x0000008000000000ULL
-#define BIT40 0x0000010000000000ULL
-#define BIT41 0x0000020000000000ULL
-#define BIT42 0x0000040000000000ULL
-#define BIT43 0x0000080000000000ULL
-#define BIT44 0x0000100000000000ULL
-#define BIT45 0x0000200000000000ULL
-#define BIT46 0x0000400000000000ULL
-#define BIT47 0x0000800000000000ULL
-#define BIT48 0x0001000000000000ULL
-#define BIT49 0x0002000000000000ULL
-#define BIT50 0x0004000000000000ULL
-#define BIT51 0x0008000000000000ULL
-#define BIT52 0x0010000000000000ULL
-#define BIT53 0x0020000000000000ULL
-#define BIT54 0x0040000000000000ULL
-#define BIT55 0x0080000000000000ULL
-#define BIT56 0x0100000000000000ULL
-#define BIT57 0x0200000000000000ULL
-#define BIT58 0x0400000000000000ULL
-#define BIT59 0x0800000000000000ULL
-#define BIT60 0x1000000000000000ULL
-#define BIT61 0x2000000000000000ULL
-#define BIT62 0x4000000000000000ULL
-#define BIT63 0x8000000000000000ULL
+///
+/// Minimum values for the signed UEFI Data Types
+///
+#define MIN_INT8 (((INT8) -127) - 1)
+#define MIN_INT16 (((INT16) -32767) - 1)
+#define MIN_INT32 (((INT32) -2147483647) - 1)
+#define MIN_INT64 (((INT64) -9223372036854775807LL) - 1)
+
+#define BIT0 0x00000001
+#define BIT1 0x00000002
+#define BIT2 0x00000004
+#define BIT3 0x00000008
+#define BIT4 0x00000010
+#define BIT5 0x00000020
+#define BIT6 0x00000040
+#define BIT7 0x00000080
+#define BIT8 0x00000100
+#define BIT9 0x00000200
+#define BIT10 0x00000400
+#define BIT11 0x00000800
+#define BIT12 0x00001000
+#define BIT13 0x00002000
+#define BIT14 0x00004000
+#define BIT15 0x00008000
+#define BIT16 0x00010000
+#define BIT17 0x00020000
+#define BIT18 0x00040000
+#define BIT19 0x00080000
+#define BIT20 0x00100000
+#define BIT21 0x00200000
+#define BIT22 0x00400000
+#define BIT23 0x00800000
+#define BIT24 0x01000000
+#define BIT25 0x02000000
+#define BIT26 0x04000000
+#define BIT27 0x08000000
+#define BIT28 0x10000000
+#define BIT29 0x20000000
+#define BIT30 0x40000000
+#define BIT31 0x80000000
+#define BIT32 0x0000000100000000ULL
+#define BIT33 0x0000000200000000ULL
+#define BIT34 0x0000000400000000ULL
+#define BIT35 0x0000000800000000ULL
+#define BIT36 0x0000001000000000ULL
+#define BIT37 0x0000002000000000ULL
+#define BIT38 0x0000004000000000ULL
+#define BIT39 0x0000008000000000ULL
+#define BIT40 0x0000010000000000ULL
+#define BIT41 0x0000020000000000ULL
+#define BIT42 0x0000040000000000ULL
+#define BIT43 0x0000080000000000ULL
+#define BIT44 0x0000100000000000ULL
+#define BIT45 0x0000200000000000ULL
+#define BIT46 0x0000400000000000ULL
+#define BIT47 0x0000800000000000ULL
+#define BIT48 0x0001000000000000ULL
+#define BIT49 0x0002000000000000ULL
+#define BIT50 0x0004000000000000ULL
+#define BIT51 0x0008000000000000ULL
+#define BIT52 0x0010000000000000ULL
+#define BIT53 0x0020000000000000ULL
+#define BIT54 0x0040000000000000ULL
+#define BIT55 0x0080000000000000ULL
+#define BIT56 0x0100000000000000ULL
+#define BIT57 0x0200000000000000ULL
+#define BIT58 0x0400000000000000ULL
+#define BIT59 0x0800000000000000ULL
+#define BIT60 0x1000000000000000ULL
+#define BIT61 0x2000000000000000ULL
+#define BIT62 0x4000000000000000ULL
+#define BIT63 0x8000000000000000ULL
#define SIZE_1KB 0x00000400
#define SIZE_2KB 0x00000800
@@ -554,21 +522,24 @@
#define BASE_8EB 0x8000000000000000ULL
//
-// Support for variable length argument lists using the ANSI standard.
+// Support for variable argument lists in freestanding edk2 modules.
//
-// Since we are using the ANSI standard we used the standard naming and
-// did not follow the coding convention
+// For modules that use the ISO C library interfaces for variable
+// argument lists, refer to "StdLib/Include/stdarg.h".
//
// VA_LIST - typedef for argument list.
// VA_START (VA_LIST Marker, argument before the ...) - Init Marker for use.
// VA_END (VA_LIST Marker) - Clear Marker
-// VA_ARG (VA_LIST Marker, var arg size) - Use Marker to get an argument from
-// the ... list. You must know the size and pass it in this macro.
+// VA_ARG (VA_LIST Marker, var arg type) - Use Marker to get an argument from
+// the ... list. You must know the type and pass it in this macro. Type
+// must be compatible with the type of the actual next argument (as promoted
+// according to the default argument promotions.)
// VA_COPY (VA_LIST Dest, VA_LIST Start) - Initialize Dest as a copy of Start.
//
-// example:
+// Example:
//
// UINTN
+// EFIAPI
// ExampleVarArg (
// IN UINTN NumberOfArgs,
// ...
@@ -584,15 +555,21 @@
// VA_START (Marker, NumberOfArgs);
// for (Index = 0, Result = 0; Index < NumberOfArgs; Index++) {
// //
-// // The ... list is a series of UINTN values, so average them up.
+// // The ... list is a series of UINTN values, so sum them up.
// //
// Result += VA_ARG (Marker, UINTN);
// }
//
// VA_END (Marker);
-// return Result
+// return Result;
// }
//
+// Notes:
+// - Functions that call VA_START() / VA_END() must have a variable
+// argument list and must be declared EFIAPI.
+// - Functions that call VA_COPY() / VA_END() must be declared EFIAPI.
+// - Functions that only use VA_LIST and VA_ARG() need not be EFIAPI.
+//
/**
Return the size of argument that has been aligned to sizeof (UINTN).
@@ -601,41 +578,23 @@
@return The aligned size.
**/
-#define _INT_SIZE_OF(n) ((sizeof (n) + sizeof (UINTN) - 1) &~(sizeof (UINTN) - 1))
+#define _INT_SIZE_OF(n) ((sizeof (n) + sizeof (UINTN) - 1) &~(sizeof (UINTN) - 1))
-#if defined(__CC_ARM)
+#if defined (_M_ARM) || defined (_M_ARM64)
//
-// RVCT ARM variable argument list support.
+// MSFT ARM variable argument list support.
//
-///
-/// Variable used to traverse the list of arguments. This type can vary by
-/// implementation and could be an array or structure.
-///
-#ifdef __APCS_ADSABI
- typedef int *va_list[1];
- #define VA_LIST va_list
-#else
- typedef struct __va_list { void *__ap; } va_list;
- #define VA_LIST va_list
-#endif
+typedef char *VA_LIST;
-#define VA_START(Marker, Parameter) __va_start(Marker, Parameter)
+#define VA_START(Marker, Parameter) __va_start (&Marker, &Parameter, _INT_SIZE_OF (Parameter), __alignof(Parameter), &Parameter)
+#define VA_ARG(Marker, TYPE) (*(TYPE *) ((Marker += _INT_SIZE_OF (TYPE) + ((-(INTN)Marker) & (sizeof(TYPE) - 1))) - _INT_SIZE_OF (TYPE)))
+#define VA_END(Marker) (Marker = (VA_LIST) 0)
+#define VA_COPY(Dest, Start) ((void)((Dest) = (Start)))
-#define VA_ARG(Marker, TYPE) __va_arg(Marker, TYPE)
+#elif defined (__GNUC__) || defined (__clang__)
-#define VA_END(Marker) ((void)0)
-
-// For some ARM RVCT compilers, __va_copy is not defined
-#ifndef __va_copy
- #define __va_copy(dest, src) ((void)((dest) = (src)))
-#endif
-
-#define VA_COPY(Dest, Start) __va_copy (Dest, Start)
-
-#elif defined(__GNUC__)
-
-#if defined(MDE_CPU_X64) && !defined(NO_MSABI_VA_FUNCS)
+ #if defined (MDE_CPU_X64) && !defined (NO_MSABI_VA_FUNCS)
//
// X64 only. Use MS ABI version of GCC built-in macros for variable argument lists.
//
@@ -651,13 +610,13 @@
#define VA_START(Marker, Parameter) __builtin_ms_va_start (Marker, Parameter)
-#define VA_ARG(Marker, TYPE) ((sizeof (TYPE) < sizeof (UINTN)) ? (TYPE)(__builtin_va_arg (Marker, UINTN)) : (TYPE)(__builtin_va_arg (Marker, TYPE)))
+#define VA_ARG(Marker, TYPE) ((sizeof (TYPE) < sizeof (UINTN)) ? (TYPE)(__builtin_va_arg (Marker, UINTN)) : (TYPE)(__builtin_va_arg (Marker, TYPE)))
-#define VA_END(Marker) __builtin_ms_va_end (Marker)
+#define VA_END(Marker) __builtin_ms_va_end (Marker)
-#define VA_COPY(Dest, Start) __builtin_ms_va_copy (Dest, Start)
+#define VA_COPY(Dest, Start) __builtin_ms_va_copy (Dest, Start)
-#else
+ #else
//
// Use GCC built-in macros for variable argument lists.
//
@@ -670,13 +629,13 @@
#define VA_START(Marker, Parameter) __builtin_va_start (Marker, Parameter)
-#define VA_ARG(Marker, TYPE) ((sizeof (TYPE) < sizeof (UINTN)) ? (TYPE)(__builtin_va_arg (Marker, UINTN)) : (TYPE)(__builtin_va_arg (Marker, TYPE)))
+#define VA_ARG(Marker, TYPE) ((sizeof (TYPE) < sizeof (UINTN)) ? (TYPE)(__builtin_va_arg (Marker, UINTN)) : (TYPE)(__builtin_va_arg (Marker, TYPE)))
-#define VA_END(Marker) __builtin_va_end (Marker)
+#define VA_END(Marker) __builtin_va_end (Marker)
-#define VA_COPY(Dest, Start) __builtin_va_copy (Dest, Start)
+#define VA_COPY(Dest, Start) __builtin_va_copy (Dest, Start)
-#endif
+ #endif
#else
///
@@ -701,7 +660,7 @@
@return A pointer to the beginning of a variable argument list.
**/
-#define VA_START(Marker, Parameter) (Marker = (VA_LIST) ((UINTN) & (Parameter) + _INT_SIZE_OF (Parameter)))
+#define VA_START(Marker, Parameter) (Marker = (VA_LIST) ((UINTN) & (Parameter) + _INT_SIZE_OF (Parameter)))
/**
Returns an argument of a specified type from a variable argument list and updates
@@ -719,7 +678,7 @@
@return An argument of the type specified by TYPE.
**/
-#define VA_ARG(Marker, TYPE) (*(TYPE *) ((Marker += _INT_SIZE_OF (TYPE)) - _INT_SIZE_OF (TYPE)))
+#define VA_ARG(Marker, TYPE) (*(TYPE *) ((Marker += _INT_SIZE_OF (TYPE)) - _INT_SIZE_OF (TYPE)))
/**
Terminates the use of a variable argument list.
@@ -731,7 +690,7 @@
@param Marker VA_LIST used to traverse the list of arguments.
**/
-#define VA_END(Marker) (Marker = (VA_LIST) 0)
+#define VA_END(Marker) (Marker = (VA_LIST) 0)
/**
Initializes a VA_LIST as a copy of an existing VA_LIST.
@@ -751,7 +710,7 @@
///
/// Pointer to the start of a variable argument list stored in a memory buffer. Same as UINT8 *.
///
-typedef UINTN *BASE_LIST;
+typedef UINTN *BASE_LIST;
/**
Returns the size of a data type in sizeof(UINTN) units rounded up to the nearest UINTN boundary.
@@ -760,7 +719,7 @@
@return The size of TYPE in sizeof (UINTN) units rounded up to the nearest UINTN boundary.
**/
-#define _BASE_INT_SIZE_OF(TYPE) ((sizeof (TYPE) + sizeof (UINTN) - 1) / sizeof (UINTN))
+#define _BASE_INT_SIZE_OF(TYPE) ((sizeof (TYPE) + sizeof (UINTN) - 1) / sizeof (UINTN))
/**
Returns an argument of a specified type from a variable argument list and updates
@@ -778,7 +737,7 @@
@return An argument of the type specified by TYPE.
**/
-#define BASE_ARG(Marker, TYPE) (*(TYPE *) ((Marker += _BASE_INT_SIZE_OF (TYPE)) - _BASE_INT_SIZE_OF (TYPE)))
+#define BASE_ARG(Marker, TYPE) (*(TYPE *) ((Marker += _BASE_INT_SIZE_OF (TYPE)) - _BASE_INT_SIZE_OF (TYPE)))
/**
The macro that returns the byte offset of a field in a data structure.
@@ -793,17 +752,73 @@
@return Offset, in bytes, of field.
**/
-#ifdef __GNUC__
-#if __GNUC__ >= 4
-#define OFFSET_OF(TYPE, Field) ((UINTN) __builtin_offsetof(TYPE, Field))
-#endif
+#if (defined (__GNUC__) && __GNUC__ >= 4) || defined (__clang__)
+#define OFFSET_OF(TYPE, Field) ((UINTN) __builtin_offsetof(TYPE, Field))
#endif
#ifndef OFFSET_OF
-#define OFFSET_OF(TYPE, Field) ((UINTN) &(((TYPE *)0)->Field))
+#define OFFSET_OF(TYPE, Field) ((UINTN) &(((TYPE *)0)->Field))
#endif
/**
+ Portable definition for compile time assertions.
+ Equivalent to C11 static_assert macro from assert.h.
+
+ @param Expression Boolean expression.
+ @param Message Raised compiler diagnostic message when expression is false.
+
+**/
+#ifdef MDE_CPU_EBC
+#define STATIC_ASSERT(Expression, Message)
+#elif defined (_MSC_EXTENSIONS) || defined (__cplusplus)
+#define STATIC_ASSERT static_assert
+#else
+#define STATIC_ASSERT _Static_assert
+#endif
+
+//
+// Verify that ProcessorBind.h produced UEFI Data Types that are compliant with
+// Section 2.3.1 of the UEFI 2.3 Specification.
+//
+
+STATIC_ASSERT (sizeof (BOOLEAN) == 1, "sizeof (BOOLEAN) does not meet UEFI Specification Data Type requirements");
+STATIC_ASSERT (sizeof (INT8) == 1, "sizeof (INT8) does not meet UEFI Specification Data Type requirements");
+STATIC_ASSERT (sizeof (UINT8) == 1, "sizeof (UINT8) does not meet UEFI Specification Data Type requirements");
+STATIC_ASSERT (sizeof (INT16) == 2, "sizeof (INT16) does not meet UEFI Specification Data Type requirements");
+STATIC_ASSERT (sizeof (UINT16) == 2, "sizeof (UINT16) does not meet UEFI Specification Data Type requirements");
+STATIC_ASSERT (sizeof (INT32) == 4, "sizeof (INT32) does not meet UEFI Specification Data Type requirements");
+STATIC_ASSERT (sizeof (UINT32) == 4, "sizeof (UINT32) does not meet UEFI Specification Data Type requirements");
+STATIC_ASSERT (sizeof (INT64) == 8, "sizeof (INT64) does not meet UEFI Specification Data Type requirements");
+STATIC_ASSERT (sizeof (UINT64) == 8, "sizeof (UINT64) does not meet UEFI Specification Data Type requirements");
+STATIC_ASSERT (sizeof (CHAR8) == 1, "sizeof (CHAR8) does not meet UEFI Specification Data Type requirements");
+STATIC_ASSERT (sizeof (CHAR16) == 2, "sizeof (CHAR16) does not meet UEFI Specification Data Type requirements");
+STATIC_ASSERT (sizeof (L'A') == 2, "sizeof (L'A') does not meet UEFI Specification Data Type requirements");
+STATIC_ASSERT (sizeof (L"A") == 4, "sizeof (L\"A\") does not meet UEFI Specification Data Type requirements");
+
+//
+// The following three enum types are used to verify that the compiler
+// configuration for enum types is compliant with Section 2.3.1 of the
+// UEFI 2.3 Specification. These enum types and enum values are not
+// intended to be used. A prefix of '__' is used avoid conflicts with
+// other types.
+//
+typedef enum {
+ __VerifyUint8EnumValue = 0xff
+} __VERIFY_UINT8_ENUM_SIZE;
+
+typedef enum {
+ __VerifyUint16EnumValue = 0xffff
+} __VERIFY_UINT16_ENUM_SIZE;
+
+typedef enum {
+ __VerifyUint32EnumValue = 0xffffffff
+} __VERIFY_UINT32_ENUM_SIZE;
+
+STATIC_ASSERT (sizeof (__VERIFY_UINT8_ENUM_SIZE) == 4, "Size of enum does not meet UEFI Specification Data Type requirements");
+STATIC_ASSERT (sizeof (__VERIFY_UINT16_ENUM_SIZE) == 4, "Size of enum does not meet UEFI Specification Data Type requirements");
+STATIC_ASSERT (sizeof (__VERIFY_UINT32_ENUM_SIZE) == 4, "Size of enum does not meet UEFI Specification Data Type requirements");
+
+/**
Macro that returns a pointer to the data structure that contains a specified field of
that data structure. This is a lightweight method to hide information by placing a
public data structure inside a larger private data structure and using a pointer to
@@ -822,7 +837,7 @@
@return A pointer to the structure from one of it's elements.
**/
-#define BASE_CR(Record, TYPE, Field) ((TYPE *) ((CHAR8 *) (Record) - (CHAR8 *) &(((TYPE *) 0)->Field)))
+#define BASE_CR(Record, TYPE, Field) ((TYPE *) ((CHAR8 *) (Record) - OFFSET_OF (TYPE, Field)))
/**
Rounds a value up to the next boundary using a specified alignment.
@@ -836,7 +851,7 @@
@return A value up to the next boundary.
**/
-#define ALIGN_VALUE(Value, Alignment) ((Value) + (((Alignment) - (Value)) & ((Alignment) - 1)))
+#define ALIGN_VALUE(Value, Alignment) ((Value) + (((Alignment) - (Value)) & ((Alignment) - 1)))
/**
Adjust a pointer by adding the minimum offset required for it to be aligned on
@@ -851,7 +866,7 @@
@return Pointer to the aligned address.
**/
-#define ALIGN_POINTER(Pointer, Alignment) ((VOID *) (ALIGN_VALUE ((UINTN)(Pointer), (Alignment))))
+#define ALIGN_POINTER(Pointer, Alignment) ((VOID *) (ALIGN_VALUE ((UINTN)(Pointer), (Alignment))))
/**
Rounds a value up to the next natural boundary for the current CPU.
@@ -867,7 +882,6 @@
**/
#define ALIGN_VARIABLE(Value) ALIGN_VALUE ((Value), sizeof (UINTN))
-
/**
Return the maximum of two operands.
@@ -926,7 +940,7 @@
@return The value specified by StatusCode with the highest bit set.
**/
-#define ENCODE_ERROR(StatusCode) ((RETURN_STATUS)(MAX_BIT | (StatusCode)))
+#define ENCODE_ERROR(StatusCode) ((RETURN_STATUS)(MAX_BIT | (StatusCode)))
/**
Produces a RETURN_STATUS code with the highest bit clear.
@@ -937,7 +951,7 @@
@return The value specified by StatusCode with the highest bit clear.
**/
-#define ENCODE_WARNING(StatusCode) ((RETURN_STATUS)(StatusCode))
+#define ENCODE_WARNING(StatusCode) ((RETURN_STATUS)(StatusCode))
/**
Returns TRUE if a specified RETURN_STATUS code is an error code.
@@ -950,138 +964,138 @@
@retval FALSE The high bit of StatusCode is clear.
**/
-#define RETURN_ERROR(StatusCode) (((INTN)(RETURN_STATUS)(StatusCode)) < 0)
+#define RETURN_ERROR(StatusCode) (((INTN)(RETURN_STATUS)(StatusCode)) < 0)
///
/// The operation completed successfully.
///
-#define RETURN_SUCCESS 0
+#define RETURN_SUCCESS (RETURN_STATUS)(0)
///
/// The image failed to load.
///
-#define RETURN_LOAD_ERROR ENCODE_ERROR (1)
+#define RETURN_LOAD_ERROR ENCODE_ERROR (1)
///
/// The parameter was incorrect.
///
-#define RETURN_INVALID_PARAMETER ENCODE_ERROR (2)
+#define RETURN_INVALID_PARAMETER ENCODE_ERROR (2)
///
/// The operation is not supported.
///
-#define RETURN_UNSUPPORTED ENCODE_ERROR (3)
+#define RETURN_UNSUPPORTED ENCODE_ERROR (3)
///
/// The buffer was not the proper size for the request.
///
-#define RETURN_BAD_BUFFER_SIZE ENCODE_ERROR (4)
+#define RETURN_BAD_BUFFER_SIZE ENCODE_ERROR (4)
///
/// The buffer was not large enough to hold the requested data.
/// The required buffer size is returned in the appropriate
/// parameter when this error occurs.
///
-#define RETURN_BUFFER_TOO_SMALL ENCODE_ERROR (5)
+#define RETURN_BUFFER_TOO_SMALL ENCODE_ERROR (5)
///
/// There is no data pending upon return.
///
-#define RETURN_NOT_READY ENCODE_ERROR (6)
+#define RETURN_NOT_READY ENCODE_ERROR (6)
///
/// The physical device reported an error while attempting the
/// operation.
///
-#define RETURN_DEVICE_ERROR ENCODE_ERROR (7)
+#define RETURN_DEVICE_ERROR ENCODE_ERROR (7)
///
/// The device can not be written to.
///
-#define RETURN_WRITE_PROTECTED ENCODE_ERROR (8)
+#define RETURN_WRITE_PROTECTED ENCODE_ERROR (8)
///
/// The resource has run out.
///
-#define RETURN_OUT_OF_RESOURCES ENCODE_ERROR (9)
+#define RETURN_OUT_OF_RESOURCES ENCODE_ERROR (9)
///
/// An inconsistency was detected on the file system causing the
/// operation to fail.
///
-#define RETURN_VOLUME_CORRUPTED ENCODE_ERROR (10)
+#define RETURN_VOLUME_CORRUPTED ENCODE_ERROR (10)
///
/// There is no more space on the file system.
///
-#define RETURN_VOLUME_FULL ENCODE_ERROR (11)
+#define RETURN_VOLUME_FULL ENCODE_ERROR (11)
///
/// The device does not contain any medium to perform the
/// operation.
///
-#define RETURN_NO_MEDIA ENCODE_ERROR (12)
+#define RETURN_NO_MEDIA ENCODE_ERROR (12)
///
/// The medium in the device has changed since the last
/// access.
///
-#define RETURN_MEDIA_CHANGED ENCODE_ERROR (13)
+#define RETURN_MEDIA_CHANGED ENCODE_ERROR (13)
///
/// The item was not found.
///
-#define RETURN_NOT_FOUND ENCODE_ERROR (14)
+#define RETURN_NOT_FOUND ENCODE_ERROR (14)
///
/// Access was denied.
///
-#define RETURN_ACCESS_DENIED ENCODE_ERROR (15)
+#define RETURN_ACCESS_DENIED ENCODE_ERROR (15)
///
/// The server was not found or did not respond to the request.
///
-#define RETURN_NO_RESPONSE ENCODE_ERROR (16)
+#define RETURN_NO_RESPONSE ENCODE_ERROR (16)
///
/// A mapping to the device does not exist.
///
-#define RETURN_NO_MAPPING ENCODE_ERROR (17)
+#define RETURN_NO_MAPPING ENCODE_ERROR (17)
///
/// A timeout time expired.
///
-#define RETURN_TIMEOUT ENCODE_ERROR (18)
+#define RETURN_TIMEOUT ENCODE_ERROR (18)
///
/// The protocol has not been started.
///
-#define RETURN_NOT_STARTED ENCODE_ERROR (19)
+#define RETURN_NOT_STARTED ENCODE_ERROR (19)
///
/// The protocol has already been started.
///
-#define RETURN_ALREADY_STARTED ENCODE_ERROR (20)
+#define RETURN_ALREADY_STARTED ENCODE_ERROR (20)
///
/// The operation was aborted.
///
-#define RETURN_ABORTED ENCODE_ERROR (21)
+#define RETURN_ABORTED ENCODE_ERROR (21)
///
/// An ICMP error occurred during the network operation.
///
-#define RETURN_ICMP_ERROR ENCODE_ERROR (22)
+#define RETURN_ICMP_ERROR ENCODE_ERROR (22)
///
/// A TFTP error occurred during the network operation.
///
-#define RETURN_TFTP_ERROR ENCODE_ERROR (23)
+#define RETURN_TFTP_ERROR ENCODE_ERROR (23)
///
/// A protocol error occurred during the network operation.
///
-#define RETURN_PROTOCOL_ERROR ENCODE_ERROR (24)
+#define RETURN_PROTOCOL_ERROR ENCODE_ERROR (24)
///
/// A function encountered an internal version that was
@@ -1092,74 +1106,73 @@
///
/// The function was not performed due to a security violation.
///
-#define RETURN_SECURITY_VIOLATION ENCODE_ERROR (26)
+#define RETURN_SECURITY_VIOLATION ENCODE_ERROR (26)
///
/// A CRC error was detected.
///
-#define RETURN_CRC_ERROR ENCODE_ERROR (27)
+#define RETURN_CRC_ERROR ENCODE_ERROR (27)
///
/// The beginning or end of media was reached.
///
-#define RETURN_END_OF_MEDIA ENCODE_ERROR (28)
+#define RETURN_END_OF_MEDIA ENCODE_ERROR (28)
///
/// The end of the file was reached.
///
-#define RETURN_END_OF_FILE ENCODE_ERROR (31)
+#define RETURN_END_OF_FILE ENCODE_ERROR (31)
///
/// The language specified was invalid.
///
-#define RETURN_INVALID_LANGUAGE ENCODE_ERROR (32)
+#define RETURN_INVALID_LANGUAGE ENCODE_ERROR (32)
///
/// The security status of the data is unknown or compromised
/// and the data must be updated or replaced to restore a valid
/// security status.
///
-#define RETURN_COMPROMISED_DATA ENCODE_ERROR (33)
+#define RETURN_COMPROMISED_DATA ENCODE_ERROR (33)
///
/// A HTTP error occurred during the network operation.
///
-#define RETURN_HTTP_ERROR ENCODE_ERROR (35)
+#define RETURN_HTTP_ERROR ENCODE_ERROR (35)
///
/// The string contained one or more characters that
/// the device could not render and were skipped.
///
-#define RETURN_WARN_UNKNOWN_GLYPH ENCODE_WARNING (1)
+#define RETURN_WARN_UNKNOWN_GLYPH ENCODE_WARNING (1)
///
/// The handle was closed, but the file was not deleted.
///
-#define RETURN_WARN_DELETE_FAILURE ENCODE_WARNING (2)
+#define RETURN_WARN_DELETE_FAILURE ENCODE_WARNING (2)
///
/// The handle was closed, but the data to the file was not
/// flushed properly.
///
-#define RETURN_WARN_WRITE_FAILURE ENCODE_WARNING (3)
+#define RETURN_WARN_WRITE_FAILURE ENCODE_WARNING (3)
///
/// The resulting buffer was too small, and the data was
/// truncated to the buffer size.
///
-#define RETURN_WARN_BUFFER_TOO_SMALL ENCODE_WARNING (4)
+#define RETURN_WARN_BUFFER_TOO_SMALL ENCODE_WARNING (4)
///
/// The data has not been updated within the timeframe set by
/// local policy for this type of data.
///
-#define RETURN_WARN_STALE_DATA ENCODE_WARNING (5)
+#define RETURN_WARN_STALE_DATA ENCODE_WARNING (5)
///
/// The resulting buffer contains UEFI-compliant file system.
///
-#define RETURN_WARN_FILE_SYSTEM ENCODE_WARNING (6)
-
+#define RETURN_WARN_FILE_SYSTEM ENCODE_WARNING (6)
/**
Returns a 16-bit signature built from 2 ASCII characters.
@@ -1173,7 +1186,7 @@
@return A 16-bit value built from the two ASCII characters specified by A and B.
**/
-#define SIGNATURE_16(A, B) ((A) | (B << 8))
+#define SIGNATURE_16(A, B) ((A) | (B << 8))
/**
Returns a 32-bit signature built from 4 ASCII characters.
@@ -1214,45 +1227,52 @@
#define SIGNATURE_64(A, B, C, D, E, F, G, H) \
(SIGNATURE_32 (A, B, C, D) | ((UINT64) (SIGNATURE_32 (E, F, G, H)) << 32))
-#if defined(_MSC_EXTENSIONS) && !defined (__INTEL_COMPILER) && !defined (MDE_CPU_EBC)
+#if defined (_MSC_EXTENSIONS) && !defined (__INTEL_COMPILER) && !defined (MDE_CPU_EBC)
+void *
+_ReturnAddress (
+ void
+ );
+
#pragma intrinsic(_ReturnAddress)
- /**
- Get the return address of the calling function.
- Based on intrinsic function _ReturnAddress that provides the address of
- the instruction in the calling function that will be executed after
- control returns to the caller.
+/**
+ Get the return address of the calling function.
- @param L Return Level.
+ Based on intrinsic function _ReturnAddress that provides the address of
+ the instruction in the calling function that will be executed after
+ control returns to the caller.
- @return The return address of the calling function or 0 if L != 0.
+ @param L Return Level.
- **/
- #define RETURN_ADDRESS(L) ((L == 0) ? _ReturnAddress() : (VOID *) 0)
-#elif defined(__GNUC__)
- void * __builtin_return_address (unsigned int level);
- /**
- Get the return address of the calling function.
+ @return The return address of the calling function or 0 if L != 0.
- Based on built-in Function __builtin_return_address that returns
- the return address of the current function, or of one of its callers.
+**/
+#define RETURN_ADDRESS(L) ((L == 0) ? _ReturnAddress() : (VOID *) 0)
+#elif defined (__GNUC__) || defined (__clang__)
- @param L Return Level.
+/**
+ Get the return address of the calling function.
- @return The return address of the calling function.
+ Based on built-in Function __builtin_return_address that returns
+ the return address of the current function, or of one of its callers.
- **/
- #define RETURN_ADDRESS(L) __builtin_return_address (L)
+ @param L Return Level.
+
+ @return The return address of the calling function.
+
+**/
+#define RETURN_ADDRESS(L) __builtin_return_address (L)
#else
- /**
- Get the return address of the calling function.
- @param L Return Level.
+/**
+ Get the return address of the calling function.
- @return 0 as compilers don't support this feature.
+ @param L Return Level.
- **/
- #define RETURN_ADDRESS(L) ((VOID *) 0)
+ @return 0 as compilers don't support this feature.
+
+**/
+#define RETURN_ADDRESS(L) ((VOID *) 0)
#endif
/**
@@ -1266,7 +1286,6 @@
@return The number of elements in Array. The result has type UINTN.
**/
-#define ARRAY_SIZE(Array) (sizeof (Array) / sizeof ((Array)[0]))
+#define ARRAY_SIZE(Array) (sizeof (Array) / sizeof ((Array)[0]))
#endif
-
diff --git a/src/include/ipxe/efi/Guid/Acpi.h b/src/include/ipxe/efi/Guid/Acpi.h
index c4169c5..09b3999 100644
--- a/src/include/ipxe/efi/Guid/Acpi.h
+++ b/src/include/ipxe/efi/Guid/Acpi.h
@@ -5,14 +5,8 @@
ACPI 2.0 specification defines the ACPI 2.0 GUID. UEFI 2.0 defines the
ACPI 2.0 Table GUID and ACPI Table GUID.
- Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
GUIDs defined in UEFI 2.0 spec.
@@ -22,7 +16,7 @@
#ifndef __ACPI_GUID_H__
#define __ACPI_GUID_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define ACPI_TABLE_GUID \
{ \
@@ -34,15 +28,15 @@
0x8868e871, 0xe4f1, 0x11d3, {0xbc, 0x22, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
}
-#define ACPI_10_TABLE_GUID ACPI_TABLE_GUID
+#define ACPI_10_TABLE_GUID ACPI_TABLE_GUID
//
// ACPI 2.0 or newer tables should use EFI_ACPI_TABLE_GUID.
//
-#define EFI_ACPI_20_TABLE_GUID EFI_ACPI_TABLE_GUID
+#define EFI_ACPI_20_TABLE_GUID EFI_ACPI_TABLE_GUID
-extern EFI_GUID gEfiAcpiTableGuid;
-extern EFI_GUID gEfiAcpi10TableGuid;
-extern EFI_GUID gEfiAcpi20TableGuid;
+extern EFI_GUID gEfiAcpiTableGuid;
+extern EFI_GUID gEfiAcpi10TableGuid;
+extern EFI_GUID gEfiAcpi20TableGuid;
#endif
diff --git a/src/include/ipxe/efi/Guid/FileInfo.h b/src/include/ipxe/efi/Guid/FileInfo.h
index 21fd389..4fc9e86 100644
--- a/src/include/ipxe/efi/Guid/FileInfo.h
+++ b/src/include/ipxe/efi/Guid/FileInfo.h
@@ -3,21 +3,15 @@
and EFI_FILE_PROTOCOL.GetInfo() to set or get generic file information.
This GUID is defined in UEFI specification.
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __FILE_INFO_H__
#define __FILE_INFO_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_FILE_INFO_ID \
{ \
@@ -28,35 +22,35 @@
///
/// The size of the EFI_FILE_INFO structure, including the Null-terminated FileName string.
///
- UINT64 Size;
+ UINT64 Size;
///
/// The size of the file in bytes.
///
- UINT64 FileSize;
+ UINT64 FileSize;
///
/// PhysicalSize The amount of physical space the file consumes on the file system volume.
///
- UINT64 PhysicalSize;
+ UINT64 PhysicalSize;
///
/// The time the file was created.
///
- EFI_TIME CreateTime;
+ EFI_TIME CreateTime;
///
/// The time when the file was last accessed.
///
- EFI_TIME LastAccessTime;
+ EFI_TIME LastAccessTime;
///
/// The time when the file's contents were last modified.
///
- EFI_TIME ModificationTime;
+ EFI_TIME ModificationTime;
///
/// The attribute bits for the file.
///
- UINT64 Attribute;
+ UINT64 Attribute;
///
/// The Null-terminated name of the file.
///
- CHAR16 FileName[1];
+ CHAR16 FileName[1];
} EFI_FILE_INFO;
///
@@ -66,8 +60,8 @@
/// computes this size correctly no matter how big the FileName array is declared.
/// This is required to make the EFI_FILE_INFO data structure ANSI compilant.
///
-#define SIZE_OF_EFI_FILE_INFO OFFSET_OF (EFI_FILE_INFO, FileName)
+#define SIZE_OF_EFI_FILE_INFO OFFSET_OF (EFI_FILE_INFO, FileName)
-extern EFI_GUID gEfiFileInfoGuid;
+extern EFI_GUID gEfiFileInfoGuid;
#endif
diff --git a/src/include/ipxe/efi/Guid/FileSystemInfo.h b/src/include/ipxe/efi/Guid/FileSystemInfo.h
index 504b793..aadebc0 100644
--- a/src/include/ipxe/efi/Guid/FileSystemInfo.h
+++ b/src/include/ipxe/efi/Guid/FileSystemInfo.h
@@ -3,21 +3,15 @@
or EFI_FILE_PROTOCOL.SetInfo() to get or set information about the system's volume.
This GUID is defined in UEFI specification.
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __FILE_SYSTEM_INFO_H__
#define __FILE_SYSTEM_INFO_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_FILE_SYSTEM_INFO_ID \
{ \
@@ -28,27 +22,27 @@
///
/// The size of the EFI_FILE_SYSTEM_INFO structure, including the Null-terminated VolumeLabel string.
///
- UINT64 Size;
+ UINT64 Size;
///
/// TRUE if the volume only supports read access.
///
- BOOLEAN ReadOnly;
+ BOOLEAN ReadOnly;
///
/// The number of bytes managed by the file system.
///
- UINT64 VolumeSize;
+ UINT64 VolumeSize;
///
/// The number of available bytes for use by the file system.
///
- UINT64 FreeSpace;
+ UINT64 FreeSpace;
///
/// The nominal block size by which files are typically grown.
///
- UINT32 BlockSize;
+ UINT32 BlockSize;
///
/// The Null-terminated string that is the volume's label.
///
- CHAR16 VolumeLabel[1];
+ CHAR16 VolumeLabel[1];
} EFI_FILE_SYSTEM_INFO;
///
@@ -60,6 +54,6 @@
///
#define SIZE_OF_EFI_FILE_SYSTEM_INFO OFFSET_OF (EFI_FILE_SYSTEM_INFO, VolumeLabel)
-extern EFI_GUID gEfiFileSystemInfoGuid;
+extern EFI_GUID gEfiFileSystemInfoGuid;
#endif
diff --git a/src/include/ipxe/efi/Guid/HiiFormMapMethodGuid.h b/src/include/ipxe/efi/Guid/HiiFormMapMethodGuid.h
index c8f3721..2636a1e 100644
--- a/src/include/ipxe/efi/Guid/HiiFormMapMethodGuid.h
+++ b/src/include/ipxe/efi/Guid/HiiFormMapMethodGuid.h
@@ -1,14 +1,8 @@
/** @file
Guid used to identify HII FormMap configuration method.
- Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
GUID defined in UEFI 2.2 spec.
@@ -17,11 +11,11 @@
#ifndef __EFI_HII_FORMMAP_GUID_H__
#define __EFI_HII_FORMMAP_GUID_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_HII_STANDARD_FORM_GUID \
{ 0x3bd2f4ec, 0xe524, 0x46e4, { 0xa9, 0xd8, 0x51, 0x1, 0x17, 0x42, 0x55, 0x62 } }
-extern EFI_GUID gEfiHiiStandardFormGuid;
+extern EFI_GUID gEfiHiiStandardFormGuid;
#endif
diff --git a/src/include/ipxe/efi/Guid/HiiPlatformSetupFormset.h b/src/include/ipxe/efi/Guid/HiiPlatformSetupFormset.h
index fa81736..e9a0e02 100644
--- a/src/include/ipxe/efi/Guid/HiiPlatformSetupFormset.h
+++ b/src/include/ipxe/efi/Guid/HiiPlatformSetupFormset.h
@@ -2,14 +2,8 @@
GUID indicates that the form set contains forms designed to be used
for platform configuration and this form set will be displayed.
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
GUID defined in UEFI 2.1.
@@ -19,7 +13,7 @@
#ifndef __HII_PLATFORM_SETUP_FORMSET_GUID_H__
#define __HII_PLATFORM_SETUP_FORMSET_GUID_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_HII_PLATFORM_SETUP_FORMSET_GUID \
{ 0x93039971, 0x8545, 0x4b04, { 0xb4, 0x5e, 0x32, 0xeb, 0x83, 0x26, 0x4, 0xe } }
@@ -30,8 +24,12 @@
#define EFI_HII_USER_CREDENTIAL_FORMSET_GUID \
{ 0x337f4407, 0x5aee, 0x4b83, { 0xb2, 0xa7, 0x4e, 0xad, 0xca, 0x30, 0x88, 0xcd } }
-extern EFI_GUID gEfiHiiPlatformSetupFormsetGuid;
-extern EFI_GUID gEfiHiiDriverHealthFormsetGuid;
-extern EFI_GUID gEfiHiiUserCredentialFormsetGuid;
+#define EFI_HII_REST_STYLE_FORMSET_GUID \
+ { 0x790217bd, 0xbecf, 0x485b, { 0x91, 0x70, 0x5f, 0xf7, 0x11, 0x31, 0x8b, 0x27 } }
+
+extern EFI_GUID gEfiHiiPlatformSetupFormsetGuid;
+extern EFI_GUID gEfiHiiDriverHealthFormsetGuid;
+extern EFI_GUID gEfiHiiUserCredentialFormsetGuid;
+extern EFI_GUID gEfiHiiRestStyleFormsetGuid;
#endif
diff --git a/src/include/ipxe/efi/Guid/MdeModuleHii.h b/src/include/ipxe/efi/Guid/MdeModuleHii.h
index 76890b7..102025a 100644
--- a/src/include/ipxe/efi/Guid/MdeModuleHii.h
+++ b/src/include/ipxe/efi/Guid/MdeModuleHii.h
@@ -1,25 +1,19 @@
/** @file
EDKII extented HII IFR guid opcodes.
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __MDEMODULE_HII_H__
#define __MDEMODULE_HII_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
-#define NARROW_CHAR 0xFFF0
-#define WIDE_CHAR 0xFFF1
-#define NON_BREAKING_CHAR 0xFFF2
+#define NARROW_CHAR 0xFFF0
+#define WIDE_CHAR 0xFFF1
+#define NON_BREAKING_CHAR 0xFFF2
///
/// State defined for password statemachine .
@@ -38,91 +32,91 @@
///
/// EDKII implementation extension opcodes, new extension can be added here later.
///
-#define EFI_IFR_EXTEND_OP_LABEL 0x0
-#define EFI_IFR_EXTEND_OP_BANNER 0x1
-#define EFI_IFR_EXTEND_OP_TIMEOUT 0x2
-#define EFI_IFR_EXTEND_OP_CLASS 0x3
-#define EFI_IFR_EXTEND_OP_SUBCLASS 0x4
+#define EFI_IFR_EXTEND_OP_LABEL 0x0
+#define EFI_IFR_EXTEND_OP_BANNER 0x1
+#define EFI_IFR_EXTEND_OP_TIMEOUT 0x2
+#define EFI_IFR_EXTEND_OP_CLASS 0x3
+#define EFI_IFR_EXTEND_OP_SUBCLASS 0x4
///
/// Label opcode.
///
typedef struct _EFI_IFR_GUID_LABEL {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
///
/// EFI_IFR_TIANO_GUID.
///
- EFI_GUID Guid;
+ EFI_GUID Guid;
///
/// EFI_IFR_EXTEND_OP_LABEL.
///
- UINT8 ExtendOpCode;
+ UINT8 ExtendOpCode;
///
/// Label Number.
///
- UINT16 Number;
+ UINT16 Number;
} EFI_IFR_GUID_LABEL;
-#define EFI_IFR_BANNER_ALIGN_LEFT 0
-#define EFI_IFR_BANNER_ALIGN_CENTER 1
-#define EFI_IFR_BANNER_ALIGN_RIGHT 2
+#define EFI_IFR_BANNER_ALIGN_LEFT 0
+#define EFI_IFR_BANNER_ALIGN_CENTER 1
+#define EFI_IFR_BANNER_ALIGN_RIGHT 2
///
/// Banner opcode.
///
typedef struct _EFI_IFR_GUID_BANNER {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
///
/// EFI_IFR_TIANO_GUID.
///
- EFI_GUID Guid;
+ EFI_GUID Guid;
///
/// EFI_IFR_EXTEND_OP_BANNER
///
- UINT8 ExtendOpCode;
- EFI_STRING_ID Title; ///< The string token for the banner title.
- UINT16 LineNumber; ///< 1-based line number.
- UINT8 Alignment; ///< left, center, or right-aligned.
+ UINT8 ExtendOpCode;
+ EFI_STRING_ID Title; ///< The string token for the banner title.
+ UINT16 LineNumber; ///< 1-based line number.
+ UINT8 Alignment; ///< left, center, or right-aligned.
} EFI_IFR_GUID_BANNER;
///
/// Timeout opcode.
///
typedef struct _EFI_IFR_GUID_TIMEOUT {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
///
/// EFI_IFR_TIANO_GUID.
///
- EFI_GUID Guid;
+ EFI_GUID Guid;
///
/// EFI_IFR_EXTEND_OP_TIMEOUT.
///
- UINT8 ExtendOpCode;
- UINT16 TimeOut; ///< TimeOut Value.
+ UINT8 ExtendOpCode;
+ UINT16 TimeOut; ///< TimeOut Value.
} EFI_IFR_GUID_TIMEOUT;
-#define EFI_NON_DEVICE_CLASS 0x00
-#define EFI_DISK_DEVICE_CLASS 0x01
-#define EFI_VIDEO_DEVICE_CLASS 0x02
-#define EFI_NETWORK_DEVICE_CLASS 0x04
-#define EFI_INPUT_DEVICE_CLASS 0x08
-#define EFI_ON_BOARD_DEVICE_CLASS 0x10
-#define EFI_OTHER_DEVICE_CLASS 0x20
+#define EFI_NON_DEVICE_CLASS 0x00
+#define EFI_DISK_DEVICE_CLASS 0x01
+#define EFI_VIDEO_DEVICE_CLASS 0x02
+#define EFI_NETWORK_DEVICE_CLASS 0x04
+#define EFI_INPUT_DEVICE_CLASS 0x08
+#define EFI_ON_BOARD_DEVICE_CLASS 0x10
+#define EFI_OTHER_DEVICE_CLASS 0x20
///
/// Device Class opcode.
///
typedef struct _EFI_IFR_GUID_CLASS {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
///
/// EFI_IFR_TIANO_GUID.
///
- EFI_GUID Guid;
+ EFI_GUID Guid;
///
/// EFI_IFR_EXTEND_OP_CLASS.
///
- UINT8 ExtendOpCode;
- UINT16 Class; ///< Device Class from the above.
+ UINT8 ExtendOpCode;
+ UINT16 Class; ///< Device Class from the above.
} EFI_IFR_GUID_CLASS;
#define EFI_SETUP_APPLICATION_SUBCLASS 0x00
@@ -134,16 +128,16 @@
/// SubClass opcode
///
typedef struct _EFI_IFR_GUID_SUBCLASS {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
///
/// EFI_IFR_TIANO_GUID.
///
- EFI_GUID Guid;
+ EFI_GUID Guid;
///
/// EFI_IFR_EXTEND_OP_SUBCLASS.
///
- UINT8 ExtendOpCode;
- UINT16 SubClass; ///< Sub Class type from the above.
+ UINT8 ExtendOpCode;
+ UINT16 SubClass; ///< Sub Class type from the above.
} EFI_IFR_GUID_SUBCLASS;
///
@@ -157,66 +151,83 @@
/// One is for framework OneOf question Option Key value;
/// another is for framework vareqval.
///
-#define EFI_IFR_EXTEND_OP_OPTIONKEY 0x0
-#define EFI_IFR_EXTEND_OP_VAREQNAME 0x1
+#define EFI_IFR_EXTEND_OP_OPTIONKEY 0x0
+#define EFI_IFR_EXTEND_OP_VAREQNAME 0x1
///
/// Store the framework vfr option key value.
///
typedef struct _EFI_IFR_GUID_OPTIONKEY {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
///
/// EFI_IFR_FRAMEWORK_GUID.
///
- EFI_GUID Guid;
+ EFI_GUID Guid;
///
/// EFI_IFR_EXTEND_OP_OPTIONKEY.
///
- UINT8 ExtendOpCode;
+ UINT8 ExtendOpCode;
///
/// OneOf Questiond ID binded by OneOf Option.
///
- EFI_QUESTION_ID QuestionId;
+ EFI_QUESTION_ID QuestionId;
///
/// The OneOf Option Value.
///
- EFI_IFR_TYPE_VALUE OptionValue;
+ EFI_IFR_TYPE_VALUE OptionValue;
///
/// The Framework OneOf Option Key Value.
///
- UINT16 KeyValue;
+ UINT16 KeyValue;
} EFI_IFR_GUID_OPTIONKEY;
///
/// Store the framework vfr vareqval name number.
///
typedef struct _EFI_IFR_GUID_VAREQNAME {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
///
/// EFI_IFR_FRAMEWORK_GUID.
///
- EFI_GUID Guid;
+ EFI_GUID Guid;
///
/// EFI_IFR_EXTEND_OP_VAREQNAME.
///
- UINT8 ExtendOpCode;
+ UINT8 ExtendOpCode;
///
/// Question ID of the Numeric Opcode created.
///
- EFI_QUESTION_ID QuestionId;
+ EFI_QUESTION_ID QuestionId;
///
/// For vareqval (0x100), NameId is 0x100.
/// This value will convert to a Unicode String following this rule;
/// sprintf(StringBuffer, "%d", NameId) .
/// The the Unicode String will be used as a EFI Variable Name.
///
- UINT16 NameId;
+ UINT16 NameId;
} EFI_IFR_GUID_VAREQNAME;
+///
+/// EDKII implementation extension GUID, used to indaicate there are bit fields in the varstore.
+///
+#define EDKII_IFR_BIT_VARSTORE_GUID \
+ {0x82DDD68B, 0x9163, 0x4187, {0x9B, 0x27, 0x20, 0xA8, 0xFD, 0x60,0xA7, 0x1D}}
+
+///
+/// EDKII implementation extension flags, used to indaicate the disply style and bit width for bit filed storage.
+/// Two high bits for display style and the low six bits for bit width.
+///
+#define EDKII_IFR_DISPLAY_BIT 0xC0
+#define EDKII_IFR_DISPLAY_INT_DEC_BIT 0x00
+#define EDKII_IFR_DISPLAY_UINT_DEC_BIT 0x40
+#define EDKII_IFR_DISPLAY_UINT_HEX_BIT 0x80
+
+#define EDKII_IFR_NUMERIC_SIZE_BIT 0x3F
+
#pragma pack()
-extern EFI_GUID gEfiIfrTianoGuid;
-extern EFI_GUID gEfiIfrFrameworkGuid;
+extern EFI_GUID gEfiIfrTianoGuid;
+extern EFI_GUID gEfiIfrFrameworkGuid;
+extern EFI_GUID gEdkiiIfrBitVarstoreGuid;
#endif
-
diff --git a/src/include/ipxe/efi/Guid/PcAnsi.h b/src/include/ipxe/efi/Guid/PcAnsi.h
index 8b3e63f..82835a2 100644
--- a/src/include/ipxe/efi/Guid/PcAnsi.h
+++ b/src/include/ipxe/efi/Guid/PcAnsi.h
@@ -1,14 +1,8 @@
/** @file
Terminal Device Path Vendor Guid.
- Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
GUIDs defined in UEFI 2.0 spec.
@@ -18,7 +12,7 @@
#ifndef __PC_ANSI_H__
#define __PC_ANSI_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_PC_ANSI_GUID \
{ \
@@ -50,11 +44,11 @@
0xd487ddb4, 0x008b, 0x11d9, {0xaf, 0xdc, 0x00, 0x10, 0x83, 0xff, 0xca, 0x4d } \
}
-extern EFI_GUID gEfiPcAnsiGuid;
-extern EFI_GUID gEfiVT100Guid;
-extern EFI_GUID gEfiVT100PlusGuid;
-extern EFI_GUID gEfiVTUTF8Guid;
-extern EFI_GUID gEfiUartDevicePathGuid;
-extern EFI_GUID gEfiSasDevicePathGuid;
+extern EFI_GUID gEfiPcAnsiGuid;
+extern EFI_GUID gEfiVT100Guid;
+extern EFI_GUID gEfiVT100PlusGuid;
+extern EFI_GUID gEfiVTUTF8Guid;
+extern EFI_GUID gEfiUartDevicePathGuid;
+extern EFI_GUID gEfiSasDevicePathGuid;
#endif
diff --git a/src/include/ipxe/efi/Guid/SmBios.h b/src/include/ipxe/efi/Guid/SmBios.h
index 4914289..0a47a05 100644
--- a/src/include/ipxe/efi/Guid/SmBios.h
+++ b/src/include/ipxe/efi/Guid/SmBios.h
@@ -5,14 +5,8 @@
locate the SMBIOS tables. Do not search the 0xF0000 segment to find SMBIOS
tables.
- Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
GUIDs defined in UEFI 2.5 spec.
@@ -22,7 +16,7 @@
#ifndef __SMBIOS_GUID_H__
#define __SMBIOS_GUID_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define SMBIOS_TABLE_GUID \
{ \
@@ -34,7 +28,7 @@
0xf2fd1544, 0x9794, 0x4a2c, {0x99, 0x2e, 0xe5, 0xbb, 0xcf, 0x20, 0xe3, 0x94 } \
}
-extern EFI_GUID gEfiSmbiosTableGuid;
-extern EFI_GUID gEfiSmbios3TableGuid;
+extern EFI_GUID gEfiSmbiosTableGuid;
+extern EFI_GUID gEfiSmbios3TableGuid;
#endif
diff --git a/src/include/ipxe/efi/Guid/WinCertificate.h b/src/include/ipxe/efi/Guid/WinCertificate.h
index cf0a7c2..1c706d3 100644
--- a/src/include/ipxe/efi/Guid/WinCertificate.h
+++ b/src/include/ipxe/efi/Guid/WinCertificate.h
@@ -2,13 +2,7 @@
GUID for UEFI WIN_CERTIFICATE structure.
Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
GUID defined in UEFI 2.0 spec.
@@ -17,14 +11,14 @@
#ifndef __EFI_WIN_CERTIFICATE_H__
#define __EFI_WIN_CERTIFICATE_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
//
// _WIN_CERTIFICATE.wCertificateType
//
-#define WIN_CERT_TYPE_PKCS_SIGNED_DATA 0x0002
-#define WIN_CERT_TYPE_EFI_PKCS115 0x0EF0
-#define WIN_CERT_TYPE_EFI_GUID 0x0EF1
+#define WIN_CERT_TYPE_PKCS_SIGNED_DATA 0x0002
+#define WIN_CERT_TYPE_EFI_PKCS115 0x0EF0
+#define WIN_CERT_TYPE_EFI_GUID 0x0EF1
///
/// The WIN_CERTIFICATE structure is part of the PE/COFF specification.
@@ -34,18 +28,18 @@
/// The length of the entire certificate,
/// including the length of the header, in bytes.
///
- UINT32 dwLength;
+ UINT32 dwLength;
///
/// The revision level of the WIN_CERTIFICATE
/// structure. The current revision level is 0x0200.
///
- UINT16 wRevision;
+ UINT16 wRevision;
///
/// The certificate type. See WIN_CERT_TYPE_xxx for the UEFI
/// certificate types. The UEFI specification reserves the range of
/// certificate type values from 0x0EF0 to 0x0EFF.
///
- UINT16 wCertificateType;
+ UINT16 wCertificateType;
///
/// The following is the actual certificate. The format of
/// the certificate depends on wCertificateType.
@@ -64,12 +58,11 @@
/// WIN_CERTIFICATE_UEFI_GUID.CertData
///
typedef struct {
- EFI_GUID HashType;
- UINT8 PublicKey[256];
- UINT8 Signature[256];
+ EFI_GUID HashType;
+ UINT8 PublicKey[256];
+ UINT8 Signature[256];
} EFI_CERT_BLOCK_RSA_2048_SHA256;
-
///
/// Certificate which encapsulates a GUID-specific digital signature
///
@@ -78,22 +71,21 @@
/// This is the standard WIN_CERTIFICATE header, where
/// wCertificateType is set to WIN_CERT_TYPE_EFI_GUID.
///
- WIN_CERTIFICATE Hdr;
+ WIN_CERTIFICATE Hdr;
///
/// This is the unique id which determines the
/// format of the CertData. .
///
- EFI_GUID CertType;
+ EFI_GUID CertType;
///
/// The following is the certificate data. The format of
/// the data is determined by the CertType.
/// If CertType is EFI_CERT_TYPE_RSA2048_SHA256_GUID,
/// the CertData will be EFI_CERT_BLOCK_RSA_2048_SHA256 structure.
///
- UINT8 CertData[1];
+ UINT8 CertData[1];
} WIN_CERTIFICATE_UEFI_GUID;
-
///
/// Certificate which encapsulates the RSASSA_PKCS1-v1_5 digital signature.
///
@@ -107,12 +99,12 @@
/// This is the standard WIN_CERTIFICATE header, where
/// wCertificateType is set to WIN_CERT_TYPE_UEFI_PKCS1_15.
///
- WIN_CERTIFICATE Hdr;
+ WIN_CERTIFICATE Hdr;
///
/// This is the hashing algorithm which was performed on the
/// UEFI executable when creating the digital signature.
///
- EFI_GUID HashAlgorithm;
+ EFI_GUID HashAlgorithm;
///
/// The following is the actual digital signature. The
/// size of the signature is the same size as the key
@@ -125,6 +117,6 @@
///
} WIN_CERTIFICATE_EFI_PKCS1_15;
-extern EFI_GUID gEfiCertTypeRsa2048Sha256Guid;
+extern EFI_GUID gEfiCertTypeRsa2048Sha256Guid;
#endif
diff --git a/src/include/ipxe/efi/Ia32/ProcessorBind.h b/src/include/ipxe/efi/Ia32/ProcessorBind.h
index 2d6c4b4..5e3fb92 100644
--- a/src/include/ipxe/efi/Ia32/ProcessorBind.h
+++ b/src/include/ipxe/efi/Ia32/ProcessorBind.h
@@ -1,21 +1,15 @@
/** @file
Processor or Compiler specific defines and types for IA-32 architecture.
-Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __PROCESSOR_BIND_H__
#define __PROCESSOR_BIND_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
///
/// Define the processor type so other code can make processor based choices.
@@ -25,39 +19,38 @@
//
// Make sure we are using the correct packing rules per EFI specification
//
-#if !defined(__GNUC__)
-#pragma pack()
+#if !defined (__GNUC__)
+ #pragma pack()
#endif
-#if defined(__INTEL_COMPILER)
+#if defined (__INTEL_COMPILER)
//
// Disable ICC's remark #869: "Parameter" was never referenced warning.
// This is legal ANSI C code so we disable the remark that is turned on with -Wall
//
-#pragma warning ( disable : 869 )
+ #pragma warning ( disable : 869 )
//
// Disable ICC's remark #1418: external function definition with no prior declaration.
// This is legal ANSI C code so we disable the remark that is turned on with /W4
//
-#pragma warning ( disable : 1418 )
+ #pragma warning ( disable : 1418 )
//
// Disable ICC's remark #1419: external declaration in primary source file
// This is legal ANSI C code so we disable the remark that is turned on with /W4
//
-#pragma warning ( disable : 1419 )
+ #pragma warning ( disable : 1419 )
//
// Disable ICC's remark #593: "Variable" was set but never used.
// This is legal ANSI C code so we disable the remark that is turned on with /W4
//
-#pragma warning ( disable : 593 )
+ #pragma warning ( disable : 593 )
#endif
-
-#if defined(_MSC_EXTENSIONS)
+#if defined (_MSC_EXTENSIONS)
//
// Disable warning that make it impossible to compile at /W4
@@ -67,35 +60,35 @@
//
// Disabling bitfield type checking warnings.
//
-#pragma warning ( disable : 4214 )
+ #pragma warning ( disable : 4214 )
//
// Disabling the unreferenced formal parameter warnings.
//
-#pragma warning ( disable : 4100 )
+ #pragma warning ( disable : 4100 )
//
// Disable slightly different base types warning as CHAR8 * can not be set
// to a constant string.
//
-#pragma warning ( disable : 4057 )
+ #pragma warning ( disable : 4057 )
//
// ASSERT(FALSE) or while (TRUE) are legal constructs so suppress this warning
//
-#pragma warning ( disable : 4127 )
+ #pragma warning ( disable : 4127 )
//
// This warning is caused by functions defined but not used. For precompiled header only.
//
-#pragma warning ( disable : 4505 )
+ #pragma warning ( disable : 4505 )
//
// This warning is caused by empty (after preprocessing) source file. For precompiled header only.
//
-#pragma warning ( disable : 4206 )
+ #pragma warning ( disable : 4206 )
-#if _MSC_VER == 1800 || _MSC_VER == 1900
+ #if defined (_MSC_VER) && _MSC_VER >= 1800
//
// Disable these warnings for VS2013.
@@ -105,130 +98,129 @@
// This warning is for potentially uninitialized local variable, and it may cause false
// positive issues in VS2013 and VS2015 build
//
-#pragma warning ( disable : 4701 )
+ #pragma warning ( disable : 4701 )
//
// This warning is for potentially uninitialized local pointer variable, and it may cause
// false positive issues in VS2013 and VS2015 build
//
-#pragma warning ( disable : 4703 )
+ #pragma warning ( disable : 4703 )
+
+ #endif
#endif
-#endif
+#if defined (_MSC_EXTENSIONS)
+//
+// use Microsoft C compiler dependent integer width types
+//
-#if defined(_MSC_EXTENSIONS)
-
- //
- // use Microsoft C compiler dependent integer width types
- //
-
- ///
- /// 8-byte unsigned value.
- ///
- typedef unsigned __int64 UINT64;
- ///
- /// 8-byte signed value.
- ///
- typedef __int64 INT64;
- ///
- /// 4-byte unsigned value.
- ///
- typedef unsigned __int32 UINT32;
- ///
- /// 4-byte signed value.
- ///
- typedef __int32 INT32;
- ///
- /// 2-byte unsigned value.
- ///
- typedef unsigned short UINT16;
- ///
- /// 2-byte Character. Unless otherwise specified all strings are stored in the
- /// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 standards.
- ///
- typedef unsigned short CHAR16;
- ///
- /// 2-byte signed value.
- ///
- typedef short INT16;
- ///
- /// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other
- /// values are undefined.
- ///
- typedef unsigned char BOOLEAN;
- ///
- /// 1-byte unsigned value.
- ///
- typedef unsigned char UINT8;
- ///
- /// 1-byte Character.
- ///
- typedef char CHAR8;
- ///
- /// 1-byte signed value.
- ///
- typedef signed char INT8;
+///
+/// 8-byte unsigned value.
+///
+typedef unsigned __int64 UINT64;
+///
+/// 8-byte signed value.
+///
+typedef __int64 INT64;
+///
+/// 4-byte unsigned value.
+///
+typedef unsigned __int32 UINT32;
+///
+/// 4-byte signed value.
+///
+typedef __int32 INT32;
+///
+/// 2-byte unsigned value.
+///
+typedef unsigned short UINT16;
+///
+/// 2-byte Character. Unless otherwise specified all strings are stored in the
+/// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 standards.
+///
+typedef unsigned short CHAR16;
+///
+/// 2-byte signed value.
+///
+typedef short INT16;
+///
+/// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other
+/// values are undefined.
+///
+typedef unsigned char BOOLEAN;
+///
+/// 1-byte unsigned value.
+///
+typedef unsigned char UINT8;
+///
+/// 1-byte Character.
+///
+typedef char CHAR8;
+///
+/// 1-byte signed value.
+///
+typedef signed char INT8;
#else
- ///
- /// 8-byte unsigned value.
- ///
- typedef unsigned long long UINT64;
- ///
- /// 8-byte signed value.
- ///
- typedef long long INT64;
- ///
- /// 4-byte unsigned value.
- ///
- typedef unsigned int UINT32;
- ///
- /// 4-byte signed value.
- ///
- typedef int INT32;
- ///
- /// 2-byte unsigned value.
- ///
- typedef unsigned short UINT16;
- ///
- /// 2-byte Character. Unless otherwise specified all strings are stored in the
- /// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 standards.
- ///
- typedef unsigned short CHAR16;
- ///
- /// 2-byte signed value.
- ///
- typedef short INT16;
- ///
- /// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other
- /// values are undefined.
- ///
- typedef unsigned char BOOLEAN;
- ///
- /// 1-byte unsigned value.
- ///
- typedef unsigned char UINT8;
- ///
- /// 1-byte Character
- ///
- typedef char CHAR8;
- ///
- /// 1-byte signed value
- ///
- typedef signed char INT8;
+///
+/// 8-byte unsigned value.
+///
+typedef unsigned long long UINT64;
+///
+/// 8-byte signed value.
+///
+typedef long long INT64;
+///
+/// 4-byte unsigned value.
+///
+typedef unsigned int UINT32;
+///
+/// 4-byte signed value.
+///
+typedef int INT32;
+///
+/// 2-byte unsigned value.
+///
+typedef unsigned short UINT16;
+///
+/// 2-byte Character. Unless otherwise specified all strings are stored in the
+/// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 standards.
+///
+typedef unsigned short CHAR16;
+///
+/// 2-byte signed value.
+///
+typedef short INT16;
+///
+/// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other
+/// values are undefined.
+///
+typedef unsigned char BOOLEAN;
+///
+/// 1-byte unsigned value.
+///
+typedef unsigned char UINT8;
+///
+/// 1-byte Character
+///
+typedef char CHAR8;
+///
+/// 1-byte signed value
+///
+typedef signed char INT8;
#endif
///
/// Unsigned value of native width. (4 bytes on supported 32-bit processor instructions;
/// 8 bytes on supported 64-bit processor instructions.)
///
-typedef UINT32 UINTN;
+typedef UINT32 UINTN;
///
/// Signed value of native width. (4 bytes on supported 32-bit processor instructions;
/// 8 bytes on supported 64-bit processor instructions.)
///
-typedef INT32 INTN;
+typedef INT32 INTN;
//
// Processor specific defines
@@ -237,7 +229,7 @@
///
/// A value of native width with the highest bit set.
///
-#define MAX_BIT 0x80000000
+#define MAX_BIT 0x80000000
///
/// A value of native width with the two highest bits set.
///
@@ -246,7 +238,12 @@
///
/// Maximum legal IA-32 address.
///
-#define MAX_ADDRESS 0xFFFFFFFF
+#define MAX_ADDRESS 0xFFFFFFFF
+
+///
+/// Maximum usable address at boot time
+///
+#define MAX_ALLOC_ADDRESS MAX_ADDRESS
///
/// Maximum legal IA-32 INTN and UINTN values.
@@ -255,15 +252,20 @@
#define MAX_UINTN ((UINTN)0xFFFFFFFF)
///
+/// Minimum legal IA-32 INTN value.
+///
+#define MIN_INTN (((INTN)-2147483647) - 1)
+
+///
/// The stack alignment required for IA-32.
///
-#define CPU_STACK_ALIGNMENT sizeof(UINTN)
+#define CPU_STACK_ALIGNMENT sizeof(UINTN)
///
/// Page allocation granularity for IA-32.
///
-#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000)
-#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x1000)
+#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000)
+#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x1000)
//
// Modifier to ensure that all protocol member functions and EFI intrinsics
@@ -271,33 +273,33 @@
// EFI intrinsics are required to modify their member functions with EFIAPI.
//
#ifdef EFIAPI
- ///
- /// If EFIAPI is already defined, then we use that definition.
- ///
-#elif defined(_MSC_EXTENSIONS)
- ///
- /// Microsoft* compiler specific method for EFIAPI calling convention.
- ///
- #define EFIAPI __cdecl
-#elif defined(__GNUC__)
- ///
- /// GCC specific method for EFIAPI calling convention.
- ///
- #define EFIAPI __attribute__((cdecl))
+///
+/// If EFIAPI is already defined, then we use that definition.
+///
+#elif defined (_MSC_EXTENSIONS)
+///
+/// Microsoft* compiler specific method for EFIAPI calling convention.
+///
+#define EFIAPI __cdecl
+#elif defined (__GNUC__) || defined (__clang__)
+///
+/// GCC specific method for EFIAPI calling convention.
+///
+#define EFIAPI __attribute__((cdecl))
#else
- ///
- /// The default for a non Microsoft* or GCC compiler is to assume the EFI ABI
- /// is the standard.
- ///
- #define EFIAPI
+///
+/// The default for a non Microsoft* or GCC compiler is to assume the EFI ABI
+/// is the standard.
+///
+#define EFIAPI
#endif
-#if defined(__GNUC__)
- ///
- /// For GNU assembly code, .global or .globl can declare global symbols.
- /// Define this macro to unify the usage.
- ///
- #define ASM_GLOBAL .globl
+#if defined (__GNUC__) || defined (__clang__)
+///
+/// For GNU assembly code, .global or .globl can declare global symbols.
+/// Define this macro to unify the usage.
+///
+#define ASM_GLOBAL .globl
#endif
/**
@@ -310,11 +312,10 @@
@return The pointer to the first instruction of a function given a function pointer.
**/
-#define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID *)(UINTN)(FunctionPointer)
+#define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID *)(UINTN)(FunctionPointer)
#ifndef __USER_LABEL_PREFIX__
-#define __USER_LABEL_PREFIX__ _
+#define __USER_LABEL_PREFIX__ _
#endif
#endif
-
diff --git a/src/include/ipxe/efi/IndustryStandard/Acpi10.h b/src/include/ipxe/efi/IndustryStandard/Acpi10.h
index 7857047..e9a561c 100644
--- a/src/include/ipxe/efi/IndustryStandard/Acpi10.h
+++ b/src/include/ipxe/efi/IndustryStandard/Acpi10.h
@@ -1,20 +1,15 @@
/** @file
ACPI 1.0b definitions from the ACPI Specification, revision 1.0b
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2020, Arm Limited. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _ACPI_1_0_H_
#define _ACPI_1_0_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/IndustryStandard/AcpiAml.h>
@@ -23,8 +18,8 @@
/// excluding the RSD PTR structure.
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
+ UINT32 Signature;
+ UINT32 Length;
} EFI_ACPI_COMMON_HEADER;
#pragma pack(1)
@@ -32,84 +27,84 @@
/// The common ACPI description table header. This structure prefaces most ACPI tables.
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
- UINT8 Revision;
- UINT8 Checksum;
- UINT8 OemId[6];
- UINT64 OemTableId;
- UINT32 OemRevision;
- UINT32 CreatorId;
- UINT32 CreatorRevision;
+ UINT32 Signature;
+ UINT32 Length;
+ UINT8 Revision;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT64 OemTableId;
+ UINT32 OemRevision;
+ UINT32 CreatorId;
+ UINT32 CreatorRevision;
} EFI_ACPI_DESCRIPTION_HEADER;
#pragma pack()
//
-// Define for Desriptor
+// Define for Descriptor
//
-#define ACPI_SMALL_ITEM_FLAG 0x00
-#define ACPI_LARGE_ITEM_FLAG 0x01
+#define ACPI_SMALL_ITEM_FLAG 0x00
+#define ACPI_LARGE_ITEM_FLAG 0x01
//
// Small Item Descriptor Name
//
-#define ACPI_SMALL_IRQ_DESCRIPTOR_NAME 0x04
-#define ACPI_SMALL_DMA_DESCRIPTOR_NAME 0x05
-#define ACPI_SMALL_START_DEPENDENT_DESCRIPTOR_NAME 0x06
-#define ACPI_SMALL_END_DEPENDENT_DESCRIPTOR_NAME 0x07
-#define ACPI_SMALL_IO_PORT_DESCRIPTOR_NAME 0x08
-#define ACPI_SMALL_FIXED_IO_PORT_DESCRIPTOR_NAME 0x09
-#define ACPI_SMALL_VENDOR_DEFINED_DESCRIPTOR_NAME 0x0E
-#define ACPI_SMALL_END_TAG_DESCRIPTOR_NAME 0x0F
+#define ACPI_SMALL_IRQ_DESCRIPTOR_NAME 0x04
+#define ACPI_SMALL_DMA_DESCRIPTOR_NAME 0x05
+#define ACPI_SMALL_START_DEPENDENT_DESCRIPTOR_NAME 0x06
+#define ACPI_SMALL_END_DEPENDENT_DESCRIPTOR_NAME 0x07
+#define ACPI_SMALL_IO_PORT_DESCRIPTOR_NAME 0x08
+#define ACPI_SMALL_FIXED_IO_PORT_DESCRIPTOR_NAME 0x09
+#define ACPI_SMALL_VENDOR_DEFINED_DESCRIPTOR_NAME 0x0E
+#define ACPI_SMALL_END_TAG_DESCRIPTOR_NAME 0x0F
//
// Large Item Descriptor Name
//
-#define ACPI_LARGE_24_BIT_MEMORY_RANGE_DESCRIPTOR_NAME 0x01
-#define ACPI_LARGE_VENDOR_DEFINED_DESCRIPTOR_NAME 0x04
-#define ACPI_LARGE_32_BIT_MEMORY_RANGE_DESCRIPTOR_NAME 0x05
-#define ACPI_LARGE_32_BIT_FIXED_MEMORY_RANGE_DESCRIPTOR_NAME 0x06
-#define ACPI_LARGE_DWORD_ADDRESS_SPACE_DESCRIPTOR_NAME 0x07
-#define ACPI_LARGE_WORD_ADDRESS_SPACE_DESCRIPTOR_NAME 0x08
-#define ACPI_LARGE_EXTENDED_IRQ_DESCRIPTOR_NAME 0x09
-#define ACPI_LARGE_QWORD_ADDRESS_SPACE_DESCRIPTOR_NAME 0x0A
+#define ACPI_LARGE_24_BIT_MEMORY_RANGE_DESCRIPTOR_NAME 0x01
+#define ACPI_LARGE_VENDOR_DEFINED_DESCRIPTOR_NAME 0x04
+#define ACPI_LARGE_32_BIT_MEMORY_RANGE_DESCRIPTOR_NAME 0x05
+#define ACPI_LARGE_32_BIT_FIXED_MEMORY_RANGE_DESCRIPTOR_NAME 0x06
+#define ACPI_LARGE_DWORD_ADDRESS_SPACE_DESCRIPTOR_NAME 0x07
+#define ACPI_LARGE_WORD_ADDRESS_SPACE_DESCRIPTOR_NAME 0x08
+#define ACPI_LARGE_EXTENDED_IRQ_DESCRIPTOR_NAME 0x09
+#define ACPI_LARGE_QWORD_ADDRESS_SPACE_DESCRIPTOR_NAME 0x0A
//
// Small Item Descriptor Value
//
-#define ACPI_IRQ_NOFLAG_DESCRIPTOR 0x22
-#define ACPI_IRQ_DESCRIPTOR 0x23
-#define ACPI_DMA_DESCRIPTOR 0x2A
-#define ACPI_START_DEPENDENT_DESCRIPTOR 0x30
-#define ACPI_START_DEPENDENT_EX_DESCRIPTOR 0x31
-#define ACPI_END_DEPENDENT_DESCRIPTOR 0x38
-#define ACPI_IO_PORT_DESCRIPTOR 0x47
-#define ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR 0x4B
-#define ACPI_END_TAG_DESCRIPTOR 0x79
+#define ACPI_IRQ_NOFLAG_DESCRIPTOR 0x22
+#define ACPI_IRQ_DESCRIPTOR 0x23
+#define ACPI_DMA_DESCRIPTOR 0x2A
+#define ACPI_START_DEPENDENT_DESCRIPTOR 0x30
+#define ACPI_START_DEPENDENT_EX_DESCRIPTOR 0x31
+#define ACPI_END_DEPENDENT_DESCRIPTOR 0x38
+#define ACPI_IO_PORT_DESCRIPTOR 0x47
+#define ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR 0x4B
+#define ACPI_END_TAG_DESCRIPTOR 0x79
//
// Large Item Descriptor Value
//
-#define ACPI_24_BIT_MEMORY_RANGE_DESCRIPTOR 0x81
-#define ACPI_32_BIT_MEMORY_RANGE_DESCRIPTOR 0x85
-#define ACPI_32_BIT_FIXED_MEMORY_RANGE_DESCRIPTOR 0x86
-#define ACPI_DWORD_ADDRESS_SPACE_DESCRIPTOR 0x87
-#define ACPI_WORD_ADDRESS_SPACE_DESCRIPTOR 0x88
-#define ACPI_EXTENDED_INTERRUPT_DESCRIPTOR 0x89
-#define ACPI_QWORD_ADDRESS_SPACE_DESCRIPTOR 0x8A
-#define ACPI_ADDRESS_SPACE_DESCRIPTOR 0x8A
+#define ACPI_24_BIT_MEMORY_RANGE_DESCRIPTOR 0x81
+#define ACPI_32_BIT_MEMORY_RANGE_DESCRIPTOR 0x85
+#define ACPI_32_BIT_FIXED_MEMORY_RANGE_DESCRIPTOR 0x86
+#define ACPI_DWORD_ADDRESS_SPACE_DESCRIPTOR 0x87
+#define ACPI_WORD_ADDRESS_SPACE_DESCRIPTOR 0x88
+#define ACPI_EXTENDED_INTERRUPT_DESCRIPTOR 0x89
+#define ACPI_QWORD_ADDRESS_SPACE_DESCRIPTOR 0x8A
+#define ACPI_ADDRESS_SPACE_DESCRIPTOR 0x8A
//
// Resource Type
//
-#define ACPI_ADDRESS_SPACE_TYPE_MEM 0x00
-#define ACPI_ADDRESS_SPACE_TYPE_IO 0x01
-#define ACPI_ADDRESS_SPACE_TYPE_BUS 0x02
+#define ACPI_ADDRESS_SPACE_TYPE_MEM 0x00
+#define ACPI_ADDRESS_SPACE_TYPE_IO 0x01
+#define ACPI_ADDRESS_SPACE_TYPE_BUS 0x02
///
/// Power Management Timer frequency is fixed at 3.579545MHz.
///
-#define ACPI_TIMER_FREQUENCY 3579545
+#define ACPI_TIMER_FREQUENCY 3579545
//
// Ensure proper structure formats
@@ -117,87 +112,87 @@
#pragma pack(1)
///
-/// The commond definition of QWORD, DWORD, and WORD
+/// The common definition of QWORD, DWORD, and WORD
/// Address Space Descriptors.
///
typedef PACKED struct {
- UINT8 Desc;
- UINT16 Len;
- UINT8 ResType;
- UINT8 GenFlag;
- UINT8 SpecificFlag;
- UINT64 AddrSpaceGranularity;
- UINT64 AddrRangeMin;
- UINT64 AddrRangeMax;
- UINT64 AddrTranslationOffset;
- UINT64 AddrLen;
+ UINT8 Desc;
+ UINT16 Len;
+ UINT8 ResType;
+ UINT8 GenFlag;
+ UINT8 SpecificFlag;
+ UINT64 AddrSpaceGranularity;
+ UINT64 AddrRangeMin;
+ UINT64 AddrRangeMax;
+ UINT64 AddrTranslationOffset;
+ UINT64 AddrLen;
} EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR;
typedef PACKED union {
- UINT8 Byte;
+ UINT8 Byte;
PACKED struct {
- UINT8 Length : 3;
- UINT8 Name : 4;
- UINT8 Type : 1;
+ UINT8 Length : 3;
+ UINT8 Name : 4;
+ UINT8 Type : 1;
} Bits;
} ACPI_SMALL_RESOURCE_HEADER;
typedef PACKED struct {
PACKED union {
- UINT8 Byte;
+ UINT8 Byte;
PACKED struct {
- UINT8 Name : 7;
- UINT8 Type : 1;
- }Bits;
+ UINT8 Name : 7;
+ UINT8 Type : 1;
+ } Bits;
} Header;
- UINT16 Length;
+ UINT16 Length;
} ACPI_LARGE_RESOURCE_HEADER;
///
/// IRQ Descriptor.
///
typedef PACKED struct {
- ACPI_SMALL_RESOURCE_HEADER Header;
- UINT16 Mask;
+ ACPI_SMALL_RESOURCE_HEADER Header;
+ UINT16 Mask;
} EFI_ACPI_IRQ_NOFLAG_DESCRIPTOR;
///
/// IRQ Descriptor.
///
typedef PACKED struct {
- ACPI_SMALL_RESOURCE_HEADER Header;
- UINT16 Mask;
- UINT8 Information;
+ ACPI_SMALL_RESOURCE_HEADER Header;
+ UINT16 Mask;
+ UINT8 Information;
} EFI_ACPI_IRQ_DESCRIPTOR;
///
/// DMA Descriptor.
///
typedef PACKED struct {
- ACPI_SMALL_RESOURCE_HEADER Header;
- UINT8 ChannelMask;
- UINT8 Information;
+ ACPI_SMALL_RESOURCE_HEADER Header;
+ UINT8 ChannelMask;
+ UINT8 Information;
} EFI_ACPI_DMA_DESCRIPTOR;
///
/// I/O Port Descriptor
///
typedef PACKED struct {
- ACPI_SMALL_RESOURCE_HEADER Header;
- UINT8 Information;
- UINT16 BaseAddressMin;
- UINT16 BaseAddressMax;
- UINT8 Alignment;
- UINT8 Length;
+ ACPI_SMALL_RESOURCE_HEADER Header;
+ UINT8 Information;
+ UINT16 BaseAddressMin;
+ UINT16 BaseAddressMax;
+ UINT8 Alignment;
+ UINT8 Length;
} EFI_ACPI_IO_PORT_DESCRIPTOR;
///
/// Fixed Location I/O Port Descriptor.
///
typedef PACKED struct {
- ACPI_SMALL_RESOURCE_HEADER Header;
- UINT16 BaseAddress;
- UINT8 Length;
+ ACPI_SMALL_RESOURCE_HEADER Header;
+ UINT16 BaseAddress;
+ UINT8 Length;
} EFI_ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR;
///
@@ -295,17 +290,17 @@
/// The End tag identifies an end of resource data.
///
typedef struct {
- UINT8 Desc;
- UINT8 Checksum;
+ UINT8 Desc;
+ UINT8 Checksum;
} EFI_ACPI_END_TAG_DESCRIPTOR;
//
// General use definitions
//
-#define EFI_ACPI_RESERVED_BYTE 0x00
-#define EFI_ACPI_RESERVED_WORD 0x0000
-#define EFI_ACPI_RESERVED_DWORD 0x00000000
-#define EFI_ACPI_RESERVED_QWORD 0x0000000000000000
+#define EFI_ACPI_RESERVED_BYTE 0x00
+#define EFI_ACPI_RESERVED_WORD 0x0000
+#define EFI_ACPI_RESERVED_DWORD 0x00000000
+#define EFI_ACPI_RESERVED_QWORD 0x0000000000000000
//
// Resource Type Specific Flags
@@ -313,76 +308,86 @@
//
// Bit [0] : Write Status, _RW
//
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_WRITE (1 << 0)
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_ONLY (0 << 0)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_WRITE (1 << 0)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_ONLY (0 << 0)
//
// Bit [2:1] : Memory Attributes, _MEM
//
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_NON_CACHEABLE (0 << 1)
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE (1 << 1)
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_WRITE_COMBINING (2 << 1)
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE (3 << 1)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_NON_CACHEABLE (0 << 1)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE (1 << 1)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_WRITE_COMBINING (2 << 1)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE (3 << 1)
//
// Bit [4:3] : Memory Attributes, _MTP
//
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_MEMORY (0 << 3)
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_RESERVED (1 << 3)
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_ACPI (2 << 3)
-#define EFI_APCI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_NVS (3 << 3)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_MEMORY (0 << 3)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_RESERVED (1 << 3)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_ACPI (2 << 3)
+#define EFI_APCI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_NVS (3 << 3)
//
// Bit [5] : Memory to I/O Translation, _TTP
//
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_TRANSLATION (1 << 5)
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_STATIC (0 << 5)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_TRANSLATION (1 << 5)
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_STATIC (0 << 5)
//
// IRQ Information
// Ref ACPI specification 6.4.2.1
//
-#define EFI_ACPI_IRQ_SHARABLE_MASK 0x10
-#define EFI_ACPI_IRQ_SHARABLE 0x10
+#define EFI_ACPI_IRQ_SHARABLE_MASK 0x10
+#define EFI_ACPI_IRQ_SHARABLE 0x10
-#define EFI_ACPI_IRQ_POLARITY_MASK 0x08
-#define EFI_ACPI_IRQ_HIGH_TRUE 0x00
-#define EFI_ACPI_IRQ_LOW_FALSE 0x08
+#define EFI_ACPI_IRQ_POLARITY_MASK 0x08
+#define EFI_ACPI_IRQ_HIGH_TRUE 0x00
+#define EFI_ACPI_IRQ_LOW_FALSE 0x08
-#define EFI_ACPI_IRQ_MODE 0x01
-#define EFI_ACPI_IRQ_LEVEL_TRIGGERED 0x00
-#define EFI_ACPI_IRQ_EDGE_TRIGGERED 0x01
+#define EFI_ACPI_IRQ_MODE 0x01
+#define EFI_ACPI_IRQ_LEVEL_TRIGGERED 0x00
+#define EFI_ACPI_IRQ_EDGE_TRIGGERED 0x01
//
// DMA Information
// Ref ACPI specification 6.4.2.2
//
-#define EFI_ACPI_DMA_SPEED_TYPE_MASK 0x60
-#define EFI_ACPI_DMA_SPEED_TYPE_COMPATIBILITY 0x00
-#define EFI_ACPI_DMA_SPEED_TYPE_A 0x20
-#define EFI_ACPI_DMA_SPEED_TYPE_B 0x40
-#define EFI_ACPI_DMA_SPEED_TYPE_F 0x60
+#define EFI_ACPI_DMA_SPEED_TYPE_MASK 0x60
+#define EFI_ACPI_DMA_SPEED_TYPE_COMPATIBILITY 0x00
+#define EFI_ACPI_DMA_SPEED_TYPE_A 0x20
+#define EFI_ACPI_DMA_SPEED_TYPE_B 0x40
+#define EFI_ACPI_DMA_SPEED_TYPE_F 0x60
-#define EFI_ACPI_DMA_BUS_MASTER_MASK 0x04
-#define EFI_ACPI_DMA_BUS_MASTER 0x04
+#define EFI_ACPI_DMA_BUS_MASTER_MASK 0x04
+#define EFI_ACPI_DMA_BUS_MASTER 0x04
-#define EFI_ACPI_DMA_TRANSFER_TYPE_MASK 0x03
-#define EFI_ACPI_DMA_TRANSFER_TYPE_8_BIT 0x00
-#define EFI_ACPI_DMA_TRANSFER_TYPE_8_BIT_AND_16_BIT 0x01
-#define EFI_ACPI_DMA_TRANSFER_TYPE_16_BIT 0x10
+#define EFI_ACPI_DMA_TRANSFER_TYPE_MASK 0x03
+#define EFI_ACPI_DMA_TRANSFER_TYPE_8_BIT 0x00
+#define EFI_ACPI_DMA_TRANSFER_TYPE_8_BIT_AND_16_BIT 0x01
+#define EFI_ACPI_DMA_TRANSFER_TYPE_16_BIT 0x02
//
// IO Information
// Ref ACPI specification 6.4.2.5
//
-#define EFI_ACPI_IO_DECODE_MASK 0x01
-#define EFI_ACPI_IO_DECODE_16_BIT 0x01
-#define EFI_ACPI_IO_DECODE_10_BIT 0x00
+#define EFI_ACPI_IO_DECODE_MASK 0x01
+#define EFI_ACPI_IO_DECODE_16_BIT 0x01
+#define EFI_ACPI_IO_DECODE_10_BIT 0x00
//
// Memory Information
// Ref ACPI specification 6.4.3.4
//
-#define EFI_ACPI_MEMORY_WRITE_STATUS_MASK 0x01
-#define EFI_ACPI_MEMORY_WRITABLE 0x01
-#define EFI_ACPI_MEMORY_NON_WRITABLE 0x00
+#define EFI_ACPI_MEMORY_WRITE_STATUS_MASK 0x01
+#define EFI_ACPI_MEMORY_WRITABLE 0x01
+#define EFI_ACPI_MEMORY_NON_WRITABLE 0x00
+
+//
+// Interrupt Vector Flags definitions for Extended Interrupt Descriptor
+// Ref ACPI specification 6.4.3.6
+//
+#define EFI_ACPI_EXTENDED_INTERRUPT_FLAG_PRODUCER_CONSUMER_MASK BIT0
+#define EFI_ACPI_EXTENDED_INTERRUPT_FLAG_MODE_MASK BIT1
+#define EFI_ACPI_EXTENDED_INTERRUPT_FLAG_POLARITY_MASK BIT2
+#define EFI_ACPI_EXTENDED_INTERRUPT_FLAG_SHARABLE_MASK BIT3
+#define EFI_ACPI_EXTENDED_INTERRUPT_FLAG_WAKE_CAPABLITY_MASK BIT4
//
// Ensure proper structure formats
@@ -396,11 +401,11 @@
/// Root System Description Pointer Structure.
///
typedef struct {
- UINT64 Signature;
- UINT8 Checksum;
- UINT8 OemId[6];
- UINT8 Reserved;
- UINT32 RsdtAddress;
+ UINT64 Signature;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT8 Reserved;
+ UINT32 RsdtAddress;
} EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
//
@@ -412,52 +417,52 @@
///
/// RSDT Revision (as defined in ACPI 1.0b specification).
///
-#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
///
/// Fixed ACPI Description Table Structure (FADT).
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 FirmwareCtrl;
- UINT32 Dsdt;
- UINT8 IntModel;
- UINT8 Reserved1;
- UINT16 SciInt;
- UINT32 SmiCmd;
- UINT8 AcpiEnable;
- UINT8 AcpiDisable;
- UINT8 S4BiosReq;
- UINT8 Reserved2;
- UINT32 Pm1aEvtBlk;
- UINT32 Pm1bEvtBlk;
- UINT32 Pm1aCntBlk;
- UINT32 Pm1bCntBlk;
- UINT32 Pm2CntBlk;
- UINT32 PmTmrBlk;
- UINT32 Gpe0Blk;
- UINT32 Gpe1Blk;
- UINT8 Pm1EvtLen;
- UINT8 Pm1CntLen;
- UINT8 Pm2CntLen;
- UINT8 PmTmLen;
- UINT8 Gpe0BlkLen;
- UINT8 Gpe1BlkLen;
- UINT8 Gpe1Base;
- UINT8 Reserved3;
- UINT16 PLvl2Lat;
- UINT16 PLvl3Lat;
- UINT16 FlushSize;
- UINT16 FlushStride;
- UINT8 DutyOffset;
- UINT8 DutyWidth;
- UINT8 DayAlrm;
- UINT8 MonAlrm;
- UINT8 Century;
- UINT8 Reserved4;
- UINT8 Reserved5;
- UINT8 Reserved6;
- UINT32 Flags;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 FirmwareCtrl;
+ UINT32 Dsdt;
+ UINT8 IntModel;
+ UINT8 Reserved1;
+ UINT16 SciInt;
+ UINT32 SmiCmd;
+ UINT8 AcpiEnable;
+ UINT8 AcpiDisable;
+ UINT8 S4BiosReq;
+ UINT8 Reserved2;
+ UINT32 Pm1aEvtBlk;
+ UINT32 Pm1bEvtBlk;
+ UINT32 Pm1aCntBlk;
+ UINT32 Pm1bCntBlk;
+ UINT32 Pm2CntBlk;
+ UINT32 PmTmrBlk;
+ UINT32 Gpe0Blk;
+ UINT32 Gpe1Blk;
+ UINT8 Pm1EvtLen;
+ UINT8 Pm1CntLen;
+ UINT8 Pm2CntLen;
+ UINT8 PmTmLen;
+ UINT8 Gpe0BlkLen;
+ UINT8 Gpe1BlkLen;
+ UINT8 Gpe1Base;
+ UINT8 Reserved3;
+ UINT16 PLvl2Lat;
+ UINT16 PLvl3Lat;
+ UINT16 FlushSize;
+ UINT16 FlushStride;
+ UINT8 DutyOffset;
+ UINT8 DutyWidth;
+ UINT8 DayAlrm;
+ UINT8 MonAlrm;
+ UINT8 Century;
+ UINT8 Reserved4;
+ UINT8 Reserved5;
+ UINT8 Reserved6;
+ UINT32 Flags;
} EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE;
///
@@ -465,63 +470,63 @@
///
#define EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x01
-#define EFI_ACPI_1_0_INT_MODE_DUAL_PIC 0
-#define EFI_ACPI_1_0_INT_MODE_MULTIPLE_APIC 1
+#define EFI_ACPI_1_0_INT_MODE_DUAL_PIC 0
+#define EFI_ACPI_1_0_INT_MODE_MULTIPLE_APIC 1
//
// Fixed ACPI Description Table Fixed Feature Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_1_0_WBINVD BIT0
-#define EFI_ACPI_1_0_WBINVD_FLUSH BIT1
-#define EFI_ACPI_1_0_PROC_C1 BIT2
-#define EFI_ACPI_1_0_P_LVL2_UP BIT3
-#define EFI_ACPI_1_0_PWR_BUTTON BIT4
-#define EFI_ACPI_1_0_SLP_BUTTON BIT5
-#define EFI_ACPI_1_0_FIX_RTC BIT6
-#define EFI_ACPI_1_0_RTC_S4 BIT7
-#define EFI_ACPI_1_0_TMR_VAL_EXT BIT8
-#define EFI_ACPI_1_0_DCK_CAP BIT9
+#define EFI_ACPI_1_0_WBINVD BIT0
+#define EFI_ACPI_1_0_WBINVD_FLUSH BIT1
+#define EFI_ACPI_1_0_PROC_C1 BIT2
+#define EFI_ACPI_1_0_P_LVL2_UP BIT3
+#define EFI_ACPI_1_0_PWR_BUTTON BIT4
+#define EFI_ACPI_1_0_SLP_BUTTON BIT5
+#define EFI_ACPI_1_0_FIX_RTC BIT6
+#define EFI_ACPI_1_0_RTC_S4 BIT7
+#define EFI_ACPI_1_0_TMR_VAL_EXT BIT8
+#define EFI_ACPI_1_0_DCK_CAP BIT9
///
/// Firmware ACPI Control Structure.
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
- UINT32 HardwareSignature;
- UINT32 FirmwareWakingVector;
- UINT32 GlobalLock;
- UINT32 Flags;
- UINT8 Reserved[40];
+ UINT32 Signature;
+ UINT32 Length;
+ UINT32 HardwareSignature;
+ UINT32 FirmwareWakingVector;
+ UINT32 GlobalLock;
+ UINT32 Flags;
+ UINT8 Reserved[40];
} EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
///
/// Firmware Control Structure Feature Flags.
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_1_0_S4BIOS_F BIT0
+#define EFI_ACPI_1_0_S4BIOS_F BIT0
///
/// Multiple APIC Description Table header definition. The rest of the table
/// must be defined in a platform-specific manner.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 LocalApicAddress;
- UINT32 Flags;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 LocalApicAddress;
+ UINT32 Flags;
} EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
///
/// MADT Revision (as defined in ACPI 1.0b specification).
///
-#define EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01
///
/// Multiple APIC Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_1_0_PCAT_COMPAT BIT0
+#define EFI_ACPI_1_0_PCAT_COMPAT BIT0
//
// Multiple APIC Description Table APIC structure types
@@ -542,71 +547,71 @@
/// Processor Local APIC Structure Definition.
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT8 ApicId;
- UINT32 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 ApicId;
+ UINT32 Flags;
} EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
///
/// Local APIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_1_0_LOCAL_APIC_ENABLED BIT0
+#define EFI_ACPI_1_0_LOCAL_APIC_ENABLED BIT0
///
/// IO APIC Structure.
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 IoApicAddress;
- UINT32 SystemVectorBase;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 IoApicAddress;
+ UINT32 SystemVectorBase;
} EFI_ACPI_1_0_IO_APIC_STRUCTURE;
///
/// Interrupt Source Override Structure.
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Bus;
- UINT8 Source;
- UINT32 GlobalSystemInterruptVector;
- UINT16 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Bus;
+ UINT8 Source;
+ UINT32 GlobalSystemInterruptVector;
+ UINT16 Flags;
} EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
///
/// Non-Maskable Interrupt Source Structure.
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT32 GlobalSystemInterruptVector;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 GlobalSystemInterruptVector;
} EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
///
/// Local APIC NMI Structure.
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT16 Flags;
- UINT8 LocalApicInti;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT16 Flags;
+ UINT8 LocalApicInti;
} EFI_ACPI_1_0_LOCAL_APIC_NMI_STRUCTURE;
///
/// Smart Battery Description Table (SBST)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 WarningEnergyLevel;
- UINT32 LowEnergyLevel;
- UINT32 CriticalEnergyLevel;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 WarningEnergyLevel;
+ UINT32 LowEnergyLevel;
+ UINT32 CriticalEnergyLevel;
} EFI_ACPI_1_0_SMART_BATTERY_DESCRIPTION_TABLE;
//
diff --git a/src/include/ipxe/efi/IndustryStandard/Acpi20.h b/src/include/ipxe/efi/IndustryStandard/Acpi20.h
index f5ff44c..ad28120 100644
--- a/src/include/ipxe/efi/IndustryStandard/Acpi20.h
+++ b/src/include/ipxe/efi/IndustryStandard/Acpi20.h
@@ -1,29 +1,23 @@
/** @file
ACPI 2.0 definitions from the ACPI Specification, revision 2.0
- Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _ACPI_2_0_H_
#define _ACPI_2_0_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/IndustryStandard/Acpi10.h>
//
-// Define for Desriptor
+// Define for Descriptor
//
-#define ACPI_LARGE_GENERIC_REGISTER_DESCRIPTOR_NAME 0x02
+#define ACPI_LARGE_GENERIC_REGISTER_DESCRIPTOR_NAME 0x02
-#define ACPI_GENERIC_REGISTER_DESCRIPTOR 0x82
+#define ACPI_GENERIC_REGISTER_DESCRIPTOR 0x82
//
// Ensure proper structure formats
@@ -53,11 +47,11 @@
/// ACPI 2.0 Generic Address Space definition
///
typedef struct {
- UINT8 AddressSpaceId;
- UINT8 RegisterBitWidth;
- UINT8 RegisterBitOffset;
- UINT8 Reserved;
- UINT64 Address;
+ UINT8 AddressSpaceId;
+ UINT8 RegisterBitWidth;
+ UINT8 RegisterBitOffset;
+ UINT8 Reserved;
+ UINT64 Address;
} EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;
//
@@ -78,29 +72,29 @@
/// Root System Description Pointer Structure
///
typedef struct {
- UINT64 Signature;
- UINT8 Checksum;
- UINT8 OemId[6];
- UINT8 Revision;
- UINT32 RsdtAddress;
- UINT32 Length;
- UINT64 XsdtAddress;
- UINT8 ExtendedChecksum;
- UINT8 Reserved[3];
+ UINT64 Signature;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT8 Revision;
+ UINT32 RsdtAddress;
+ UINT32 Length;
+ UINT64 XsdtAddress;
+ UINT8 ExtendedChecksum;
+ UINT8 Reserved[3];
} EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
///
/// RSD_PTR Revision (as defined in ACPI 2.0 spec.)
///
-#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02
+#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02
///
/// Common table header, this prefaces all ACPI tables, including FACS, but
/// excluding the RSD PTR structure
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
+ UINT32 Signature;
+ UINT32 Length;
} EFI_ACPI_2_0_COMMON_HEADER;
//
@@ -112,7 +106,7 @@
///
/// RSDT Revision (as defined in ACPI 2.0 spec.)
///
-#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
//
// Extended System Description Table
@@ -123,64 +117,64 @@
///
/// XSDT Revision (as defined in ACPI 2.0 spec.)
///
-#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
///
/// Fixed ACPI Description Table Structure (FADT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 FirmwareCtrl;
- UINT32 Dsdt;
- UINT8 Reserved0;
- UINT8 PreferredPmProfile;
- UINT16 SciInt;
- UINT32 SmiCmd;
- UINT8 AcpiEnable;
- UINT8 AcpiDisable;
- UINT8 S4BiosReq;
- UINT8 PstateCnt;
- UINT32 Pm1aEvtBlk;
- UINT32 Pm1bEvtBlk;
- UINT32 Pm1aCntBlk;
- UINT32 Pm1bCntBlk;
- UINT32 Pm2CntBlk;
- UINT32 PmTmrBlk;
- UINT32 Gpe0Blk;
- UINT32 Gpe1Blk;
- UINT8 Pm1EvtLen;
- UINT8 Pm1CntLen;
- UINT8 Pm2CntLen;
- UINT8 PmTmrLen;
- UINT8 Gpe0BlkLen;
- UINT8 Gpe1BlkLen;
- UINT8 Gpe1Base;
- UINT8 CstCnt;
- UINT16 PLvl2Lat;
- UINT16 PLvl3Lat;
- UINT16 FlushSize;
- UINT16 FlushStride;
- UINT8 DutyOffset;
- UINT8 DutyWidth;
- UINT8 DayAlrm;
- UINT8 MonAlrm;
- UINT8 Century;
- UINT16 IaPcBootArch;
- UINT8 Reserved1;
- UINT32 Flags;
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
- UINT8 ResetValue;
- UINT8 Reserved2[3];
- UINT64 XFirmwareCtrl;
- UINT64 XDsdt;
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 FirmwareCtrl;
+ UINT32 Dsdt;
+ UINT8 Reserved0;
+ UINT8 PreferredPmProfile;
+ UINT16 SciInt;
+ UINT32 SmiCmd;
+ UINT8 AcpiEnable;
+ UINT8 AcpiDisable;
+ UINT8 S4BiosReq;
+ UINT8 PstateCnt;
+ UINT32 Pm1aEvtBlk;
+ UINT32 Pm1bEvtBlk;
+ UINT32 Pm1aCntBlk;
+ UINT32 Pm1bCntBlk;
+ UINT32 Pm2CntBlk;
+ UINT32 PmTmrBlk;
+ UINT32 Gpe0Blk;
+ UINT32 Gpe1Blk;
+ UINT8 Pm1EvtLen;
+ UINT8 Pm1CntLen;
+ UINT8 Pm2CntLen;
+ UINT8 PmTmrLen;
+ UINT8 Gpe0BlkLen;
+ UINT8 Gpe1BlkLen;
+ UINT8 Gpe1Base;
+ UINT8 CstCnt;
+ UINT16 PLvl2Lat;
+ UINT16 PLvl3Lat;
+ UINT16 FlushSize;
+ UINT16 FlushStride;
+ UINT8 DutyOffset;
+ UINT8 DutyWidth;
+ UINT8 DayAlrm;
+ UINT8 MonAlrm;
+ UINT8 Century;
+ UINT16 IaPcBootArch;
+ UINT8 Reserved1;
+ UINT32 Flags;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
+ UINT8 ResetValue;
+ UINT8 Reserved2[3];
+ UINT64 XFirmwareCtrl;
+ UINT64 XDsdt;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
} EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE;
///
@@ -191,53 +185,53 @@
//
// Fixed ACPI Description Table Preferred Power Management Profile
//
-#define EFI_ACPI_2_0_PM_PROFILE_UNSPECIFIED 0
-#define EFI_ACPI_2_0_PM_PROFILE_DESKTOP 1
-#define EFI_ACPI_2_0_PM_PROFILE_MOBILE 2
-#define EFI_ACPI_2_0_PM_PROFILE_WORKSTATION 3
-#define EFI_ACPI_2_0_PM_PROFILE_ENTERPRISE_SERVER 4
-#define EFI_ACPI_2_0_PM_PROFILE_SOHO_SERVER 5
-#define EFI_ACPI_2_0_PM_PROFILE_APPLIANCE_PC 6
+#define EFI_ACPI_2_0_PM_PROFILE_UNSPECIFIED 0
+#define EFI_ACPI_2_0_PM_PROFILE_DESKTOP 1
+#define EFI_ACPI_2_0_PM_PROFILE_MOBILE 2
+#define EFI_ACPI_2_0_PM_PROFILE_WORKSTATION 3
+#define EFI_ACPI_2_0_PM_PROFILE_ENTERPRISE_SERVER 4
+#define EFI_ACPI_2_0_PM_PROFILE_SOHO_SERVER 5
+#define EFI_ACPI_2_0_PM_PROFILE_APPLIANCE_PC 6
//
// Fixed ACPI Description Table Boot Architecture Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_2_0_LEGACY_DEVICES BIT0
-#define EFI_ACPI_2_0_8042 BIT1
+#define EFI_ACPI_2_0_LEGACY_DEVICES BIT0
+#define EFI_ACPI_2_0_8042 BIT1
//
// Fixed ACPI Description Table Fixed Feature Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_2_0_WBINVD BIT0
-#define EFI_ACPI_2_0_WBINVD_FLUSH BIT1
-#define EFI_ACPI_2_0_PROC_C1 BIT2
-#define EFI_ACPI_2_0_P_LVL2_UP BIT3
-#define EFI_ACPI_2_0_PWR_BUTTON BIT4
-#define EFI_ACPI_2_0_SLP_BUTTON BIT5
-#define EFI_ACPI_2_0_FIX_RTC BIT6
-#define EFI_ACPI_2_0_RTC_S4 BIT7
-#define EFI_ACPI_2_0_TMR_VAL_EXT BIT8
-#define EFI_ACPI_2_0_DCK_CAP BIT9
-#define EFI_ACPI_2_0_RESET_REG_SUP BIT10
-#define EFI_ACPI_2_0_SEALED_CASE BIT11
-#define EFI_ACPI_2_0_HEADLESS BIT12
-#define EFI_ACPI_2_0_CPU_SW_SLP BIT13
+#define EFI_ACPI_2_0_WBINVD BIT0
+#define EFI_ACPI_2_0_WBINVD_FLUSH BIT1
+#define EFI_ACPI_2_0_PROC_C1 BIT2
+#define EFI_ACPI_2_0_P_LVL2_UP BIT3
+#define EFI_ACPI_2_0_PWR_BUTTON BIT4
+#define EFI_ACPI_2_0_SLP_BUTTON BIT5
+#define EFI_ACPI_2_0_FIX_RTC BIT6
+#define EFI_ACPI_2_0_RTC_S4 BIT7
+#define EFI_ACPI_2_0_TMR_VAL_EXT BIT8
+#define EFI_ACPI_2_0_DCK_CAP BIT9
+#define EFI_ACPI_2_0_RESET_REG_SUP BIT10
+#define EFI_ACPI_2_0_SEALED_CASE BIT11
+#define EFI_ACPI_2_0_HEADLESS BIT12
+#define EFI_ACPI_2_0_CPU_SW_SLP BIT13
///
/// Firmware ACPI Control Structure
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
- UINT32 HardwareSignature;
- UINT32 FirmwareWakingVector;
- UINT32 GlobalLock;
- UINT32 Flags;
- UINT64 XFirmwareWakingVector;
- UINT8 Version;
- UINT8 Reserved[31];
+ UINT32 Signature;
+ UINT32 Length;
+ UINT32 HardwareSignature;
+ UINT32 FirmwareWakingVector;
+ UINT32 GlobalLock;
+ UINT32 Flags;
+ UINT64 XFirmwareWakingVector;
+ UINT8 Version;
+ UINT8 Reserved[31];
} EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
///
@@ -249,28 +243,28 @@
/// Firmware Control Structure Feature Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_2_0_S4BIOS_F BIT0
+#define EFI_ACPI_2_0_S4BIOS_F BIT0
///
/// Multiple APIC Description Table header definition. The rest of the table
/// must be defined in a platform specific manner.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 LocalApicAddress;
- UINT32 Flags;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 LocalApicAddress;
+ UINT32 Flags;
} EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
///
/// MADT Revision (as defined in ACPI 2.0 spec.)
///
-#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01
///
/// Multiple APIC Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_2_0_PCAT_COMPAT BIT0
+#define EFI_ACPI_2_0_PCAT_COMPAT BIT0
//
// Multiple APIC Description Table APIC structure types
@@ -295,127 +289,127 @@
/// Processor Local APIC Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT8 ApicId;
- UINT32 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 ApicId;
+ UINT32 Flags;
} EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
///
/// Local APIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED BIT0
+#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED BIT0
///
/// IO APIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 IoApicAddress;
- UINT32 GlobalSystemInterruptBase;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 IoApicAddress;
+ UINT32 GlobalSystemInterruptBase;
} EFI_ACPI_2_0_IO_APIC_STRUCTURE;
///
/// Interrupt Source Override Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Bus;
- UINT8 Source;
- UINT32 GlobalSystemInterrupt;
- UINT16 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Bus;
+ UINT8 Source;
+ UINT32 GlobalSystemInterrupt;
+ UINT16 Flags;
} EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
///
/// Non-Maskable Interrupt Source Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT32 GlobalSystemInterrupt;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 GlobalSystemInterrupt;
} EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
///
/// Local APIC NMI Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT16 Flags;
- UINT8 LocalApicLint;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT16 Flags;
+ UINT8 LocalApicLint;
} EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE;
///
/// Local APIC Address Override Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved;
- UINT64 LocalApicAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT64 LocalApicAddress;
} EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
///
/// IO SAPIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 GlobalSystemInterruptBase;
- UINT64 IoSapicAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 GlobalSystemInterruptBase;
+ UINT64 IoSapicAddress;
} EFI_ACPI_2_0_IO_SAPIC_STRUCTURE;
///
/// Local SAPIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT8 LocalSapicId;
- UINT8 LocalSapicEid;
- UINT8 Reserved[3];
- UINT32 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 LocalSapicId;
+ UINT8 LocalSapicEid;
+ UINT8 Reserved[3];
+ UINT32 Flags;
} EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
///
/// Platform Interrupt Sources Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT8 InterruptType;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT8 IoSapicVector;
- UINT32 GlobalSystemInterrupt;
- UINT32 Reserved;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 Reserved;
} EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
///
/// Smart Battery Description Table (SBST)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 WarningEnergyLevel;
- UINT32 LowEnergyLevel;
- UINT32 CriticalEnergyLevel;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 WarningEnergyLevel;
+ UINT32 LowEnergyLevel;
+ UINT32 CriticalEnergyLevel;
} EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE;
///
/// SBST Version (as defined in ACPI 2.0 spec.)
///
-#define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
///
/// Embedded Controller Boot Resources Table (ECDT)
@@ -423,11 +417,11 @@
/// a fully qualified reference to the name space object.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcControl;
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcData;
- UINT32 Uid;
- UINT8 GpeBit;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcControl;
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcData;
+ UINT32 Uid;
+ UINT8 GpeBit;
} EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
///
@@ -513,7 +507,7 @@
#define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')
///
-/// "SPCR" Serial Port Concole Redirection Table
+/// "SPCR" Serial Port Console Redirection Table
///
#define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
diff --git a/src/include/ipxe/efi/IndustryStandard/Acpi30.h b/src/include/ipxe/efi/IndustryStandard/Acpi30.h
index abaa721..c7dfd5c 100644
--- a/src/include/ipxe/efi/IndustryStandard/Acpi30.h
+++ b/src/include/ipxe/efi/IndustryStandard/Acpi30.h
@@ -1,29 +1,23 @@
/** @file
ACPI 3.0 definitions from the ACPI Specification Revision 3.0b October 10, 2006
- Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _ACPI_3_0_H_
#define _ACPI_3_0_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/IndustryStandard/Acpi20.h>
//
-// Define for Desriptor
+// Define for Descriptor
//
-#define ACPI_LARGE_EXTENDED_ADDRESS_SPACE_DESCRIPTOR_NAME 0x0B
+#define ACPI_LARGE_EXTENDED_ADDRESS_SPACE_DESCRIPTOR_NAME 0x0B
-#define ACPI_EXTENDED_ADDRESS_SPACE_DESCRIPTOR 0x8B
+#define ACPI_EXTENDED_ADDRESS_SPACE_DESCRIPTOR 0x8B
//
// Ensure proper structure formats
@@ -53,12 +47,12 @@
//
// Memory Type Specific Flags
//
-#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_UC 0x0000000000000001
-#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_WC 0x0000000000000002
-#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_WT 0x0000000000000004
-#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_WB 0x0000000000000008
-#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_UCE 0x0000000000000010
-#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_NV 0x0000000000008000
+#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_UC 0x0000000000000001
+#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_WC 0x0000000000000002
+#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_WT 0x0000000000000004
+#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_WB 0x0000000000000008
+#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_UCE 0x0000000000000010
+#define EFI_ACPI_MEMORY_TYPE_SPECIFIC_ATTRIBUTES_NV 0x0000000000008000
//
// Ensure proper structure formats
@@ -69,11 +63,11 @@
/// ACPI 3.0 Generic Address Space definition
///
typedef struct {
- UINT8 AddressSpaceId;
- UINT8 RegisterBitWidth;
- UINT8 RegisterBitOffset;
- UINT8 AccessSize;
- UINT64 Address;
+ UINT8 AddressSpaceId;
+ UINT8 RegisterBitWidth;
+ UINT8 RegisterBitOffset;
+ UINT8 AccessSize;
+ UINT64 Address;
} EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE;
//
@@ -103,29 +97,29 @@
/// Root System Description Pointer Structure
///
typedef struct {
- UINT64 Signature;
- UINT8 Checksum;
- UINT8 OemId[6];
- UINT8 Revision;
- UINT32 RsdtAddress;
- UINT32 Length;
- UINT64 XsdtAddress;
- UINT8 ExtendedChecksum;
- UINT8 Reserved[3];
+ UINT64 Signature;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT8 Revision;
+ UINT32 RsdtAddress;
+ UINT32 Length;
+ UINT64 XsdtAddress;
+ UINT8 ExtendedChecksum;
+ UINT8 Reserved[3];
} EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
///
/// RSD_PTR Revision (as defined in ACPI 3.0b spec.)
///
-#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 3.0b) says current value is 2
+#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 3.0b) says current value is 2
///
/// Common table header, this prefaces all ACPI tables, including FACS, but
/// excluding the RSD PTR structure
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
+ UINT32 Signature;
+ UINT32 Length;
} EFI_ACPI_3_0_COMMON_HEADER;
//
@@ -137,7 +131,7 @@
///
/// RSDT Revision (as defined in ACPI 3.0 spec.)
///
-#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
//
// Extended System Description Table
@@ -148,64 +142,64 @@
///
/// XSDT Revision (as defined in ACPI 3.0 spec.)
///
-#define EFI_ACPI_3_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_3_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
///
/// Fixed ACPI Description Table Structure (FADT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 FirmwareCtrl;
- UINT32 Dsdt;
- UINT8 Reserved0;
- UINT8 PreferredPmProfile;
- UINT16 SciInt;
- UINT32 SmiCmd;
- UINT8 AcpiEnable;
- UINT8 AcpiDisable;
- UINT8 S4BiosReq;
- UINT8 PstateCnt;
- UINT32 Pm1aEvtBlk;
- UINT32 Pm1bEvtBlk;
- UINT32 Pm1aCntBlk;
- UINT32 Pm1bCntBlk;
- UINT32 Pm2CntBlk;
- UINT32 PmTmrBlk;
- UINT32 Gpe0Blk;
- UINT32 Gpe1Blk;
- UINT8 Pm1EvtLen;
- UINT8 Pm1CntLen;
- UINT8 Pm2CntLen;
- UINT8 PmTmrLen;
- UINT8 Gpe0BlkLen;
- UINT8 Gpe1BlkLen;
- UINT8 Gpe1Base;
- UINT8 CstCnt;
- UINT16 PLvl2Lat;
- UINT16 PLvl3Lat;
- UINT16 FlushSize;
- UINT16 FlushStride;
- UINT8 DutyOffset;
- UINT8 DutyWidth;
- UINT8 DayAlrm;
- UINT8 MonAlrm;
- UINT8 Century;
- UINT16 IaPcBootArch;
- UINT8 Reserved1;
- UINT32 Flags;
- EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
- UINT8 ResetValue;
- UINT8 Reserved2[3];
- UINT64 XFirmwareCtrl;
- UINT64 XDsdt;
- EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
- EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
- EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
- EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
- EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
- EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
- EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
- EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 FirmwareCtrl;
+ UINT32 Dsdt;
+ UINT8 Reserved0;
+ UINT8 PreferredPmProfile;
+ UINT16 SciInt;
+ UINT32 SmiCmd;
+ UINT8 AcpiEnable;
+ UINT8 AcpiDisable;
+ UINT8 S4BiosReq;
+ UINT8 PstateCnt;
+ UINT32 Pm1aEvtBlk;
+ UINT32 Pm1bEvtBlk;
+ UINT32 Pm1aCntBlk;
+ UINT32 Pm1bCntBlk;
+ UINT32 Pm2CntBlk;
+ UINT32 PmTmrBlk;
+ UINT32 Gpe0Blk;
+ UINT32 Gpe1Blk;
+ UINT8 Pm1EvtLen;
+ UINT8 Pm1CntLen;
+ UINT8 Pm2CntLen;
+ UINT8 PmTmrLen;
+ UINT8 Gpe0BlkLen;
+ UINT8 Gpe1BlkLen;
+ UINT8 Gpe1Base;
+ UINT8 CstCnt;
+ UINT16 PLvl2Lat;
+ UINT16 PLvl3Lat;
+ UINT16 FlushSize;
+ UINT16 FlushStride;
+ UINT8 DutyOffset;
+ UINT8 DutyWidth;
+ UINT8 DayAlrm;
+ UINT8 MonAlrm;
+ UINT8 Century;
+ UINT16 IaPcBootArch;
+ UINT8 Reserved1;
+ UINT32 Flags;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
+ UINT8 ResetValue;
+ UINT8 Reserved2[3];
+ UINT64 XFirmwareCtrl;
+ UINT64 XDsdt;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
} EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE;
///
@@ -229,50 +223,50 @@
// Fixed ACPI Description Table Boot Architecture Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_3_0_LEGACY_DEVICES BIT0
-#define EFI_ACPI_3_0_8042 BIT1
-#define EFI_ACPI_3_0_VGA_NOT_PRESENT BIT2
-#define EFI_ACPI_3_0_MSI_NOT_SUPPORTED BIT3
-#define EFI_ACPI_3_0_PCIE_ASPM_CONTROLS BIT4
+#define EFI_ACPI_3_0_LEGACY_DEVICES BIT0
+#define EFI_ACPI_3_0_8042 BIT1
+#define EFI_ACPI_3_0_VGA_NOT_PRESENT BIT2
+#define EFI_ACPI_3_0_MSI_NOT_SUPPORTED BIT3
+#define EFI_ACPI_3_0_PCIE_ASPM_CONTROLS BIT4
//
// Fixed ACPI Description Table Fixed Feature Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_3_0_WBINVD BIT0
-#define EFI_ACPI_3_0_WBINVD_FLUSH BIT1
-#define EFI_ACPI_3_0_PROC_C1 BIT2
-#define EFI_ACPI_3_0_P_LVL2_UP BIT3
-#define EFI_ACPI_3_0_PWR_BUTTON BIT4
-#define EFI_ACPI_3_0_SLP_BUTTON BIT5
-#define EFI_ACPI_3_0_FIX_RTC BIT6
-#define EFI_ACPI_3_0_RTC_S4 BIT7
-#define EFI_ACPI_3_0_TMR_VAL_EXT BIT8
-#define EFI_ACPI_3_0_DCK_CAP BIT9
-#define EFI_ACPI_3_0_RESET_REG_SUP BIT10
-#define EFI_ACPI_3_0_SEALED_CASE BIT11
-#define EFI_ACPI_3_0_HEADLESS BIT12
-#define EFI_ACPI_3_0_CPU_SW_SLP BIT13
-#define EFI_ACPI_3_0_PCI_EXP_WAK BIT14
-#define EFI_ACPI_3_0_USE_PLATFORM_CLOCK BIT15
-#define EFI_ACPI_3_0_S4_RTC_STS_VALID BIT16
-#define EFI_ACPI_3_0_REMOTE_POWER_ON_CAPABLE BIT17
-#define EFI_ACPI_3_0_FORCE_APIC_CLUSTER_MODEL BIT18
-#define EFI_ACPI_3_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
+#define EFI_ACPI_3_0_WBINVD BIT0
+#define EFI_ACPI_3_0_WBINVD_FLUSH BIT1
+#define EFI_ACPI_3_0_PROC_C1 BIT2
+#define EFI_ACPI_3_0_P_LVL2_UP BIT3
+#define EFI_ACPI_3_0_PWR_BUTTON BIT4
+#define EFI_ACPI_3_0_SLP_BUTTON BIT5
+#define EFI_ACPI_3_0_FIX_RTC BIT6
+#define EFI_ACPI_3_0_RTC_S4 BIT7
+#define EFI_ACPI_3_0_TMR_VAL_EXT BIT8
+#define EFI_ACPI_3_0_DCK_CAP BIT9
+#define EFI_ACPI_3_0_RESET_REG_SUP BIT10
+#define EFI_ACPI_3_0_SEALED_CASE BIT11
+#define EFI_ACPI_3_0_HEADLESS BIT12
+#define EFI_ACPI_3_0_CPU_SW_SLP BIT13
+#define EFI_ACPI_3_0_PCI_EXP_WAK BIT14
+#define EFI_ACPI_3_0_USE_PLATFORM_CLOCK BIT15
+#define EFI_ACPI_3_0_S4_RTC_STS_VALID BIT16
+#define EFI_ACPI_3_0_REMOTE_POWER_ON_CAPABLE BIT17
+#define EFI_ACPI_3_0_FORCE_APIC_CLUSTER_MODEL BIT18
+#define EFI_ACPI_3_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
///
/// Firmware ACPI Control Structure
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
- UINT32 HardwareSignature;
- UINT32 FirmwareWakingVector;
- UINT32 GlobalLock;
- UINT32 Flags;
- UINT64 XFirmwareWakingVector;
- UINT8 Version;
- UINT8 Reserved[31];
+ UINT32 Signature;
+ UINT32 Length;
+ UINT32 HardwareSignature;
+ UINT32 FirmwareWakingVector;
+ UINT32 GlobalLock;
+ UINT32 Flags;
+ UINT64 XFirmwareWakingVector;
+ UINT8 Version;
+ UINT8 Reserved[31];
} EFI_ACPI_3_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
///
@@ -284,7 +278,7 @@
/// Firmware Control Structure Feature Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_3_0_S4BIOS_F BIT0
+#define EFI_ACPI_3_0_S4BIOS_F BIT0
//
// Differentiated System Description Table,
@@ -293,29 +287,29 @@
// no definition needed as they are common description table header, the same with
// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
//
-#define EFI_ACPI_3_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
-#define EFI_ACPI_3_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_3_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_3_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
///
/// Multiple APIC Description Table header definition. The rest of the table
/// must be defined in a platform specific manner.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 LocalApicAddress;
- UINT32 Flags;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 LocalApicAddress;
+ UINT32 Flags;
} EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
///
/// MADT Revision (as defined in ACPI 3.0 spec.)
///
-#define EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x02
///
/// Multiple APIC Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_3_0_PCAT_COMPAT BIT0
+#define EFI_ACPI_3_0_PCAT_COMPAT BIT0
//
// Multiple APIC Description Table APIC structure types
@@ -340,57 +334,57 @@
/// Processor Local APIC Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT8 ApicId;
- UINT32 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 ApicId;
+ UINT32 Flags;
} EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
///
/// Local APIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_3_0_LOCAL_APIC_ENABLED BIT0
+#define EFI_ACPI_3_0_LOCAL_APIC_ENABLED BIT0
///
/// IO APIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 IoApicAddress;
- UINT32 GlobalSystemInterruptBase;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 IoApicAddress;
+ UINT32 GlobalSystemInterruptBase;
} EFI_ACPI_3_0_IO_APIC_STRUCTURE;
///
/// Interrupt Source Override Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Bus;
- UINT8 Source;
- UINT32 GlobalSystemInterrupt;
- UINT16 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Bus;
+ UINT8 Source;
+ UINT32 GlobalSystemInterrupt;
+ UINT16 Flags;
} EFI_ACPI_3_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
///
/// Platform Interrupt Sources Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT8 InterruptType;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT8 IoSapicVector;
- UINT32 GlobalSystemInterrupt;
- UINT32 PlatformInterruptSourceFlags;
- UINT8 CpeiProcessorOverride;
- UINT8 Reserved[31];
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
+ UINT8 CpeiProcessorOverride;
+ UINT8 Reserved[31];
} EFI_ACPI_3_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;
//
@@ -404,43 +398,43 @@
/// Non-Maskable Interrupt Source Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT32 GlobalSystemInterrupt;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 GlobalSystemInterrupt;
} EFI_ACPI_3_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
///
/// Local APIC NMI Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT16 Flags;
- UINT8 LocalApicLint;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT16 Flags;
+ UINT8 LocalApicLint;
} EFI_ACPI_3_0_LOCAL_APIC_NMI_STRUCTURE;
///
/// Local APIC Address Override Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved;
- UINT64 LocalApicAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT64 LocalApicAddress;
} EFI_ACPI_3_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
///
/// IO SAPIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 GlobalSystemInterruptBase;
- UINT64 IoSapicAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 GlobalSystemInterruptBase;
+ UINT64 IoSapicAddress;
} EFI_ACPI_3_0_IO_SAPIC_STRUCTURE;
///
@@ -448,51 +442,51 @@
/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT8 LocalSapicId;
- UINT8 LocalSapicEid;
- UINT8 Reserved[3];
- UINT32 Flags;
- UINT32 ACPIProcessorUIDValue;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 LocalSapicId;
+ UINT8 LocalSapicEid;
+ UINT8 Reserved[3];
+ UINT32 Flags;
+ UINT32 ACPIProcessorUIDValue;
} EFI_ACPI_3_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
///
/// Platform Interrupt Sources Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT8 InterruptType;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT8 IoSapicVector;
- UINT32 GlobalSystemInterrupt;
- UINT32 PlatformInterruptSourceFlags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
} EFI_ACPI_3_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
///
/// Platform Interrupt Source Flags.
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_3_0_CPEI_PROCESSOR_OVERRIDE BIT0
+#define EFI_ACPI_3_0_CPEI_PROCESSOR_OVERRIDE BIT0
///
/// Smart Battery Description Table (SBST)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 WarningEnergyLevel;
- UINT32 LowEnergyLevel;
- UINT32 CriticalEnergyLevel;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 WarningEnergyLevel;
+ UINT32 LowEnergyLevel;
+ UINT32 CriticalEnergyLevel;
} EFI_ACPI_3_0_SMART_BATTERY_DESCRIPTION_TABLE;
///
/// SBST Version (as defined in ACPI 3.0 spec.)
///
-#define EFI_ACPI_3_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_3_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
///
/// Embedded Controller Boot Resources Table (ECDT)
@@ -500,11 +494,11 @@
/// a fully qualified reference to the name space object.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE EcControl;
- EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE EcData;
- UINT32 Uid;
- UINT8 GpeBit;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE EcControl;
+ EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE EcData;
+ UINT32 Uid;
+ UINT8 GpeBit;
} EFI_ACPI_3_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
///
@@ -517,9 +511,9 @@
/// must be defined in a platform specific manner.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 Reserved1; ///< Must be set to 1
- UINT64 Reserved2;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Reserved1; ///< Must be set to 1
+ UINT64 Reserved2;
} EFI_ACPI_3_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
///
@@ -539,52 +533,52 @@
/// Processor Local APIC/SAPIC Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 ProximityDomain7To0;
- UINT8 ApicId;
- UINT32 Flags;
- UINT8 LocalSapicEid;
- UINT8 ProximityDomain31To8[3];
- UINT8 Reserved[4];
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProximityDomain7To0;
+ UINT8 ApicId;
+ UINT32 Flags;
+ UINT8 LocalSapicEid;
+ UINT8 ProximityDomain31To8[3];
+ UINT8 Reserved[4];
} EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
///
/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
+#define EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
///
/// Memory Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT32 ProximityDomain;
- UINT16 Reserved1;
- UINT32 AddressBaseLow;
- UINT32 AddressBaseHigh;
- UINT32 LengthLow;
- UINT32 LengthHigh;
- UINT32 Reserved2;
- UINT32 Flags;
- UINT64 Reserved3;
+ UINT8 Type;
+ UINT8 Length;
+ UINT32 ProximityDomain;
+ UINT16 Reserved1;
+ UINT32 AddressBaseLow;
+ UINT32 AddressBaseHigh;
+ UINT32 LengthLow;
+ UINT32 LengthHigh;
+ UINT32 Reserved2;
+ UINT32 Flags;
+ UINT64 Reserved3;
} EFI_ACPI_3_0_MEMORY_AFFINITY_STRUCTURE;
//
// Memory Flags. All other bits are reserved and must be 0.
//
-#define EFI_ACPI_3_0_MEMORY_ENABLED (1 << 0)
-#define EFI_ACPI_3_0_MEMORY_HOT_PLUGGABLE (1 << 1)
-#define EFI_ACPI_3_0_MEMORY_NONVOLATILE (1 << 2)
+#define EFI_ACPI_3_0_MEMORY_ENABLED (1 << 0)
+#define EFI_ACPI_3_0_MEMORY_HOT_PLUGGABLE (1 << 1)
+#define EFI_ACPI_3_0_MEMORY_NONVOLATILE (1 << 2)
///
/// System Locality Distance Information Table (SLIT).
/// The rest of the table is a matrix.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT64 NumberOfSystemLocalities;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT64 NumberOfSystemLocalities;
} EFI_ACPI_3_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
///
@@ -692,7 +686,7 @@
#define EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
///
-/// "SPCR" Serial Port Concole Redirection Table
+/// "SPCR" Serial Port Console Redirection Table
///
#define EFI_ACPI_3_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
diff --git a/src/include/ipxe/efi/IndustryStandard/Acpi40.h b/src/include/ipxe/efi/IndustryStandard/Acpi40.h
index 5fcad3e..f6c70d7 100644
--- a/src/include/ipxe/efi/IndustryStandard/Acpi40.h
+++ b/src/include/ipxe/efi/IndustryStandard/Acpi40.h
@@ -1,20 +1,14 @@
/** @file
ACPI 4.0 definitions from the ACPI Specification Revision 4.0a April 5, 2010
- Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2010 - 2022, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _ACPI_4_0_H_
#define _ACPI_4_0_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/IndustryStandard/Acpi30.h>
@@ -27,11 +21,11 @@
/// ACPI 4.0 Generic Address Space definition
///
typedef struct {
- UINT8 AddressSpaceId;
- UINT8 RegisterBitWidth;
- UINT8 RegisterBitOffset;
- UINT8 AccessSize;
- UINT64 Address;
+ UINT8 AddressSpaceId;
+ UINT8 RegisterBitWidth;
+ UINT8 RegisterBitOffset;
+ UINT8 AccessSize;
+ UINT64 Address;
} EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE;
//
@@ -61,29 +55,29 @@
/// Root System Description Pointer Structure
///
typedef struct {
- UINT64 Signature;
- UINT8 Checksum;
- UINT8 OemId[6];
- UINT8 Revision;
- UINT32 RsdtAddress;
- UINT32 Length;
- UINT64 XsdtAddress;
- UINT8 ExtendedChecksum;
- UINT8 Reserved[3];
+ UINT64 Signature;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT8 Revision;
+ UINT32 RsdtAddress;
+ UINT32 Length;
+ UINT64 XsdtAddress;
+ UINT8 ExtendedChecksum;
+ UINT8 Reserved[3];
} EFI_ACPI_4_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
///
/// RSD_PTR Revision (as defined in ACPI 4.0b spec.)
///
-#define EFI_ACPI_4_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 4.0a) says current value is 2
+#define EFI_ACPI_4_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 4.0a) says current value is 2
///
/// Common table header, this prefaces all ACPI tables, including FACS, but
/// excluding the RSD PTR structure
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
+ UINT32 Signature;
+ UINT32 Length;
} EFI_ACPI_4_0_COMMON_HEADER;
//
@@ -95,7 +89,7 @@
///
/// RSDT Revision (as defined in ACPI 4.0 spec.)
///
-#define EFI_ACPI_4_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_4_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
//
// Extended System Description Table
@@ -106,64 +100,64 @@
///
/// XSDT Revision (as defined in ACPI 4.0 spec.)
///
-#define EFI_ACPI_4_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_4_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
///
/// Fixed ACPI Description Table Structure (FADT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 FirmwareCtrl;
- UINT32 Dsdt;
- UINT8 Reserved0;
- UINT8 PreferredPmProfile;
- UINT16 SciInt;
- UINT32 SmiCmd;
- UINT8 AcpiEnable;
- UINT8 AcpiDisable;
- UINT8 S4BiosReq;
- UINT8 PstateCnt;
- UINT32 Pm1aEvtBlk;
- UINT32 Pm1bEvtBlk;
- UINT32 Pm1aCntBlk;
- UINT32 Pm1bCntBlk;
- UINT32 Pm2CntBlk;
- UINT32 PmTmrBlk;
- UINT32 Gpe0Blk;
- UINT32 Gpe1Blk;
- UINT8 Pm1EvtLen;
- UINT8 Pm1CntLen;
- UINT8 Pm2CntLen;
- UINT8 PmTmrLen;
- UINT8 Gpe0BlkLen;
- UINT8 Gpe1BlkLen;
- UINT8 Gpe1Base;
- UINT8 CstCnt;
- UINT16 PLvl2Lat;
- UINT16 PLvl3Lat;
- UINT16 FlushSize;
- UINT16 FlushStride;
- UINT8 DutyOffset;
- UINT8 DutyWidth;
- UINT8 DayAlrm;
- UINT8 MonAlrm;
- UINT8 Century;
- UINT16 IaPcBootArch;
- UINT8 Reserved1;
- UINT32 Flags;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
- UINT8 ResetValue;
- UINT8 Reserved2[3];
- UINT64 XFirmwareCtrl;
- UINT64 XDsdt;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 FirmwareCtrl;
+ UINT32 Dsdt;
+ UINT8 Reserved0;
+ UINT8 PreferredPmProfile;
+ UINT16 SciInt;
+ UINT32 SmiCmd;
+ UINT8 AcpiEnable;
+ UINT8 AcpiDisable;
+ UINT8 S4BiosReq;
+ UINT8 PstateCnt;
+ UINT32 Pm1aEvtBlk;
+ UINT32 Pm1bEvtBlk;
+ UINT32 Pm1aCntBlk;
+ UINT32 Pm1bCntBlk;
+ UINT32 Pm2CntBlk;
+ UINT32 PmTmrBlk;
+ UINT32 Gpe0Blk;
+ UINT32 Gpe1Blk;
+ UINT8 Pm1EvtLen;
+ UINT8 Pm1CntLen;
+ UINT8 Pm2CntLen;
+ UINT8 PmTmrLen;
+ UINT8 Gpe0BlkLen;
+ UINT8 Gpe1BlkLen;
+ UINT8 Gpe1Base;
+ UINT8 CstCnt;
+ UINT16 PLvl2Lat;
+ UINT16 PLvl3Lat;
+ UINT16 FlushSize;
+ UINT16 FlushStride;
+ UINT8 DutyOffset;
+ UINT8 DutyWidth;
+ UINT8 DayAlrm;
+ UINT8 MonAlrm;
+ UINT8 Century;
+ UINT16 IaPcBootArch;
+ UINT8 Reserved1;
+ UINT32 Flags;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
+ UINT8 ResetValue;
+ UINT8 Reserved2[3];
+ UINT64 XFirmwareCtrl;
+ UINT64 XDsdt;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
} EFI_ACPI_4_0_FIXED_ACPI_DESCRIPTION_TABLE;
///
@@ -187,52 +181,52 @@
// Fixed ACPI Description Table Boot Architecture Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_4_0_LEGACY_DEVICES BIT0
-#define EFI_ACPI_4_0_8042 BIT1
-#define EFI_ACPI_4_0_VGA_NOT_PRESENT BIT2
-#define EFI_ACPI_4_0_MSI_NOT_SUPPORTED BIT3
-#define EFI_ACPI_4_0_PCIE_ASPM_CONTROLS BIT4
+#define EFI_ACPI_4_0_LEGACY_DEVICES BIT0
+#define EFI_ACPI_4_0_8042 BIT1
+#define EFI_ACPI_4_0_VGA_NOT_PRESENT BIT2
+#define EFI_ACPI_4_0_MSI_NOT_SUPPORTED BIT3
+#define EFI_ACPI_4_0_PCIE_ASPM_CONTROLS BIT4
//
// Fixed ACPI Description Table Fixed Feature Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_4_0_WBINVD BIT0
-#define EFI_ACPI_4_0_WBINVD_FLUSH BIT1
-#define EFI_ACPI_4_0_PROC_C1 BIT2
-#define EFI_ACPI_4_0_P_LVL2_UP BIT3
-#define EFI_ACPI_4_0_PWR_BUTTON BIT4
-#define EFI_ACPI_4_0_SLP_BUTTON BIT5
-#define EFI_ACPI_4_0_FIX_RTC BIT6
-#define EFI_ACPI_4_0_RTC_S4 BIT7
-#define EFI_ACPI_4_0_TMR_VAL_EXT BIT8
-#define EFI_ACPI_4_0_DCK_CAP BIT9
-#define EFI_ACPI_4_0_RESET_REG_SUP BIT10
-#define EFI_ACPI_4_0_SEALED_CASE BIT11
-#define EFI_ACPI_4_0_HEADLESS BIT12
-#define EFI_ACPI_4_0_CPU_SW_SLP BIT13
-#define EFI_ACPI_4_0_PCI_EXP_WAK BIT14
-#define EFI_ACPI_4_0_USE_PLATFORM_CLOCK BIT15
-#define EFI_ACPI_4_0_S4_RTC_STS_VALID BIT16
-#define EFI_ACPI_4_0_REMOTE_POWER_ON_CAPABLE BIT17
-#define EFI_ACPI_4_0_FORCE_APIC_CLUSTER_MODEL BIT18
-#define EFI_ACPI_4_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
+#define EFI_ACPI_4_0_WBINVD BIT0
+#define EFI_ACPI_4_0_WBINVD_FLUSH BIT1
+#define EFI_ACPI_4_0_PROC_C1 BIT2
+#define EFI_ACPI_4_0_P_LVL2_UP BIT3
+#define EFI_ACPI_4_0_PWR_BUTTON BIT4
+#define EFI_ACPI_4_0_SLP_BUTTON BIT5
+#define EFI_ACPI_4_0_FIX_RTC BIT6
+#define EFI_ACPI_4_0_RTC_S4 BIT7
+#define EFI_ACPI_4_0_TMR_VAL_EXT BIT8
+#define EFI_ACPI_4_0_DCK_CAP BIT9
+#define EFI_ACPI_4_0_RESET_REG_SUP BIT10
+#define EFI_ACPI_4_0_SEALED_CASE BIT11
+#define EFI_ACPI_4_0_HEADLESS BIT12
+#define EFI_ACPI_4_0_CPU_SW_SLP BIT13
+#define EFI_ACPI_4_0_PCI_EXP_WAK BIT14
+#define EFI_ACPI_4_0_USE_PLATFORM_CLOCK BIT15
+#define EFI_ACPI_4_0_S4_RTC_STS_VALID BIT16
+#define EFI_ACPI_4_0_REMOTE_POWER_ON_CAPABLE BIT17
+#define EFI_ACPI_4_0_FORCE_APIC_CLUSTER_MODEL BIT18
+#define EFI_ACPI_4_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
///
/// Firmware ACPI Control Structure
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
- UINT32 HardwareSignature;
- UINT32 FirmwareWakingVector;
- UINT32 GlobalLock;
- UINT32 Flags;
- UINT64 XFirmwareWakingVector;
- UINT8 Version;
- UINT8 Reserved0[3];
- UINT32 OspmFlags;
- UINT8 Reserved1[24];
+ UINT32 Signature;
+ UINT32 Length;
+ UINT32 HardwareSignature;
+ UINT32 FirmwareWakingVector;
+ UINT32 GlobalLock;
+ UINT32 Flags;
+ UINT64 XFirmwareWakingVector;
+ UINT8 Version;
+ UINT8 Reserved0[3];
+ UINT32 OspmFlags;
+ UINT8 Reserved1[24];
} EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
///
@@ -244,14 +238,14 @@
/// Firmware Control Structure Feature Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_4_0_S4BIOS_F BIT0
-#define EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F BIT1
+#define EFI_ACPI_4_0_S4BIOS_F BIT0
+#define EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F BIT1
///
/// OSPM Enabled Firmware Control Structure Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_4_0_OSPM_64BIT_WAKE__F BIT0
+#define EFI_ACPI_4_0_OSPM_64BIT_WAKE__F BIT0
//
// Differentiated System Description Table,
@@ -260,29 +254,29 @@
// no definition needed as they are common description table header, the same with
// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
//
-#define EFI_ACPI_4_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
-#define EFI_ACPI_4_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_4_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_4_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
///
/// Multiple APIC Description Table header definition. The rest of the table
/// must be defined in a platform specific manner.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 LocalApicAddress;
- UINT32 Flags;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 LocalApicAddress;
+ UINT32 Flags;
} EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
///
/// MADT Revision (as defined in ACPI 4.0 spec.)
///
-#define EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
+#define EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
///
/// Multiple APIC Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_4_0_PCAT_COMPAT BIT0
+#define EFI_ACPI_4_0_PCAT_COMPAT BIT0
//
// Multiple APIC Description Table APIC structure types
@@ -309,57 +303,57 @@
/// Processor Local APIC Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT8 ApicId;
- UINT32 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 ApicId;
+ UINT32 Flags;
} EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
///
/// Local APIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_4_0_LOCAL_APIC_ENABLED BIT0
+#define EFI_ACPI_4_0_LOCAL_APIC_ENABLED BIT0
///
/// IO APIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 IoApicAddress;
- UINT32 GlobalSystemInterruptBase;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 IoApicAddress;
+ UINT32 GlobalSystemInterruptBase;
} EFI_ACPI_4_0_IO_APIC_STRUCTURE;
///
/// Interrupt Source Override Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Bus;
- UINT8 Source;
- UINT32 GlobalSystemInterrupt;
- UINT16 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Bus;
+ UINT8 Source;
+ UINT32 GlobalSystemInterrupt;
+ UINT16 Flags;
} EFI_ACPI_4_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
///
/// Platform Interrupt Sources Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT8 InterruptType;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT8 IoSapicVector;
- UINT32 GlobalSystemInterrupt;
- UINT32 PlatformInterruptSourceFlags;
- UINT8 CpeiProcessorOverride;
- UINT8 Reserved[31];
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
+ UINT8 CpeiProcessorOverride;
+ UINT8 Reserved[31];
} EFI_ACPI_4_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;
//
@@ -373,43 +367,43 @@
/// Non-Maskable Interrupt Source Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT32 GlobalSystemInterrupt;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 GlobalSystemInterrupt;
} EFI_ACPI_4_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
///
/// Local APIC NMI Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT16 Flags;
- UINT8 LocalApicLint;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT16 Flags;
+ UINT8 LocalApicLint;
} EFI_ACPI_4_0_LOCAL_APIC_NMI_STRUCTURE;
///
/// Local APIC Address Override Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved;
- UINT64 LocalApicAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT64 LocalApicAddress;
} EFI_ACPI_4_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
///
/// IO SAPIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 GlobalSystemInterruptBase;
- UINT64 IoSapicAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 GlobalSystemInterruptBase;
+ UINT64 IoSapicAddress;
} EFI_ACPI_4_0_IO_SAPIC_STRUCTURE;
///
@@ -417,75 +411,75 @@
/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT8 LocalSapicId;
- UINT8 LocalSapicEid;
- UINT8 Reserved[3];
- UINT32 Flags;
- UINT32 ACPIProcessorUIDValue;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 LocalSapicId;
+ UINT8 LocalSapicEid;
+ UINT8 Reserved[3];
+ UINT32 Flags;
+ UINT32 ACPIProcessorUIDValue;
} EFI_ACPI_4_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
///
/// Platform Interrupt Sources Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT8 InterruptType;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT8 IoSapicVector;
- UINT32 GlobalSystemInterrupt;
- UINT32 PlatformInterruptSourceFlags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
} EFI_ACPI_4_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
///
/// Platform Interrupt Source Flags.
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_4_0_CPEI_PROCESSOR_OVERRIDE BIT0
+#define EFI_ACPI_4_0_CPEI_PROCESSOR_OVERRIDE BIT0
///
/// Processor Local x2APIC Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Reserved[2];
- UINT32 X2ApicId;
- UINT32 Flags;
- UINT32 AcpiProcessorUid;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved[2];
+ UINT32 X2ApicId;
+ UINT32 Flags;
+ UINT32 AcpiProcessorUid;
} EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
///
/// Local x2APIC NMI Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT32 AcpiProcessorUid;
- UINT8 LocalX2ApicLint;
- UINT8 Reserved[3];
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 AcpiProcessorUid;
+ UINT8 LocalX2ApicLint;
+ UINT8 Reserved[3];
} EFI_ACPI_4_0_LOCAL_X2APIC_NMI_STRUCTURE;
///
/// Smart Battery Description Table (SBST)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 WarningEnergyLevel;
- UINT32 LowEnergyLevel;
- UINT32 CriticalEnergyLevel;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 WarningEnergyLevel;
+ UINT32 LowEnergyLevel;
+ UINT32 CriticalEnergyLevel;
} EFI_ACPI_4_0_SMART_BATTERY_DESCRIPTION_TABLE;
///
/// SBST Version (as defined in ACPI 4.0 spec.)
///
-#define EFI_ACPI_4_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_4_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
///
/// Embedded Controller Boot Resources Table (ECDT)
@@ -493,11 +487,11 @@
/// a fully qualified reference to the name space object.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE EcControl;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE EcData;
- UINT32 Uid;
- UINT8 GpeBit;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE EcControl;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE EcData;
+ UINT32 Uid;
+ UINT8 GpeBit;
} EFI_ACPI_4_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
///
@@ -510,9 +504,9 @@
/// must be defined in a platform specific manner.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 Reserved1; ///< Must be set to 1
- UINT64 Reserved2;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Reserved1; ///< Must be set to 1
+ UINT64 Reserved2;
} EFI_ACPI_4_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
///
@@ -533,57 +527,57 @@
/// Processor Local APIC/SAPIC Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 ProximityDomain7To0;
- UINT8 ApicId;
- UINT32 Flags;
- UINT8 LocalSapicEid;
- UINT8 ProximityDomain31To8[3];
- UINT32 ClockDomain;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProximityDomain7To0;
+ UINT8 ApicId;
+ UINT32 Flags;
+ UINT8 LocalSapicEid;
+ UINT8 ProximityDomain31To8[3];
+ UINT32 ClockDomain;
} EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
///
/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
+#define EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
///
/// Memory Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT32 ProximityDomain;
- UINT16 Reserved1;
- UINT32 AddressBaseLow;
- UINT32 AddressBaseHigh;
- UINT32 LengthLow;
- UINT32 LengthHigh;
- UINT32 Reserved2;
- UINT32 Flags;
- UINT64 Reserved3;
+ UINT8 Type;
+ UINT8 Length;
+ UINT32 ProximityDomain;
+ UINT16 Reserved1;
+ UINT32 AddressBaseLow;
+ UINT32 AddressBaseHigh;
+ UINT32 LengthLow;
+ UINT32 LengthHigh;
+ UINT32 Reserved2;
+ UINT32 Flags;
+ UINT64 Reserved3;
} EFI_ACPI_4_0_MEMORY_AFFINITY_STRUCTURE;
//
// Memory Flags. All other bits are reserved and must be 0.
//
-#define EFI_ACPI_4_0_MEMORY_ENABLED (1 << 0)
-#define EFI_ACPI_4_0_MEMORY_HOT_PLUGGABLE (1 << 1)
-#define EFI_ACPI_4_0_MEMORY_NONVOLATILE (1 << 2)
+#define EFI_ACPI_4_0_MEMORY_ENABLED (1 << 0)
+#define EFI_ACPI_4_0_MEMORY_HOT_PLUGGABLE (1 << 1)
+#define EFI_ACPI_4_0_MEMORY_NONVOLATILE (1 << 2)
///
/// Processor Local x2APIC Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Reserved1[2];
- UINT32 ProximityDomain;
- UINT32 X2ApicId;
- UINT32 Flags;
- UINT32 ClockDomain;
- UINT8 Reserved2[4];
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved1[2];
+ UINT32 ProximityDomain;
+ UINT32 X2ApicId;
+ UINT32 Flags;
+ UINT32 ClockDomain;
+ UINT8 Reserved2[4];
} EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
///
@@ -591,8 +585,8 @@
/// The rest of the table is a matrix.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT64 NumberOfSystemLocalities;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT64 NumberOfSystemLocalities;
} EFI_ACPI_4_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
///
@@ -604,14 +598,14 @@
/// Corrected Platform Error Polling Table (CPEP)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT8 Reserved[8];
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 Reserved[8];
} EFI_ACPI_4_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
///
/// CPEP Version (as defined in ACPI 4.0 spec.)
///
-#define EFI_ACPI_4_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
+#define EFI_ACPI_4_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
//
// CPEP processor structure types.
@@ -622,82 +616,83 @@
/// Corrected Platform Error Polling Processor Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT32 PollingInterval;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT32 PollingInterval;
} EFI_ACPI_4_0_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
///
/// Maximum System Characteristics Table (MSCT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 OffsetProxDomInfo;
- UINT32 MaximumNumberOfProximityDomains;
- UINT32 MaximumNumberOfClockDomains;
- UINT64 MaximumPhysicalAddress;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 OffsetProxDomInfo;
+ UINT32 MaximumNumberOfProximityDomains;
+ UINT32 MaximumNumberOfClockDomains;
+ UINT64 MaximumPhysicalAddress;
} EFI_ACPI_4_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
///
/// MSCT Version (as defined in ACPI 4.0 spec.)
///
-#define EFI_ACPI_4_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
+#define EFI_ACPI_4_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
///
/// Maximum Proximity Domain Information Structure Definition
///
typedef struct {
- UINT8 Revision;
- UINT8 Length;
- UINT32 ProximityDomainRangeLow;
- UINT32 ProximityDomainRangeHigh;
- UINT32 MaximumProcessorCapacity;
- UINT64 MaximumMemoryCapacity;
+ UINT8 Revision;
+ UINT8 Length;
+ UINT32 ProximityDomainRangeLow;
+ UINT32 ProximityDomainRangeHigh;
+ UINT32 MaximumProcessorCapacity;
+ UINT64 MaximumMemoryCapacity;
} EFI_ACPI_4_0_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
///
/// Boot Error Record Table (BERT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 BootErrorRegionLength;
- UINT64 BootErrorRegion;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 BootErrorRegionLength;
+ UINT64 BootErrorRegion;
} EFI_ACPI_4_0_BOOT_ERROR_RECORD_TABLE_HEADER;
///
/// BERT Version (as defined in ACPI 4.0 spec.)
///
-#define EFI_ACPI_4_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
+#define EFI_ACPI_4_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
///
/// Boot Error Region Block Status Definition
///
typedef struct {
- UINT32 UncorrectableErrorValid:1;
- UINT32 CorrectableErrorValid:1;
- UINT32 MultipleUncorrectableErrors:1;
- UINT32 MultipleCorrectableErrors:1;
- UINT32 ErrorDataEntryCount:10;
- UINT32 Reserved:18;
+ UINT32 UncorrectableErrorValid : 1;
+ UINT32 CorrectableErrorValid : 1;
+ UINT32 MultipleUncorrectableErrors : 1;
+ UINT32 MultipleCorrectableErrors : 1;
+ UINT32 ErrorDataEntryCount : 10;
+ UINT32 Reserved : 18;
} EFI_ACPI_4_0_ERROR_BLOCK_STATUS;
///
/// Boot Error Region Definition
///
typedef struct {
- EFI_ACPI_4_0_ERROR_BLOCK_STATUS BlockStatus;
- UINT32 RawDataOffset;
- UINT32 RawDataLength;
- UINT32 DataLength;
- UINT32 ErrorSeverity;
+ EFI_ACPI_4_0_ERROR_BLOCK_STATUS BlockStatus;
+ UINT32 RawDataOffset;
+ UINT32 RawDataLength;
+ UINT32 DataLength;
+ UINT32 ErrorSeverity;
} EFI_ACPI_4_0_BOOT_ERROR_REGION_STRUCTURE;
//
// Boot Error Severity types
//
#define EFI_ACPI_4_0_ERROR_SEVERITY_CORRECTABLE 0x00
+#define EFI_ACPI_4_0_ERROR_SEVERITY_RECOVERABLE 0x00
#define EFI_ACPI_4_0_ERROR_SEVERITY_FATAL 0x01
#define EFI_ACPI_4_0_ERROR_SEVERITY_CORRECTED 0x02
#define EFI_ACPI_4_0_ERROR_SEVERITY_NONE 0x03
@@ -706,14 +701,14 @@
/// Generic Error Data Entry Definition
///
typedef struct {
- UINT8 SectionType[16];
- UINT32 ErrorSeverity;
- UINT16 Revision;
- UINT8 ValidationBits;
- UINT8 Flags;
- UINT32 ErrorDataLength;
- UINT8 FruId[16];
- UINT8 FruText[20];
+ UINT8 SectionType[16];
+ UINT32 ErrorSeverity;
+ UINT16 Revision;
+ UINT8 ValidationBits;
+ UINT8 Flags;
+ UINT32 ErrorDataLength;
+ UINT8 FruId[16];
+ UINT8 FruText[20];
} EFI_ACPI_4_0_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
///
@@ -725,14 +720,14 @@
/// HEST - Hardware Error Source Table
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 ErrorSourceCount;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 ErrorSourceCount;
} EFI_ACPI_4_0_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
///
/// HEST Version (as defined in ACPI 4.0 spec.)
///
-#define EFI_ACPI_4_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
+#define EFI_ACPI_4_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
//
// Error Source structure types.
@@ -748,383 +743,383 @@
//
// Error Source structure flags.
//
-#define EFI_ACPI_4_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
-#define EFI_ACPI_4_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
+#define EFI_ACPI_4_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
+#define EFI_ACPI_4_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
///
/// IA-32 Architecture Machine Check Exception Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT64 GlobalCapabilityInitData;
- UINT64 GlobalControlInitData;
- UINT8 NumberOfHardwareBanks;
- UINT8 Reserved1[7];
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT64 GlobalCapabilityInitData;
+ UINT64 GlobalControlInitData;
+ UINT8 NumberOfHardwareBanks;
+ UINT8 Reserved1[7];
} EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
///
/// IA-32 Architecture Machine Check Bank Structure Definition
///
typedef struct {
- UINT8 BankNumber;
- UINT8 ClearStatusOnInitialization;
- UINT8 StatusDataFormat;
- UINT8 Reserved0;
- UINT32 ControlRegisterMsrAddress;
- UINT64 ControlInitData;
- UINT32 StatusRegisterMsrAddress;
- UINT32 AddressRegisterMsrAddress;
- UINT32 MiscRegisterMsrAddress;
+ UINT8 BankNumber;
+ UINT8 ClearStatusOnInitialization;
+ UINT8 StatusDataFormat;
+ UINT8 Reserved0;
+ UINT32 ControlRegisterMsrAddress;
+ UINT64 ControlInitData;
+ UINT32 StatusRegisterMsrAddress;
+ UINT32 AddressRegisterMsrAddress;
+ UINT32 MiscRegisterMsrAddress;
} EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
///
/// IA-32 Architecture Machine Check Bank Structure MCA data format
///
-#define EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
-#define EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
-#define EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
+#define EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
+#define EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
+#define EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
//
// Hardware Error Notification types. All other values are reserved
//
-#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
-#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
-#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
-#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
-#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
+#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
+#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
+#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
+#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
+#define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
///
/// Hardware Error Notification Configuration Write Enable Structure Definition
///
typedef struct {
- UINT16 Type:1;
- UINT16 PollInterval:1;
- UINT16 SwitchToPollingThresholdValue:1;
- UINT16 SwitchToPollingThresholdWindow:1;
- UINT16 ErrorThresholdValue:1;
- UINT16 ErrorThresholdWindow:1;
- UINT16 Reserved:10;
+ UINT16 Type : 1;
+ UINT16 PollInterval : 1;
+ UINT16 SwitchToPollingThresholdValue : 1;
+ UINT16 SwitchToPollingThresholdWindow : 1;
+ UINT16 ErrorThresholdValue : 1;
+ UINT16 ErrorThresholdWindow : 1;
+ UINT16 Reserved : 10;
} EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
///
/// Hardware Error Notification Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
- UINT32 PollInterval;
- UINT32 Vector;
- UINT32 SwitchToPollingThresholdValue;
- UINT32 SwitchToPollingThresholdWindow;
- UINT32 ErrorThresholdValue;
- UINT32 ErrorThresholdWindow;
+ UINT8 Type;
+ UINT8 Length;
+ EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
+ UINT32 PollInterval;
+ UINT32 Vector;
+ UINT32 SwitchToPollingThresholdValue;
+ UINT32 SwitchToPollingThresholdWindow;
+ UINT32 ErrorThresholdValue;
+ UINT32 ErrorThresholdWindow;
} EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
///
/// IA-32 Architecture Corrected Machine Check Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
- UINT8 NumberOfHardwareBanks;
- UINT8 Reserved1[3];
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
+ UINT8 NumberOfHardwareBanks;
+ UINT8 Reserved1[3];
} EFI_ACPI_4_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
///
/// IA-32 Architecture NMI Error Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 MaxRawDataLength;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 MaxRawDataLength;
} EFI_ACPI_4_0_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
///
/// PCI Express Root Port AER Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT16 DeviceControl;
- UINT8 Reserved1[2];
- UINT32 UncorrectableErrorMask;
- UINT32 UncorrectableErrorSeverity;
- UINT32 CorrectableErrorMask;
- UINT32 AdvancedErrorCapabilitiesAndControl;
- UINT32 RootErrorCommand;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT32 RootErrorCommand;
} EFI_ACPI_4_0_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
///
/// PCI Express Device AER Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT16 DeviceControl;
- UINT8 Reserved1[2];
- UINT32 UncorrectableErrorMask;
- UINT32 UncorrectableErrorSeverity;
- UINT32 CorrectableErrorMask;
- UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
} EFI_ACPI_4_0_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
///
/// PCI Express Bridge AER Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT16 DeviceControl;
- UINT8 Reserved1[2];
- UINT32 UncorrectableErrorMask;
- UINT32 UncorrectableErrorSeverity;
- UINT32 CorrectableErrorMask;
- UINT32 AdvancedErrorCapabilitiesAndControl;
- UINT32 SecondaryUncorrectableErrorMask;
- UINT32 SecondaryUncorrectableErrorSeverity;
- UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT32 SecondaryUncorrectableErrorMask;
+ UINT32 SecondaryUncorrectableErrorSeverity;
+ UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
} EFI_ACPI_4_0_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
///
/// Generic Hardware Error Source Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT16 RelatedSourceId;
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 MaxRawDataLength;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
- EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
- UINT32 ErrorStatusBlockLength;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT16 RelatedSourceId;
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 MaxRawDataLength;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
+ EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
+ UINT32 ErrorStatusBlockLength;
} EFI_ACPI_4_0_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
///
/// Generic Error Status Definition
///
typedef struct {
- EFI_ACPI_4_0_ERROR_BLOCK_STATUS BlockStatus;
- UINT32 RawDataOffset;
- UINT32 RawDataLength;
- UINT32 DataLength;
- UINT32 ErrorSeverity;
+ EFI_ACPI_4_0_ERROR_BLOCK_STATUS BlockStatus;
+ UINT32 RawDataOffset;
+ UINT32 RawDataLength;
+ UINT32 DataLength;
+ UINT32 ErrorSeverity;
} EFI_ACPI_4_0_GENERIC_ERROR_STATUS_STRUCTURE;
///
/// ERST - Error Record Serialization Table
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 SerializationHeaderSize;
- UINT8 Reserved0[4];
- UINT32 InstructionEntryCount;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 SerializationHeaderSize;
+ UINT8 Reserved0[4];
+ UINT32 InstructionEntryCount;
} EFI_ACPI_4_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
///
/// ERST Version (as defined in ACPI 4.0 spec.)
///
-#define EFI_ACPI_4_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
+#define EFI_ACPI_4_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
///
/// ERST Serialization Actions
///
-#define EFI_ACPI_4_0_ERST_BEGIN_WRITE_OPERATION 0x00
-#define EFI_ACPI_4_0_ERST_BEGIN_READ_OPERATION 0x01
-#define EFI_ACPI_4_0_ERST_BEGIN_CLEAR_OPERATION 0x02
-#define EFI_ACPI_4_0_ERST_END_OPERATION 0x03
-#define EFI_ACPI_4_0_ERST_SET_RECORD_OFFSET 0x04
-#define EFI_ACPI_4_0_ERST_EXECUTE_OPERATION 0x05
-#define EFI_ACPI_4_0_ERST_CHECK_BUSY_STATUS 0x06
-#define EFI_ACPI_4_0_ERST_GET_COMMAND_STATUS 0x07
-#define EFI_ACPI_4_0_ERST_GET_RECORD_IDENTIFIER 0x08
-#define EFI_ACPI_4_0_ERST_SET_RECORD_IDENTIFIER 0x09
-#define EFI_ACPI_4_0_ERST_GET_RECORD_COUNT 0x0A
-#define EFI_ACPI_4_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
-#define EFI_ACPI_4_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
-#define EFI_ACPI_4_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
-#define EFI_ACPI_4_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
+#define EFI_ACPI_4_0_ERST_BEGIN_WRITE_OPERATION 0x00
+#define EFI_ACPI_4_0_ERST_BEGIN_READ_OPERATION 0x01
+#define EFI_ACPI_4_0_ERST_BEGIN_CLEAR_OPERATION 0x02
+#define EFI_ACPI_4_0_ERST_END_OPERATION 0x03
+#define EFI_ACPI_4_0_ERST_SET_RECORD_OFFSET 0x04
+#define EFI_ACPI_4_0_ERST_EXECUTE_OPERATION 0x05
+#define EFI_ACPI_4_0_ERST_CHECK_BUSY_STATUS 0x06
+#define EFI_ACPI_4_0_ERST_GET_COMMAND_STATUS 0x07
+#define EFI_ACPI_4_0_ERST_GET_RECORD_IDENTIFIER 0x08
+#define EFI_ACPI_4_0_ERST_SET_RECORD_IDENTIFIER 0x09
+#define EFI_ACPI_4_0_ERST_GET_RECORD_COUNT 0x0A
+#define EFI_ACPI_4_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
+#define EFI_ACPI_4_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
+#define EFI_ACPI_4_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
+#define EFI_ACPI_4_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
///
/// ERST Action Command Status
///
-#define EFI_ACPI_4_0_EINJ_STATUS_SUCCESS 0x00
-#define EFI_ACPI_4_0_EINJ_STATUS_NOT_ENOUGH_SPACE 0x01
-#define EFI_ACPI_4_0_EINJ_STATUS_HARDWARE_NOT_AVAILABLE 0x02
-#define EFI_ACPI_4_0_EINJ_STATUS_FAILED 0x03
-#define EFI_ACPI_4_0_EINJ_STATUS_RECORD_STORE_EMPTY 0x04
-#define EFI_ACPI_4_0_EINJ_STATUS_RECORD_NOT_FOUND 0x05
+#define EFI_ACPI_4_0_EINJ_STATUS_SUCCESS 0x00
+#define EFI_ACPI_4_0_EINJ_STATUS_NOT_ENOUGH_SPACE 0x01
+#define EFI_ACPI_4_0_EINJ_STATUS_HARDWARE_NOT_AVAILABLE 0x02
+#define EFI_ACPI_4_0_EINJ_STATUS_FAILED 0x03
+#define EFI_ACPI_4_0_EINJ_STATUS_RECORD_STORE_EMPTY 0x04
+#define EFI_ACPI_4_0_EINJ_STATUS_RECORD_NOT_FOUND 0x05
///
/// ERST Serialization Instructions
///
-#define EFI_ACPI_4_0_ERST_READ_REGISTER 0x00
-#define EFI_ACPI_4_0_ERST_READ_REGISTER_VALUE 0x01
-#define EFI_ACPI_4_0_ERST_WRITE_REGISTER 0x02
-#define EFI_ACPI_4_0_ERST_WRITE_REGISTER_VALUE 0x03
-#define EFI_ACPI_4_0_ERST_NOOP 0x04
-#define EFI_ACPI_4_0_ERST_LOAD_VAR1 0x05
-#define EFI_ACPI_4_0_ERST_LOAD_VAR2 0x06
-#define EFI_ACPI_4_0_ERST_STORE_VAR1 0x07
-#define EFI_ACPI_4_0_ERST_ADD 0x08
-#define EFI_ACPI_4_0_ERST_SUBTRACT 0x09
-#define EFI_ACPI_4_0_ERST_ADD_VALUE 0x0A
-#define EFI_ACPI_4_0_ERST_SUBTRACT_VALUE 0x0B
-#define EFI_ACPI_4_0_ERST_STALL 0x0C
-#define EFI_ACPI_4_0_ERST_STALL_WHILE_TRUE 0x0D
-#define EFI_ACPI_4_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
-#define EFI_ACPI_4_0_ERST_GOTO 0x0F
-#define EFI_ACPI_4_0_ERST_SET_SRC_ADDRESS_BASE 0x10
-#define EFI_ACPI_4_0_ERST_SET_DST_ADDRESS_BASE 0x11
-#define EFI_ACPI_4_0_ERST_MOVE_DATA 0x12
+#define EFI_ACPI_4_0_ERST_READ_REGISTER 0x00
+#define EFI_ACPI_4_0_ERST_READ_REGISTER_VALUE 0x01
+#define EFI_ACPI_4_0_ERST_WRITE_REGISTER 0x02
+#define EFI_ACPI_4_0_ERST_WRITE_REGISTER_VALUE 0x03
+#define EFI_ACPI_4_0_ERST_NOOP 0x04
+#define EFI_ACPI_4_0_ERST_LOAD_VAR1 0x05
+#define EFI_ACPI_4_0_ERST_LOAD_VAR2 0x06
+#define EFI_ACPI_4_0_ERST_STORE_VAR1 0x07
+#define EFI_ACPI_4_0_ERST_ADD 0x08
+#define EFI_ACPI_4_0_ERST_SUBTRACT 0x09
+#define EFI_ACPI_4_0_ERST_ADD_VALUE 0x0A
+#define EFI_ACPI_4_0_ERST_SUBTRACT_VALUE 0x0B
+#define EFI_ACPI_4_0_ERST_STALL 0x0C
+#define EFI_ACPI_4_0_ERST_STALL_WHILE_TRUE 0x0D
+#define EFI_ACPI_4_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
+#define EFI_ACPI_4_0_ERST_GOTO 0x0F
+#define EFI_ACPI_4_0_ERST_SET_SRC_ADDRESS_BASE 0x10
+#define EFI_ACPI_4_0_ERST_SET_DST_ADDRESS_BASE 0x11
+#define EFI_ACPI_4_0_ERST_MOVE_DATA 0x12
///
/// ERST Instruction Flags
///
-#define EFI_ACPI_4_0_ERST_PRESERVE_REGISTER 0x01
+#define EFI_ACPI_4_0_ERST_PRESERVE_REGISTER 0x01
///
/// ERST Serialization Instruction Entry
///
typedef struct {
- UINT8 SerializationAction;
- UINT8 Instruction;
- UINT8 Flags;
- UINT8 Reserved0;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
- UINT64 Value;
- UINT64 Mask;
+ UINT8 SerializationAction;
+ UINT8 Instruction;
+ UINT8 Flags;
+ UINT8 Reserved0;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
+ UINT64 Value;
+ UINT64 Mask;
} EFI_ACPI_4_0_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
///
/// EINJ - Error Injection Table
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 InjectionHeaderSize;
- UINT8 InjectionFlags;
- UINT8 Reserved0[3];
- UINT32 InjectionEntryCount;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 InjectionHeaderSize;
+ UINT8 InjectionFlags;
+ UINT8 Reserved0[3];
+ UINT32 InjectionEntryCount;
} EFI_ACPI_4_0_ERROR_INJECTION_TABLE_HEADER;
///
/// EINJ Version (as defined in ACPI 4.0 spec.)
///
-#define EFI_ACPI_4_0_ERROR_INJECTION_TABLE_REVISION 0x01
+#define EFI_ACPI_4_0_ERROR_INJECTION_TABLE_REVISION 0x01
///
/// EINJ Error Injection Actions
///
-#define EFI_ACPI_4_0_EINJ_BEGIN_INJECTION_OPERATION 0x00
-#define EFI_ACPI_4_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
-#define EFI_ACPI_4_0_EINJ_SET_ERROR_TYPE 0x02
-#define EFI_ACPI_4_0_EINJ_GET_ERROR_TYPE 0x03
-#define EFI_ACPI_4_0_EINJ_END_OPERATION 0x04
-#define EFI_ACPI_4_0_EINJ_EXECUTE_OPERATION 0x05
-#define EFI_ACPI_4_0_EINJ_CHECK_BUSY_STATUS 0x06
-#define EFI_ACPI_4_0_EINJ_GET_COMMAND_STATUS 0x07
-#define EFI_ACPI_4_0_EINJ_TRIGGER_ERROR 0xFF
+#define EFI_ACPI_4_0_EINJ_BEGIN_INJECTION_OPERATION 0x00
+#define EFI_ACPI_4_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
+#define EFI_ACPI_4_0_EINJ_SET_ERROR_TYPE 0x02
+#define EFI_ACPI_4_0_EINJ_GET_ERROR_TYPE 0x03
+#define EFI_ACPI_4_0_EINJ_END_OPERATION 0x04
+#define EFI_ACPI_4_0_EINJ_EXECUTE_OPERATION 0x05
+#define EFI_ACPI_4_0_EINJ_CHECK_BUSY_STATUS 0x06
+#define EFI_ACPI_4_0_EINJ_GET_COMMAND_STATUS 0x07
+#define EFI_ACPI_4_0_EINJ_TRIGGER_ERROR 0xFF
///
/// EINJ Action Command Status
///
-#define EFI_ACPI_4_0_EINJ_STATUS_SUCCESS 0x00
-#define EFI_ACPI_4_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01
-#define EFI_ACPI_4_0_EINJ_STATUS_INVALID_ACCESS 0x02
+#define EFI_ACPI_4_0_EINJ_STATUS_SUCCESS 0x00
+#define EFI_ACPI_4_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01
+#define EFI_ACPI_4_0_EINJ_STATUS_INVALID_ACCESS 0x02
///
/// EINJ Error Type Definition
///
-#define EFI_ACPI_4_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
-#define EFI_ACPI_4_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
-#define EFI_ACPI_4_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
-#define EFI_ACPI_4_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
-#define EFI_ACPI_4_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
-#define EFI_ACPI_4_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
-#define EFI_ACPI_4_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
-#define EFI_ACPI_4_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
-#define EFI_ACPI_4_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
-#define EFI_ACPI_4_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
-#define EFI_ACPI_4_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
-#define EFI_ACPI_4_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
+#define EFI_ACPI_4_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
+#define EFI_ACPI_4_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
+#define EFI_ACPI_4_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
+#define EFI_ACPI_4_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
+#define EFI_ACPI_4_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
+#define EFI_ACPI_4_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
+#define EFI_ACPI_4_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
+#define EFI_ACPI_4_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
+#define EFI_ACPI_4_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
+#define EFI_ACPI_4_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
+#define EFI_ACPI_4_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
+#define EFI_ACPI_4_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
///
/// EINJ Injection Instructions
///
-#define EFI_ACPI_4_0_EINJ_READ_REGISTER 0x00
-#define EFI_ACPI_4_0_EINJ_READ_REGISTER_VALUE 0x01
-#define EFI_ACPI_4_0_EINJ_WRITE_REGISTER 0x02
-#define EFI_ACPI_4_0_EINJ_WRITE_REGISTER_VALUE 0x03
-#define EFI_ACPI_4_0_EINJ_NOOP 0x04
+#define EFI_ACPI_4_0_EINJ_READ_REGISTER 0x00
+#define EFI_ACPI_4_0_EINJ_READ_REGISTER_VALUE 0x01
+#define EFI_ACPI_4_0_EINJ_WRITE_REGISTER 0x02
+#define EFI_ACPI_4_0_EINJ_WRITE_REGISTER_VALUE 0x03
+#define EFI_ACPI_4_0_EINJ_NOOP 0x04
///
/// EINJ Instruction Flags
///
-#define EFI_ACPI_4_0_EINJ_PRESERVE_REGISTER 0x01
+#define EFI_ACPI_4_0_EINJ_PRESERVE_REGISTER 0x01
///
/// EINJ Injection Instruction Entry
///
typedef struct {
- UINT8 InjectionAction;
- UINT8 Instruction;
- UINT8 Flags;
- UINT8 Reserved0;
- EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
- UINT64 Value;
- UINT64 Mask;
+ UINT8 InjectionAction;
+ UINT8 Instruction;
+ UINT8 Flags;
+ UINT8 Reserved0;
+ EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
+ UINT64 Value;
+ UINT64 Mask;
} EFI_ACPI_4_0_EINJ_INJECTION_INSTRUCTION_ENTRY;
///
/// EINJ Trigger Action Table
///
typedef struct {
- UINT32 HeaderSize;
- UINT32 Revision;
- UINT32 TableSize;
- UINT32 EntryCount;
+ UINT32 HeaderSize;
+ UINT32 Revision;
+ UINT32 TableSize;
+ UINT32 EntryCount;
} EFI_ACPI_4_0_EINJ_TRIGGER_ACTION_TABLE;
//
@@ -1272,7 +1267,7 @@
#define EFI_ACPI_4_0_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')
///
-/// "SPCR" Serial Port Concole Redirection Table
+/// "SPCR" Serial Port Console Redirection Table
///
#define EFI_ACPI_4_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
diff --git a/src/include/ipxe/efi/IndustryStandard/Acpi50.h b/src/include/ipxe/efi/IndustryStandard/Acpi50.h
index df9e715..7d57b9f 100644
--- a/src/include/ipxe/efi/IndustryStandard/Acpi50.h
+++ b/src/include/ipxe/efi/IndustryStandard/Acpi50.h
@@ -2,33 +2,28 @@
ACPI 5.0 definitions from the ACPI Specification Revision 5.0a November 13, 2013.
Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR>
- Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2011 - 2022, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2020, ARM Ltd. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _ACPI_5_0_H_
#define _ACPI_5_0_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/IndustryStandard/Acpi40.h>
//
-// Define for Desriptor
+// Define for Descriptor
//
-#define ACPI_SMALL_FIXED_DMA_DESCRIPTOR_NAME 0x0A
-#define ACPI_LARGE_GPIO_CONNECTION_DESCRIPTOR_NAME 0x0C
-#define ACPI_LARGE_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR_NAME 0x0E
+#define ACPI_SMALL_FIXED_DMA_DESCRIPTOR_NAME 0x0A
+#define ACPI_LARGE_GPIO_CONNECTION_DESCRIPTOR_NAME 0x0C
+#define ACPI_LARGE_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR_NAME 0x0E
-#define ACPI_FIXED_DMA_DESCRIPTOR 0x55
-#define ACPI_GPIO_CONNECTION_DESCRIPTOR 0x8C
-#define ACPI_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR 0x8E
+#define ACPI_FIXED_DMA_DESCRIPTOR 0x55
+#define ACPI_GPIO_CONNECTION_DESCRIPTOR 0x8C
+#define ACPI_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR 0x8E
#pragma pack(1)
@@ -36,10 +31,10 @@
/// Generic DMA Descriptor.
///
typedef PACKED struct {
- ACPI_SMALL_RESOURCE_HEADER Header;
- UINT16 DmaRequestLine;
- UINT16 DmaChannel;
- UINT8 DmaTransferWidth;
+ ACPI_SMALL_RESOURCE_HEADER Header;
+ UINT16 DmaRequestLine;
+ UINT16 DmaChannel;
+ UINT8 DmaTransferWidth;
} EFI_ACPI_FIXED_DMA_DESCRIPTOR;
///
@@ -61,8 +56,8 @@
UINT16 VendorDataLength;
} EFI_ACPI_GPIO_CONNECTION_DESCRIPTOR;
-#define EFI_ACPI_GPIO_CONNECTION_TYPE_INTERRUPT 0x0
-#define EFI_ACPI_GPIO_CONNECTION_TYPE_IO 0x1
+#define EFI_ACPI_GPIO_CONNECTION_TYPE_INTERRUPT 0x0
+#define EFI_ACPI_GPIO_CONNECTION_TYPE_IO 0x1
///
/// Serial Bus Resource Descriptor (Generic)
@@ -76,7 +71,7 @@
UINT16 TypeSpecificFlags;
UINT8 TypeSpecificRevisionId;
UINT16 TypeDataLength;
-// Type specific data
+ // Type specific data
} EFI_ACPI_SERIAL_BUS_RESOURCE_DESCRIPTOR;
#define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_I2C 0x1
@@ -148,21 +143,21 @@
/// ACPI 5.0 Generic Address Space definition
///
typedef struct {
- UINT8 AddressSpaceId;
- UINT8 RegisterBitWidth;
- UINT8 RegisterBitOffset;
- UINT8 AccessSize;
- UINT64 Address;
+ UINT8 AddressSpaceId;
+ UINT8 RegisterBitWidth;
+ UINT8 RegisterBitOffset;
+ UINT8 AccessSize;
+ UINT64 Address;
} EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE;
//
// Generic Address Space Address IDs
//
-#define EFI_ACPI_5_0_SYSTEM_MEMORY 0
-#define EFI_ACPI_5_0_SYSTEM_IO 1
-#define EFI_ACPI_5_0_PCI_CONFIGURATION_SPACE 2
-#define EFI_ACPI_5_0_EMBEDDED_CONTROLLER 3
-#define EFI_ACPI_5_0_SMBUS 4
+#define EFI_ACPI_5_0_SYSTEM_MEMORY 0
+#define EFI_ACPI_5_0_SYSTEM_IO 1
+#define EFI_ACPI_5_0_PCI_CONFIGURATION_SPACE 2
+#define EFI_ACPI_5_0_EMBEDDED_CONTROLLER 3
+#define EFI_ACPI_5_0_SMBUS 4
#define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL 0x0A
#define EFI_ACPI_5_0_FUNCTIONAL_FIXED_HARDWARE 0x7F
@@ -183,29 +178,29 @@
/// Root System Description Pointer Structure
///
typedef struct {
- UINT64 Signature;
- UINT8 Checksum;
- UINT8 OemId[6];
- UINT8 Revision;
- UINT32 RsdtAddress;
- UINT32 Length;
- UINT64 XsdtAddress;
- UINT8 ExtendedChecksum;
- UINT8 Reserved[3];
+ UINT64 Signature;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT8 Revision;
+ UINT32 RsdtAddress;
+ UINT32 Length;
+ UINT64 XsdtAddress;
+ UINT8 ExtendedChecksum;
+ UINT8 Reserved[3];
} EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
///
/// RSD_PTR Revision (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.0) says current value is 2
+#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.0) says current value is 2
///
/// Common table header, this prefaces all ACPI tables, including FACS, but
/// excluding the RSD PTR structure
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
+ UINT32 Signature;
+ UINT32 Length;
} EFI_ACPI_5_0_COMMON_HEADER;
//
@@ -217,7 +212,7 @@
///
/// RSDT Revision (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
//
// Extended System Description Table
@@ -228,66 +223,66 @@
///
/// XSDT Revision (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
///
/// Fixed ACPI Description Table Structure (FADT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 FirmwareCtrl;
- UINT32 Dsdt;
- UINT8 Reserved0;
- UINT8 PreferredPmProfile;
- UINT16 SciInt;
- UINT32 SmiCmd;
- UINT8 AcpiEnable;
- UINT8 AcpiDisable;
- UINT8 S4BiosReq;
- UINT8 PstateCnt;
- UINT32 Pm1aEvtBlk;
- UINT32 Pm1bEvtBlk;
- UINT32 Pm1aCntBlk;
- UINT32 Pm1bCntBlk;
- UINT32 Pm2CntBlk;
- UINT32 PmTmrBlk;
- UINT32 Gpe0Blk;
- UINT32 Gpe1Blk;
- UINT8 Pm1EvtLen;
- UINT8 Pm1CntLen;
- UINT8 Pm2CntLen;
- UINT8 PmTmrLen;
- UINT8 Gpe0BlkLen;
- UINT8 Gpe1BlkLen;
- UINT8 Gpe1Base;
- UINT8 CstCnt;
- UINT16 PLvl2Lat;
- UINT16 PLvl3Lat;
- UINT16 FlushSize;
- UINT16 FlushStride;
- UINT8 DutyOffset;
- UINT8 DutyWidth;
- UINT8 DayAlrm;
- UINT8 MonAlrm;
- UINT8 Century;
- UINT16 IaPcBootArch;
- UINT8 Reserved1;
- UINT32 Flags;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
- UINT8 ResetValue;
- UINT8 Reserved2[3];
- UINT64 XFirmwareCtrl;
- UINT64 XDsdt;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 FirmwareCtrl;
+ UINT32 Dsdt;
+ UINT8 Reserved0;
+ UINT8 PreferredPmProfile;
+ UINT16 SciInt;
+ UINT32 SmiCmd;
+ UINT8 AcpiEnable;
+ UINT8 AcpiDisable;
+ UINT8 S4BiosReq;
+ UINT8 PstateCnt;
+ UINT32 Pm1aEvtBlk;
+ UINT32 Pm1bEvtBlk;
+ UINT32 Pm1aCntBlk;
+ UINT32 Pm1bCntBlk;
+ UINT32 Pm2CntBlk;
+ UINT32 PmTmrBlk;
+ UINT32 Gpe0Blk;
+ UINT32 Gpe1Blk;
+ UINT8 Pm1EvtLen;
+ UINT8 Pm1CntLen;
+ UINT8 Pm2CntLen;
+ UINT8 PmTmrLen;
+ UINT8 Gpe0BlkLen;
+ UINT8 Gpe1BlkLen;
+ UINT8 Gpe1Base;
+ UINT8 CstCnt;
+ UINT16 PLvl2Lat;
+ UINT16 PLvl3Lat;
+ UINT16 FlushSize;
+ UINT16 FlushStride;
+ UINT8 DutyOffset;
+ UINT8 DutyWidth;
+ UINT8 DayAlrm;
+ UINT8 MonAlrm;
+ UINT8 Century;
+ UINT16 IaPcBootArch;
+ UINT8 Reserved1;
+ UINT32 Flags;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
+ UINT8 ResetValue;
+ UINT8 Reserved2[3];
+ UINT64 XFirmwareCtrl;
+ UINT64 XDsdt;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
} EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE;
///
@@ -312,55 +307,55 @@
// Fixed ACPI Description Table Boot Architecture Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_5_0_LEGACY_DEVICES BIT0
-#define EFI_ACPI_5_0_8042 BIT1
-#define EFI_ACPI_5_0_VGA_NOT_PRESENT BIT2
-#define EFI_ACPI_5_0_MSI_NOT_SUPPORTED BIT3
-#define EFI_ACPI_5_0_PCIE_ASPM_CONTROLS BIT4
-#define EFI_ACPI_5_0_CMOS_RTC_NOT_PRESENT BIT5
+#define EFI_ACPI_5_0_LEGACY_DEVICES BIT0
+#define EFI_ACPI_5_0_8042 BIT1
+#define EFI_ACPI_5_0_VGA_NOT_PRESENT BIT2
+#define EFI_ACPI_5_0_MSI_NOT_SUPPORTED BIT3
+#define EFI_ACPI_5_0_PCIE_ASPM_CONTROLS BIT4
+#define EFI_ACPI_5_0_CMOS_RTC_NOT_PRESENT BIT5
//
// Fixed ACPI Description Table Fixed Feature Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_5_0_WBINVD BIT0
-#define EFI_ACPI_5_0_WBINVD_FLUSH BIT1
-#define EFI_ACPI_5_0_PROC_C1 BIT2
-#define EFI_ACPI_5_0_P_LVL2_UP BIT3
-#define EFI_ACPI_5_0_PWR_BUTTON BIT4
-#define EFI_ACPI_5_0_SLP_BUTTON BIT5
-#define EFI_ACPI_5_0_FIX_RTC BIT6
-#define EFI_ACPI_5_0_RTC_S4 BIT7
-#define EFI_ACPI_5_0_TMR_VAL_EXT BIT8
-#define EFI_ACPI_5_0_DCK_CAP BIT9
-#define EFI_ACPI_5_0_RESET_REG_SUP BIT10
-#define EFI_ACPI_5_0_SEALED_CASE BIT11
-#define EFI_ACPI_5_0_HEADLESS BIT12
-#define EFI_ACPI_5_0_CPU_SW_SLP BIT13
-#define EFI_ACPI_5_0_PCI_EXP_WAK BIT14
-#define EFI_ACPI_5_0_USE_PLATFORM_CLOCK BIT15
-#define EFI_ACPI_5_0_S4_RTC_STS_VALID BIT16
-#define EFI_ACPI_5_0_REMOTE_POWER_ON_CAPABLE BIT17
-#define EFI_ACPI_5_0_FORCE_APIC_CLUSTER_MODEL BIT18
-#define EFI_ACPI_5_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
-#define EFI_ACPI_5_0_HW_REDUCED_ACPI BIT20
-#define EFI_ACPI_5_0_LOW_POWER_S0_IDLE_CAPABLE BIT21
+#define EFI_ACPI_5_0_WBINVD BIT0
+#define EFI_ACPI_5_0_WBINVD_FLUSH BIT1
+#define EFI_ACPI_5_0_PROC_C1 BIT2
+#define EFI_ACPI_5_0_P_LVL2_UP BIT3
+#define EFI_ACPI_5_0_PWR_BUTTON BIT4
+#define EFI_ACPI_5_0_SLP_BUTTON BIT5
+#define EFI_ACPI_5_0_FIX_RTC BIT6
+#define EFI_ACPI_5_0_RTC_S4 BIT7
+#define EFI_ACPI_5_0_TMR_VAL_EXT BIT8
+#define EFI_ACPI_5_0_DCK_CAP BIT9
+#define EFI_ACPI_5_0_RESET_REG_SUP BIT10
+#define EFI_ACPI_5_0_SEALED_CASE BIT11
+#define EFI_ACPI_5_0_HEADLESS BIT12
+#define EFI_ACPI_5_0_CPU_SW_SLP BIT13
+#define EFI_ACPI_5_0_PCI_EXP_WAK BIT14
+#define EFI_ACPI_5_0_USE_PLATFORM_CLOCK BIT15
+#define EFI_ACPI_5_0_S4_RTC_STS_VALID BIT16
+#define EFI_ACPI_5_0_REMOTE_POWER_ON_CAPABLE BIT17
+#define EFI_ACPI_5_0_FORCE_APIC_CLUSTER_MODEL BIT18
+#define EFI_ACPI_5_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
+#define EFI_ACPI_5_0_HW_REDUCED_ACPI BIT20
+#define EFI_ACPI_5_0_LOW_POWER_S0_IDLE_CAPABLE BIT21
///
/// Firmware ACPI Control Structure
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
- UINT32 HardwareSignature;
- UINT32 FirmwareWakingVector;
- UINT32 GlobalLock;
- UINT32 Flags;
- UINT64 XFirmwareWakingVector;
- UINT8 Version;
- UINT8 Reserved0[3];
- UINT32 OspmFlags;
- UINT8 Reserved1[24];
+ UINT32 Signature;
+ UINT32 Length;
+ UINT32 HardwareSignature;
+ UINT32 FirmwareWakingVector;
+ UINT32 GlobalLock;
+ UINT32 Flags;
+ UINT64 XFirmwareWakingVector;
+ UINT8 Version;
+ UINT8 Reserved0[3];
+ UINT32 OspmFlags;
+ UINT8 Reserved1[24];
} EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
///
@@ -372,14 +367,14 @@
/// Firmware Control Structure Feature Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_5_0_S4BIOS_F BIT0
-#define EFI_ACPI_5_0_64BIT_WAKE_SUPPORTED_F BIT1
+#define EFI_ACPI_5_0_S4BIOS_F BIT0
+#define EFI_ACPI_5_0_64BIT_WAKE_SUPPORTED_F BIT1
///
/// OSPM Enabled Firmware Control Structure Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_5_0_OSPM_64BIT_WAKE_F BIT0
+#define EFI_ACPI_5_0_OSPM_64BIT_WAKE_F BIT0
//
// Differentiated System Description Table,
@@ -388,29 +383,29 @@
// no definition needed as they are common description table header, the same with
// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
//
-#define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
-#define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
///
/// Multiple APIC Description Table header definition. The rest of the table
/// must be defined in a platform specific manner.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 LocalApicAddress;
- UINT32 Flags;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 LocalApicAddress;
+ UINT32 Flags;
} EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
///
/// MADT Revision (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
+#define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
///
/// Multiple APIC Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_5_0_PCAT_COMPAT BIT0
+#define EFI_ACPI_5_0_PCAT_COMPAT BIT0
//
// Multiple APIC Description Table APIC structure types
@@ -439,57 +434,57 @@
/// Processor Local APIC Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT8 ApicId;
- UINT32 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 ApicId;
+ UINT32 Flags;
} EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
///
/// Local APIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_0_LOCAL_APIC_ENABLED BIT0
+#define EFI_ACPI_5_0_LOCAL_APIC_ENABLED BIT0
///
/// IO APIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 IoApicAddress;
- UINT32 GlobalSystemInterruptBase;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 IoApicAddress;
+ UINT32 GlobalSystemInterruptBase;
} EFI_ACPI_5_0_IO_APIC_STRUCTURE;
///
/// Interrupt Source Override Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Bus;
- UINT8 Source;
- UINT32 GlobalSystemInterrupt;
- UINT16 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Bus;
+ UINT8 Source;
+ UINT32 GlobalSystemInterrupt;
+ UINT16 Flags;
} EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
///
/// Platform Interrupt Sources Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT8 InterruptType;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT8 IoSapicVector;
- UINT32 GlobalSystemInterrupt;
- UINT32 PlatformInterruptSourceFlags;
- UINT8 CpeiProcessorOverride;
- UINT8 Reserved[31];
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
+ UINT8 CpeiProcessorOverride;
+ UINT8 Reserved[31];
} EFI_ACPI_5_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;
//
@@ -503,43 +498,43 @@
/// Non-Maskable Interrupt Source Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT32 GlobalSystemInterrupt;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 GlobalSystemInterrupt;
} EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
///
/// Local APIC NMI Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT16 Flags;
- UINT8 LocalApicLint;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT16 Flags;
+ UINT8 LocalApicLint;
} EFI_ACPI_5_0_LOCAL_APIC_NMI_STRUCTURE;
///
/// Local APIC Address Override Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved;
- UINT64 LocalApicAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT64 LocalApicAddress;
} EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
///
/// IO SAPIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 GlobalSystemInterruptBase;
- UINT64 IoSapicAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 GlobalSystemInterruptBase;
+ UINT64 IoSapicAddress;
} EFI_ACPI_5_0_IO_SAPIC_STRUCTURE;
///
@@ -547,110 +542,110 @@
/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT8 LocalSapicId;
- UINT8 LocalSapicEid;
- UINT8 Reserved[3];
- UINT32 Flags;
- UINT32 ACPIProcessorUIDValue;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 LocalSapicId;
+ UINT8 LocalSapicEid;
+ UINT8 Reserved[3];
+ UINT32 Flags;
+ UINT32 ACPIProcessorUIDValue;
} EFI_ACPI_5_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
///
/// Platform Interrupt Sources Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT8 InterruptType;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT8 IoSapicVector;
- UINT32 GlobalSystemInterrupt;
- UINT32 PlatformInterruptSourceFlags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
} EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
///
/// Platform Interrupt Source Flags.
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_5_0_CPEI_PROCESSOR_OVERRIDE BIT0
+#define EFI_ACPI_5_0_CPEI_PROCESSOR_OVERRIDE BIT0
///
/// Processor Local x2APIC Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Reserved[2];
- UINT32 X2ApicId;
- UINT32 Flags;
- UINT32 AcpiProcessorUid;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved[2];
+ UINT32 X2ApicId;
+ UINT32 Flags;
+ UINT32 AcpiProcessorUid;
} EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
///
/// Local x2APIC NMI Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT32 AcpiProcessorUid;
- UINT8 LocalX2ApicLint;
- UINT8 Reserved[3];
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 AcpiProcessorUid;
+ UINT8 LocalX2ApicLint;
+ UINT8 Reserved[3];
} EFI_ACPI_5_0_LOCAL_X2APIC_NMI_STRUCTURE;
///
/// GIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved;
- UINT32 GicId;
- UINT32 AcpiProcessorUid;
- UINT32 Flags;
- UINT32 ParkingProtocolVersion;
- UINT32 PerformanceInterruptGsiv;
- UINT64 ParkedAddress;
- UINT64 PhysicalBaseAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT32 GicId;
+ UINT32 AcpiProcessorUid;
+ UINT32 Flags;
+ UINT32 ParkingProtocolVersion;
+ UINT32 PerformanceInterruptGsiv;
+ UINT64 ParkedAddress;
+ UINT64 PhysicalBaseAddress;
} EFI_ACPI_5_0_GIC_STRUCTURE;
///
/// GIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_0_GIC_ENABLED BIT0
-#define EFI_ACPI_5_0_PERFORMANCE_INTERRUPT_MODEL BIT1
+#define EFI_ACPI_5_0_GIC_ENABLED BIT0
+#define EFI_ACPI_5_0_PERFORMANCE_INTERRUPT_MODEL BIT1
///
/// GIC Distributor Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved1;
- UINT32 GicId;
- UINT64 PhysicalBaseAddress;
- UINT32 SystemVectorBase;
- UINT32 Reserved2;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved1;
+ UINT32 GicId;
+ UINT64 PhysicalBaseAddress;
+ UINT32 SystemVectorBase;
+ UINT32 Reserved2;
} EFI_ACPI_5_0_GIC_DISTRIBUTOR_STRUCTURE;
///
/// Smart Battery Description Table (SBST)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 WarningEnergyLevel;
- UINT32 LowEnergyLevel;
- UINT32 CriticalEnergyLevel;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 WarningEnergyLevel;
+ UINT32 LowEnergyLevel;
+ UINT32 CriticalEnergyLevel;
} EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE;
///
/// SBST Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
///
/// Embedded Controller Boot Resources Table (ECDT)
@@ -658,11 +653,11 @@
/// a fully qualified reference to the name space object.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcControl;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcData;
- UINT32 Uid;
- UINT8 GpeBit;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcControl;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcData;
+ UINT32 Uid;
+ UINT8 GpeBit;
} EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
///
@@ -675,9 +670,9 @@
/// must be defined in a platform specific manner.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 Reserved1; ///< Must be set to 1
- UINT64 Reserved2;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Reserved1; ///< Must be set to 1
+ UINT64 Reserved2;
} EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
///
@@ -698,57 +693,57 @@
/// Processor Local APIC/SAPIC Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 ProximityDomain7To0;
- UINT8 ApicId;
- UINT32 Flags;
- UINT8 LocalSapicEid;
- UINT8 ProximityDomain31To8[3];
- UINT32 ClockDomain;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProximityDomain7To0;
+ UINT8 ApicId;
+ UINT32 Flags;
+ UINT8 LocalSapicEid;
+ UINT8 ProximityDomain31To8[3];
+ UINT32 ClockDomain;
} EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
///
/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
+#define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
///
/// Memory Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT32 ProximityDomain;
- UINT16 Reserved1;
- UINT32 AddressBaseLow;
- UINT32 AddressBaseHigh;
- UINT32 LengthLow;
- UINT32 LengthHigh;
- UINT32 Reserved2;
- UINT32 Flags;
- UINT64 Reserved3;
+ UINT8 Type;
+ UINT8 Length;
+ UINT32 ProximityDomain;
+ UINT16 Reserved1;
+ UINT32 AddressBaseLow;
+ UINT32 AddressBaseHigh;
+ UINT32 LengthLow;
+ UINT32 LengthHigh;
+ UINT32 Reserved2;
+ UINT32 Flags;
+ UINT64 Reserved3;
} EFI_ACPI_5_0_MEMORY_AFFINITY_STRUCTURE;
//
// Memory Flags. All other bits are reserved and must be 0.
//
-#define EFI_ACPI_5_0_MEMORY_ENABLED (1 << 0)
-#define EFI_ACPI_5_0_MEMORY_HOT_PLUGGABLE (1 << 1)
-#define EFI_ACPI_5_0_MEMORY_NONVOLATILE (1 << 2)
+#define EFI_ACPI_5_0_MEMORY_ENABLED (1 << 0)
+#define EFI_ACPI_5_0_MEMORY_HOT_PLUGGABLE (1 << 1)
+#define EFI_ACPI_5_0_MEMORY_NONVOLATILE (1 << 2)
///
/// Processor Local x2APIC Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Reserved1[2];
- UINT32 ProximityDomain;
- UINT32 X2ApicId;
- UINT32 Flags;
- UINT32 ClockDomain;
- UINT8 Reserved2[4];
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved1[2];
+ UINT32 ProximityDomain;
+ UINT32 X2ApicId;
+ UINT32 Flags;
+ UINT32 ClockDomain;
+ UINT8 Reserved2[4];
} EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
///
@@ -756,8 +751,8 @@
/// The rest of the table is a matrix.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT64 NumberOfSystemLocalities;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT64 NumberOfSystemLocalities;
} EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
///
@@ -769,14 +764,14 @@
/// Corrected Platform Error Polling Table (CPEP)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT8 Reserved[8];
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 Reserved[8];
} EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
///
/// CPEP Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
//
// CPEP processor structure types.
@@ -787,66 +782,66 @@
/// Corrected Platform Error Polling Processor Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT32 PollingInterval;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT32 PollingInterval;
} EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
///
/// Maximum System Characteristics Table (MSCT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 OffsetProxDomInfo;
- UINT32 MaximumNumberOfProximityDomains;
- UINT32 MaximumNumberOfClockDomains;
- UINT64 MaximumPhysicalAddress;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 OffsetProxDomInfo;
+ UINT32 MaximumNumberOfProximityDomains;
+ UINT32 MaximumNumberOfClockDomains;
+ UINT64 MaximumPhysicalAddress;
} EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
///
/// MSCT Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
///
/// Maximum Proximity Domain Information Structure Definition
///
typedef struct {
- UINT8 Revision;
- UINT8 Length;
- UINT32 ProximityDomainRangeLow;
- UINT32 ProximityDomainRangeHigh;
- UINT32 MaximumProcessorCapacity;
- UINT64 MaximumMemoryCapacity;
+ UINT8 Revision;
+ UINT8 Length;
+ UINT32 ProximityDomainRangeLow;
+ UINT32 ProximityDomainRangeHigh;
+ UINT32 MaximumProcessorCapacity;
+ UINT64 MaximumMemoryCapacity;
} EFI_ACPI_5_0_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
///
/// ACPI RAS Feature Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT8 PlatformCommunicationChannelIdentifier[12];
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 PlatformCommunicationChannelIdentifier[12];
} EFI_ACPI_5_0_RAS_FEATURE_TABLE;
///
/// RASF Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_RAS_FEATURE_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_RAS_FEATURE_TABLE_REVISION 0x01
///
/// ACPI RASF Platform Communication Channel Shared Memory Region definition.
///
typedef struct {
- UINT32 Signature;
- UINT16 Command;
- UINT16 Status;
- UINT16 Version;
- UINT8 RASCapabilities[16];
- UINT8 SetRASCapabilities[16];
- UINT16 NumberOfRASFParameterBlocks;
- UINT32 SetRASCapabilitiesStatus;
+ UINT32 Signature;
+ UINT16 Command;
+ UINT16 Status;
+ UINT16 Version;
+ UINT8 RASCapabilities[16];
+ UINT8 SetRASCapabilities[16];
+ UINT16 NumberOfRASFParameterBlocks;
+ UINT32 SetRASCapabilitiesStatus;
} EFI_ACPI_5_0_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
///
@@ -864,52 +859,52 @@
/// ACPI RASF Parameter Block structure for PATROL_SCRUB
///
typedef struct {
- UINT16 Type;
- UINT16 Version;
- UINT16 Length;
- UINT16 PatrolScrubCommand;
- UINT64 RequestedAddressRange[2];
- UINT64 ActualAddressRange[2];
- UINT16 Flags;
- UINT8 RequestedSpeed;
+ UINT16 Type;
+ UINT16 Version;
+ UINT16 Length;
+ UINT16 PatrolScrubCommand;
+ UINT64 RequestedAddressRange[2];
+ UINT64 ActualAddressRange[2];
+ UINT16 Flags;
+ UINT8 RequestedSpeed;
} EFI_ACPI_5_0_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;
///
/// ACPI RASF Patrol Scrub command
///
-#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
-#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
-#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
+#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
+#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
+#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
///
/// Memory Power State Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT8 PlatformCommunicationChannelIdentifier;
- UINT8 Reserved[3];
-// Memory Power Node Structure
-// Memory Power State Characteristics
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 PlatformCommunicationChannelIdentifier;
+ UINT8 Reserved[3];
+ // Memory Power Node Structure
+ // Memory Power State Characteristics
} EFI_ACPI_5_0_MEMORY_POWER_STATUS_TABLE;
///
/// MPST Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_REVISION 0x01
///
/// MPST Platform Communication Channel Shared Memory Region definition.
///
typedef struct {
- UINT32 Signature;
- UINT16 Command;
- UINT16 Status;
- UINT32 MemoryPowerCommandRegister;
- UINT32 MemoryPowerStatusRegister;
- UINT32 PowerStateId;
- UINT32 MemoryPowerNodeId;
- UINT64 MemoryEnergyConsumed;
- UINT64 ExpectedAveragePowerComsuned;
+ UINT32 Signature;
+ UINT16 Command;
+ UINT16 Status;
+ UINT32 MemoryPowerCommandRegister;
+ UINT32 MemoryPowerStatusRegister;
+ UINT32 PowerStateId;
+ UINT32 MemoryPowerNodeId;
+ UINT64 MemoryEnergyConsumed;
+ UINT64 ExpectedAveragePowerComsuned;
} EFI_ACPI_5_0_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
///
@@ -920,188 +915,188 @@
///
/// ACPI MPST Memory Power command
///
-#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
-#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
-#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
-#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
///
/// MPST Memory Power Node Table
///
typedef struct {
- UINT8 PowerStateValue;
- UINT8 PowerStateInformationIndex;
+ UINT8 PowerStateValue;
+ UINT8 PowerStateInformationIndex;
} EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE;
typedef struct {
- UINT8 Flag;
- UINT8 Reserved;
- UINT16 MemoryPowerNodeId;
- UINT32 Length;
- UINT64 AddressBase;
- UINT64 AddressLength;
- UINT32 NumberOfPowerStates;
- UINT32 NumberOfPhysicalComponents;
-//EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
-//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
+ UINT8 Flag;
+ UINT8 Reserved;
+ UINT16 MemoryPowerNodeId;
+ UINT32 Length;
+ UINT64 AddressBase;
+ UINT64 AddressLength;
+ UINT32 NumberOfPowerStates;
+ UINT32 NumberOfPhysicalComponents;
+ // EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
+ // UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
} EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE;
-#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
-#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
-#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
typedef struct {
- UINT16 MemoryPowerNodeCount;
- UINT8 Reserved[2];
+ UINT16 MemoryPowerNodeCount;
+ UINT8 Reserved[2];
} EFI_ACPI_5_0_MPST_MEMORY_POWER_NODE_TABLE;
///
/// MPST Memory Power State Characteristics Table
///
typedef struct {
- UINT8 PowerStateStructureID;
- UINT8 Flag;
- UINT16 Reserved;
- UINT32 AveragePowerConsumedInMPS0;
- UINT32 RelativePowerSavingToMPS0;
- UINT64 ExitLatencyToMPS0;
+ UINT8 PowerStateStructureID;
+ UINT8 Flag;
+ UINT16 Reserved;
+ UINT32 AveragePowerConsumedInMPS0;
+ UINT32 RelativePowerSavingToMPS0;
+ UINT64 ExitLatencyToMPS0;
} EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;
-#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
-#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
-#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
+#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
typedef struct {
- UINT16 MemoryPowerStateCharacteristicsCount;
- UINT8 Reserved[2];
+ UINT16 MemoryPowerStateCharacteristicsCount;
+ UINT8 Reserved[2];
} EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;
///
/// Memory Topology Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 Reserved;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Reserved;
} EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE;
///
/// PMTT Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
///
/// Common Memory Aggregator Device Structure.
///
typedef struct {
- UINT8 Type;
- UINT8 Reserved;
- UINT16 Length;
- UINT16 Flags;
- UINT16 Reserved1;
+ UINT8 Type;
+ UINT8 Reserved;
+ UINT16 Length;
+ UINT16 Flags;
+ UINT16 Reserved1;
} EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
///
/// Memory Aggregator Device Type
///
-#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1
-#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2
-#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3
+#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x0
+#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x1
+#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x2
///
/// Socket Memory Aggregator Device Structure.
///
typedef struct {
- EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
- UINT16 SocketIdentifier;
- UINT16 Reserved;
-//EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
+ EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
+ UINT16 SocketIdentifier;
+ UINT16 Reserved;
+ // EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
} EFI_ACPI_5_0_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
///
/// MemoryController Memory Aggregator Device Structure.
///
typedef struct {
- EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
- UINT32 ReadLatency;
- UINT32 WriteLatency;
- UINT32 ReadBandwidth;
- UINT32 WriteBandwidth;
- UINT16 OptimalAccessUnit;
- UINT16 OptimalAccessAlignment;
- UINT16 Reserved;
- UINT16 NumberOfProximityDomains;
-//UINT32 ProximityDomain[NumberOfProximityDomains];
-//EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
+ EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
+ UINT32 ReadLatency;
+ UINT32 WriteLatency;
+ UINT32 ReadBandwidth;
+ UINT32 WriteBandwidth;
+ UINT16 OptimalAccessUnit;
+ UINT16 OptimalAccessAlignment;
+ UINT16 Reserved;
+ UINT16 NumberOfProximityDomains;
+ // UINT32 ProximityDomain[NumberOfProximityDomains];
+ // EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
} EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
///
/// DIMM Memory Aggregator Device Structure.
///
typedef struct {
- EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
- UINT16 PhysicalComponentIdentifier;
- UINT16 Reserved;
- UINT32 SizeOfDimm;
- UINT32 SmbiosHandle;
+ EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
+ UINT16 PhysicalComponentIdentifier;
+ UINT16 Reserved;
+ UINT32 SizeOfDimm;
+ UINT32 SmbiosHandle;
} EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
///
/// Boot Graphics Resource Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
///
/// 2-bytes (16 bit) version ID. This value must be 1.
///
- UINT16 Version;
+ UINT16 Version;
///
/// 1-byte status field indicating current status about the table.
/// Bits[7:1] = Reserved (must be zero)
/// Bit [0] = Valid. A one indicates the boot image graphic is valid.
///
- UINT8 Status;
+ UINT8 Status;
///
/// 1-byte enumerated type field indicating format of the image.
/// 0 = Bitmap
/// 1 - 255 Reserved (for future use)
///
- UINT8 ImageType;
+ UINT8 ImageType;
///
/// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
/// of the image bitmap.
///
- UINT64 ImageAddress;
+ UINT64 ImageAddress;
///
/// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
/// (X, Y) display offset of the top left corner of the boot image.
/// The top left corner of the display is at offset (0, 0).
///
- UINT32 ImageOffsetX;
+ UINT32 ImageOffsetX;
///
/// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
/// (X, Y) display offset of the top left corner of the boot image.
/// The top left corner of the display is at offset (0, 0).
///
- UINT32 ImageOffsetY;
+ UINT32 ImageOffsetY;
} EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE;
///
/// BGRT Revision
///
-#define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
+#define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
///
/// BGRT Version
///
-#define EFI_ACPI_5_0_BGRT_VERSION 0x01
+#define EFI_ACPI_5_0_BGRT_VERSION 0x01
///
/// BGRT Status
///
-#define EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED 0x00
-#define EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED 0x01
-#define EFI_ACPI_5_0_BGRT_STATUS_INVALID EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED
-#define EFI_ACPI_5_0_BGRT_STATUS_VALID EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED
+#define EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED 0x00
+#define EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED 0x01
+#define EFI_ACPI_5_0_BGRT_STATUS_INVALID EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED
+#define EFI_ACPI_5_0_BGRT_STATUS_VALID EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED
///
/// BGRT Image Type
@@ -1111,26 +1106,26 @@
///
/// FPDT Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
///
/// FPDT Performance Record Types
///
-#define EFI_ACPI_5_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
-#define EFI_ACPI_5_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
+#define EFI_ACPI_5_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
+#define EFI_ACPI_5_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
///
/// FPDT Performance Record Revision
///
-#define EFI_ACPI_5_0_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
-#define EFI_ACPI_5_0_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
+#define EFI_ACPI_5_0_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
+#define EFI_ACPI_5_0_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
///
/// FPDT Runtime Performance Record Types
///
-#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
-#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
-#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
+#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
+#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
+#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
///
/// FPDT Runtime Performance Record Revision
@@ -1143,77 +1138,77 @@
/// FPDT Performance Record header
///
typedef struct {
- UINT16 Type;
- UINT8 Length;
- UINT8 Revision;
+ UINT16 Type;
+ UINT8 Length;
+ UINT8 Revision;
} EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER;
///
/// FPDT Performance Table header
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
+ UINT32 Signature;
+ UINT32 Length;
} EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER;
///
/// FPDT Firmware Basic Boot Performance Pointer Record Structure
///
typedef struct {
- EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
- UINT32 Reserved;
+ EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ UINT32 Reserved;
///
/// 64-bit processor-relative physical address of the Basic Boot Performance Table.
///
- UINT64 BootPerformanceTablePointer;
+ UINT64 BootPerformanceTablePointer;
} EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;
///
/// FPDT S3 Performance Table Pointer Record Structure
///
typedef struct {
- EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
- UINT32 Reserved;
+ EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ UINT32 Reserved;
///
/// 64-bit processor-relative physical address of the S3 Performance Table.
///
- UINT64 S3PerformanceTablePointer;
+ UINT64 S3PerformanceTablePointer;
} EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;
///
/// FPDT Firmware Basic Boot Performance Record Structure
///
typedef struct {
- EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
- UINT32 Reserved;
+ EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ UINT32 Reserved;
///
/// Timer value logged at the beginning of firmware image execution.
/// This may not always be zero or near zero.
///
- UINT64 ResetEnd;
+ UINT64 ResetEnd;
///
/// Timer value logged just prior to loading the OS boot loader into memory.
/// For non-UEFI compatible boots, this field must be zero.
///
- UINT64 OsLoaderLoadImageStart;
+ UINT64 OsLoaderLoadImageStart;
///
/// Timer value logged just prior to launching the previously loaded OS boot loader image.
/// For non-UEFI compatible boots, the timer value logged will be just prior
/// to the INT 19h handler invocation.
///
- UINT64 OsLoaderStartImageStart;
+ UINT64 OsLoaderStartImageStart;
///
/// Timer value logged at the point when the OS loader calls the
/// ExitBootServices function for UEFI compatible firmware.
/// For non-UEFI compatible boots, this field must be zero.
///
- UINT64 ExitBootServicesEntry;
+ UINT64 ExitBootServicesEntry;
///
- /// Timer value logged at the point just prior towhen the OS loader gaining
+ /// Timer value logged at the point just prior to when the OS loader gaining
/// control back from calls the ExitBootServices function for UEFI compatible firmware.
/// For non-UEFI compatible boots, this field must be zero.
///
- UINT64 ExitBootServicesExit;
+ UINT64 ExitBootServicesExit;
} EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_RECORD;
///
@@ -1225,7 +1220,7 @@
// FPDT Firmware Basic Boot Performance Table
//
typedef struct {
- EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
+ EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
//
// one or more Performance Records.
//
@@ -1240,7 +1235,7 @@
// FPDT Firmware S3 Boot Performance Table
//
typedef struct {
- EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
+ EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
//
// one or more Performance Records.
//
@@ -1250,124 +1245,125 @@
/// FPDT Basic S3 Resume Performance Record
///
typedef struct {
- EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
///
/// A count of the number of S3 resume cycles since the last full boot sequence.
///
- UINT32 ResumeCount;
+ UINT32 ResumeCount;
///
/// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
/// OS waking vector. Only the most recent resume cycle's time is retained.
///
- UINT64 FullResume;
+ UINT64 FullResume;
///
/// Average timer value of all resume cycles logged since the last full boot
/// sequence, including the most recent resume. Note that the entire log of
/// timer values does not need to be retained in order to calculate this average.
///
- UINT64 AverageResume;
+ UINT64 AverageResume;
} EFI_ACPI_5_0_FPDT_S3_RESUME_RECORD;
///
/// FPDT Basic S3 Suspend Performance Record
///
typedef struct {
- EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
///
/// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
/// Only the most recent suspend cycle's timer value is retained.
///
- UINT64 SuspendStart;
+ UINT64 SuspendStart;
///
/// Timer value recorded at the final firmware write to SLP_TYP (or other
/// mechanism) used to trigger hardware entry to S3.
/// Only the most recent suspend cycle's timer value is retained.
///
- UINT64 SuspendEnd;
+ UINT64 SuspendEnd;
} EFI_ACPI_5_0_FPDT_S3_SUSPEND_RECORD;
///
/// Firmware Performance Record Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
} EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_RECORD_TABLE;
///
/// Generic Timer Description Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT64 PhysicalAddress;
- UINT32 GlobalFlags;
- UINT32 SecurePL1TimerGSIV;
- UINT32 SecurePL1TimerFlags;
- UINT32 NonSecurePL1TimerGSIV;
- UINT32 NonSecurePL1TimerFlags;
- UINT32 VirtualTimerGSIV;
- UINT32 VirtualTimerFlags;
- UINT32 NonSecurePL2TimerGSIV;
- UINT32 NonSecurePL2TimerFlags;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT64 PhysicalAddress;
+ UINT32 GlobalFlags;
+ UINT32 SecurePL1TimerGSIV;
+ UINT32 SecurePL1TimerFlags;
+ UINT32 NonSecurePL1TimerGSIV;
+ UINT32 NonSecurePL1TimerFlags;
+ UINT32 VirtualTimerGSIV;
+ UINT32 VirtualTimerFlags;
+ UINT32 NonSecurePL2TimerGSIV;
+ UINT32 NonSecurePL2TimerFlags;
} EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE;
///
/// GTDT Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x01
///
/// Global Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT BIT0
-#define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_INTERRUPT_MODE BIT1
+#define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT BIT0
+#define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_INTERRUPT_MODE BIT1
///
/// Timer Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
-#define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
+#define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
+#define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
///
/// Boot Error Record Table (BERT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 BootErrorRegionLength;
- UINT64 BootErrorRegion;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 BootErrorRegionLength;
+ UINT64 BootErrorRegion;
} EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_HEADER;
///
/// BERT Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
///
/// Boot Error Region Block Status Definition
///
typedef struct {
- UINT32 UncorrectableErrorValid:1;
- UINT32 CorrectableErrorValid:1;
- UINT32 MultipleUncorrectableErrors:1;
- UINT32 MultipleCorrectableErrors:1;
- UINT32 ErrorDataEntryCount:10;
- UINT32 Reserved:18;
+ UINT32 UncorrectableErrorValid : 1;
+ UINT32 CorrectableErrorValid : 1;
+ UINT32 MultipleUncorrectableErrors : 1;
+ UINT32 MultipleCorrectableErrors : 1;
+ UINT32 ErrorDataEntryCount : 10;
+ UINT32 Reserved : 18;
} EFI_ACPI_5_0_ERROR_BLOCK_STATUS;
///
/// Boot Error Region Definition
///
typedef struct {
- EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;
- UINT32 RawDataOffset;
- UINT32 RawDataLength;
- UINT32 DataLength;
- UINT32 ErrorSeverity;
+ EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;
+ UINT32 RawDataOffset;
+ UINT32 RawDataLength;
+ UINT32 DataLength;
+ UINT32 ErrorSeverity;
} EFI_ACPI_5_0_BOOT_ERROR_REGION_STRUCTURE;
//
// Boot Error Severity types
//
#define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTABLE 0x00
+#define EFI_ACPI_5_0_ERROR_SEVERITY_RECOVERABLE 0x00
#define EFI_ACPI_5_0_ERROR_SEVERITY_FATAL 0x01
#define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTED 0x02
#define EFI_ACPI_5_0_ERROR_SEVERITY_NONE 0x03
@@ -1376,14 +1372,14 @@
/// Generic Error Data Entry Definition
///
typedef struct {
- UINT8 SectionType[16];
- UINT32 ErrorSeverity;
- UINT16 Revision;
- UINT8 ValidationBits;
- UINT8 Flags;
- UINT32 ErrorDataLength;
- UINT8 FruId[16];
- UINT8 FruText[20];
+ UINT8 SectionType[16];
+ UINT32 ErrorSeverity;
+ UINT16 Revision;
+ UINT8 ValidationBits;
+ UINT8 Flags;
+ UINT32 ErrorDataLength;
+ UINT8 FruId[16];
+ UINT8 FruText[20];
} EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
///
@@ -1395,14 +1391,14 @@
/// HEST - Hardware Error Source Table
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 ErrorSourceCount;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 ErrorSourceCount;
} EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
///
/// HEST Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
//
// Error Source structure types.
@@ -1418,403 +1414,403 @@
//
// Error Source structure flags.
//
-#define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
-#define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
+#define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
+#define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
///
/// IA-32 Architecture Machine Check Exception Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT64 GlobalCapabilityInitData;
- UINT64 GlobalControlInitData;
- UINT8 NumberOfHardwareBanks;
- UINT8 Reserved1[7];
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT64 GlobalCapabilityInitData;
+ UINT64 GlobalControlInitData;
+ UINT8 NumberOfHardwareBanks;
+ UINT8 Reserved1[7];
} EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
///
/// IA-32 Architecture Machine Check Bank Structure Definition
///
typedef struct {
- UINT8 BankNumber;
- UINT8 ClearStatusOnInitialization;
- UINT8 StatusDataFormat;
- UINT8 Reserved0;
- UINT32 ControlRegisterMsrAddress;
- UINT64 ControlInitData;
- UINT32 StatusRegisterMsrAddress;
- UINT32 AddressRegisterMsrAddress;
- UINT32 MiscRegisterMsrAddress;
+ UINT8 BankNumber;
+ UINT8 ClearStatusOnInitialization;
+ UINT8 StatusDataFormat;
+ UINT8 Reserved0;
+ UINT32 ControlRegisterMsrAddress;
+ UINT64 ControlInitData;
+ UINT32 StatusRegisterMsrAddress;
+ UINT32 AddressRegisterMsrAddress;
+ UINT32 MiscRegisterMsrAddress;
} EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
///
/// IA-32 Architecture Machine Check Bank Structure MCA data format
///
-#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
-#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
-#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
+#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
+#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
+#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
//
// Hardware Error Notification types. All other values are reserved
//
-#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
-#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
-#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
-#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
-#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
+#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
+#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
+#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
+#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
+#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
///
/// Hardware Error Notification Configuration Write Enable Structure Definition
///
typedef struct {
- UINT16 Type:1;
- UINT16 PollInterval:1;
- UINT16 SwitchToPollingThresholdValue:1;
- UINT16 SwitchToPollingThresholdWindow:1;
- UINT16 ErrorThresholdValue:1;
- UINT16 ErrorThresholdWindow:1;
- UINT16 Reserved:10;
+ UINT16 Type : 1;
+ UINT16 PollInterval : 1;
+ UINT16 SwitchToPollingThresholdValue : 1;
+ UINT16 SwitchToPollingThresholdWindow : 1;
+ UINT16 ErrorThresholdValue : 1;
+ UINT16 ErrorThresholdWindow : 1;
+ UINT16 Reserved : 10;
} EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
///
/// Hardware Error Notification Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
- UINT32 PollInterval;
- UINT32 Vector;
- UINT32 SwitchToPollingThresholdValue;
- UINT32 SwitchToPollingThresholdWindow;
- UINT32 ErrorThresholdValue;
- UINT32 ErrorThresholdWindow;
+ UINT8 Type;
+ UINT8 Length;
+ EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
+ UINT32 PollInterval;
+ UINT32 Vector;
+ UINT32 SwitchToPollingThresholdValue;
+ UINT32 SwitchToPollingThresholdWindow;
+ UINT32 ErrorThresholdValue;
+ UINT32 ErrorThresholdWindow;
} EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
///
/// IA-32 Architecture Corrected Machine Check Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
- UINT8 NumberOfHardwareBanks;
- UINT8 Reserved1[3];
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
+ UINT8 NumberOfHardwareBanks;
+ UINT8 Reserved1[3];
} EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
///
/// IA-32 Architecture NMI Error Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 MaxRawDataLength;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 MaxRawDataLength;
} EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
///
/// PCI Express Root Port AER Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT16 DeviceControl;
- UINT8 Reserved1[2];
- UINT32 UncorrectableErrorMask;
- UINT32 UncorrectableErrorSeverity;
- UINT32 CorrectableErrorMask;
- UINT32 AdvancedErrorCapabilitiesAndControl;
- UINT32 RootErrorCommand;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT32 RootErrorCommand;
} EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
///
/// PCI Express Device AER Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT16 DeviceControl;
- UINT8 Reserved1[2];
- UINT32 UncorrectableErrorMask;
- UINT32 UncorrectableErrorSeverity;
- UINT32 CorrectableErrorMask;
- UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
} EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
///
/// PCI Express Bridge AER Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT16 DeviceControl;
- UINT8 Reserved1[2];
- UINT32 UncorrectableErrorMask;
- UINT32 UncorrectableErrorSeverity;
- UINT32 CorrectableErrorMask;
- UINT32 AdvancedErrorCapabilitiesAndControl;
- UINT32 SecondaryUncorrectableErrorMask;
- UINT32 SecondaryUncorrectableErrorSeverity;
- UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT32 SecondaryUncorrectableErrorMask;
+ UINT32 SecondaryUncorrectableErrorSeverity;
+ UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
} EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
///
/// Generic Hardware Error Source Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT16 RelatedSourceId;
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 MaxRawDataLength;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
- EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
- UINT32 ErrorStatusBlockLength;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT16 RelatedSourceId;
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 MaxRawDataLength;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
+ EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
+ UINT32 ErrorStatusBlockLength;
} EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
///
/// Generic Error Status Definition
///
typedef struct {
- EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;
- UINT32 RawDataOffset;
- UINT32 RawDataLength;
- UINT32 DataLength;
- UINT32 ErrorSeverity;
+ EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;
+ UINT32 RawDataOffset;
+ UINT32 RawDataLength;
+ UINT32 DataLength;
+ UINT32 ErrorSeverity;
} EFI_ACPI_5_0_GENERIC_ERROR_STATUS_STRUCTURE;
///
/// ERST - Error Record Serialization Table
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 SerializationHeaderSize;
- UINT8 Reserved0[4];
- UINT32 InstructionEntryCount;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 SerializationHeaderSize;
+ UINT8 Reserved0[4];
+ UINT32 InstructionEntryCount;
} EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
///
/// ERST Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
///
/// ERST Serialization Actions
///
-#define EFI_ACPI_5_0_ERST_BEGIN_WRITE_OPERATION 0x00
-#define EFI_ACPI_5_0_ERST_BEGIN_READ_OPERATION 0x01
-#define EFI_ACPI_5_0_ERST_BEGIN_CLEAR_OPERATION 0x02
-#define EFI_ACPI_5_0_ERST_END_OPERATION 0x03
-#define EFI_ACPI_5_0_ERST_SET_RECORD_OFFSET 0x04
-#define EFI_ACPI_5_0_ERST_EXECUTE_OPERATION 0x05
-#define EFI_ACPI_5_0_ERST_CHECK_BUSY_STATUS 0x06
-#define EFI_ACPI_5_0_ERST_GET_COMMAND_STATUS 0x07
-#define EFI_ACPI_5_0_ERST_GET_RECORD_IDENTIFIER 0x08
-#define EFI_ACPI_5_0_ERST_SET_RECORD_IDENTIFIER 0x09
-#define EFI_ACPI_5_0_ERST_GET_RECORD_COUNT 0x0A
-#define EFI_ACPI_5_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
-#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
-#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
-#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
+#define EFI_ACPI_5_0_ERST_BEGIN_WRITE_OPERATION 0x00
+#define EFI_ACPI_5_0_ERST_BEGIN_READ_OPERATION 0x01
+#define EFI_ACPI_5_0_ERST_BEGIN_CLEAR_OPERATION 0x02
+#define EFI_ACPI_5_0_ERST_END_OPERATION 0x03
+#define EFI_ACPI_5_0_ERST_SET_RECORD_OFFSET 0x04
+#define EFI_ACPI_5_0_ERST_EXECUTE_OPERATION 0x05
+#define EFI_ACPI_5_0_ERST_CHECK_BUSY_STATUS 0x06
+#define EFI_ACPI_5_0_ERST_GET_COMMAND_STATUS 0x07
+#define EFI_ACPI_5_0_ERST_GET_RECORD_IDENTIFIER 0x08
+#define EFI_ACPI_5_0_ERST_SET_RECORD_IDENTIFIER 0x09
+#define EFI_ACPI_5_0_ERST_GET_RECORD_COUNT 0x0A
+#define EFI_ACPI_5_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
+#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
+#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
+#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
///
/// ERST Action Command Status
///
-#define EFI_ACPI_5_0_ERST_STATUS_SUCCESS 0x00
-#define EFI_ACPI_5_0_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
-#define EFI_ACPI_5_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
-#define EFI_ACPI_5_0_ERST_STATUS_FAILED 0x03
-#define EFI_ACPI_5_0_ERST_STATUS_RECORD_STORE_EMPTY 0x04
-#define EFI_ACPI_5_0_ERST_STATUS_RECORD_NOT_FOUND 0x05
+#define EFI_ACPI_5_0_ERST_STATUS_SUCCESS 0x00
+#define EFI_ACPI_5_0_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
+#define EFI_ACPI_5_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
+#define EFI_ACPI_5_0_ERST_STATUS_FAILED 0x03
+#define EFI_ACPI_5_0_ERST_STATUS_RECORD_STORE_EMPTY 0x04
+#define EFI_ACPI_5_0_ERST_STATUS_RECORD_NOT_FOUND 0x05
///
/// ERST Serialization Instructions
///
-#define EFI_ACPI_5_0_ERST_READ_REGISTER 0x00
-#define EFI_ACPI_5_0_ERST_READ_REGISTER_VALUE 0x01
-#define EFI_ACPI_5_0_ERST_WRITE_REGISTER 0x02
-#define EFI_ACPI_5_0_ERST_WRITE_REGISTER_VALUE 0x03
-#define EFI_ACPI_5_0_ERST_NOOP 0x04
-#define EFI_ACPI_5_0_ERST_LOAD_VAR1 0x05
-#define EFI_ACPI_5_0_ERST_LOAD_VAR2 0x06
-#define EFI_ACPI_5_0_ERST_STORE_VAR1 0x07
-#define EFI_ACPI_5_0_ERST_ADD 0x08
-#define EFI_ACPI_5_0_ERST_SUBTRACT 0x09
-#define EFI_ACPI_5_0_ERST_ADD_VALUE 0x0A
-#define EFI_ACPI_5_0_ERST_SUBTRACT_VALUE 0x0B
-#define EFI_ACPI_5_0_ERST_STALL 0x0C
-#define EFI_ACPI_5_0_ERST_STALL_WHILE_TRUE 0x0D
-#define EFI_ACPI_5_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
-#define EFI_ACPI_5_0_ERST_GOTO 0x0F
-#define EFI_ACPI_5_0_ERST_SET_SRC_ADDRESS_BASE 0x10
-#define EFI_ACPI_5_0_ERST_SET_DST_ADDRESS_BASE 0x11
-#define EFI_ACPI_5_0_ERST_MOVE_DATA 0x12
+#define EFI_ACPI_5_0_ERST_READ_REGISTER 0x00
+#define EFI_ACPI_5_0_ERST_READ_REGISTER_VALUE 0x01
+#define EFI_ACPI_5_0_ERST_WRITE_REGISTER 0x02
+#define EFI_ACPI_5_0_ERST_WRITE_REGISTER_VALUE 0x03
+#define EFI_ACPI_5_0_ERST_NOOP 0x04
+#define EFI_ACPI_5_0_ERST_LOAD_VAR1 0x05
+#define EFI_ACPI_5_0_ERST_LOAD_VAR2 0x06
+#define EFI_ACPI_5_0_ERST_STORE_VAR1 0x07
+#define EFI_ACPI_5_0_ERST_ADD 0x08
+#define EFI_ACPI_5_0_ERST_SUBTRACT 0x09
+#define EFI_ACPI_5_0_ERST_ADD_VALUE 0x0A
+#define EFI_ACPI_5_0_ERST_SUBTRACT_VALUE 0x0B
+#define EFI_ACPI_5_0_ERST_STALL 0x0C
+#define EFI_ACPI_5_0_ERST_STALL_WHILE_TRUE 0x0D
+#define EFI_ACPI_5_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
+#define EFI_ACPI_5_0_ERST_GOTO 0x0F
+#define EFI_ACPI_5_0_ERST_SET_SRC_ADDRESS_BASE 0x10
+#define EFI_ACPI_5_0_ERST_SET_DST_ADDRESS_BASE 0x11
+#define EFI_ACPI_5_0_ERST_MOVE_DATA 0x12
///
/// ERST Instruction Flags
///
-#define EFI_ACPI_5_0_ERST_PRESERVE_REGISTER 0x01
+#define EFI_ACPI_5_0_ERST_PRESERVE_REGISTER 0x01
///
/// ERST Serialization Instruction Entry
///
typedef struct {
- UINT8 SerializationAction;
- UINT8 Instruction;
- UINT8 Flags;
- UINT8 Reserved0;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
- UINT64 Value;
- UINT64 Mask;
+ UINT8 SerializationAction;
+ UINT8 Instruction;
+ UINT8 Flags;
+ UINT8 Reserved0;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
+ UINT64 Value;
+ UINT64 Mask;
} EFI_ACPI_5_0_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
///
/// EINJ - Error Injection Table
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 InjectionHeaderSize;
- UINT8 InjectionFlags;
- UINT8 Reserved0[3];
- UINT32 InjectionEntryCount;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 InjectionHeaderSize;
+ UINT8 InjectionFlags;
+ UINT8 Reserved0[3];
+ UINT32 InjectionEntryCount;
} EFI_ACPI_5_0_ERROR_INJECTION_TABLE_HEADER;
///
/// EINJ Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_REVISION 0x01
///
/// EINJ Error Injection Actions
///
-#define EFI_ACPI_5_0_EINJ_BEGIN_INJECTION_OPERATION 0x00
-#define EFI_ACPI_5_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
-#define EFI_ACPI_5_0_EINJ_SET_ERROR_TYPE 0x02
-#define EFI_ACPI_5_0_EINJ_GET_ERROR_TYPE 0x03
-#define EFI_ACPI_5_0_EINJ_END_OPERATION 0x04
-#define EFI_ACPI_5_0_EINJ_EXECUTE_OPERATION 0x05
-#define EFI_ACPI_5_0_EINJ_CHECK_BUSY_STATUS 0x06
-#define EFI_ACPI_5_0_EINJ_GET_COMMAND_STATUS 0x07
-#define EFI_ACPI_5_0_EINJ_TRIGGER_ERROR 0xFF
+#define EFI_ACPI_5_0_EINJ_BEGIN_INJECTION_OPERATION 0x00
+#define EFI_ACPI_5_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
+#define EFI_ACPI_5_0_EINJ_SET_ERROR_TYPE 0x02
+#define EFI_ACPI_5_0_EINJ_GET_ERROR_TYPE 0x03
+#define EFI_ACPI_5_0_EINJ_END_OPERATION 0x04
+#define EFI_ACPI_5_0_EINJ_EXECUTE_OPERATION 0x05
+#define EFI_ACPI_5_0_EINJ_CHECK_BUSY_STATUS 0x06
+#define EFI_ACPI_5_0_EINJ_GET_COMMAND_STATUS 0x07
+#define EFI_ACPI_5_0_EINJ_TRIGGER_ERROR 0xFF
///
/// EINJ Action Command Status
///
-#define EFI_ACPI_5_0_EINJ_STATUS_SUCCESS 0x00
-#define EFI_ACPI_5_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01
-#define EFI_ACPI_5_0_EINJ_STATUS_INVALID_ACCESS 0x02
+#define EFI_ACPI_5_0_EINJ_STATUS_SUCCESS 0x00
+#define EFI_ACPI_5_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01
+#define EFI_ACPI_5_0_EINJ_STATUS_INVALID_ACCESS 0x02
///
/// EINJ Error Type Definition
///
-#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
-#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
-#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
-#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
-#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
-#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
-#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
-#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
-#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
-#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
-#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
-#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
+#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
+#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
+#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
+#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
+#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
+#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
+#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
+#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
+#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
+#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
+#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
+#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
///
/// EINJ Injection Instructions
///
-#define EFI_ACPI_5_0_EINJ_READ_REGISTER 0x00
-#define EFI_ACPI_5_0_EINJ_READ_REGISTER_VALUE 0x01
-#define EFI_ACPI_5_0_EINJ_WRITE_REGISTER 0x02
-#define EFI_ACPI_5_0_EINJ_WRITE_REGISTER_VALUE 0x03
-#define EFI_ACPI_5_0_EINJ_NOOP 0x04
+#define EFI_ACPI_5_0_EINJ_READ_REGISTER 0x00
+#define EFI_ACPI_5_0_EINJ_READ_REGISTER_VALUE 0x01
+#define EFI_ACPI_5_0_EINJ_WRITE_REGISTER 0x02
+#define EFI_ACPI_5_0_EINJ_WRITE_REGISTER_VALUE 0x03
+#define EFI_ACPI_5_0_EINJ_NOOP 0x04
///
/// EINJ Instruction Flags
///
-#define EFI_ACPI_5_0_EINJ_PRESERVE_REGISTER 0x01
+#define EFI_ACPI_5_0_EINJ_PRESERVE_REGISTER 0x01
///
/// EINJ Injection Instruction Entry
///
typedef struct {
- UINT8 InjectionAction;
- UINT8 Instruction;
- UINT8 Flags;
- UINT8 Reserved0;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
- UINT64 Value;
- UINT64 Mask;
+ UINT8 InjectionAction;
+ UINT8 Instruction;
+ UINT8 Flags;
+ UINT8 Reserved0;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
+ UINT64 Value;
+ UINT64 Mask;
} EFI_ACPI_5_0_EINJ_INJECTION_INSTRUCTION_ENTRY;
///
/// EINJ Trigger Action Table
///
typedef struct {
- UINT32 HeaderSize;
- UINT32 Revision;
- UINT32 TableSize;
- UINT32 EntryCount;
+ UINT32 HeaderSize;
+ UINT32 Revision;
+ UINT32 TableSize;
+ UINT32 EntryCount;
} EFI_ACPI_5_0_EINJ_TRIGGER_ACTION_TABLE;
///
/// Platform Communications Channel Table (PCCT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 Flags;
- UINT64 Reserved;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Flags;
+ UINT64 Reserved;
} EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;
///
/// PCCT Version (as defined in ACPI 5.0 spec.)
///
-#define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
+#define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
///
/// PCCT Global Flags
///
-#define EFI_ACPI_5_0_PCCT_FLAGS_SCI_DOORBELL BIT0
+#define EFI_ACPI_5_0_PCCT_FLAGS_SCI_DOORBELL BIT0
//
// PCCT Subspace type
@@ -1825,25 +1821,25 @@
/// PCC Subspace Structure Header
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
+ UINT8 Type;
+ UINT8 Length;
} EFI_ACPI_5_0_PCCT_SUBSPACE_HEADER;
///
/// Generic Communications Subspace Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Reserved[6];
- UINT64 BaseAddress;
- UINT64 AddressLength;
- EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
- UINT64 DoorbellPreserve;
- UINT64 DoorbellWrite;
- UINT32 NominalLatency;
- UINT32 MaximumPeriodicAccessRate;
- UINT16 MinimumRequestTurnaroundTime;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved[6];
+ UINT64 BaseAddress;
+ UINT64 AddressLength;
+ EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
+ UINT64 DoorbellPreserve;
+ UINT64 DoorbellWrite;
+ UINT32 NominalLatency;
+ UINT32 MaximumPeriodicAccessRate;
+ UINT16 MinimumRequestTurnaroundTime;
} EFI_ACPI_5_0_PCCT_SUBSPACE_GENERIC;
///
@@ -1851,18 +1847,18 @@
///
typedef struct {
- UINT8 Command;
- UINT8 Reserved:7;
- UINT8 GenerateSci:1;
+ UINT8 Command;
+ UINT8 Reserved : 7;
+ UINT8 GenerateSci : 1;
} EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;
typedef struct {
- UINT8 CommandComplete:1;
- UINT8 SciDoorbell:1;
- UINT8 Error:1;
- UINT8 PlatformNotification:1;
- UINT8 Reserved:4;
- UINT8 Reserved1;
+ UINT8 CommandComplete : 1;
+ UINT8 SciDoorbell : 1;
+ UINT8 Error : 1;
+ UINT8 PlatformNotification : 1;
+ UINT8 Reserved : 4;
+ UINT8 Reserved1;
} EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;
typedef struct {
@@ -2066,12 +2062,17 @@
#define EFI_ACPI_5_0_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')
///
+/// "PCCT" Platform Communications Channel Table
+///
+#define EFI_ACPI_5_0_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T')
+
+///
/// "SLIC" MS Software Licensing Table Specification
///
#define EFI_ACPI_5_0_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')
///
-/// "SPCR" Serial Port Concole Redirection Table
+/// "SPCR" Serial Port Console Redirection Table
///
#define EFI_ACPI_5_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
@@ -2099,7 +2100,7 @@
/// "WAET" Windows ACPI Emulated Devices Table
///
#define EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')
-#define EFI_ACPI_5_0_WINDOWS_ACPI_ENLIGHTENMENT_TABLE_SIGNATURE EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE
+#define EFI_ACPI_5_0_WINDOWS_ACPI_ENLIGHTENMENT_TABLE_SIGNATURE EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE
///
/// "WDAT" Watchdog Action Table
diff --git a/src/include/ipxe/efi/IndustryStandard/Acpi51.h b/src/include/ipxe/efi/IndustryStandard/Acpi51.h
index 1ca114c..49bb972 100644
--- a/src/include/ipxe/efi/IndustryStandard/Acpi51.h
+++ b/src/include/ipxe/efi/IndustryStandard/Acpi51.h
@@ -2,21 +2,16 @@
ACPI 5.1 definitions from the ACPI Specification Revision 5.1 Errata B January, 2016.
Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR>
- Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
(C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2020, ARM Ltd. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _ACPI_5_1_H_
#define _ACPI_5_1_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/IndustryStandard/Acpi50.h>
@@ -29,21 +24,21 @@
/// ACPI 5.1 Generic Address Space definition
///
typedef struct {
- UINT8 AddressSpaceId;
- UINT8 RegisterBitWidth;
- UINT8 RegisterBitOffset;
- UINT8 AccessSize;
- UINT64 Address;
+ UINT8 AddressSpaceId;
+ UINT8 RegisterBitWidth;
+ UINT8 RegisterBitOffset;
+ UINT8 AccessSize;
+ UINT64 Address;
} EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE;
//
// Generic Address Space Address IDs
//
-#define EFI_ACPI_5_1_SYSTEM_MEMORY 0
-#define EFI_ACPI_5_1_SYSTEM_IO 1
-#define EFI_ACPI_5_1_PCI_CONFIGURATION_SPACE 2
-#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER 3
-#define EFI_ACPI_5_1_SMBUS 4
+#define EFI_ACPI_5_1_SYSTEM_MEMORY 0
+#define EFI_ACPI_5_1_SYSTEM_IO 1
+#define EFI_ACPI_5_1_PCI_CONFIGURATION_SPACE 2
+#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER 3
+#define EFI_ACPI_5_1_SMBUS 4
#define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL 0x0A
#define EFI_ACPI_5_1_FUNCTIONAL_FIXED_HARDWARE 0x7F
@@ -64,29 +59,29 @@
/// Root System Description Pointer Structure
///
typedef struct {
- UINT64 Signature;
- UINT8 Checksum;
- UINT8 OemId[6];
- UINT8 Revision;
- UINT32 RsdtAddress;
- UINT32 Length;
- UINT64 XsdtAddress;
- UINT8 ExtendedChecksum;
- UINT8 Reserved[3];
+ UINT64 Signature;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT8 Revision;
+ UINT32 RsdtAddress;
+ UINT32 Length;
+ UINT64 XsdtAddress;
+ UINT8 ExtendedChecksum;
+ UINT8 Reserved[3];
} EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER;
///
/// RSD_PTR Revision (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.1) says current value is 2
+#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.1) says current value is 2
///
/// Common table header, this prefaces all ACPI tables, including FACS, but
/// excluding the RSD PTR structure
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
+ UINT32 Signature;
+ UINT32 Length;
} EFI_ACPI_5_1_COMMON_HEADER;
//
@@ -98,7 +93,7 @@
///
/// RSDT Revision (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
//
// Extended System Description Table
@@ -109,73 +104,73 @@
///
/// XSDT Revision (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
///
/// Fixed ACPI Description Table Structure (FADT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 FirmwareCtrl;
- UINT32 Dsdt;
- UINT8 Reserved0;
- UINT8 PreferredPmProfile;
- UINT16 SciInt;
- UINT32 SmiCmd;
- UINT8 AcpiEnable;
- UINT8 AcpiDisable;
- UINT8 S4BiosReq;
- UINT8 PstateCnt;
- UINT32 Pm1aEvtBlk;
- UINT32 Pm1bEvtBlk;
- UINT32 Pm1aCntBlk;
- UINT32 Pm1bCntBlk;
- UINT32 Pm2CntBlk;
- UINT32 PmTmrBlk;
- UINT32 Gpe0Blk;
- UINT32 Gpe1Blk;
- UINT8 Pm1EvtLen;
- UINT8 Pm1CntLen;
- UINT8 Pm2CntLen;
- UINT8 PmTmrLen;
- UINT8 Gpe0BlkLen;
- UINT8 Gpe1BlkLen;
- UINT8 Gpe1Base;
- UINT8 CstCnt;
- UINT16 PLvl2Lat;
- UINT16 PLvl3Lat;
- UINT16 FlushSize;
- UINT16 FlushStride;
- UINT8 DutyOffset;
- UINT8 DutyWidth;
- UINT8 DayAlrm;
- UINT8 MonAlrm;
- UINT8 Century;
- UINT16 IaPcBootArch;
- UINT8 Reserved1;
- UINT32 Flags;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ResetReg;
- UINT8 ResetValue;
- UINT16 ArmBootArch;
- UINT8 MinorVersion;
- UINT64 XFirmwareCtrl;
- UINT64 XDsdt;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 FirmwareCtrl;
+ UINT32 Dsdt;
+ UINT8 Reserved0;
+ UINT8 PreferredPmProfile;
+ UINT16 SciInt;
+ UINT32 SmiCmd;
+ UINT8 AcpiEnable;
+ UINT8 AcpiDisable;
+ UINT8 S4BiosReq;
+ UINT8 PstateCnt;
+ UINT32 Pm1aEvtBlk;
+ UINT32 Pm1bEvtBlk;
+ UINT32 Pm1aCntBlk;
+ UINT32 Pm1bCntBlk;
+ UINT32 Pm2CntBlk;
+ UINT32 PmTmrBlk;
+ UINT32 Gpe0Blk;
+ UINT32 Gpe1Blk;
+ UINT8 Pm1EvtLen;
+ UINT8 Pm1CntLen;
+ UINT8 Pm2CntLen;
+ UINT8 PmTmrLen;
+ UINT8 Gpe0BlkLen;
+ UINT8 Gpe1BlkLen;
+ UINT8 Gpe1Base;
+ UINT8 CstCnt;
+ UINT16 PLvl2Lat;
+ UINT16 PLvl3Lat;
+ UINT16 FlushSize;
+ UINT16 FlushStride;
+ UINT8 DutyOffset;
+ UINT8 DutyWidth;
+ UINT8 DayAlrm;
+ UINT8 MonAlrm;
+ UINT8 Century;
+ UINT16 IaPcBootArch;
+ UINT8 Reserved1;
+ UINT32 Flags;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ResetReg;
+ UINT8 ResetValue;
+ UINT16 ArmBootArch;
+ UINT8 MinorVersion;
+ UINT64 XFirmwareCtrl;
+ UINT64 XDsdt;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
} EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE;
///
/// FADT Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05
+#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05
#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x01
//
@@ -195,62 +190,62 @@
// Fixed ACPI Description Table Boot Architecture Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_5_1_LEGACY_DEVICES BIT0
-#define EFI_ACPI_5_1_8042 BIT1
-#define EFI_ACPI_5_1_VGA_NOT_PRESENT BIT2
-#define EFI_ACPI_5_1_MSI_NOT_SUPPORTED BIT3
-#define EFI_ACPI_5_1_PCIE_ASPM_CONTROLS BIT4
-#define EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT BIT5
+#define EFI_ACPI_5_1_LEGACY_DEVICES BIT0
+#define EFI_ACPI_5_1_8042 BIT1
+#define EFI_ACPI_5_1_VGA_NOT_PRESENT BIT2
+#define EFI_ACPI_5_1_MSI_NOT_SUPPORTED BIT3
+#define EFI_ACPI_5_1_PCIE_ASPM_CONTROLS BIT4
+#define EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT BIT5
//
// Fixed ACPI Description Table Arm Boot Architecture Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_5_1_ARM_PSCI_COMPLIANT BIT0
-#define EFI_ACPI_5_1_ARM_PSCI_USE_HVC BIT1
+#define EFI_ACPI_5_1_ARM_PSCI_COMPLIANT BIT0
+#define EFI_ACPI_5_1_ARM_PSCI_USE_HVC BIT1
//
// Fixed ACPI Description Table Fixed Feature Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_5_1_WBINVD BIT0
-#define EFI_ACPI_5_1_WBINVD_FLUSH BIT1
-#define EFI_ACPI_5_1_PROC_C1 BIT2
-#define EFI_ACPI_5_1_P_LVL2_UP BIT3
-#define EFI_ACPI_5_1_PWR_BUTTON BIT4
-#define EFI_ACPI_5_1_SLP_BUTTON BIT5
-#define EFI_ACPI_5_1_FIX_RTC BIT6
-#define EFI_ACPI_5_1_RTC_S4 BIT7
-#define EFI_ACPI_5_1_TMR_VAL_EXT BIT8
-#define EFI_ACPI_5_1_DCK_CAP BIT9
-#define EFI_ACPI_5_1_RESET_REG_SUP BIT10
-#define EFI_ACPI_5_1_SEALED_CASE BIT11
-#define EFI_ACPI_5_1_HEADLESS BIT12
-#define EFI_ACPI_5_1_CPU_SW_SLP BIT13
-#define EFI_ACPI_5_1_PCI_EXP_WAK BIT14
-#define EFI_ACPI_5_1_USE_PLATFORM_CLOCK BIT15
-#define EFI_ACPI_5_1_S4_RTC_STS_VALID BIT16
-#define EFI_ACPI_5_1_REMOTE_POWER_ON_CAPABLE BIT17
-#define EFI_ACPI_5_1_FORCE_APIC_CLUSTER_MODEL BIT18
-#define EFI_ACPI_5_1_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
-#define EFI_ACPI_5_1_HW_REDUCED_ACPI BIT20
-#define EFI_ACPI_5_1_LOW_POWER_S0_IDLE_CAPABLE BIT21
+#define EFI_ACPI_5_1_WBINVD BIT0
+#define EFI_ACPI_5_1_WBINVD_FLUSH BIT1
+#define EFI_ACPI_5_1_PROC_C1 BIT2
+#define EFI_ACPI_5_1_P_LVL2_UP BIT3
+#define EFI_ACPI_5_1_PWR_BUTTON BIT4
+#define EFI_ACPI_5_1_SLP_BUTTON BIT5
+#define EFI_ACPI_5_1_FIX_RTC BIT6
+#define EFI_ACPI_5_1_RTC_S4 BIT7
+#define EFI_ACPI_5_1_TMR_VAL_EXT BIT8
+#define EFI_ACPI_5_1_DCK_CAP BIT9
+#define EFI_ACPI_5_1_RESET_REG_SUP BIT10
+#define EFI_ACPI_5_1_SEALED_CASE BIT11
+#define EFI_ACPI_5_1_HEADLESS BIT12
+#define EFI_ACPI_5_1_CPU_SW_SLP BIT13
+#define EFI_ACPI_5_1_PCI_EXP_WAK BIT14
+#define EFI_ACPI_5_1_USE_PLATFORM_CLOCK BIT15
+#define EFI_ACPI_5_1_S4_RTC_STS_VALID BIT16
+#define EFI_ACPI_5_1_REMOTE_POWER_ON_CAPABLE BIT17
+#define EFI_ACPI_5_1_FORCE_APIC_CLUSTER_MODEL BIT18
+#define EFI_ACPI_5_1_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
+#define EFI_ACPI_5_1_HW_REDUCED_ACPI BIT20
+#define EFI_ACPI_5_1_LOW_POWER_S0_IDLE_CAPABLE BIT21
///
/// Firmware ACPI Control Structure
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
- UINT32 HardwareSignature;
- UINT32 FirmwareWakingVector;
- UINT32 GlobalLock;
- UINT32 Flags;
- UINT64 XFirmwareWakingVector;
- UINT8 Version;
- UINT8 Reserved0[3];
- UINT32 OspmFlags;
- UINT8 Reserved1[24];
+ UINT32 Signature;
+ UINT32 Length;
+ UINT32 HardwareSignature;
+ UINT32 FirmwareWakingVector;
+ UINT32 GlobalLock;
+ UINT32 Flags;
+ UINT64 XFirmwareWakingVector;
+ UINT8 Version;
+ UINT8 Reserved0[3];
+ UINT32 OspmFlags;
+ UINT8 Reserved1[24];
} EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE;
///
@@ -262,14 +257,14 @@
/// Firmware Control Structure Feature Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_5_1_S4BIOS_F BIT0
-#define EFI_ACPI_5_1_64BIT_WAKE_SUPPORTED_F BIT1
+#define EFI_ACPI_5_1_S4BIOS_F BIT0
+#define EFI_ACPI_5_1_64BIT_WAKE_SUPPORTED_F BIT1
///
/// OSPM Enabled Firmware Control Structure Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_5_1_OSPM_64BIT_WAKE_F BIT0
+#define EFI_ACPI_5_1_OSPM_64BIT_WAKE_F BIT0
//
// Differentiated System Description Table,
@@ -278,29 +273,29 @@
// no definition needed as they are common description table header, the same with
// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
//
-#define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
-#define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
///
/// Multiple APIC Description Table header definition. The rest of the table
/// must be defined in a platform specific manner.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 LocalApicAddress;
- UINT32 Flags;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 LocalApicAddress;
+ UINT32 Flags;
} EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
///
/// MADT Revision (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
+#define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
///
/// Multiple APIC Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_5_1_PCAT_COMPAT BIT0
+#define EFI_ACPI_5_1_PCAT_COMPAT BIT0
//
// Multiple APIC Description Table APIC structure types
@@ -331,57 +326,57 @@
/// Processor Local APIC Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT8 ApicId;
- UINT32 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 ApicId;
+ UINT32 Flags;
} EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_STRUCTURE;
///
/// Local APIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_1_LOCAL_APIC_ENABLED BIT0
+#define EFI_ACPI_5_1_LOCAL_APIC_ENABLED BIT0
///
/// IO APIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 IoApicAddress;
- UINT32 GlobalSystemInterruptBase;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 IoApicAddress;
+ UINT32 GlobalSystemInterruptBase;
} EFI_ACPI_5_1_IO_APIC_STRUCTURE;
///
/// Interrupt Source Override Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Bus;
- UINT8 Source;
- UINT32 GlobalSystemInterrupt;
- UINT16 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Bus;
+ UINT8 Source;
+ UINT32 GlobalSystemInterrupt;
+ UINT16 Flags;
} EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
///
/// Platform Interrupt Sources Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT8 InterruptType;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT8 IoSapicVector;
- UINT32 GlobalSystemInterrupt;
- UINT32 PlatformInterruptSourceFlags;
- UINT8 CpeiProcessorOverride;
- UINT8 Reserved[31];
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
+ UINT8 CpeiProcessorOverride;
+ UINT8 Reserved[31];
} EFI_ACPI_5_1_PLATFORM_INTERRUPT_APIC_STRUCTURE;
//
@@ -395,43 +390,43 @@
/// Non-Maskable Interrupt Source Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT32 GlobalSystemInterrupt;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 GlobalSystemInterrupt;
} EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
///
/// Local APIC NMI Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT16 Flags;
- UINT8 LocalApicLint;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT16 Flags;
+ UINT8 LocalApicLint;
} EFI_ACPI_5_1_LOCAL_APIC_NMI_STRUCTURE;
///
/// Local APIC Address Override Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved;
- UINT64 LocalApicAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT64 LocalApicAddress;
} EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
///
/// IO SAPIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 GlobalSystemInterruptBase;
- UINT64 IoSapicAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 GlobalSystemInterruptBase;
+ UINT64 IoSapicAddress;
} EFI_ACPI_5_1_IO_SAPIC_STRUCTURE;
///
@@ -439,155 +434,155 @@
/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT8 LocalSapicId;
- UINT8 LocalSapicEid;
- UINT8 Reserved[3];
- UINT32 Flags;
- UINT32 ACPIProcessorUIDValue;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 LocalSapicId;
+ UINT8 LocalSapicEid;
+ UINT8 Reserved[3];
+ UINT32 Flags;
+ UINT32 ACPIProcessorUIDValue;
} EFI_ACPI_5_1_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
///
/// Platform Interrupt Sources Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT8 InterruptType;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT8 IoSapicVector;
- UINT32 GlobalSystemInterrupt;
- UINT32 PlatformInterruptSourceFlags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
} EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
///
/// Platform Interrupt Source Flags.
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_5_1_CPEI_PROCESSOR_OVERRIDE BIT0
+#define EFI_ACPI_5_1_CPEI_PROCESSOR_OVERRIDE BIT0
///
/// Processor Local x2APIC Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Reserved[2];
- UINT32 X2ApicId;
- UINT32 Flags;
- UINT32 AcpiProcessorUid;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved[2];
+ UINT32 X2ApicId;
+ UINT32 Flags;
+ UINT32 AcpiProcessorUid;
} EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
///
/// Local x2APIC NMI Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT32 AcpiProcessorUid;
- UINT8 LocalX2ApicLint;
- UINT8 Reserved[3];
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 AcpiProcessorUid;
+ UINT8 LocalX2ApicLint;
+ UINT8 Reserved[3];
} EFI_ACPI_5_1_LOCAL_X2APIC_NMI_STRUCTURE;
///
/// GIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved;
- UINT32 CPUInterfaceNumber;
- UINT32 AcpiProcessorUid;
- UINT32 Flags;
- UINT32 ParkingProtocolVersion;
- UINT32 PerformanceInterruptGsiv;
- UINT64 ParkedAddress;
- UINT64 PhysicalBaseAddress;
- UINT64 GICV;
- UINT64 GICH;
- UINT32 VGICMaintenanceInterrupt;
- UINT64 GICRBaseAddress;
- UINT64 MPIDR;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT32 CPUInterfaceNumber;
+ UINT32 AcpiProcessorUid;
+ UINT32 Flags;
+ UINT32 ParkingProtocolVersion;
+ UINT32 PerformanceInterruptGsiv;
+ UINT64 ParkedAddress;
+ UINT64 PhysicalBaseAddress;
+ UINT64 GICV;
+ UINT64 GICH;
+ UINT32 VGICMaintenanceInterrupt;
+ UINT64 GICRBaseAddress;
+ UINT64 MPIDR;
} EFI_ACPI_5_1_GIC_STRUCTURE;
///
/// GIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_1_GIC_ENABLED BIT0
-#define EFI_ACPI_5_1_PERFORMANCE_INTERRUPT_MODEL BIT1
-#define EFI_ACPI_5_1_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2
+#define EFI_ACPI_5_1_GIC_ENABLED BIT0
+#define EFI_ACPI_5_1_PERFORMANCE_INTERRUPT_MODEL BIT1
+#define EFI_ACPI_5_1_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2
///
/// GIC Distributor Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved1;
- UINT32 GicId;
- UINT64 PhysicalBaseAddress;
- UINT32 SystemVectorBase;
- UINT8 GicVersion;
- UINT8 Reserved2[3];
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved1;
+ UINT32 GicId;
+ UINT64 PhysicalBaseAddress;
+ UINT32 SystemVectorBase;
+ UINT8 GicVersion;
+ UINT8 Reserved2[3];
} EFI_ACPI_5_1_GIC_DISTRIBUTOR_STRUCTURE;
///
/// GIC Version
///
-#define EFI_ACPI_5_1_GIC_V1 0x01
-#define EFI_ACPI_5_1_GIC_V2 0x02
-#define EFI_ACPI_5_1_GIC_V3 0x03
-#define EFI_ACPI_5_1_GIC_V4 0x04
+#define EFI_ACPI_5_1_GIC_V1 0x01
+#define EFI_ACPI_5_1_GIC_V2 0x02
+#define EFI_ACPI_5_1_GIC_V3 0x03
+#define EFI_ACPI_5_1_GIC_V4 0x04
///
/// GIC MSI Frame Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved1;
- UINT32 GicMsiFrameId;
- UINT64 PhysicalBaseAddress;
- UINT32 Flags;
- UINT16 SPICount;
- UINT16 SPIBase;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved1;
+ UINT32 GicMsiFrameId;
+ UINT64 PhysicalBaseAddress;
+ UINT32 Flags;
+ UINT16 SPICount;
+ UINT16 SPIBase;
} EFI_ACPI_5_1_GIC_MSI_FRAME_STRUCTURE;
///
/// GIC MSI Frame Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_1_SPI_COUNT_BASE_SELECT BIT0
+#define EFI_ACPI_5_1_SPI_COUNT_BASE_SELECT BIT0
///
/// GICR Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved;
- UINT64 DiscoveryRangeBaseAddress;
- UINT32 DiscoveryRangeLength;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT64 DiscoveryRangeBaseAddress;
+ UINT32 DiscoveryRangeLength;
} EFI_ACPI_5_1_GICR_STRUCTURE;
///
/// Smart Battery Description Table (SBST)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 WarningEnergyLevel;
- UINT32 LowEnergyLevel;
- UINT32 CriticalEnergyLevel;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 WarningEnergyLevel;
+ UINT32 LowEnergyLevel;
+ UINT32 CriticalEnergyLevel;
} EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE;
///
/// SBST Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
///
/// Embedded Controller Boot Resources Table (ECDT)
@@ -595,11 +590,11 @@
/// a fully qualified reference to the name space object.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcControl;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcData;
- UINT32 Uid;
- UINT8 GpeBit;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcControl;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcData;
+ UINT32 Uid;
+ UINT8 GpeBit;
} EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
///
@@ -612,9 +607,9 @@
/// must be defined in a platform specific manner.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 Reserved1; ///< Must be set to 1
- UINT64 Reserved2;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Reserved1; ///< Must be set to 1
+ UINT64 Reserved2;
} EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
///
@@ -636,83 +631,83 @@
/// Processor Local APIC/SAPIC Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 ProximityDomain7To0;
- UINT8 ApicId;
- UINT32 Flags;
- UINT8 LocalSapicEid;
- UINT8 ProximityDomain31To8[3];
- UINT32 ClockDomain;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProximityDomain7To0;
+ UINT8 ApicId;
+ UINT32 Flags;
+ UINT8 LocalSapicEid;
+ UINT8 ProximityDomain31To8[3];
+ UINT32 ClockDomain;
} EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
///
/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
+#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
///
/// Memory Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT32 ProximityDomain;
- UINT16 Reserved1;
- UINT32 AddressBaseLow;
- UINT32 AddressBaseHigh;
- UINT32 LengthLow;
- UINT32 LengthHigh;
- UINT32 Reserved2;
- UINT32 Flags;
- UINT64 Reserved3;
+ UINT8 Type;
+ UINT8 Length;
+ UINT32 ProximityDomain;
+ UINT16 Reserved1;
+ UINT32 AddressBaseLow;
+ UINT32 AddressBaseHigh;
+ UINT32 LengthLow;
+ UINT32 LengthHigh;
+ UINT32 Reserved2;
+ UINT32 Flags;
+ UINT64 Reserved3;
} EFI_ACPI_5_1_MEMORY_AFFINITY_STRUCTURE;
//
// Memory Flags. All other bits are reserved and must be 0.
//
-#define EFI_ACPI_5_1_MEMORY_ENABLED (1 << 0)
-#define EFI_ACPI_5_1_MEMORY_HOT_PLUGGABLE (1 << 1)
-#define EFI_ACPI_5_1_MEMORY_NONVOLATILE (1 << 2)
+#define EFI_ACPI_5_1_MEMORY_ENABLED (1 << 0)
+#define EFI_ACPI_5_1_MEMORY_HOT_PLUGGABLE (1 << 1)
+#define EFI_ACPI_5_1_MEMORY_NONVOLATILE (1 << 2)
///
/// Processor Local x2APIC Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Reserved1[2];
- UINT32 ProximityDomain;
- UINT32 X2ApicId;
- UINT32 Flags;
- UINT32 ClockDomain;
- UINT8 Reserved2[4];
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved1[2];
+ UINT32 ProximityDomain;
+ UINT32 X2ApicId;
+ UINT32 Flags;
+ UINT32 ClockDomain;
+ UINT8 Reserved2[4];
} EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
///
/// GICC Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT32 ProximityDomain;
- UINT32 AcpiProcessorUid;
- UINT32 Flags;
- UINT32 ClockDomain;
+ UINT8 Type;
+ UINT8 Length;
+ UINT32 ProximityDomain;
+ UINT32 AcpiProcessorUid;
+ UINT32 Flags;
+ UINT32 ClockDomain;
} EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE;
///
/// GICC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_1_GICC_ENABLED (1 << 0)
+#define EFI_ACPI_5_1_GICC_ENABLED (1 << 0)
///
/// System Locality Distance Information Table (SLIT).
/// The rest of the table is a matrix.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT64 NumberOfSystemLocalities;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT64 NumberOfSystemLocalities;
} EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
///
@@ -724,14 +719,14 @@
/// Corrected Platform Error Polling Table (CPEP)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT8 Reserved[8];
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 Reserved[8];
} EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
///
/// CPEP Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
//
// CPEP processor structure types.
@@ -742,66 +737,66 @@
/// Corrected Platform Error Polling Processor Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT32 PollingInterval;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT32 PollingInterval;
} EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
///
/// Maximum System Characteristics Table (MSCT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 OffsetProxDomInfo;
- UINT32 MaximumNumberOfProximityDomains;
- UINT32 MaximumNumberOfClockDomains;
- UINT64 MaximumPhysicalAddress;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 OffsetProxDomInfo;
+ UINT32 MaximumNumberOfProximityDomains;
+ UINT32 MaximumNumberOfClockDomains;
+ UINT64 MaximumPhysicalAddress;
} EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
///
/// MSCT Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
///
/// Maximum Proximity Domain Information Structure Definition
///
typedef struct {
- UINT8 Revision;
- UINT8 Length;
- UINT32 ProximityDomainRangeLow;
- UINT32 ProximityDomainRangeHigh;
- UINT32 MaximumProcessorCapacity;
- UINT64 MaximumMemoryCapacity;
+ UINT8 Revision;
+ UINT8 Length;
+ UINT32 ProximityDomainRangeLow;
+ UINT32 ProximityDomainRangeHigh;
+ UINT32 MaximumProcessorCapacity;
+ UINT64 MaximumMemoryCapacity;
} EFI_ACPI_5_1_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
///
/// ACPI RAS Feature Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT8 PlatformCommunicationChannelIdentifier[12];
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 PlatformCommunicationChannelIdentifier[12];
} EFI_ACPI_5_1_RAS_FEATURE_TABLE;
///
/// RASF Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_RAS_FEATURE_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_RAS_FEATURE_TABLE_REVISION 0x01
///
/// ACPI RASF Platform Communication Channel Shared Memory Region definition.
///
typedef struct {
- UINT32 Signature;
- UINT16 Command;
- UINT16 Status;
- UINT16 Version;
- UINT8 RASCapabilities[16];
- UINT8 SetRASCapabilities[16];
- UINT16 NumberOfRASFParameterBlocks;
- UINT32 SetRASCapabilitiesStatus;
+ UINT32 Signature;
+ UINT16 Command;
+ UINT16 Status;
+ UINT16 Version;
+ UINT8 RASCapabilities[16];
+ UINT8 SetRASCapabilities[16];
+ UINT16 NumberOfRASFParameterBlocks;
+ UINT32 SetRASCapabilitiesStatus;
} EFI_ACPI_5_1_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
///
@@ -819,52 +814,52 @@
/// ACPI RASF Parameter Block structure for PATROL_SCRUB
///
typedef struct {
- UINT16 Type;
- UINT16 Version;
- UINT16 Length;
- UINT16 PatrolScrubCommand;
- UINT64 RequestedAddressRange[2];
- UINT64 ActualAddressRange[2];
- UINT16 Flags;
- UINT8 RequestedSpeed;
+ UINT16 Type;
+ UINT16 Version;
+ UINT16 Length;
+ UINT16 PatrolScrubCommand;
+ UINT64 RequestedAddressRange[2];
+ UINT64 ActualAddressRange[2];
+ UINT16 Flags;
+ UINT8 RequestedSpeed;
} EFI_ACPI_5_1_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;
///
/// ACPI RASF Patrol Scrub command
///
-#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
-#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
-#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
+#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
+#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
+#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
///
/// Memory Power State Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT8 PlatformCommunicationChannelIdentifier;
- UINT8 Reserved[3];
-// Memory Power Node Structure
-// Memory Power State Characteristics
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 PlatformCommunicationChannelIdentifier;
+ UINT8 Reserved[3];
+ // Memory Power Node Structure
+ // Memory Power State Characteristics
} EFI_ACPI_5_1_MEMORY_POWER_STATUS_TABLE;
///
/// MPST Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_REVISION 0x01
///
/// MPST Platform Communication Channel Shared Memory Region definition.
///
typedef struct {
- UINT32 Signature;
- UINT16 Command;
- UINT16 Status;
- UINT32 MemoryPowerCommandRegister;
- UINT32 MemoryPowerStatusRegister;
- UINT32 PowerStateId;
- UINT32 MemoryPowerNodeId;
- UINT64 MemoryEnergyConsumed;
- UINT64 ExpectedAveragePowerComsuned;
+ UINT32 Signature;
+ UINT16 Command;
+ UINT16 Status;
+ UINT32 MemoryPowerCommandRegister;
+ UINT32 MemoryPowerStatusRegister;
+ UINT32 PowerStateId;
+ UINT32 MemoryPowerNodeId;
+ UINT64 MemoryEnergyConsumed;
+ UINT64 ExpectedAveragePowerComsuned;
} EFI_ACPI_5_1_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
///
@@ -875,186 +870,186 @@
///
/// ACPI MPST Memory Power command
///
-#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
-#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
-#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
-#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
///
/// MPST Memory Power Node Table
///
typedef struct {
- UINT8 PowerStateValue;
- UINT8 PowerStateInformationIndex;
+ UINT8 PowerStateValue;
+ UINT8 PowerStateInformationIndex;
} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE;
typedef struct {
- UINT8 Flag;
- UINT8 Reserved;
- UINT16 MemoryPowerNodeId;
- UINT32 Length;
- UINT64 AddressBase;
- UINT64 AddressLength;
- UINT32 NumberOfPowerStates;
- UINT32 NumberOfPhysicalComponents;
-//EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
-//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
+ UINT8 Flag;
+ UINT8 Reserved;
+ UINT16 MemoryPowerNodeId;
+ UINT32 Length;
+ UINT64 AddressBase;
+ UINT64 AddressLength;
+ UINT32 NumberOfPowerStates;
+ UINT32 NumberOfPhysicalComponents;
+ // EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
+ // UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
} EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE;
-#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
-#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
-#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
typedef struct {
- UINT16 MemoryPowerNodeCount;
- UINT8 Reserved[2];
+ UINT16 MemoryPowerNodeCount;
+ UINT8 Reserved[2];
} EFI_ACPI_5_1_MPST_MEMORY_POWER_NODE_TABLE;
///
/// MPST Memory Power State Characteristics Table
///
typedef struct {
- UINT8 PowerStateStructureID;
- UINT8 Flag;
- UINT16 Reserved;
- UINT32 AveragePowerConsumedInMPS0;
- UINT32 RelativePowerSavingToMPS0;
- UINT64 ExitLatencyToMPS0;
+ UINT8 PowerStateStructureID;
+ UINT8 Flag;
+ UINT16 Reserved;
+ UINT32 AveragePowerConsumedInMPS0;
+ UINT32 RelativePowerSavingToMPS0;
+ UINT64 ExitLatencyToMPS0;
} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;
-#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
-#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
-#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
+#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
typedef struct {
- UINT16 MemoryPowerStateCharacteristicsCount;
- UINT8 Reserved[2];
+ UINT16 MemoryPowerStateCharacteristicsCount;
+ UINT8 Reserved[2];
} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;
///
/// Memory Topology Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 Reserved;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Reserved;
} EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE;
///
/// PMTT Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
///
/// Common Memory Aggregator Device Structure.
///
typedef struct {
- UINT8 Type;
- UINT8 Reserved;
- UINT16 Length;
- UINT16 Flags;
- UINT16 Reserved1;
+ UINT8 Type;
+ UINT8 Reserved;
+ UINT16 Length;
+ UINT16 Flags;
+ UINT16 Reserved1;
} EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
///
/// Memory Aggregator Device Type
///
-#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1
-#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2
-#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3
+#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x0
+#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x1
+#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x2
///
/// Socket Memory Aggregator Device Structure.
///
typedef struct {
- EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
- UINT16 SocketIdentifier;
- UINT16 Reserved;
-//EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
+ EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
+ UINT16 SocketIdentifier;
+ UINT16 Reserved;
+ // EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
} EFI_ACPI_5_1_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
///
/// MemoryController Memory Aggregator Device Structure.
///
typedef struct {
- EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
- UINT32 ReadLatency;
- UINT32 WriteLatency;
- UINT32 ReadBandwidth;
- UINT32 WriteBandwidth;
- UINT16 OptimalAccessUnit;
- UINT16 OptimalAccessAlignment;
- UINT16 Reserved;
- UINT16 NumberOfProximityDomains;
-//UINT32 ProximityDomain[NumberOfProximityDomains];
-//EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
+ EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
+ UINT32 ReadLatency;
+ UINT32 WriteLatency;
+ UINT32 ReadBandwidth;
+ UINT32 WriteBandwidth;
+ UINT16 OptimalAccessUnit;
+ UINT16 OptimalAccessAlignment;
+ UINT16 Reserved;
+ UINT16 NumberOfProximityDomains;
+ // UINT32 ProximityDomain[NumberOfProximityDomains];
+ // EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
} EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
///
/// DIMM Memory Aggregator Device Structure.
///
typedef struct {
- EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
- UINT16 PhysicalComponentIdentifier;
- UINT16 Reserved;
- UINT32 SizeOfDimm;
- UINT32 SmbiosHandle;
+ EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
+ UINT16 PhysicalComponentIdentifier;
+ UINT16 Reserved;
+ UINT32 SizeOfDimm;
+ UINT32 SmbiosHandle;
} EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
///
/// Boot Graphics Resource Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
///
/// 2-bytes (16 bit) version ID. This value must be 1.
///
- UINT16 Version;
+ UINT16 Version;
///
/// 1-byte status field indicating current status about the table.
/// Bits[7:1] = Reserved (must be zero)
/// Bit [0] = Valid. A one indicates the boot image graphic is valid.
///
- UINT8 Status;
+ UINT8 Status;
///
/// 1-byte enumerated type field indicating format of the image.
/// 0 = Bitmap
/// 1 - 255 Reserved (for future use)
///
- UINT8 ImageType;
+ UINT8 ImageType;
///
/// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
/// of the image bitmap.
///
- UINT64 ImageAddress;
+ UINT64 ImageAddress;
///
/// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
/// (X, Y) display offset of the top left corner of the boot image.
/// The top left corner of the display is at offset (0, 0).
///
- UINT32 ImageOffsetX;
+ UINT32 ImageOffsetX;
///
/// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
/// (X, Y) display offset of the top left corner of the boot image.
/// The top left corner of the display is at offset (0, 0).
///
- UINT32 ImageOffsetY;
+ UINT32 ImageOffsetY;
} EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE;
///
/// BGRT Revision
///
-#define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
+#define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
///
/// BGRT Version
///
-#define EFI_ACPI_5_1_BGRT_VERSION 0x01
+#define EFI_ACPI_5_1_BGRT_VERSION 0x01
///
/// BGRT Status
///
-#define EFI_ACPI_5_1_BGRT_STATUS_NOT_DISPLAYED 0x00
-#define EFI_ACPI_5_1_BGRT_STATUS_DISPLAYED 0x01
+#define EFI_ACPI_5_1_BGRT_STATUS_NOT_DISPLAYED 0x00
+#define EFI_ACPI_5_1_BGRT_STATUS_DISPLAYED 0x01
///
/// BGRT Image Type
@@ -1064,26 +1059,26 @@
///
/// FPDT Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
///
/// FPDT Performance Record Types
///
-#define EFI_ACPI_5_1_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
-#define EFI_ACPI_5_1_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
+#define EFI_ACPI_5_1_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
+#define EFI_ACPI_5_1_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
///
/// FPDT Performance Record Revision
///
-#define EFI_ACPI_5_1_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
-#define EFI_ACPI_5_1_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
+#define EFI_ACPI_5_1_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
+#define EFI_ACPI_5_1_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
///
/// FPDT Runtime Performance Record Types
///
-#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
-#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
-#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
+#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
+#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
+#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
///
/// FPDT Runtime Performance Record Revision
@@ -1096,77 +1091,77 @@
/// FPDT Performance Record header
///
typedef struct {
- UINT16 Type;
- UINT8 Length;
- UINT8 Revision;
+ UINT16 Type;
+ UINT8 Length;
+ UINT8 Revision;
} EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER;
///
/// FPDT Performance Table header
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
+ UINT32 Signature;
+ UINT32 Length;
} EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER;
///
/// FPDT Firmware Basic Boot Performance Pointer Record Structure
///
typedef struct {
- EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
- UINT32 Reserved;
+ EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ UINT32 Reserved;
///
/// 64-bit processor-relative physical address of the Basic Boot Performance Table.
///
- UINT64 BootPerformanceTablePointer;
+ UINT64 BootPerformanceTablePointer;
} EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;
///
/// FPDT S3 Performance Table Pointer Record Structure
///
typedef struct {
- EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
- UINT32 Reserved;
+ EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ UINT32 Reserved;
///
/// 64-bit processor-relative physical address of the S3 Performance Table.
///
- UINT64 S3PerformanceTablePointer;
+ UINT64 S3PerformanceTablePointer;
} EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;
///
/// FPDT Firmware Basic Boot Performance Record Structure
///
typedef struct {
- EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
- UINT32 Reserved;
+ EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ UINT32 Reserved;
///
/// Timer value logged at the beginning of firmware image execution.
/// This may not always be zero or near zero.
///
- UINT64 ResetEnd;
+ UINT64 ResetEnd;
///
/// Timer value logged just prior to loading the OS boot loader into memory.
/// For non-UEFI compatible boots, this field must be zero.
///
- UINT64 OsLoaderLoadImageStart;
+ UINT64 OsLoaderLoadImageStart;
///
/// Timer value logged just prior to launching the previously loaded OS boot loader image.
/// For non-UEFI compatible boots, the timer value logged will be just prior
/// to the INT 19h handler invocation.
///
- UINT64 OsLoaderStartImageStart;
+ UINT64 OsLoaderStartImageStart;
///
/// Timer value logged at the point when the OS loader calls the
/// ExitBootServices function for UEFI compatible firmware.
/// For non-UEFI compatible boots, this field must be zero.
///
- UINT64 ExitBootServicesEntry;
+ UINT64 ExitBootServicesEntry;
///
- /// Timer value logged at the point just prior towhen the OS loader gaining
+ /// Timer value logged at the point just prior to when the OS loader gaining
/// control back from calls the ExitBootServices function for UEFI compatible firmware.
/// For non-UEFI compatible boots, this field must be zero.
///
- UINT64 ExitBootServicesExit;
+ UINT64 ExitBootServicesExit;
} EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_RECORD;
///
@@ -1178,7 +1173,7 @@
// FPDT Firmware Basic Boot Performance Table
//
typedef struct {
- EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header;
+ EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header;
//
// one or more Performance Records.
//
@@ -1193,7 +1188,7 @@
// FPDT Firmware S3 Boot Performance Table
//
typedef struct {
- EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header;
+ EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header;
//
// one or more Performance Records.
//
@@ -1203,203 +1198,209 @@
/// FPDT Basic S3 Resume Performance Record
///
typedef struct {
- EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
///
/// A count of the number of S3 resume cycles since the last full boot sequence.
///
- UINT32 ResumeCount;
+ UINT32 ResumeCount;
///
/// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
/// OS waking vector. Only the most recent resume cycle's time is retained.
///
- UINT64 FullResume;
+ UINT64 FullResume;
///
/// Average timer value of all resume cycles logged since the last full boot
/// sequence, including the most recent resume. Note that the entire log of
/// timer values does not need to be retained in order to calculate this average.
///
- UINT64 AverageResume;
+ UINT64 AverageResume;
} EFI_ACPI_5_1_FPDT_S3_RESUME_RECORD;
///
/// FPDT Basic S3 Suspend Performance Record
///
typedef struct {
- EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
///
/// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
/// Only the most recent suspend cycle's timer value is retained.
///
- UINT64 SuspendStart;
+ UINT64 SuspendStart;
///
/// Timer value recorded at the final firmware write to SLP_TYP (or other
/// mechanism) used to trigger hardware entry to S3.
/// Only the most recent suspend cycle's timer value is retained.
///
- UINT64 SuspendEnd;
+ UINT64 SuspendEnd;
} EFI_ACPI_5_1_FPDT_S3_SUSPEND_RECORD;
///
/// Firmware Performance Record Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
} EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_RECORD_TABLE;
///
/// Generic Timer Description Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT64 CntControlBasePhysicalAddress;
- UINT32 Reserved;
- UINT32 SecurePL1TimerGSIV;
- UINT32 SecurePL1TimerFlags;
- UINT32 NonSecurePL1TimerGSIV;
- UINT32 NonSecurePL1TimerFlags;
- UINT32 VirtualTimerGSIV;
- UINT32 VirtualTimerFlags;
- UINT32 NonSecurePL2TimerGSIV;
- UINT32 NonSecurePL2TimerFlags;
- UINT64 CntReadBasePhysicalAddress;
- UINT32 PlatformTimerCount;
- UINT32 PlatformTimerOffset;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT64 CntControlBasePhysicalAddress;
+ UINT32 Reserved;
+ UINT32 SecurePL1TimerGSIV;
+ UINT32 SecurePL1TimerFlags;
+ UINT32 NonSecurePL1TimerGSIV;
+ UINT32 NonSecurePL1TimerFlags;
+ UINT32 VirtualTimerGSIV;
+ UINT32 VirtualTimerFlags;
+ UINT32 NonSecurePL2TimerGSIV;
+ UINT32 NonSecurePL2TimerFlags;
+ UINT64 CntReadBasePhysicalAddress;
+ UINT32 PlatformTimerCount;
+ UINT32 PlatformTimerOffset;
} EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE;
///
/// GTDT Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02
///
/// Timer Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
-#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
-#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2
+#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
+#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
+#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2
///
/// Platform Timer Type
///
-#define EFI_ACPI_5_1_GTDT_GT_BLOCK 0
-#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG 1
+#define EFI_ACPI_5_1_GTDT_GT_BLOCK 0
+#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG 1
///
/// GT Block Structure
///
typedef struct {
- UINT8 Type;
- UINT16 Length;
- UINT8 Reserved;
- UINT64 CntCtlBase;
- UINT32 GTBlockTimerCount;
- UINT32 GTBlockTimerOffset;
+ UINT8 Type;
+ UINT16 Length;
+ UINT8 Reserved;
+ UINT64 CntCtlBase;
+ UINT32 GTBlockTimerCount;
+ UINT32 GTBlockTimerOffset;
} EFI_ACPI_5_1_GTDT_GT_BLOCK_STRUCTURE;
///
/// GT Block Timer Structure
///
typedef struct {
- UINT8 GTFrameNumber;
- UINT8 Reserved[3];
- UINT64 CntBaseX;
- UINT64 CntEL0BaseX;
- UINT32 GTxPhysicalTimerGSIV;
- UINT32 GTxPhysicalTimerFlags;
- UINT32 GTxVirtualTimerGSIV;
- UINT32 GTxVirtualTimerFlags;
- UINT32 GTxCommonFlags;
+ UINT8 GTFrameNumber;
+ UINT8 Reserved[3];
+ UINT64 CntBaseX;
+ UINT64 CntEL0BaseX;
+ UINT32 GTxPhysicalTimerGSIV;
+ UINT32 GTxPhysicalTimerFlags;
+ UINT32 GTxVirtualTimerGSIV;
+ UINT32 GTxVirtualTimerFlags;
+ UINT32 GTxCommonFlags;
} EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_STRUCTURE;
///
/// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
-#define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
+#define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
+#define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
///
/// Common Flags Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0
-#define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1
+#define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0
+#define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1
///
/// SBSA Generic Watchdog Structure
///
typedef struct {
- UINT8 Type;
- UINT16 Length;
- UINT8 Reserved;
- UINT64 RefreshFramePhysicalAddress;
- UINT64 WatchdogControlFramePhysicalAddress;
- UINT32 WatchdogTimerGSIV;
- UINT32 WatchdogTimerFlags;
+ UINT8 Type;
+ UINT16 Length;
+ UINT8 Reserved;
+ UINT64 RefreshFramePhysicalAddress;
+ UINT64 WatchdogControlFramePhysicalAddress;
+ UINT32 WatchdogTimerGSIV;
+ UINT32 WatchdogTimerFlags;
} EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;
///
/// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0
-#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1
-#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2
+#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0
+#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1
+#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2
///
/// Boot Error Record Table (BERT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 BootErrorRegionLength;
- UINT64 BootErrorRegion;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 BootErrorRegionLength;
+ UINT64 BootErrorRegion;
} EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_HEADER;
///
/// BERT Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
///
/// Boot Error Region Block Status Definition
///
typedef struct {
- UINT32 UncorrectableErrorValid:1;
- UINT32 CorrectableErrorValid:1;
- UINT32 MultipleUncorrectableErrors:1;
- UINT32 MultipleCorrectableErrors:1;
- UINT32 ErrorDataEntryCount:10;
- UINT32 Reserved:18;
+ UINT32 UncorrectableErrorValid : 1;
+ UINT32 CorrectableErrorValid : 1;
+ UINT32 MultipleUncorrectableErrors : 1;
+ UINT32 MultipleCorrectableErrors : 1;
+ UINT32 ErrorDataEntryCount : 10;
+ UINT32 Reserved : 18;
} EFI_ACPI_5_1_ERROR_BLOCK_STATUS;
///
/// Boot Error Region Definition
///
typedef struct {
- EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus;
- UINT32 RawDataOffset;
- UINT32 RawDataLength;
- UINT32 DataLength;
- UINT32 ErrorSeverity;
+ EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus;
+ UINT32 RawDataOffset;
+ UINT32 RawDataLength;
+ UINT32 DataLength;
+ UINT32 ErrorSeverity;
} EFI_ACPI_5_1_BOOT_ERROR_REGION_STRUCTURE;
//
// Boot Error Severity types
//
-#define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTABLE 0x00
+#define EFI_ACPI_5_1_ERROR_SEVERITY_RECOVERABLE 0x00
#define EFI_ACPI_5_1_ERROR_SEVERITY_FATAL 0x01
#define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTED 0x02
#define EFI_ACPI_5_1_ERROR_SEVERITY_NONE 0x03
+//
+// The term 'Correctable' is no longer being used as an error severity of the
+// reported error since ACPI Specification Version 5.1 Errata B.
+// The below macro is considered as deprecated and should no longer be used.
+//
+#define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTABLE 0x00
///
/// Generic Error Data Entry Definition
///
typedef struct {
- UINT8 SectionType[16];
- UINT32 ErrorSeverity;
- UINT16 Revision;
- UINT8 ValidationBits;
- UINT8 Flags;
- UINT32 ErrorDataLength;
- UINT8 FruId[16];
- UINT8 FruText[20];
+ UINT8 SectionType[16];
+ UINT32 ErrorSeverity;
+ UINT16 Revision;
+ UINT8 ValidationBits;
+ UINT8 Flags;
+ UINT32 ErrorDataLength;
+ UINT8 FruId[16];
+ UINT8 FruText[20];
} EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
///
@@ -1411,14 +1412,14 @@
/// HEST - Hardware Error Source Table
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 ErrorSourceCount;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 ErrorSourceCount;
} EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
///
/// HEST Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
//
// Error Source structure types.
@@ -1434,403 +1435,403 @@
//
// Error Source structure flags.
//
-#define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
-#define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
+#define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
+#define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
///
/// IA-32 Architecture Machine Check Exception Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT64 GlobalCapabilityInitData;
- UINT64 GlobalControlInitData;
- UINT8 NumberOfHardwareBanks;
- UINT8 Reserved1[7];
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT64 GlobalCapabilityInitData;
+ UINT64 GlobalControlInitData;
+ UINT8 NumberOfHardwareBanks;
+ UINT8 Reserved1[7];
} EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
///
/// IA-32 Architecture Machine Check Bank Structure Definition
///
typedef struct {
- UINT8 BankNumber;
- UINT8 ClearStatusOnInitialization;
- UINT8 StatusDataFormat;
- UINT8 Reserved0;
- UINT32 ControlRegisterMsrAddress;
- UINT64 ControlInitData;
- UINT32 StatusRegisterMsrAddress;
- UINT32 AddressRegisterMsrAddress;
- UINT32 MiscRegisterMsrAddress;
+ UINT8 BankNumber;
+ UINT8 ClearStatusOnInitialization;
+ UINT8 StatusDataFormat;
+ UINT8 Reserved0;
+ UINT32 ControlRegisterMsrAddress;
+ UINT64 ControlInitData;
+ UINT32 StatusRegisterMsrAddress;
+ UINT32 AddressRegisterMsrAddress;
+ UINT32 MiscRegisterMsrAddress;
} EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
///
/// IA-32 Architecture Machine Check Bank Structure MCA data format
///
-#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
-#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
-#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
+#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
+#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
+#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
//
// Hardware Error Notification types. All other values are reserved
//
-#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
-#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
-#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
-#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
-#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
+#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
+#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
+#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
+#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
+#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
///
/// Hardware Error Notification Configuration Write Enable Structure Definition
///
typedef struct {
- UINT16 Type:1;
- UINT16 PollInterval:1;
- UINT16 SwitchToPollingThresholdValue:1;
- UINT16 SwitchToPollingThresholdWindow:1;
- UINT16 ErrorThresholdValue:1;
- UINT16 ErrorThresholdWindow:1;
- UINT16 Reserved:10;
+ UINT16 Type : 1;
+ UINT16 PollInterval : 1;
+ UINT16 SwitchToPollingThresholdValue : 1;
+ UINT16 SwitchToPollingThresholdWindow : 1;
+ UINT16 ErrorThresholdValue : 1;
+ UINT16 ErrorThresholdWindow : 1;
+ UINT16 Reserved : 10;
} EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
///
/// Hardware Error Notification Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
- UINT32 PollInterval;
- UINT32 Vector;
- UINT32 SwitchToPollingThresholdValue;
- UINT32 SwitchToPollingThresholdWindow;
- UINT32 ErrorThresholdValue;
- UINT32 ErrorThresholdWindow;
+ UINT8 Type;
+ UINT8 Length;
+ EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
+ UINT32 PollInterval;
+ UINT32 Vector;
+ UINT32 SwitchToPollingThresholdValue;
+ UINT32 SwitchToPollingThresholdWindow;
+ UINT32 ErrorThresholdValue;
+ UINT32 ErrorThresholdWindow;
} EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
///
/// IA-32 Architecture Corrected Machine Check Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
- UINT8 NumberOfHardwareBanks;
- UINT8 Reserved1[3];
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
+ UINT8 NumberOfHardwareBanks;
+ UINT8 Reserved1[3];
} EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
///
/// IA-32 Architecture NMI Error Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 MaxRawDataLength;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 MaxRawDataLength;
} EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
///
/// PCI Express Root Port AER Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT16 DeviceControl;
- UINT8 Reserved1[2];
- UINT32 UncorrectableErrorMask;
- UINT32 UncorrectableErrorSeverity;
- UINT32 CorrectableErrorMask;
- UINT32 AdvancedErrorCapabilitiesAndControl;
- UINT32 RootErrorCommand;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT32 RootErrorCommand;
} EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
///
/// PCI Express Device AER Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT16 DeviceControl;
- UINT8 Reserved1[2];
- UINT32 UncorrectableErrorMask;
- UINT32 UncorrectableErrorSeverity;
- UINT32 CorrectableErrorMask;
- UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
} EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
///
/// PCI Express Bridge AER Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT16 DeviceControl;
- UINT8 Reserved1[2];
- UINT32 UncorrectableErrorMask;
- UINT32 UncorrectableErrorSeverity;
- UINT32 CorrectableErrorMask;
- UINT32 AdvancedErrorCapabilitiesAndControl;
- UINT32 SecondaryUncorrectableErrorMask;
- UINT32 SecondaryUncorrectableErrorSeverity;
- UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT32 SecondaryUncorrectableErrorMask;
+ UINT32 SecondaryUncorrectableErrorSeverity;
+ UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
} EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
///
/// Generic Hardware Error Source Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT16 RelatedSourceId;
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 MaxRawDataLength;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
- EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
- UINT32 ErrorStatusBlockLength;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT16 RelatedSourceId;
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 MaxRawDataLength;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
+ EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
+ UINT32 ErrorStatusBlockLength;
} EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
///
/// Generic Error Status Definition
///
typedef struct {
- EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus;
- UINT32 RawDataOffset;
- UINT32 RawDataLength;
- UINT32 DataLength;
- UINT32 ErrorSeverity;
+ EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus;
+ UINT32 RawDataOffset;
+ UINT32 RawDataLength;
+ UINT32 DataLength;
+ UINT32 ErrorSeverity;
} EFI_ACPI_5_1_GENERIC_ERROR_STATUS_STRUCTURE;
///
/// ERST - Error Record Serialization Table
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 SerializationHeaderSize;
- UINT8 Reserved0[4];
- UINT32 InstructionEntryCount;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 SerializationHeaderSize;
+ UINT8 Reserved0[4];
+ UINT32 InstructionEntryCount;
} EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
///
/// ERST Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
///
/// ERST Serialization Actions
///
-#define EFI_ACPI_5_1_ERST_BEGIN_WRITE_OPERATION 0x00
-#define EFI_ACPI_5_1_ERST_BEGIN_READ_OPERATION 0x01
-#define EFI_ACPI_5_1_ERST_BEGIN_CLEAR_OPERATION 0x02
-#define EFI_ACPI_5_1_ERST_END_OPERATION 0x03
-#define EFI_ACPI_5_1_ERST_SET_RECORD_OFFSET 0x04
-#define EFI_ACPI_5_1_ERST_EXECUTE_OPERATION 0x05
-#define EFI_ACPI_5_1_ERST_CHECK_BUSY_STATUS 0x06
-#define EFI_ACPI_5_1_ERST_GET_COMMAND_STATUS 0x07
-#define EFI_ACPI_5_1_ERST_GET_RECORD_IDENTIFIER 0x08
-#define EFI_ACPI_5_1_ERST_SET_RECORD_IDENTIFIER 0x09
-#define EFI_ACPI_5_1_ERST_GET_RECORD_COUNT 0x0A
-#define EFI_ACPI_5_1_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
-#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
-#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
-#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
+#define EFI_ACPI_5_1_ERST_BEGIN_WRITE_OPERATION 0x00
+#define EFI_ACPI_5_1_ERST_BEGIN_READ_OPERATION 0x01
+#define EFI_ACPI_5_1_ERST_BEGIN_CLEAR_OPERATION 0x02
+#define EFI_ACPI_5_1_ERST_END_OPERATION 0x03
+#define EFI_ACPI_5_1_ERST_SET_RECORD_OFFSET 0x04
+#define EFI_ACPI_5_1_ERST_EXECUTE_OPERATION 0x05
+#define EFI_ACPI_5_1_ERST_CHECK_BUSY_STATUS 0x06
+#define EFI_ACPI_5_1_ERST_GET_COMMAND_STATUS 0x07
+#define EFI_ACPI_5_1_ERST_GET_RECORD_IDENTIFIER 0x08
+#define EFI_ACPI_5_1_ERST_SET_RECORD_IDENTIFIER 0x09
+#define EFI_ACPI_5_1_ERST_GET_RECORD_COUNT 0x0A
+#define EFI_ACPI_5_1_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
+#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
+#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
+#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
///
/// ERST Action Command Status
///
-#define EFI_ACPI_5_1_ERST_STATUS_SUCCESS 0x00
-#define EFI_ACPI_5_1_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
-#define EFI_ACPI_5_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
-#define EFI_ACPI_5_1_ERST_STATUS_FAILED 0x03
-#define EFI_ACPI_5_1_ERST_STATUS_RECORD_STORE_EMPTY 0x04
-#define EFI_ACPI_5_1_ERST_STATUS_RECORD_NOT_FOUND 0x05
+#define EFI_ACPI_5_1_ERST_STATUS_SUCCESS 0x00
+#define EFI_ACPI_5_1_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
+#define EFI_ACPI_5_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
+#define EFI_ACPI_5_1_ERST_STATUS_FAILED 0x03
+#define EFI_ACPI_5_1_ERST_STATUS_RECORD_STORE_EMPTY 0x04
+#define EFI_ACPI_5_1_ERST_STATUS_RECORD_NOT_FOUND 0x05
///
/// ERST Serialization Instructions
///
-#define EFI_ACPI_5_1_ERST_READ_REGISTER 0x00
-#define EFI_ACPI_5_1_ERST_READ_REGISTER_VALUE 0x01
-#define EFI_ACPI_5_1_ERST_WRITE_REGISTER 0x02
-#define EFI_ACPI_5_1_ERST_WRITE_REGISTER_VALUE 0x03
-#define EFI_ACPI_5_1_ERST_NOOP 0x04
-#define EFI_ACPI_5_1_ERST_LOAD_VAR1 0x05
-#define EFI_ACPI_5_1_ERST_LOAD_VAR2 0x06
-#define EFI_ACPI_5_1_ERST_STORE_VAR1 0x07
-#define EFI_ACPI_5_1_ERST_ADD 0x08
-#define EFI_ACPI_5_1_ERST_SUBTRACT 0x09
-#define EFI_ACPI_5_1_ERST_ADD_VALUE 0x0A
-#define EFI_ACPI_5_1_ERST_SUBTRACT_VALUE 0x0B
-#define EFI_ACPI_5_1_ERST_STALL 0x0C
-#define EFI_ACPI_5_1_ERST_STALL_WHILE_TRUE 0x0D
-#define EFI_ACPI_5_1_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
-#define EFI_ACPI_5_1_ERST_GOTO 0x0F
-#define EFI_ACPI_5_1_ERST_SET_SRC_ADDRESS_BASE 0x10
-#define EFI_ACPI_5_1_ERST_SET_DST_ADDRESS_BASE 0x11
-#define EFI_ACPI_5_1_ERST_MOVE_DATA 0x12
+#define EFI_ACPI_5_1_ERST_READ_REGISTER 0x00
+#define EFI_ACPI_5_1_ERST_READ_REGISTER_VALUE 0x01
+#define EFI_ACPI_5_1_ERST_WRITE_REGISTER 0x02
+#define EFI_ACPI_5_1_ERST_WRITE_REGISTER_VALUE 0x03
+#define EFI_ACPI_5_1_ERST_NOOP 0x04
+#define EFI_ACPI_5_1_ERST_LOAD_VAR1 0x05
+#define EFI_ACPI_5_1_ERST_LOAD_VAR2 0x06
+#define EFI_ACPI_5_1_ERST_STORE_VAR1 0x07
+#define EFI_ACPI_5_1_ERST_ADD 0x08
+#define EFI_ACPI_5_1_ERST_SUBTRACT 0x09
+#define EFI_ACPI_5_1_ERST_ADD_VALUE 0x0A
+#define EFI_ACPI_5_1_ERST_SUBTRACT_VALUE 0x0B
+#define EFI_ACPI_5_1_ERST_STALL 0x0C
+#define EFI_ACPI_5_1_ERST_STALL_WHILE_TRUE 0x0D
+#define EFI_ACPI_5_1_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
+#define EFI_ACPI_5_1_ERST_GOTO 0x0F
+#define EFI_ACPI_5_1_ERST_SET_SRC_ADDRESS_BASE 0x10
+#define EFI_ACPI_5_1_ERST_SET_DST_ADDRESS_BASE 0x11
+#define EFI_ACPI_5_1_ERST_MOVE_DATA 0x12
///
/// ERST Instruction Flags
///
-#define EFI_ACPI_5_1_ERST_PRESERVE_REGISTER 0x01
+#define EFI_ACPI_5_1_ERST_PRESERVE_REGISTER 0x01
///
/// ERST Serialization Instruction Entry
///
typedef struct {
- UINT8 SerializationAction;
- UINT8 Instruction;
- UINT8 Flags;
- UINT8 Reserved0;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
- UINT64 Value;
- UINT64 Mask;
+ UINT8 SerializationAction;
+ UINT8 Instruction;
+ UINT8 Flags;
+ UINT8 Reserved0;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
+ UINT64 Value;
+ UINT64 Mask;
} EFI_ACPI_5_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
///
/// EINJ - Error Injection Table
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 InjectionHeaderSize;
- UINT8 InjectionFlags;
- UINT8 Reserved0[3];
- UINT32 InjectionEntryCount;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 InjectionHeaderSize;
+ UINT8 InjectionFlags;
+ UINT8 Reserved0[3];
+ UINT32 InjectionEntryCount;
} EFI_ACPI_5_1_ERROR_INJECTION_TABLE_HEADER;
///
/// EINJ Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_REVISION 0x01
///
/// EINJ Error Injection Actions
///
-#define EFI_ACPI_5_1_EINJ_BEGIN_INJECTION_OPERATION 0x00
-#define EFI_ACPI_5_1_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
-#define EFI_ACPI_5_1_EINJ_SET_ERROR_TYPE 0x02
-#define EFI_ACPI_5_1_EINJ_GET_ERROR_TYPE 0x03
-#define EFI_ACPI_5_1_EINJ_END_OPERATION 0x04
-#define EFI_ACPI_5_1_EINJ_EXECUTE_OPERATION 0x05
-#define EFI_ACPI_5_1_EINJ_CHECK_BUSY_STATUS 0x06
-#define EFI_ACPI_5_1_EINJ_GET_COMMAND_STATUS 0x07
-#define EFI_ACPI_5_1_EINJ_TRIGGER_ERROR 0xFF
+#define EFI_ACPI_5_1_EINJ_BEGIN_INJECTION_OPERATION 0x00
+#define EFI_ACPI_5_1_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
+#define EFI_ACPI_5_1_EINJ_SET_ERROR_TYPE 0x02
+#define EFI_ACPI_5_1_EINJ_GET_ERROR_TYPE 0x03
+#define EFI_ACPI_5_1_EINJ_END_OPERATION 0x04
+#define EFI_ACPI_5_1_EINJ_EXECUTE_OPERATION 0x05
+#define EFI_ACPI_5_1_EINJ_CHECK_BUSY_STATUS 0x06
+#define EFI_ACPI_5_1_EINJ_GET_COMMAND_STATUS 0x07
+#define EFI_ACPI_5_1_EINJ_TRIGGER_ERROR 0xFF
///
/// EINJ Action Command Status
///
-#define EFI_ACPI_5_1_EINJ_STATUS_SUCCESS 0x00
-#define EFI_ACPI_5_1_EINJ_STATUS_UNKNOWN_FAILURE 0x01
-#define EFI_ACPI_5_1_EINJ_STATUS_INVALID_ACCESS 0x02
+#define EFI_ACPI_5_1_EINJ_STATUS_SUCCESS 0x00
+#define EFI_ACPI_5_1_EINJ_STATUS_UNKNOWN_FAILURE 0x01
+#define EFI_ACPI_5_1_EINJ_STATUS_INVALID_ACCESS 0x02
///
/// EINJ Error Type Definition
///
-#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
-#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
-#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
-#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
-#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
-#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
-#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
-#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
-#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
-#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
-#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
-#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
+#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
+#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
+#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
+#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
+#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
+#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
+#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
+#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
+#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
+#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
+#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
+#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
///
/// EINJ Injection Instructions
///
-#define EFI_ACPI_5_1_EINJ_READ_REGISTER 0x00
-#define EFI_ACPI_5_1_EINJ_READ_REGISTER_VALUE 0x01
-#define EFI_ACPI_5_1_EINJ_WRITE_REGISTER 0x02
-#define EFI_ACPI_5_1_EINJ_WRITE_REGISTER_VALUE 0x03
-#define EFI_ACPI_5_1_EINJ_NOOP 0x04
+#define EFI_ACPI_5_1_EINJ_READ_REGISTER 0x00
+#define EFI_ACPI_5_1_EINJ_READ_REGISTER_VALUE 0x01
+#define EFI_ACPI_5_1_EINJ_WRITE_REGISTER 0x02
+#define EFI_ACPI_5_1_EINJ_WRITE_REGISTER_VALUE 0x03
+#define EFI_ACPI_5_1_EINJ_NOOP 0x04
///
/// EINJ Instruction Flags
///
-#define EFI_ACPI_5_1_EINJ_PRESERVE_REGISTER 0x01
+#define EFI_ACPI_5_1_EINJ_PRESERVE_REGISTER 0x01
///
/// EINJ Injection Instruction Entry
///
typedef struct {
- UINT8 InjectionAction;
- UINT8 Instruction;
- UINT8 Flags;
- UINT8 Reserved0;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
- UINT64 Value;
- UINT64 Mask;
+ UINT8 InjectionAction;
+ UINT8 Instruction;
+ UINT8 Flags;
+ UINT8 Reserved0;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
+ UINT64 Value;
+ UINT64 Mask;
} EFI_ACPI_5_1_EINJ_INJECTION_INSTRUCTION_ENTRY;
///
/// EINJ Trigger Action Table
///
typedef struct {
- UINT32 HeaderSize;
- UINT32 Revision;
- UINT32 TableSize;
- UINT32 EntryCount;
+ UINT32 HeaderSize;
+ UINT32 Revision;
+ UINT32 TableSize;
+ UINT32 EntryCount;
} EFI_ACPI_5_1_EINJ_TRIGGER_ACTION_TABLE;
///
/// Platform Communications Channel Table (PCCT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 Flags;
- UINT64 Reserved;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Flags;
+ UINT64 Reserved;
} EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;
///
/// PCCT Version (as defined in ACPI 5.1 spec.)
///
-#define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
+#define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
///
/// PCCT Global Flags
///
-#define EFI_ACPI_5_1_PCCT_FLAGS_SCI_DOORBELL BIT0
+#define EFI_ACPI_5_1_PCCT_FLAGS_SCI_DOORBELL BIT0
//
// PCCT Subspace type
@@ -1841,25 +1842,25 @@
/// PCC Subspace Structure Header
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
+ UINT8 Type;
+ UINT8 Length;
} EFI_ACPI_5_1_PCCT_SUBSPACE_HEADER;
///
/// Generic Communications Subspace Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Reserved[6];
- UINT64 BaseAddress;
- UINT64 AddressLength;
- EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
- UINT64 DoorbellPreserve;
- UINT64 DoorbellWrite;
- UINT32 NominalLatency;
- UINT32 MaximumPeriodicAccessRate;
- UINT16 MinimumRequestTurnaroundTime;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved[6];
+ UINT64 BaseAddress;
+ UINT64 AddressLength;
+ EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
+ UINT64 DoorbellPreserve;
+ UINT64 DoorbellWrite;
+ UINT32 NominalLatency;
+ UINT32 MaximumPeriodicAccessRate;
+ UINT16 MinimumRequestTurnaroundTime;
} EFI_ACPI_5_1_PCCT_SUBSPACE_GENERIC;
///
@@ -1867,18 +1868,18 @@
///
typedef struct {
- UINT8 Command;
- UINT8 Reserved:7;
- UINT8 GenerateSci:1;
+ UINT8 Command;
+ UINT8 Reserved : 7;
+ UINT8 GenerateSci : 1;
} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;
typedef struct {
- UINT8 CommandComplete:1;
- UINT8 SciDoorbell:1;
- UINT8 Error:1;
- UINT8 PlatformNotification:1;
- UINT8 Reserved:4;
- UINT8 Reserved1;
+ UINT8 CommandComplete : 1;
+ UINT8 SciDoorbell : 1;
+ UINT8 Error : 1;
+ UINT8 PlatformNotification : 1;
+ UINT8 Reserved : 4;
+ UINT8 Reserved1;
} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;
typedef struct {
@@ -2087,12 +2088,17 @@
#define EFI_ACPI_5_1_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')
///
+/// "PCCT" Platform Communications Channel Table
+///
+#define EFI_ACPI_5_1_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T')
+
+///
/// "SLIC" MS Software Licensing Table Specification
///
#define EFI_ACPI_5_1_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')
///
-/// "SPCR" Serial Port Concole Redirection Table
+/// "SPCR" Serial Port Console Redirection Table
///
#define EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
diff --git a/src/include/ipxe/efi/IndustryStandard/Acpi60.h b/src/include/ipxe/efi/IndustryStandard/Acpi60.h
index c600735..9bd821c 100644
--- a/src/include/ipxe/efi/IndustryStandard/Acpi60.h
+++ b/src/include/ipxe/efi/IndustryStandard/Acpi60.h
@@ -1,21 +1,16 @@
/** @file
ACPI 6.0 definitions from the ACPI Specification Revision 6.0 Errata A January, 2016.
- Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.<BR>
(C) Copyright 2015-2016 Hewlett Packard Enterprise Development LP<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2020, ARM Ltd. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _ACPI_6_0_H_
#define _ACPI_6_0_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/IndustryStandard/Acpi51.h>
@@ -28,21 +23,21 @@
/// ACPI 6.0 Generic Address Space definition
///
typedef struct {
- UINT8 AddressSpaceId;
- UINT8 RegisterBitWidth;
- UINT8 RegisterBitOffset;
- UINT8 AccessSize;
- UINT64 Address;
+ UINT8 AddressSpaceId;
+ UINT8 RegisterBitWidth;
+ UINT8 RegisterBitOffset;
+ UINT8 AccessSize;
+ UINT64 Address;
} EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE;
//
// Generic Address Space Address IDs
//
-#define EFI_ACPI_6_0_SYSTEM_MEMORY 0
-#define EFI_ACPI_6_0_SYSTEM_IO 1
-#define EFI_ACPI_6_0_PCI_CONFIGURATION_SPACE 2
-#define EFI_ACPI_6_0_EMBEDDED_CONTROLLER 3
-#define EFI_ACPI_6_0_SMBUS 4
+#define EFI_ACPI_6_0_SYSTEM_MEMORY 0
+#define EFI_ACPI_6_0_SYSTEM_IO 1
+#define EFI_ACPI_6_0_PCI_CONFIGURATION_SPACE 2
+#define EFI_ACPI_6_0_EMBEDDED_CONTROLLER 3
+#define EFI_ACPI_6_0_SMBUS 4
#define EFI_ACPI_6_0_PLATFORM_COMMUNICATION_CHANNEL 0x0A
#define EFI_ACPI_6_0_FUNCTIONAL_FIXED_HARDWARE 0x7F
@@ -63,29 +58,29 @@
/// Root System Description Pointer Structure
///
typedef struct {
- UINT64 Signature;
- UINT8 Checksum;
- UINT8 OemId[6];
- UINT8 Revision;
- UINT32 RsdtAddress;
- UINT32 Length;
- UINT64 XsdtAddress;
- UINT8 ExtendedChecksum;
- UINT8 Reserved[3];
+ UINT64 Signature;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT8 Revision;
+ UINT32 RsdtAddress;
+ UINT32 Length;
+ UINT64 XsdtAddress;
+ UINT8 ExtendedChecksum;
+ UINT8 Reserved[3];
} EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
///
/// RSD_PTR Revision (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.0) says current value is 2
+#define EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.0) says current value is 2
///
/// Common table header, this prefaces all ACPI tables, including FACS, but
/// excluding the RSD PTR structure
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
+ UINT32 Signature;
+ UINT32 Length;
} EFI_ACPI_6_0_COMMON_HEADER;
//
@@ -97,7 +92,7 @@
///
/// RSDT Revision (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
//
// Extended System Description Table
@@ -108,74 +103,74 @@
///
/// XSDT Revision (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
///
/// Fixed ACPI Description Table Structure (FADT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 FirmwareCtrl;
- UINT32 Dsdt;
- UINT8 Reserved0;
- UINT8 PreferredPmProfile;
- UINT16 SciInt;
- UINT32 SmiCmd;
- UINT8 AcpiEnable;
- UINT8 AcpiDisable;
- UINT8 S4BiosReq;
- UINT8 PstateCnt;
- UINT32 Pm1aEvtBlk;
- UINT32 Pm1bEvtBlk;
- UINT32 Pm1aCntBlk;
- UINT32 Pm1bCntBlk;
- UINT32 Pm2CntBlk;
- UINT32 PmTmrBlk;
- UINT32 Gpe0Blk;
- UINT32 Gpe1Blk;
- UINT8 Pm1EvtLen;
- UINT8 Pm1CntLen;
- UINT8 Pm2CntLen;
- UINT8 PmTmrLen;
- UINT8 Gpe0BlkLen;
- UINT8 Gpe1BlkLen;
- UINT8 Gpe1Base;
- UINT8 CstCnt;
- UINT16 PLvl2Lat;
- UINT16 PLvl3Lat;
- UINT16 FlushSize;
- UINT16 FlushStride;
- UINT8 DutyOffset;
- UINT8 DutyWidth;
- UINT8 DayAlrm;
- UINT8 MonAlrm;
- UINT8 Century;
- UINT16 IaPcBootArch;
- UINT8 Reserved1;
- UINT32 Flags;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
- UINT8 ResetValue;
- UINT16 ArmBootArch;
- UINT8 MinorVersion;
- UINT64 XFirmwareCtrl;
- UINT64 XDsdt;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
- UINT64 HypervisorVendorIdentity;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 FirmwareCtrl;
+ UINT32 Dsdt;
+ UINT8 Reserved0;
+ UINT8 PreferredPmProfile;
+ UINT16 SciInt;
+ UINT32 SmiCmd;
+ UINT8 AcpiEnable;
+ UINT8 AcpiDisable;
+ UINT8 S4BiosReq;
+ UINT8 PstateCnt;
+ UINT32 Pm1aEvtBlk;
+ UINT32 Pm1bEvtBlk;
+ UINT32 Pm1aCntBlk;
+ UINT32 Pm1bCntBlk;
+ UINT32 Pm2CntBlk;
+ UINT32 PmTmrBlk;
+ UINT32 Gpe0Blk;
+ UINT32 Gpe1Blk;
+ UINT8 Pm1EvtLen;
+ UINT8 Pm1CntLen;
+ UINT8 Pm2CntLen;
+ UINT8 PmTmrLen;
+ UINT8 Gpe0BlkLen;
+ UINT8 Gpe1BlkLen;
+ UINT8 Gpe1Base;
+ UINT8 CstCnt;
+ UINT16 PLvl2Lat;
+ UINT16 PLvl3Lat;
+ UINT16 FlushSize;
+ UINT16 FlushStride;
+ UINT8 DutyOffset;
+ UINT8 DutyWidth;
+ UINT8 DayAlrm;
+ UINT8 MonAlrm;
+ UINT8 Century;
+ UINT16 IaPcBootArch;
+ UINT8 Reserved1;
+ UINT32 Flags;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
+ UINT8 ResetValue;
+ UINT16 ArmBootArch;
+ UINT8 MinorVersion;
+ UINT64 XFirmwareCtrl;
+ UINT64 XDsdt;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
+ UINT64 HypervisorVendorIdentity;
} EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE;
///
/// FADT Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06
+#define EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06
#define EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x00
//
@@ -195,62 +190,62 @@
// Fixed ACPI Description Table Boot Architecture Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_6_0_LEGACY_DEVICES BIT0
-#define EFI_ACPI_6_0_8042 BIT1
-#define EFI_ACPI_6_0_VGA_NOT_PRESENT BIT2
-#define EFI_ACPI_6_0_MSI_NOT_SUPPORTED BIT3
-#define EFI_ACPI_6_0_PCIE_ASPM_CONTROLS BIT4
-#define EFI_ACPI_6_0_CMOS_RTC_NOT_PRESENT BIT5
+#define EFI_ACPI_6_0_LEGACY_DEVICES BIT0
+#define EFI_ACPI_6_0_8042 BIT1
+#define EFI_ACPI_6_0_VGA_NOT_PRESENT BIT2
+#define EFI_ACPI_6_0_MSI_NOT_SUPPORTED BIT3
+#define EFI_ACPI_6_0_PCIE_ASPM_CONTROLS BIT4
+#define EFI_ACPI_6_0_CMOS_RTC_NOT_PRESENT BIT5
//
// Fixed ACPI Description Table Arm Boot Architecture Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_6_0_ARM_PSCI_COMPLIANT BIT0
-#define EFI_ACPI_6_0_ARM_PSCI_USE_HVC BIT1
+#define EFI_ACPI_6_0_ARM_PSCI_COMPLIANT BIT0
+#define EFI_ACPI_6_0_ARM_PSCI_USE_HVC BIT1
//
// Fixed ACPI Description Table Fixed Feature Flags
// All other bits are reserved and must be set to 0.
//
-#define EFI_ACPI_6_0_WBINVD BIT0
-#define EFI_ACPI_6_0_WBINVD_FLUSH BIT1
-#define EFI_ACPI_6_0_PROC_C1 BIT2
-#define EFI_ACPI_6_0_P_LVL2_UP BIT3
-#define EFI_ACPI_6_0_PWR_BUTTON BIT4
-#define EFI_ACPI_6_0_SLP_BUTTON BIT5
-#define EFI_ACPI_6_0_FIX_RTC BIT6
-#define EFI_ACPI_6_0_RTC_S4 BIT7
-#define EFI_ACPI_6_0_TMR_VAL_EXT BIT8
-#define EFI_ACPI_6_0_DCK_CAP BIT9
-#define EFI_ACPI_6_0_RESET_REG_SUP BIT10
-#define EFI_ACPI_6_0_SEALED_CASE BIT11
-#define EFI_ACPI_6_0_HEADLESS BIT12
-#define EFI_ACPI_6_0_CPU_SW_SLP BIT13
-#define EFI_ACPI_6_0_PCI_EXP_WAK BIT14
-#define EFI_ACPI_6_0_USE_PLATFORM_CLOCK BIT15
-#define EFI_ACPI_6_0_S4_RTC_STS_VALID BIT16
-#define EFI_ACPI_6_0_REMOTE_POWER_ON_CAPABLE BIT17
-#define EFI_ACPI_6_0_FORCE_APIC_CLUSTER_MODEL BIT18
-#define EFI_ACPI_6_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
-#define EFI_ACPI_6_0_HW_REDUCED_ACPI BIT20
-#define EFI_ACPI_6_0_LOW_POWER_S0_IDLE_CAPABLE BIT21
+#define EFI_ACPI_6_0_WBINVD BIT0
+#define EFI_ACPI_6_0_WBINVD_FLUSH BIT1
+#define EFI_ACPI_6_0_PROC_C1 BIT2
+#define EFI_ACPI_6_0_P_LVL2_UP BIT3
+#define EFI_ACPI_6_0_PWR_BUTTON BIT4
+#define EFI_ACPI_6_0_SLP_BUTTON BIT5
+#define EFI_ACPI_6_0_FIX_RTC BIT6
+#define EFI_ACPI_6_0_RTC_S4 BIT7
+#define EFI_ACPI_6_0_TMR_VAL_EXT BIT8
+#define EFI_ACPI_6_0_DCK_CAP BIT9
+#define EFI_ACPI_6_0_RESET_REG_SUP BIT10
+#define EFI_ACPI_6_0_SEALED_CASE BIT11
+#define EFI_ACPI_6_0_HEADLESS BIT12
+#define EFI_ACPI_6_0_CPU_SW_SLP BIT13
+#define EFI_ACPI_6_0_PCI_EXP_WAK BIT14
+#define EFI_ACPI_6_0_USE_PLATFORM_CLOCK BIT15
+#define EFI_ACPI_6_0_S4_RTC_STS_VALID BIT16
+#define EFI_ACPI_6_0_REMOTE_POWER_ON_CAPABLE BIT17
+#define EFI_ACPI_6_0_FORCE_APIC_CLUSTER_MODEL BIT18
+#define EFI_ACPI_6_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
+#define EFI_ACPI_6_0_HW_REDUCED_ACPI BIT20
+#define EFI_ACPI_6_0_LOW_POWER_S0_IDLE_CAPABLE BIT21
///
/// Firmware ACPI Control Structure
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
- UINT32 HardwareSignature;
- UINT32 FirmwareWakingVector;
- UINT32 GlobalLock;
- UINT32 Flags;
- UINT64 XFirmwareWakingVector;
- UINT8 Version;
- UINT8 Reserved0[3];
- UINT32 OspmFlags;
- UINT8 Reserved1[24];
+ UINT32 Signature;
+ UINT32 Length;
+ UINT32 HardwareSignature;
+ UINT32 FirmwareWakingVector;
+ UINT32 GlobalLock;
+ UINT32 Flags;
+ UINT64 XFirmwareWakingVector;
+ UINT8 Version;
+ UINT8 Reserved0[3];
+ UINT32 OspmFlags;
+ UINT8 Reserved1[24];
} EFI_ACPI_6_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
///
@@ -262,14 +257,14 @@
/// Firmware Control Structure Feature Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_6_0_S4BIOS_F BIT0
-#define EFI_ACPI_6_0_64BIT_WAKE_SUPPORTED_F BIT1
+#define EFI_ACPI_6_0_S4BIOS_F BIT0
+#define EFI_ACPI_6_0_64BIT_WAKE_SUPPORTED_F BIT1
///
/// OSPM Enabled Firmware Control Structure Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_6_0_OSPM_64BIT_WAKE_F BIT0
+#define EFI_ACPI_6_0_OSPM_64BIT_WAKE_F BIT0
//
// Differentiated System Description Table,
@@ -278,29 +273,29 @@
// no definition needed as they are common description table header, the same with
// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
//
-#define EFI_ACPI_6_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
-#define EFI_ACPI_6_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_6_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_6_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
///
/// Multiple APIC Description Table header definition. The rest of the table
/// must be defined in a platform specific manner.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 LocalApicAddress;
- UINT32 Flags;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 LocalApicAddress;
+ UINT32 Flags;
} EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
///
/// MADT Revision (as defined in ACPI 6.0 Errata A spec.)
///
-#define EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x04
+#define EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x04
///
/// Multiple APIC Flags
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_6_0_PCAT_COMPAT BIT0
+#define EFI_ACPI_6_0_PCAT_COMPAT BIT0
//
// Multiple APIC Description Table APIC structure types
@@ -332,57 +327,57 @@
/// Processor Local APIC Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorUid;
- UINT8 ApicId;
- UINT32 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorUid;
+ UINT8 ApicId;
+ UINT32 Flags;
} EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
///
/// Local APIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_6_0_LOCAL_APIC_ENABLED BIT0
+#define EFI_ACPI_6_0_LOCAL_APIC_ENABLED BIT0
///
/// IO APIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 IoApicAddress;
- UINT32 GlobalSystemInterruptBase;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 IoApicAddress;
+ UINT32 GlobalSystemInterruptBase;
} EFI_ACPI_6_0_IO_APIC_STRUCTURE;
///
/// Interrupt Source Override Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Bus;
- UINT8 Source;
- UINT32 GlobalSystemInterrupt;
- UINT16 Flags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Bus;
+ UINT8 Source;
+ UINT32 GlobalSystemInterrupt;
+ UINT16 Flags;
} EFI_ACPI_6_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
///
/// Platform Interrupt Sources Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT8 InterruptType;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT8 IoSapicVector;
- UINT32 GlobalSystemInterrupt;
- UINT32 PlatformInterruptSourceFlags;
- UINT8 CpeiProcessorOverride;
- UINT8 Reserved[31];
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
+ UINT8 CpeiProcessorOverride;
+ UINT8 Reserved[31];
} EFI_ACPI_6_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;
//
@@ -396,43 +391,43 @@
/// Non-Maskable Interrupt Source Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT32 GlobalSystemInterrupt;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 GlobalSystemInterrupt;
} EFI_ACPI_6_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
///
/// Local APIC NMI Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorUid;
- UINT16 Flags;
- UINT8 LocalApicLint;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorUid;
+ UINT16 Flags;
+ UINT8 LocalApicLint;
} EFI_ACPI_6_0_LOCAL_APIC_NMI_STRUCTURE;
///
/// Local APIC Address Override Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved;
- UINT64 LocalApicAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT64 LocalApicAddress;
} EFI_ACPI_6_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
///
/// IO SAPIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 IoApicId;
- UINT8 Reserved;
- UINT32 GlobalSystemInterruptBase;
- UINT64 IoSapicAddress;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 IoApicId;
+ UINT8 Reserved;
+ UINT32 GlobalSystemInterruptBase;
+ UINT64 IoSapicAddress;
} EFI_ACPI_6_0_IO_SAPIC_STRUCTURE;
///
@@ -440,169 +435,169 @@
/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 AcpiProcessorId;
- UINT8 LocalSapicId;
- UINT8 LocalSapicEid;
- UINT8 Reserved[3];
- UINT32 Flags;
- UINT32 ACPIProcessorUIDValue;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 AcpiProcessorId;
+ UINT8 LocalSapicId;
+ UINT8 LocalSapicEid;
+ UINT8 Reserved[3];
+ UINT32 Flags;
+ UINT32 ACPIProcessorUIDValue;
} EFI_ACPI_6_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
///
/// Platform Interrupt Sources Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT8 InterruptType;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT8 IoSapicVector;
- UINT32 GlobalSystemInterrupt;
- UINT32 PlatformInterruptSourceFlags;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT8 InterruptType;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT8 IoSapicVector;
+ UINT32 GlobalSystemInterrupt;
+ UINT32 PlatformInterruptSourceFlags;
} EFI_ACPI_6_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
///
/// Platform Interrupt Source Flags.
/// All other bits are reserved and must be set to 0.
///
-#define EFI_ACPI_6_0_CPEI_PROCESSOR_OVERRIDE BIT0
+#define EFI_ACPI_6_0_CPEI_PROCESSOR_OVERRIDE BIT0
///
/// Processor Local x2APIC Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Reserved[2];
- UINT32 X2ApicId;
- UINT32 Flags;
- UINT32 AcpiProcessorUid;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved[2];
+ UINT32 X2ApicId;
+ UINT32 Flags;
+ UINT32 AcpiProcessorUid;
} EFI_ACPI_6_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
///
/// Local x2APIC NMI Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Flags;
- UINT32 AcpiProcessorUid;
- UINT8 LocalX2ApicLint;
- UINT8 Reserved[3];
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Flags;
+ UINT32 AcpiProcessorUid;
+ UINT8 LocalX2ApicLint;
+ UINT8 Reserved[3];
} EFI_ACPI_6_0_LOCAL_X2APIC_NMI_STRUCTURE;
///
/// GIC Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved;
- UINT32 CPUInterfaceNumber;
- UINT32 AcpiProcessorUid;
- UINT32 Flags;
- UINT32 ParkingProtocolVersion;
- UINT32 PerformanceInterruptGsiv;
- UINT64 ParkedAddress;
- UINT64 PhysicalBaseAddress;
- UINT64 GICV;
- UINT64 GICH;
- UINT32 VGICMaintenanceInterrupt;
- UINT64 GICRBaseAddress;
- UINT64 MPIDR;
- UINT8 ProcessorPowerEfficiencyClass;
- UINT8 Reserved2[3];
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT32 CPUInterfaceNumber;
+ UINT32 AcpiProcessorUid;
+ UINT32 Flags;
+ UINT32 ParkingProtocolVersion;
+ UINT32 PerformanceInterruptGsiv;
+ UINT64 ParkedAddress;
+ UINT64 PhysicalBaseAddress;
+ UINT64 GICV;
+ UINT64 GICH;
+ UINT32 VGICMaintenanceInterrupt;
+ UINT64 GICRBaseAddress;
+ UINT64 MPIDR;
+ UINT8 ProcessorPowerEfficiencyClass;
+ UINT8 Reserved2[3];
} EFI_ACPI_6_0_GIC_STRUCTURE;
///
/// GIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_6_0_GIC_ENABLED BIT0
-#define EFI_ACPI_6_0_PERFORMANCE_INTERRUPT_MODEL BIT1
-#define EFI_ACPI_6_0_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2
+#define EFI_ACPI_6_0_GIC_ENABLED BIT0
+#define EFI_ACPI_6_0_PERFORMANCE_INTERRUPT_MODEL BIT1
+#define EFI_ACPI_6_0_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2
///
/// GIC Distributor Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved1;
- UINT32 GicId;
- UINT64 PhysicalBaseAddress;
- UINT32 SystemVectorBase;
- UINT8 GicVersion;
- UINT8 Reserved2[3];
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved1;
+ UINT32 GicId;
+ UINT64 PhysicalBaseAddress;
+ UINT32 SystemVectorBase;
+ UINT8 GicVersion;
+ UINT8 Reserved2[3];
} EFI_ACPI_6_0_GIC_DISTRIBUTOR_STRUCTURE;
///
/// GIC Version
///
-#define EFI_ACPI_6_0_GIC_V1 0x01
-#define EFI_ACPI_6_0_GIC_V2 0x02
-#define EFI_ACPI_6_0_GIC_V3 0x03
-#define EFI_ACPI_6_0_GIC_V4 0x04
+#define EFI_ACPI_6_0_GIC_V1 0x01
+#define EFI_ACPI_6_0_GIC_V2 0x02
+#define EFI_ACPI_6_0_GIC_V3 0x03
+#define EFI_ACPI_6_0_GIC_V4 0x04
///
/// GIC MSI Frame Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved1;
- UINT32 GicMsiFrameId;
- UINT64 PhysicalBaseAddress;
- UINT32 Flags;
- UINT16 SPICount;
- UINT16 SPIBase;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved1;
+ UINT32 GicMsiFrameId;
+ UINT64 PhysicalBaseAddress;
+ UINT32 Flags;
+ UINT16 SPICount;
+ UINT16 SPIBase;
} EFI_ACPI_6_0_GIC_MSI_FRAME_STRUCTURE;
///
/// GIC MSI Frame Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_6_0_SPI_COUNT_BASE_SELECT BIT0
+#define EFI_ACPI_6_0_SPI_COUNT_BASE_SELECT BIT0
///
/// GICR Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved;
- UINT64 DiscoveryRangeBaseAddress;
- UINT32 DiscoveryRangeLength;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT64 DiscoveryRangeBaseAddress;
+ UINT32 DiscoveryRangeLength;
} EFI_ACPI_6_0_GICR_STRUCTURE;
///
/// GIC Interrupt Translation Service Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT16 Reserved;
- UINT32 GicItsId;
- UINT64 PhysicalBaseAddress;
- UINT32 Reserved2;
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT32 GicItsId;
+ UINT64 PhysicalBaseAddress;
+ UINT32 Reserved2;
} EFI_ACPI_6_0_GIC_ITS_STRUCTURE;
///
/// Smart Battery Description Table (SBST)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 WarningEnergyLevel;
- UINT32 LowEnergyLevel;
- UINT32 CriticalEnergyLevel;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 WarningEnergyLevel;
+ UINT32 LowEnergyLevel;
+ UINT32 CriticalEnergyLevel;
} EFI_ACPI_6_0_SMART_BATTERY_DESCRIPTION_TABLE;
///
/// SBST Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
///
/// Embedded Controller Boot Resources Table (ECDT)
@@ -610,11 +605,11 @@
/// a fully qualified reference to the name space object.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE EcControl;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE EcData;
- UINT32 Uid;
- UINT8 GpeBit;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE EcControl;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE EcData;
+ UINT32 Uid;
+ UINT8 GpeBit;
} EFI_ACPI_6_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
///
@@ -627,9 +622,9 @@
/// must be defined in a platform specific manner.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 Reserved1; ///< Must be set to 1
- UINT64 Reserved2;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Reserved1; ///< Must be set to 1
+ UINT64 Reserved2;
} EFI_ACPI_6_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
///
@@ -651,83 +646,83 @@
/// Processor Local APIC/SAPIC Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 ProximityDomain7To0;
- UINT8 ApicId;
- UINT32 Flags;
- UINT8 LocalSapicEid;
- UINT8 ProximityDomain31To8[3];
- UINT32 ClockDomain;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProximityDomain7To0;
+ UINT8 ApicId;
+ UINT32 Flags;
+ UINT8 LocalSapicEid;
+ UINT8 ProximityDomain31To8[3];
+ UINT32 ClockDomain;
} EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
///
/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
+#define EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
///
/// Memory Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT32 ProximityDomain;
- UINT16 Reserved1;
- UINT32 AddressBaseLow;
- UINT32 AddressBaseHigh;
- UINT32 LengthLow;
- UINT32 LengthHigh;
- UINT32 Reserved2;
- UINT32 Flags;
- UINT64 Reserved3;
+ UINT8 Type;
+ UINT8 Length;
+ UINT32 ProximityDomain;
+ UINT16 Reserved1;
+ UINT32 AddressBaseLow;
+ UINT32 AddressBaseHigh;
+ UINT32 LengthLow;
+ UINT32 LengthHigh;
+ UINT32 Reserved2;
+ UINT32 Flags;
+ UINT64 Reserved3;
} EFI_ACPI_6_0_MEMORY_AFFINITY_STRUCTURE;
//
// Memory Flags. All other bits are reserved and must be 0.
//
-#define EFI_ACPI_6_0_MEMORY_ENABLED (1 << 0)
-#define EFI_ACPI_6_0_MEMORY_HOT_PLUGGABLE (1 << 1)
-#define EFI_ACPI_6_0_MEMORY_NONVOLATILE (1 << 2)
+#define EFI_ACPI_6_0_MEMORY_ENABLED (1 << 0)
+#define EFI_ACPI_6_0_MEMORY_HOT_PLUGGABLE (1 << 1)
+#define EFI_ACPI_6_0_MEMORY_NONVOLATILE (1 << 2)
///
/// Processor Local x2APIC Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Reserved1[2];
- UINT32 ProximityDomain;
- UINT32 X2ApicId;
- UINT32 Flags;
- UINT32 ClockDomain;
- UINT8 Reserved2[4];
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved1[2];
+ UINT32 ProximityDomain;
+ UINT32 X2ApicId;
+ UINT32 Flags;
+ UINT32 ClockDomain;
+ UINT8 Reserved2[4];
} EFI_ACPI_6_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
///
/// GICC Affinity Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT32 ProximityDomain;
- UINT32 AcpiProcessorUid;
- UINT32 Flags;
- UINT32 ClockDomain;
+ UINT8 Type;
+ UINT8 Length;
+ UINT32 ProximityDomain;
+ UINT32 AcpiProcessorUid;
+ UINT32 Flags;
+ UINT32 ClockDomain;
} EFI_ACPI_6_0_GICC_AFFINITY_STRUCTURE;
///
/// GICC Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_6_0_GICC_ENABLED (1 << 0)
+#define EFI_ACPI_6_0_GICC_ENABLED (1 << 0)
///
/// System Locality Distance Information Table (SLIT).
/// The rest of the table is a matrix.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT64 NumberOfSystemLocalities;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT64 NumberOfSystemLocalities;
} EFI_ACPI_6_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
///
@@ -739,14 +734,14 @@
/// Corrected Platform Error Polling Table (CPEP)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT8 Reserved[8];
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 Reserved[8];
} EFI_ACPI_6_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
///
/// CPEP Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
//
// CPEP processor structure types.
@@ -757,66 +752,66 @@
/// Corrected Platform Error Polling Processor Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 ProcessorId;
- UINT8 ProcessorEid;
- UINT32 PollingInterval;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 ProcessorId;
+ UINT8 ProcessorEid;
+ UINT32 PollingInterval;
} EFI_ACPI_6_0_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
///
/// Maximum System Characteristics Table (MSCT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 OffsetProxDomInfo;
- UINT32 MaximumNumberOfProximityDomains;
- UINT32 MaximumNumberOfClockDomains;
- UINT64 MaximumPhysicalAddress;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 OffsetProxDomInfo;
+ UINT32 MaximumNumberOfProximityDomains;
+ UINT32 MaximumNumberOfClockDomains;
+ UINT64 MaximumPhysicalAddress;
} EFI_ACPI_6_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
///
/// MSCT Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
///
/// Maximum Proximity Domain Information Structure Definition
///
typedef struct {
- UINT8 Revision;
- UINT8 Length;
- UINT32 ProximityDomainRangeLow;
- UINT32 ProximityDomainRangeHigh;
- UINT32 MaximumProcessorCapacity;
- UINT64 MaximumMemoryCapacity;
+ UINT8 Revision;
+ UINT8 Length;
+ UINT32 ProximityDomainRangeLow;
+ UINT32 ProximityDomainRangeHigh;
+ UINT32 MaximumProcessorCapacity;
+ UINT64 MaximumMemoryCapacity;
} EFI_ACPI_6_0_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
///
/// ACPI RAS Feature Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT8 PlatformCommunicationChannelIdentifier[12];
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 PlatformCommunicationChannelIdentifier[12];
} EFI_ACPI_6_0_RAS_FEATURE_TABLE;
///
/// RASF Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_RAS_FEATURE_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_RAS_FEATURE_TABLE_REVISION 0x01
///
/// ACPI RASF Platform Communication Channel Shared Memory Region definition.
///
typedef struct {
- UINT32 Signature;
- UINT16 Command;
- UINT16 Status;
- UINT16 Version;
- UINT8 RASCapabilities[16];
- UINT8 SetRASCapabilities[16];
- UINT16 NumberOfRASFParameterBlocks;
- UINT32 SetRASCapabilitiesStatus;
+ UINT32 Signature;
+ UINT16 Command;
+ UINT16 Status;
+ UINT16 Version;
+ UINT8 RASCapabilities[16];
+ UINT8 SetRASCapabilities[16];
+ UINT16 NumberOfRASFParameterBlocks;
+ UINT32 SetRASCapabilitiesStatus;
} EFI_ACPI_6_0_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
///
@@ -834,52 +829,52 @@
/// ACPI RASF Parameter Block structure for PATROL_SCRUB
///
typedef struct {
- UINT16 Type;
- UINT16 Version;
- UINT16 Length;
- UINT16 PatrolScrubCommand;
- UINT64 RequestedAddressRange[2];
- UINT64 ActualAddressRange[2];
- UINT16 Flags;
- UINT8 RequestedSpeed;
+ UINT16 Type;
+ UINT16 Version;
+ UINT16 Length;
+ UINT16 PatrolScrubCommand;
+ UINT64 RequestedAddressRange[2];
+ UINT64 ActualAddressRange[2];
+ UINT16 Flags;
+ UINT8 RequestedSpeed;
} EFI_ACPI_6_0_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;
///
/// ACPI RASF Patrol Scrub command
///
-#define EFI_ACPI_6_0_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
-#define EFI_ACPI_6_0_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
-#define EFI_ACPI_6_0_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
+#define EFI_ACPI_6_0_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
+#define EFI_ACPI_6_0_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
+#define EFI_ACPI_6_0_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
///
/// Memory Power State Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT8 PlatformCommunicationChannelIdentifier;
- UINT8 Reserved[3];
-// Memory Power Node Structure
-// Memory Power State Characteristics
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT8 PlatformCommunicationChannelIdentifier;
+ UINT8 Reserved[3];
+ // Memory Power Node Structure
+ // Memory Power State Characteristics
} EFI_ACPI_6_0_MEMORY_POWER_STATUS_TABLE;
///
/// MPST Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_MEMORY_POWER_STATE_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_MEMORY_POWER_STATE_TABLE_REVISION 0x01
///
/// MPST Platform Communication Channel Shared Memory Region definition.
///
typedef struct {
- UINT32 Signature;
- UINT16 Command;
- UINT16 Status;
- UINT32 MemoryPowerCommandRegister;
- UINT32 MemoryPowerStatusRegister;
- UINT32 PowerStateId;
- UINT32 MemoryPowerNodeId;
- UINT64 MemoryEnergyConsumed;
- UINT64 ExpectedAveragePowerComsuned;
+ UINT32 Signature;
+ UINT16 Command;
+ UINT16 Status;
+ UINT32 MemoryPowerCommandRegister;
+ UINT32 MemoryPowerStatusRegister;
+ UINT32 PowerStateId;
+ UINT32 MemoryPowerNodeId;
+ UINT64 MemoryEnergyConsumed;
+ UINT64 ExpectedAveragePowerComsuned;
} EFI_ACPI_6_0_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
///
@@ -890,186 +885,186 @@
///
/// ACPI MPST Memory Power command
///
-#define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
-#define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
-#define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
-#define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
+#define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
+#define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
+#define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
+#define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
///
/// MPST Memory Power Node Table
///
typedef struct {
- UINT8 PowerStateValue;
- UINT8 PowerStateInformationIndex;
+ UINT8 PowerStateValue;
+ UINT8 PowerStateInformationIndex;
} EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE;
typedef struct {
- UINT8 Flag;
- UINT8 Reserved;
- UINT16 MemoryPowerNodeId;
- UINT32 Length;
- UINT64 AddressBase;
- UINT64 AddressLength;
- UINT32 NumberOfPowerStates;
- UINT32 NumberOfPhysicalComponents;
-//EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
-//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
+ UINT8 Flag;
+ UINT8 Reserved;
+ UINT16 MemoryPowerNodeId;
+ UINT32 Length;
+ UINT64 AddressBase;
+ UINT64 AddressLength;
+ UINT32 NumberOfPowerStates;
+ UINT32 NumberOfPhysicalComponents;
+ // EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
+ // UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
} EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE;
-#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
-#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
-#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
+#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
+#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
+#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
typedef struct {
- UINT16 MemoryPowerNodeCount;
- UINT8 Reserved[2];
+ UINT16 MemoryPowerNodeCount;
+ UINT8 Reserved[2];
} EFI_ACPI_6_0_MPST_MEMORY_POWER_NODE_TABLE;
///
/// MPST Memory Power State Characteristics Table
///
typedef struct {
- UINT8 PowerStateStructureID;
- UINT8 Flag;
- UINT16 Reserved;
- UINT32 AveragePowerConsumedInMPS0;
- UINT32 RelativePowerSavingToMPS0;
- UINT64 ExitLatencyToMPS0;
+ UINT8 PowerStateStructureID;
+ UINT8 Flag;
+ UINT16 Reserved;
+ UINT32 AveragePowerConsumedInMPS0;
+ UINT32 RelativePowerSavingToMPS0;
+ UINT64 ExitLatencyToMPS0;
} EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;
-#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
-#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
-#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
+#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
+#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
+#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
typedef struct {
- UINT16 MemoryPowerStateCharacteristicsCount;
- UINT8 Reserved[2];
+ UINT16 MemoryPowerStateCharacteristicsCount;
+ UINT8 Reserved[2];
} EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;
///
/// Memory Topology Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 Reserved;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Reserved;
} EFI_ACPI_6_0_MEMORY_TOPOLOGY_TABLE;
///
/// PMTT Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
///
/// Common Memory Aggregator Device Structure.
///
typedef struct {
- UINT8 Type;
- UINT8 Reserved;
- UINT16 Length;
- UINT16 Flags;
- UINT16 Reserved1;
+ UINT8 Type;
+ UINT8 Reserved;
+ UINT16 Length;
+ UINT16 Flags;
+ UINT16 Reserved1;
} EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
///
/// Memory Aggregator Device Type
///
-#define EFI_ACPI_6_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1
-#define EFI_ACPI_6_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2
-#define EFI_ACPI_6_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3
+#define EFI_ACPI_6_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x0
+#define EFI_ACPI_6_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x1
+#define EFI_ACPI_6_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x2
///
/// Socket Memory Aggregator Device Structure.
///
typedef struct {
- EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
- UINT16 SocketIdentifier;
- UINT16 Reserved;
-//EFI_ACPI_6_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
+ EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
+ UINT16 SocketIdentifier;
+ UINT16 Reserved;
+ // EFI_ACPI_6_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
} EFI_ACPI_6_0_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
///
/// MemoryController Memory Aggregator Device Structure.
///
typedef struct {
- EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
- UINT32 ReadLatency;
- UINT32 WriteLatency;
- UINT32 ReadBandwidth;
- UINT32 WriteBandwidth;
- UINT16 OptimalAccessUnit;
- UINT16 OptimalAccessAlignment;
- UINT16 Reserved;
- UINT16 NumberOfProximityDomains;
-//UINT32 ProximityDomain[NumberOfProximityDomains];
-//EFI_ACPI_6_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
+ EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
+ UINT32 ReadLatency;
+ UINT32 WriteLatency;
+ UINT32 ReadBandwidth;
+ UINT32 WriteBandwidth;
+ UINT16 OptimalAccessUnit;
+ UINT16 OptimalAccessAlignment;
+ UINT16 Reserved;
+ UINT16 NumberOfProximityDomains;
+ // UINT32 ProximityDomain[NumberOfProximityDomains];
+ // EFI_ACPI_6_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
} EFI_ACPI_6_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
///
/// DIMM Memory Aggregator Device Structure.
///
typedef struct {
- EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
- UINT16 PhysicalComponentIdentifier;
- UINT16 Reserved;
- UINT32 SizeOfDimm;
- UINT32 SmbiosHandle;
+ EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
+ UINT16 PhysicalComponentIdentifier;
+ UINT16 Reserved;
+ UINT32 SizeOfDimm;
+ UINT32 SmbiosHandle;
} EFI_ACPI_6_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
///
/// Boot Graphics Resource Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
///
/// 2-bytes (16 bit) version ID. This value must be 1.
///
- UINT16 Version;
+ UINT16 Version;
///
/// 1-byte status field indicating current status about the table.
/// Bits[7:1] = Reserved (must be zero)
/// Bit [0] = Valid. A one indicates the boot image graphic is valid.
///
- UINT8 Status;
+ UINT8 Status;
///
/// 1-byte enumerated type field indicating format of the image.
/// 0 = Bitmap
/// 1 - 255 Reserved (for future use)
///
- UINT8 ImageType;
+ UINT8 ImageType;
///
/// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
/// of the image bitmap.
///
- UINT64 ImageAddress;
+ UINT64 ImageAddress;
///
/// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
/// (X, Y) display offset of the top left corner of the boot image.
/// The top left corner of the display is at offset (0, 0).
///
- UINT32 ImageOffsetX;
+ UINT32 ImageOffsetX;
///
/// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
/// (X, Y) display offset of the top left corner of the boot image.
/// The top left corner of the display is at offset (0, 0).
///
- UINT32 ImageOffsetY;
+ UINT32 ImageOffsetY;
} EFI_ACPI_6_0_BOOT_GRAPHICS_RESOURCE_TABLE;
///
/// BGRT Revision
///
-#define EFI_ACPI_6_0_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
+#define EFI_ACPI_6_0_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
///
/// BGRT Version
///
-#define EFI_ACPI_6_0_BGRT_VERSION 0x01
+#define EFI_ACPI_6_0_BGRT_VERSION 0x01
///
/// BGRT Status
///
-#define EFI_ACPI_6_0_BGRT_STATUS_NOT_DISPLAYED 0x00
-#define EFI_ACPI_6_0_BGRT_STATUS_DISPLAYED 0x01
+#define EFI_ACPI_6_0_BGRT_STATUS_NOT_DISPLAYED 0x00
+#define EFI_ACPI_6_0_BGRT_STATUS_DISPLAYED 0x01
///
/// BGRT Image Type
@@ -1079,26 +1074,26 @@
///
/// FPDT Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
///
/// FPDT Performance Record Types
///
-#define EFI_ACPI_6_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
-#define EFI_ACPI_6_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
+#define EFI_ACPI_6_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
+#define EFI_ACPI_6_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
///
/// FPDT Performance Record Revision
///
-#define EFI_ACPI_6_0_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
-#define EFI_ACPI_6_0_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
+#define EFI_ACPI_6_0_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
+#define EFI_ACPI_6_0_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
///
/// FPDT Runtime Performance Record Types
///
-#define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
-#define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
-#define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
+#define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
+#define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
+#define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
///
/// FPDT Runtime Performance Record Revision
@@ -1111,77 +1106,77 @@
/// FPDT Performance Record header
///
typedef struct {
- UINT16 Type;
- UINT8 Length;
- UINT8 Revision;
+ UINT16 Type;
+ UINT8 Length;
+ UINT8 Revision;
} EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER;
///
/// FPDT Performance Table header
///
typedef struct {
- UINT32 Signature;
- UINT32 Length;
+ UINT32 Signature;
+ UINT32 Length;
} EFI_ACPI_6_0_FPDT_PERFORMANCE_TABLE_HEADER;
///
/// FPDT Firmware Basic Boot Performance Pointer Record Structure
///
typedef struct {
- EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
- UINT32 Reserved;
+ EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ UINT32 Reserved;
///
/// 64-bit processor-relative physical address of the Basic Boot Performance Table.
///
- UINT64 BootPerformanceTablePointer;
+ UINT64 BootPerformanceTablePointer;
} EFI_ACPI_6_0_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;
///
/// FPDT S3 Performance Table Pointer Record Structure
///
typedef struct {
- EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
- UINT32 Reserved;
+ EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ UINT32 Reserved;
///
/// 64-bit processor-relative physical address of the S3 Performance Table.
///
- UINT64 S3PerformanceTablePointer;
+ UINT64 S3PerformanceTablePointer;
} EFI_ACPI_6_0_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;
///
/// FPDT Firmware Basic Boot Performance Record Structure
///
typedef struct {
- EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
- UINT32 Reserved;
+ EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ UINT32 Reserved;
///
/// Timer value logged at the beginning of firmware image execution.
/// This may not always be zero or near zero.
///
- UINT64 ResetEnd;
+ UINT64 ResetEnd;
///
/// Timer value logged just prior to loading the OS boot loader into memory.
/// For non-UEFI compatible boots, this field must be zero.
///
- UINT64 OsLoaderLoadImageStart;
+ UINT64 OsLoaderLoadImageStart;
///
/// Timer value logged just prior to launching the previously loaded OS boot loader image.
/// For non-UEFI compatible boots, the timer value logged will be just prior
/// to the INT 19h handler invocation.
///
- UINT64 OsLoaderStartImageStart;
+ UINT64 OsLoaderStartImageStart;
///
/// Timer value logged at the point when the OS loader calls the
/// ExitBootServices function for UEFI compatible firmware.
/// For non-UEFI compatible boots, this field must be zero.
///
- UINT64 ExitBootServicesEntry;
+ UINT64 ExitBootServicesEntry;
///
- /// Timer value logged at the point just prior towhen the OS loader gaining
+ /// Timer value logged at the point just prior to when the OS loader gaining
/// control back from calls the ExitBootServices function for UEFI compatible firmware.
/// For non-UEFI compatible boots, this field must be zero.
///
- UINT64 ExitBootServicesExit;
+ UINT64 ExitBootServicesExit;
} EFI_ACPI_6_0_FPDT_FIRMWARE_BASIC_BOOT_RECORD;
///
@@ -1193,7 +1188,7 @@
// FPDT Firmware Basic Boot Performance Table
//
typedef struct {
- EFI_ACPI_6_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
+ EFI_ACPI_6_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
//
// one or more Performance Records.
//
@@ -1208,7 +1203,7 @@
// FPDT Firmware S3 Boot Performance Table
//
typedef struct {
- EFI_ACPI_6_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
+ EFI_ACPI_6_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
//
// one or more Performance Records.
//
@@ -1218,145 +1213,145 @@
/// FPDT Basic S3 Resume Performance Record
///
typedef struct {
- EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
///
/// A count of the number of S3 resume cycles since the last full boot sequence.
///
- UINT32 ResumeCount;
+ UINT32 ResumeCount;
///
/// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
/// OS waking vector. Only the most recent resume cycle's time is retained.
///
- UINT64 FullResume;
+ UINT64 FullResume;
///
/// Average timer value of all resume cycles logged since the last full boot
/// sequence, including the most recent resume. Note that the entire log of
/// timer values does not need to be retained in order to calculate this average.
///
- UINT64 AverageResume;
+ UINT64 AverageResume;
} EFI_ACPI_6_0_FPDT_S3_RESUME_RECORD;
///
/// FPDT Basic S3 Suspend Performance Record
///
typedef struct {
- EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
+ EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
///
/// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
/// Only the most recent suspend cycle's timer value is retained.
///
- UINT64 SuspendStart;
+ UINT64 SuspendStart;
///
/// Timer value recorded at the final firmware write to SLP_TYP (or other
/// mechanism) used to trigger hardware entry to S3.
/// Only the most recent suspend cycle's timer value is retained.
///
- UINT64 SuspendEnd;
+ UINT64 SuspendEnd;
} EFI_ACPI_6_0_FPDT_S3_SUSPEND_RECORD;
///
/// Firmware Performance Record Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
} EFI_ACPI_6_0_FIRMWARE_PERFORMANCE_RECORD_TABLE;
///
/// Generic Timer Description Table definition.
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT64 CntControlBasePhysicalAddress;
- UINT32 Reserved;
- UINT32 SecurePL1TimerGSIV;
- UINT32 SecurePL1TimerFlags;
- UINT32 NonSecurePL1TimerGSIV;
- UINT32 NonSecurePL1TimerFlags;
- UINT32 VirtualTimerGSIV;
- UINT32 VirtualTimerFlags;
- UINT32 NonSecurePL2TimerGSIV;
- UINT32 NonSecurePL2TimerFlags;
- UINT64 CntReadBasePhysicalAddress;
- UINT32 PlatformTimerCount;
- UINT32 PlatformTimerOffset;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT64 CntControlBasePhysicalAddress;
+ UINT32 Reserved;
+ UINT32 SecurePL1TimerGSIV;
+ UINT32 SecurePL1TimerFlags;
+ UINT32 NonSecurePL1TimerGSIV;
+ UINT32 NonSecurePL1TimerFlags;
+ UINT32 VirtualTimerGSIV;
+ UINT32 VirtualTimerFlags;
+ UINT32 NonSecurePL2TimerGSIV;
+ UINT32 NonSecurePL2TimerFlags;
+ UINT64 CntReadBasePhysicalAddress;
+ UINT32 PlatformTimerCount;
+ UINT32 PlatformTimerOffset;
} EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLE;
///
/// GTDT Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02
+#define EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02
///
/// Timer Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_6_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
-#define EFI_ACPI_6_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
-#define EFI_ACPI_6_0_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2
+#define EFI_ACPI_6_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
+#define EFI_ACPI_6_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
+#define EFI_ACPI_6_0_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2
///
/// Platform Timer Type
///
-#define EFI_ACPI_6_0_GTDT_GT_BLOCK 0
-#define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG 1
+#define EFI_ACPI_6_0_GTDT_GT_BLOCK 0
+#define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG 1
///
/// GT Block Structure
///
typedef struct {
- UINT8 Type;
- UINT16 Length;
- UINT8 Reserved;
- UINT64 CntCtlBase;
- UINT32 GTBlockTimerCount;
- UINT32 GTBlockTimerOffset;
+ UINT8 Type;
+ UINT16 Length;
+ UINT8 Reserved;
+ UINT64 CntCtlBase;
+ UINT32 GTBlockTimerCount;
+ UINT32 GTBlockTimerOffset;
} EFI_ACPI_6_0_GTDT_GT_BLOCK_STRUCTURE;
///
/// GT Block Timer Structure
///
typedef struct {
- UINT8 GTFrameNumber;
- UINT8 Reserved[3];
- UINT64 CntBaseX;
- UINT64 CntEL0BaseX;
- UINT32 GTxPhysicalTimerGSIV;
- UINT32 GTxPhysicalTimerFlags;
- UINT32 GTxVirtualTimerGSIV;
- UINT32 GTxVirtualTimerFlags;
- UINT32 GTxCommonFlags;
+ UINT8 GTFrameNumber;
+ UINT8 Reserved[3];
+ UINT64 CntBaseX;
+ UINT64 CntEL0BaseX;
+ UINT32 GTxPhysicalTimerGSIV;
+ UINT32 GTxPhysicalTimerFlags;
+ UINT32 GTxVirtualTimerGSIV;
+ UINT32 GTxVirtualTimerFlags;
+ UINT32 GTxCommonFlags;
} EFI_ACPI_6_0_GTDT_GT_BLOCK_TIMER_STRUCTURE;
///
/// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_6_0_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
-#define EFI_ACPI_6_0_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
+#define EFI_ACPI_6_0_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
+#define EFI_ACPI_6_0_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
///
/// Common Flags Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_6_0_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0
-#define EFI_ACPI_6_0_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1
+#define EFI_ACPI_6_0_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0
+#define EFI_ACPI_6_0_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1
///
/// SBSA Generic Watchdog Structure
///
typedef struct {
- UINT8 Type;
- UINT16 Length;
- UINT8 Reserved;
- UINT64 RefreshFramePhysicalAddress;
- UINT64 WatchdogControlFramePhysicalAddress;
- UINT32 WatchdogTimerGSIV;
- UINT32 WatchdogTimerFlags;
+ UINT8 Type;
+ UINT16 Length;
+ UINT8 Reserved;
+ UINT64 RefreshFramePhysicalAddress;
+ UINT64 WatchdogControlFramePhysicalAddress;
+ UINT32 WatchdogTimerGSIV;
+ UINT32 WatchdogTimerFlags;
} EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;
///
/// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0.
///
-#define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0
-#define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1
-#define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2
+#define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0
+#define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1
+#define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2
//
// NVDIMM Firmware Interface Table definition.
@@ -1369,7 +1364,7 @@
//
// NFIT Version (as defined in ACPI 6.0 spec.)
//
-#define EFI_ACPI_6_0_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION 0x1
+#define EFI_ACPI_6_0_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION 0x1
//
// Definition for NFIT Table Structure Types
@@ -1386,46 +1381,46 @@
// Definition for NFIT Structure Header
//
typedef struct {
- UINT16 Type;
- UINT16 Length;
+ UINT16 Type;
+ UINT16 Length;
} EFI_ACPI_6_0_NFIT_STRUCTURE_HEADER;
//
// Definition for System Physical Address Range Structure
//
-#define EFI_ACPI_6_0_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT BIT0
-#define EFI_ACPI_6_0_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID BIT1
-#define EFI_ACPI_6_0_NFIT_GUID_VOLATILE_MEMORY_REGION { 0x7305944F, 0xFDDA, 0x44E3, { 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }}
-#define EFI_ACPI_6_0_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION { 0x66F0D379, 0xB4F3, 0x4074, { 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }}
-#define EFI_ACPI_6_0_NFIT_GUID_NVDIMM_CONTROL_REGION { 0x92F701F6, 0x13B4, 0x405D, { 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }}
-#define EFI_ACPI_6_0_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION { 0x91AF0530, 0x5D86, 0x470E, { 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }}
-#define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE { 0x77AB535A, 0x45FC, 0x624B, { 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }}
-#define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE { 0x3D5ABD30, 0x4175, 0x87CE, { 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }}
-#define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT { 0x5CEA02C9, 0x4D07, 0x69D3, { 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }}
-#define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT { 0x08018188, 0x42CD, 0xBB48, { 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D }}
+#define EFI_ACPI_6_0_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT BIT0
+#define EFI_ACPI_6_0_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID BIT1
+#define EFI_ACPI_6_0_NFIT_GUID_VOLATILE_MEMORY_REGION { 0x7305944F, 0xFDDA, 0x44E3, { 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }}
+#define EFI_ACPI_6_0_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION { 0x66F0D379, 0xB4F3, 0x4074, { 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }}
+#define EFI_ACPI_6_0_NFIT_GUID_NVDIMM_CONTROL_REGION { 0x92F701F6, 0x13B4, 0x405D, { 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }}
+#define EFI_ACPI_6_0_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION { 0x91AF0530, 0x5D86, 0x470E, { 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }}
+#define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE { 0x77AB535A, 0x45FC, 0x624B, { 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }}
+#define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE { 0x3D5ABD30, 0x4175, 0x87CE, { 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }}
+#define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT { 0x5CEA02C9, 0x4D07, 0x69D3, { 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }}
+#define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT { 0x08018188, 0x42CD, 0xBB48, { 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D }}
typedef struct {
- UINT16 Type;
- UINT16 Length;
- UINT16 SPARangeStructureIndex;
- UINT16 Flags;
- UINT32 Reserved_8;
- UINT32 ProximityDomain;
- GUID AddressRangeTypeGUID;
- UINT64 SystemPhysicalAddressRangeBase;
- UINT64 SystemPhysicalAddressRangeLength;
- UINT64 AddressRangeMemoryMappingAttribute;
+ UINT16 Type;
+ UINT16 Length;
+ UINT16 SPARangeStructureIndex;
+ UINT16 Flags;
+ UINT32 Reserved_8;
+ UINT32 ProximityDomain;
+ GUID AddressRangeTypeGUID;
+ UINT64 SystemPhysicalAddressRangeBase;
+ UINT64 SystemPhysicalAddressRangeLength;
+ UINT64 AddressRangeMemoryMappingAttribute;
} EFI_ACPI_6_0_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE;
//
// Definition for Memory Device to System Physical Address Range Mapping Structure
//
typedef struct {
- UINT32 DIMMNumber:4;
- UINT32 MemoryChannelNumber:4;
- UINT32 MemoryControllerID:4;
- UINT32 SocketID:4;
- UINT32 NodeControllerID:12;
- UINT32 Reserved_28:4;
+ UINT32 DIMMNumber : 4;
+ UINT32 MemoryChannelNumber : 4;
+ UINT32 MemoryControllerID : 4;
+ UINT32 SocketID : 4;
+ UINT32 NodeControllerID : 12;
+ UINT32 Reserved_28 : 4;
} EFI_ACPI_6_0_NFIT_DEVICE_HANDLE;
#define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_STATE_FLAGS_PREVIOUS_SAVE_FAIL BIT0
@@ -1435,155 +1430,161 @@
#define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_STATE_FLAGS_SMART_HEALTH_EVENTS_PRIOR_OSPM_HAND_OFF BIT4
#define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_ENABLED_TO_NOTIFY_OSPM_ON_SMART_HEALTH_EVENTS BIT5
typedef struct {
- UINT16 Type;
- UINT16 Length;
- EFI_ACPI_6_0_NFIT_DEVICE_HANDLE NFITDeviceHandle;
- UINT16 MemoryDevicePhysicalID;
- UINT16 MemoryDeviceRegionID;
- UINT16 SPARangeStructureIndex ;
- UINT16 NVDIMMControlRegionStructureIndex;
- UINT64 MemoryDeviceRegionSize;
- UINT64 RegionOffset;
- UINT64 MemoryDevicePhysicalAddressRegionBase;
- UINT16 InterleaveStructureIndex;
- UINT16 InterleaveWays;
- UINT16 MemoryDeviceStateFlags;
- UINT16 Reserved_46;
+ UINT16 Type;
+ UINT16 Length;
+ EFI_ACPI_6_0_NFIT_DEVICE_HANDLE NFITDeviceHandle;
+ UINT16 MemoryDevicePhysicalID;
+ UINT16 MemoryDeviceRegionID;
+ UINT16 SPARangeStructureIndex;
+ UINT16 NVDIMMControlRegionStructureIndex;
+ UINT64 MemoryDeviceRegionSize;
+ UINT64 RegionOffset;
+ UINT64 MemoryDevicePhysicalAddressRegionBase;
+ UINT16 InterleaveStructureIndex;
+ UINT16 InterleaveWays;
+ UINT16 MemoryDeviceStateFlags;
+ UINT16 Reserved_46;
} EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_TO_SYSTEM_ADDRESS_RANGE_MAP_STRUCTURE;
//
// Definition for Interleave Structure
//
typedef struct {
- UINT16 Type;
- UINT16 Length;
- UINT16 InterleaveStructureIndex;
- UINT16 Reserved_6;
- UINT32 NumberOfLines;
- UINT32 LineSize;
-//UINT32 LineOffset[NumberOfLines];
+ UINT16 Type;
+ UINT16 Length;
+ UINT16 InterleaveStructureIndex;
+ UINT16 Reserved_6;
+ UINT32 NumberOfLines;
+ UINT32 LineSize;
+ // UINT32 LineOffset[NumberOfLines];
} EFI_ACPI_6_0_NFIT_INTERLEAVE_STRUCTURE;
//
// Definition for SMBIOS Management Information Structure
//
typedef struct {
- UINT16 Type;
- UINT16 Length;
- UINT32 Reserved_4;
-//UINT8 Data[];
+ UINT16 Type;
+ UINT16 Length;
+ UINT32 Reserved_4;
+ // UINT8 Data[];
} EFI_ACPI_6_0_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE;
//
// Definition for NVDIMM Control Region Structure
//
-#define EFI_ACPI_6_0_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED BIT0
+#define EFI_ACPI_6_0_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED BIT0
typedef struct {
- UINT16 Type;
- UINT16 Length;
- UINT16 NVDIMMControlRegionStructureIndex;
- UINT16 VendorID;
- UINT16 DeviceID;
- UINT16 RevisionID;
- UINT16 SubsystemVendorID;
- UINT16 SubsystemDeviceID;
- UINT16 SubsystemRevisionID;
- UINT8 Reserved_18[6];
- UINT32 SerialNumber;
- UINT16 RegionFormatInterfaceCode;
- UINT16 NumberOfBlockControlWindows;
- UINT64 SizeOfBlockControlWindow;
- UINT64 CommandRegisterOffsetInBlockControlWindow;
- UINT64 SizeOfCommandRegisterInBlockControlWindows;
- UINT64 StatusRegisterOffsetInBlockControlWindow;
- UINT64 SizeOfStatusRegisterInBlockControlWindows;
- UINT16 NVDIMMControlRegionFlag;
- UINT8 Reserved_74[6];
+ UINT16 Type;
+ UINT16 Length;
+ UINT16 NVDIMMControlRegionStructureIndex;
+ UINT16 VendorID;
+ UINT16 DeviceID;
+ UINT16 RevisionID;
+ UINT16 SubsystemVendorID;
+ UINT16 SubsystemDeviceID;
+ UINT16 SubsystemRevisionID;
+ UINT8 Reserved_18[6];
+ UINT32 SerialNumber;
+ UINT16 RegionFormatInterfaceCode;
+ UINT16 NumberOfBlockControlWindows;
+ UINT64 SizeOfBlockControlWindow;
+ UINT64 CommandRegisterOffsetInBlockControlWindow;
+ UINT64 SizeOfCommandRegisterInBlockControlWindows;
+ UINT64 StatusRegisterOffsetInBlockControlWindow;
+ UINT64 SizeOfStatusRegisterInBlockControlWindows;
+ UINT16 NVDIMMControlRegionFlag;
+ UINT8 Reserved_74[6];
} EFI_ACPI_6_0_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE;
//
// Definition for NVDIMM Block Data Window Region Structure
//
typedef struct {
- UINT16 Type;
- UINT16 Length;
- UINT16 NVDIMMControlRegionStructureIndex;
- UINT16 NumberOfBlockDataWindows;
- UINT64 BlockDataWindowStartOffset;
- UINT64 SizeOfBlockDataWindow;
- UINT64 BlockAccessibleMemoryCapacity;
- UINT64 BeginningAddressOfFirstBlockInBlockAccessibleMemory;
+ UINT16 Type;
+ UINT16 Length;
+ UINT16 NVDIMMControlRegionStructureIndex;
+ UINT16 NumberOfBlockDataWindows;
+ UINT64 BlockDataWindowStartOffset;
+ UINT64 SizeOfBlockDataWindow;
+ UINT64 BlockAccessibleMemoryCapacity;
+ UINT64 BeginningAddressOfFirstBlockInBlockAccessibleMemory;
} EFI_ACPI_6_0_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE;
//
// Definition for Flush Hint Address Structure
//
typedef struct {
- UINT16 Type;
- UINT16 Length;
- EFI_ACPI_6_0_NFIT_DEVICE_HANDLE NFITDeviceHandle;
- UINT16 NumberOfFlushHintAddresses;
- UINT8 Reserved_10[6];
-//UINT64 FlushHintAddress[NumberOfFlushHintAddresses];
+ UINT16 Type;
+ UINT16 Length;
+ EFI_ACPI_6_0_NFIT_DEVICE_HANDLE NFITDeviceHandle;
+ UINT16 NumberOfFlushHintAddresses;
+ UINT8 Reserved_10[6];
+ // UINT64 FlushHintAddress[NumberOfFlushHintAddresses];
} EFI_ACPI_6_0_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE;
///
/// Boot Error Record Table (BERT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 BootErrorRegionLength;
- UINT64 BootErrorRegion;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 BootErrorRegionLength;
+ UINT64 BootErrorRegion;
} EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_HEADER;
///
/// BERT Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
///
/// Boot Error Region Block Status Definition
///
typedef struct {
- UINT32 UncorrectableErrorValid:1;
- UINT32 CorrectableErrorValid:1;
- UINT32 MultipleUncorrectableErrors:1;
- UINT32 MultipleCorrectableErrors:1;
- UINT32 ErrorDataEntryCount:10;
- UINT32 Reserved:18;
+ UINT32 UncorrectableErrorValid : 1;
+ UINT32 CorrectableErrorValid : 1;
+ UINT32 MultipleUncorrectableErrors : 1;
+ UINT32 MultipleCorrectableErrors : 1;
+ UINT32 ErrorDataEntryCount : 10;
+ UINT32 Reserved : 18;
} EFI_ACPI_6_0_ERROR_BLOCK_STATUS;
///
/// Boot Error Region Definition
///
typedef struct {
- EFI_ACPI_6_0_ERROR_BLOCK_STATUS BlockStatus;
- UINT32 RawDataOffset;
- UINT32 RawDataLength;
- UINT32 DataLength;
- UINT32 ErrorSeverity;
+ EFI_ACPI_6_0_ERROR_BLOCK_STATUS BlockStatus;
+ UINT32 RawDataOffset;
+ UINT32 RawDataLength;
+ UINT32 DataLength;
+ UINT32 ErrorSeverity;
} EFI_ACPI_6_0_BOOT_ERROR_REGION_STRUCTURE;
//
// Boot Error Severity types
//
-#define EFI_ACPI_6_0_ERROR_SEVERITY_CORRECTABLE 0x00
+#define EFI_ACPI_6_0_ERROR_SEVERITY_RECOVERABLE 0x00
#define EFI_ACPI_6_0_ERROR_SEVERITY_FATAL 0x01
#define EFI_ACPI_6_0_ERROR_SEVERITY_CORRECTED 0x02
#define EFI_ACPI_6_0_ERROR_SEVERITY_NONE 0x03
+//
+// The term 'Correctable' is no longer being used as an error severity of the
+// reported error since ACPI Specification Version 5.1 Errata B.
+// The below macro is considered as deprecated and should no longer be used.
+//
+#define EFI_ACPI_6_0_ERROR_SEVERITY_CORRECTABLE 0x00
///
/// Generic Error Data Entry Definition
///
typedef struct {
- UINT8 SectionType[16];
- UINT32 ErrorSeverity;
- UINT16 Revision;
- UINT8 ValidationBits;
- UINT8 Flags;
- UINT32 ErrorDataLength;
- UINT8 FruId[16];
- UINT8 FruText[20];
+ UINT8 SectionType[16];
+ UINT32 ErrorSeverity;
+ UINT16 Revision;
+ UINT8 ValidationBits;
+ UINT8 Flags;
+ UINT32 ErrorDataLength;
+ UINT8 FruId[16];
+ UINT8 FruText[20];
} EFI_ACPI_6_0_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
///
@@ -1595,14 +1596,14 @@
/// HEST - Hardware Error Source Table
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 ErrorSourceCount;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 ErrorSourceCount;
} EFI_ACPI_6_0_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
///
/// HEST Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
//
// Error Source structure types.
@@ -1618,435 +1619,437 @@
//
// Error Source structure flags.
//
-#define EFI_ACPI_6_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
-#define EFI_ACPI_6_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
+#define EFI_ACPI_6_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
+#define EFI_ACPI_6_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
///
/// IA-32 Architecture Machine Check Exception Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT64 GlobalCapabilityInitData;
- UINT64 GlobalControlInitData;
- UINT8 NumberOfHardwareBanks;
- UINT8 Reserved1[7];
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT64 GlobalCapabilityInitData;
+ UINT64 GlobalControlInitData;
+ UINT8 NumberOfHardwareBanks;
+ UINT8 Reserved1[7];
} EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
///
/// IA-32 Architecture Machine Check Bank Structure Definition
///
typedef struct {
- UINT8 BankNumber;
- UINT8 ClearStatusOnInitialization;
- UINT8 StatusDataFormat;
- UINT8 Reserved0;
- UINT32 ControlRegisterMsrAddress;
- UINT64 ControlInitData;
- UINT32 StatusRegisterMsrAddress;
- UINT32 AddressRegisterMsrAddress;
- UINT32 MiscRegisterMsrAddress;
+ UINT8 BankNumber;
+ UINT8 ClearStatusOnInitialization;
+ UINT8 StatusDataFormat;
+ UINT8 Reserved0;
+ UINT32 ControlRegisterMsrAddress;
+ UINT64 ControlInitData;
+ UINT32 StatusRegisterMsrAddress;
+ UINT32 AddressRegisterMsrAddress;
+ UINT32 MiscRegisterMsrAddress;
} EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
///
/// IA-32 Architecture Machine Check Bank Structure MCA data format
///
-#define EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
-#define EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
-#define EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
+#define EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
+#define EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
+#define EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
//
// Hardware Error Notification types. All other values are reserved
//
-#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
-#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
-#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
-#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
-#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
-#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_CMCI 0x05
-#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_MCE 0x06
-#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_GPIO_SIGNAL 0x07
+#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
+#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
+#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
+#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
+#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
+#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_CMCI 0x05
+#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_MCE 0x06
+#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_GPIO_SIGNAL 0x07
///
/// Hardware Error Notification Configuration Write Enable Structure Definition
///
typedef struct {
- UINT16 Type:1;
- UINT16 PollInterval:1;
- UINT16 SwitchToPollingThresholdValue:1;
- UINT16 SwitchToPollingThresholdWindow:1;
- UINT16 ErrorThresholdValue:1;
- UINT16 ErrorThresholdWindow:1;
- UINT16 Reserved:10;
+ UINT16 Type : 1;
+ UINT16 PollInterval : 1;
+ UINT16 SwitchToPollingThresholdValue : 1;
+ UINT16 SwitchToPollingThresholdWindow : 1;
+ UINT16 ErrorThresholdValue : 1;
+ UINT16 ErrorThresholdWindow : 1;
+ UINT16 Reserved : 10;
} EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
///
/// Hardware Error Notification Structure Definition
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
- UINT32 PollInterval;
- UINT32 Vector;
- UINT32 SwitchToPollingThresholdValue;
- UINT32 SwitchToPollingThresholdWindow;
- UINT32 ErrorThresholdValue;
- UINT32 ErrorThresholdWindow;
+ UINT8 Type;
+ UINT8 Length;
+ EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
+ UINT32 PollInterval;
+ UINT32 Vector;
+ UINT32 SwitchToPollingThresholdValue;
+ UINT32 SwitchToPollingThresholdWindow;
+ UINT32 ErrorThresholdValue;
+ UINT32 ErrorThresholdWindow;
} EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
///
/// IA-32 Architecture Corrected Machine Check Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
- UINT8 NumberOfHardwareBanks;
- UINT8 Reserved1[3];
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
+ UINT8 NumberOfHardwareBanks;
+ UINT8 Reserved1[3];
} EFI_ACPI_6_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
///
/// IA-32 Architecture NMI Error Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 MaxRawDataLength;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 MaxRawDataLength;
} EFI_ACPI_6_0_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
///
/// PCI Express Root Port AER Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT16 DeviceControl;
- UINT8 Reserved1[2];
- UINT32 UncorrectableErrorMask;
- UINT32 UncorrectableErrorSeverity;
- UINT32 CorrectableErrorMask;
- UINT32 AdvancedErrorCapabilitiesAndControl;
- UINT32 RootErrorCommand;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT32 RootErrorCommand;
} EFI_ACPI_6_0_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
///
/// PCI Express Device AER Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT16 DeviceControl;
- UINT8 Reserved1[2];
- UINT32 UncorrectableErrorMask;
- UINT32 UncorrectableErrorSeverity;
- UINT32 CorrectableErrorMask;
- UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
} EFI_ACPI_6_0_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
///
/// PCI Express Bridge AER Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT8 Reserved0[2];
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 Bus;
- UINT16 Device;
- UINT16 Function;
- UINT16 DeviceControl;
- UINT8 Reserved1[2];
- UINT32 UncorrectableErrorMask;
- UINT32 UncorrectableErrorSeverity;
- UINT32 CorrectableErrorMask;
- UINT32 AdvancedErrorCapabilitiesAndControl;
- UINT32 SecondaryUncorrectableErrorMask;
- UINT32 SecondaryUncorrectableErrorSeverity;
- UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT8 Reserved0[2];
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 Bus;
+ UINT16 Device;
+ UINT16 Function;
+ UINT16 DeviceControl;
+ UINT8 Reserved1[2];
+ UINT32 UncorrectableErrorMask;
+ UINT32 UncorrectableErrorSeverity;
+ UINT32 CorrectableErrorMask;
+ UINT32 AdvancedErrorCapabilitiesAndControl;
+ UINT32 SecondaryUncorrectableErrorMask;
+ UINT32 SecondaryUncorrectableErrorSeverity;
+ UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
} EFI_ACPI_6_0_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
///
/// Generic Hardware Error Source Structure Definition
///
typedef struct {
- UINT16 Type;
- UINT16 SourceId;
- UINT16 RelatedSourceId;
- UINT8 Flags;
- UINT8 Enabled;
- UINT32 NumberOfRecordsToPreAllocate;
- UINT32 MaxSectionsPerRecord;
- UINT32 MaxRawDataLength;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
- EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
- UINT32 ErrorStatusBlockLength;
+ UINT16 Type;
+ UINT16 SourceId;
+ UINT16 RelatedSourceId;
+ UINT8 Flags;
+ UINT8 Enabled;
+ UINT32 NumberOfRecordsToPreAllocate;
+ UINT32 MaxSectionsPerRecord;
+ UINT32 MaxRawDataLength;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
+ EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
+ UINT32 ErrorStatusBlockLength;
} EFI_ACPI_6_0_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
///
/// Generic Error Status Definition
///
typedef struct {
- EFI_ACPI_6_0_ERROR_BLOCK_STATUS BlockStatus;
- UINT32 RawDataOffset;
- UINT32 RawDataLength;
- UINT32 DataLength;
- UINT32 ErrorSeverity;
+ EFI_ACPI_6_0_ERROR_BLOCK_STATUS BlockStatus;
+ UINT32 RawDataOffset;
+ UINT32 RawDataLength;
+ UINT32 DataLength;
+ UINT32 ErrorSeverity;
} EFI_ACPI_6_0_GENERIC_ERROR_STATUS_STRUCTURE;
///
/// ERST - Error Record Serialization Table
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 SerializationHeaderSize;
- UINT8 Reserved0[4];
- UINT32 InstructionEntryCount;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 SerializationHeaderSize;
+ UINT8 Reserved0[4];
+ UINT32 InstructionEntryCount;
} EFI_ACPI_6_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
///
/// ERST Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
///
/// ERST Serialization Actions
///
-#define EFI_ACPI_6_0_ERST_BEGIN_WRITE_OPERATION 0x00
-#define EFI_ACPI_6_0_ERST_BEGIN_READ_OPERATION 0x01
-#define EFI_ACPI_6_0_ERST_BEGIN_CLEAR_OPERATION 0x02
-#define EFI_ACPI_6_0_ERST_END_OPERATION 0x03
-#define EFI_ACPI_6_0_ERST_SET_RECORD_OFFSET 0x04
-#define EFI_ACPI_6_0_ERST_EXECUTE_OPERATION 0x05
-#define EFI_ACPI_6_0_ERST_CHECK_BUSY_STATUS 0x06
-#define EFI_ACPI_6_0_ERST_GET_COMMAND_STATUS 0x07
-#define EFI_ACPI_6_0_ERST_GET_RECORD_IDENTIFIER 0x08
-#define EFI_ACPI_6_0_ERST_SET_RECORD_IDENTIFIER 0x09
-#define EFI_ACPI_6_0_ERST_GET_RECORD_COUNT 0x0A
-#define EFI_ACPI_6_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
-#define EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
-#define EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
-#define EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
+#define EFI_ACPI_6_0_ERST_BEGIN_WRITE_OPERATION 0x00
+#define EFI_ACPI_6_0_ERST_BEGIN_READ_OPERATION 0x01
+#define EFI_ACPI_6_0_ERST_BEGIN_CLEAR_OPERATION 0x02
+#define EFI_ACPI_6_0_ERST_END_OPERATION 0x03
+#define EFI_ACPI_6_0_ERST_SET_RECORD_OFFSET 0x04
+#define EFI_ACPI_6_0_ERST_EXECUTE_OPERATION 0x05
+#define EFI_ACPI_6_0_ERST_CHECK_BUSY_STATUS 0x06
+#define EFI_ACPI_6_0_ERST_GET_COMMAND_STATUS 0x07
+#define EFI_ACPI_6_0_ERST_GET_RECORD_IDENTIFIER 0x08
+#define EFI_ACPI_6_0_ERST_SET_RECORD_IDENTIFIER 0x09
+#define EFI_ACPI_6_0_ERST_GET_RECORD_COUNT 0x0A
+#define EFI_ACPI_6_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
+#define EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
+#define EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
+#define EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
///
/// ERST Action Command Status
///
-#define EFI_ACPI_6_0_ERST_STATUS_SUCCESS 0x00
-#define EFI_ACPI_6_0_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
-#define EFI_ACPI_6_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
-#define EFI_ACPI_6_0_ERST_STATUS_FAILED 0x03
-#define EFI_ACPI_6_0_ERST_STATUS_RECORD_STORE_EMPTY 0x04
-#define EFI_ACPI_6_0_ERST_STATUS_RECORD_NOT_FOUND 0x05
+#define EFI_ACPI_6_0_ERST_STATUS_SUCCESS 0x00
+#define EFI_ACPI_6_0_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
+#define EFI_ACPI_6_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
+#define EFI_ACPI_6_0_ERST_STATUS_FAILED 0x03
+#define EFI_ACPI_6_0_ERST_STATUS_RECORD_STORE_EMPTY 0x04
+#define EFI_ACPI_6_0_ERST_STATUS_RECORD_NOT_FOUND 0x05
///
/// ERST Serialization Instructions
///
-#define EFI_ACPI_6_0_ERST_READ_REGISTER 0x00
-#define EFI_ACPI_6_0_ERST_READ_REGISTER_VALUE 0x01
-#define EFI_ACPI_6_0_ERST_WRITE_REGISTER 0x02
-#define EFI_ACPI_6_0_ERST_WRITE_REGISTER_VALUE 0x03
-#define EFI_ACPI_6_0_ERST_NOOP 0x04
-#define EFI_ACPI_6_0_ERST_LOAD_VAR1 0x05
-#define EFI_ACPI_6_0_ERST_LOAD_VAR2 0x06
-#define EFI_ACPI_6_0_ERST_STORE_VAR1 0x07
-#define EFI_ACPI_6_0_ERST_ADD 0x08
-#define EFI_ACPI_6_0_ERST_SUBTRACT 0x09
-#define EFI_ACPI_6_0_ERST_ADD_VALUE 0x0A
-#define EFI_ACPI_6_0_ERST_SUBTRACT_VALUE 0x0B
-#define EFI_ACPI_6_0_ERST_STALL 0x0C
-#define EFI_ACPI_6_0_ERST_STALL_WHILE_TRUE 0x0D
-#define EFI_ACPI_6_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
-#define EFI_ACPI_6_0_ERST_GOTO 0x0F
-#define EFI_ACPI_6_0_ERST_SET_SRC_ADDRESS_BASE 0x10
-#define EFI_ACPI_6_0_ERST_SET_DST_ADDRESS_BASE 0x11
-#define EFI_ACPI_6_0_ERST_MOVE_DATA 0x12
+#define EFI_ACPI_6_0_ERST_READ_REGISTER 0x00
+#define EFI_ACPI_6_0_ERST_READ_REGISTER_VALUE 0x01
+#define EFI_ACPI_6_0_ERST_WRITE_REGISTER 0x02
+#define EFI_ACPI_6_0_ERST_WRITE_REGISTER_VALUE 0x03
+#define EFI_ACPI_6_0_ERST_NOOP 0x04
+#define EFI_ACPI_6_0_ERST_LOAD_VAR1 0x05
+#define EFI_ACPI_6_0_ERST_LOAD_VAR2 0x06
+#define EFI_ACPI_6_0_ERST_STORE_VAR1 0x07
+#define EFI_ACPI_6_0_ERST_ADD 0x08
+#define EFI_ACPI_6_0_ERST_SUBTRACT 0x09
+#define EFI_ACPI_6_0_ERST_ADD_VALUE 0x0A
+#define EFI_ACPI_6_0_ERST_SUBTRACT_VALUE 0x0B
+#define EFI_ACPI_6_0_ERST_STALL 0x0C
+#define EFI_ACPI_6_0_ERST_STALL_WHILE_TRUE 0x0D
+#define EFI_ACPI_6_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
+#define EFI_ACPI_6_0_ERST_GOTO 0x0F
+#define EFI_ACPI_6_0_ERST_SET_SRC_ADDRESS_BASE 0x10
+#define EFI_ACPI_6_0_ERST_SET_DST_ADDRESS_BASE 0x11
+#define EFI_ACPI_6_0_ERST_MOVE_DATA 0x12
///
/// ERST Instruction Flags
///
-#define EFI_ACPI_6_0_ERST_PRESERVE_REGISTER 0x01
+#define EFI_ACPI_6_0_ERST_PRESERVE_REGISTER 0x01
///
/// ERST Serialization Instruction Entry
///
typedef struct {
- UINT8 SerializationAction;
- UINT8 Instruction;
- UINT8 Flags;
- UINT8 Reserved0;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
- UINT64 Value;
- UINT64 Mask;
+ UINT8 SerializationAction;
+ UINT8 Instruction;
+ UINT8 Flags;
+ UINT8 Reserved0;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
+ UINT64 Value;
+ UINT64 Mask;
} EFI_ACPI_6_0_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
///
/// EINJ - Error Injection Table
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 InjectionHeaderSize;
- UINT8 InjectionFlags;
- UINT8 Reserved0[3];
- UINT32 InjectionEntryCount;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 InjectionHeaderSize;
+ UINT8 InjectionFlags;
+ UINT8 Reserved0[3];
+ UINT32 InjectionEntryCount;
} EFI_ACPI_6_0_ERROR_INJECTION_TABLE_HEADER;
///
/// EINJ Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_ERROR_INJECTION_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_ERROR_INJECTION_TABLE_REVISION 0x01
///
/// EINJ Error Injection Actions
///
-#define EFI_ACPI_6_0_EINJ_BEGIN_INJECTION_OPERATION 0x00
-#define EFI_ACPI_6_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
-#define EFI_ACPI_6_0_EINJ_SET_ERROR_TYPE 0x02
-#define EFI_ACPI_6_0_EINJ_GET_ERROR_TYPE 0x03
-#define EFI_ACPI_6_0_EINJ_END_OPERATION 0x04
-#define EFI_ACPI_6_0_EINJ_EXECUTE_OPERATION 0x05
-#define EFI_ACPI_6_0_EINJ_CHECK_BUSY_STATUS 0x06
-#define EFI_ACPI_6_0_EINJ_GET_COMMAND_STATUS 0x07
-#define EFI_ACPI_6_0_EINJ_TRIGGER_ERROR 0xFF
+#define EFI_ACPI_6_0_EINJ_BEGIN_INJECTION_OPERATION 0x00
+#define EFI_ACPI_6_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
+#define EFI_ACPI_6_0_EINJ_SET_ERROR_TYPE 0x02
+#define EFI_ACPI_6_0_EINJ_GET_ERROR_TYPE 0x03
+#define EFI_ACPI_6_0_EINJ_END_OPERATION 0x04
+#define EFI_ACPI_6_0_EINJ_EXECUTE_OPERATION 0x05
+#define EFI_ACPI_6_0_EINJ_CHECK_BUSY_STATUS 0x06
+#define EFI_ACPI_6_0_EINJ_GET_COMMAND_STATUS 0x07
+#define EFI_ACPI_6_0_EINJ_TRIGGER_ERROR 0xFF
///
/// EINJ Action Command Status
///
-#define EFI_ACPI_6_0_EINJ_STATUS_SUCCESS 0x00
-#define EFI_ACPI_6_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01
-#define EFI_ACPI_6_0_EINJ_STATUS_INVALID_ACCESS 0x02
+#define EFI_ACPI_6_0_EINJ_STATUS_SUCCESS 0x00
+#define EFI_ACPI_6_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01
+#define EFI_ACPI_6_0_EINJ_STATUS_INVALID_ACCESS 0x02
///
/// EINJ Error Type Definition
///
-#define EFI_ACPI_6_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
-#define EFI_ACPI_6_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
-#define EFI_ACPI_6_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
-#define EFI_ACPI_6_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
-#define EFI_ACPI_6_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
-#define EFI_ACPI_6_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
-#define EFI_ACPI_6_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
-#define EFI_ACPI_6_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
-#define EFI_ACPI_6_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
-#define EFI_ACPI_6_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
-#define EFI_ACPI_6_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
-#define EFI_ACPI_6_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
+#define EFI_ACPI_6_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
+#define EFI_ACPI_6_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
+#define EFI_ACPI_6_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
+#define EFI_ACPI_6_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
+#define EFI_ACPI_6_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
+#define EFI_ACPI_6_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
+#define EFI_ACPI_6_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
+#define EFI_ACPI_6_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
+#define EFI_ACPI_6_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
+#define EFI_ACPI_6_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
+#define EFI_ACPI_6_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
+#define EFI_ACPI_6_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
///
/// EINJ Injection Instructions
///
-#define EFI_ACPI_6_0_EINJ_READ_REGISTER 0x00
-#define EFI_ACPI_6_0_EINJ_READ_REGISTER_VALUE 0x01
-#define EFI_ACPI_6_0_EINJ_WRITE_REGISTER 0x02
-#define EFI_ACPI_6_0_EINJ_WRITE_REGISTER_VALUE 0x03
-#define EFI_ACPI_6_0_EINJ_NOOP 0x04
+#define EFI_ACPI_6_0_EINJ_READ_REGISTER 0x00
+#define EFI_ACPI_6_0_EINJ_READ_REGISTER_VALUE 0x01
+#define EFI_ACPI_6_0_EINJ_WRITE_REGISTER 0x02
+#define EFI_ACPI_6_0_EINJ_WRITE_REGISTER_VALUE 0x03
+#define EFI_ACPI_6_0_EINJ_NOOP 0x04
///
/// EINJ Instruction Flags
///
-#define EFI_ACPI_6_0_EINJ_PRESERVE_REGISTER 0x01
+#define EFI_ACPI_6_0_EINJ_PRESERVE_REGISTER 0x01
///
/// EINJ Injection Instruction Entry
///
typedef struct {
- UINT8 InjectionAction;
- UINT8 Instruction;
- UINT8 Flags;
- UINT8 Reserved0;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
- UINT64 Value;
- UINT64 Mask;
+ UINT8 InjectionAction;
+ UINT8 Instruction;
+ UINT8 Flags;
+ UINT8 Reserved0;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
+ UINT64 Value;
+ UINT64 Mask;
} EFI_ACPI_6_0_EINJ_INJECTION_INSTRUCTION_ENTRY;
///
/// EINJ Trigger Action Table
///
typedef struct {
- UINT32 HeaderSize;
- UINT32 Revision;
- UINT32 TableSize;
- UINT32 EntryCount;
+ UINT32 HeaderSize;
+ UINT32 Revision;
+ UINT32 TableSize;
+ UINT32 EntryCount;
} EFI_ACPI_6_0_EINJ_TRIGGER_ACTION_TABLE;
///
/// Platform Communications Channel Table (PCCT)
///
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT32 Flags;
- UINT64 Reserved;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT32 Flags;
+ UINT64 Reserved;
} EFI_ACPI_6_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;
///
/// PCCT Version (as defined in ACPI 6.0 spec.)
///
-#define EFI_ACPI_6_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
+#define EFI_ACPI_6_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
///
/// PCCT Global Flags
///
-#define EFI_ACPI_6_0_PCCT_FLAGS_SCI_DOORBELL BIT0
+#define EFI_ACPI_6_0_PCCT_FLAGS_SCI_DOORBELL BIT0
//
// PCCT Subspace type
//
-#define EFI_ACPI_6_0_PCCT_SUBSPACE_TYPE_GENERIC 0x00
+#define EFI_ACPI_6_0_PCCT_SUBSPACE_TYPE_GENERIC 0x00
+#define EFI_ACPI_6_0_PCCT_SUBSPACE_TYPE_1_HW_REDUCED_COMMUNICATIONS 0x01
+#define EFI_ACPI_6_0_PCCT_SUBSPACE_TYPE_2_HW_REDUCED_COMMUNICATIONS 0x02
///
/// PCC Subspace Structure Header
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
+ UINT8 Type;
+ UINT8 Length;
} EFI_ACPI_6_0_PCCT_SUBSPACE_HEADER;
///
/// Generic Communications Subspace Structure
///
typedef struct {
- UINT8 Type;
- UINT8 Length;
- UINT8 Reserved[6];
- UINT64 BaseAddress;
- UINT64 AddressLength;
- EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
- UINT64 DoorbellPreserve;
- UINT64 DoorbellWrite;
- UINT32 NominalLatency;
- UINT32 MaximumPeriodicAccessRate;
- UINT16 MinimumRequestTurnaroundTime;
+ UINT8 Type;
+ UINT8 Length;
+ UINT8 Reserved[6];
+ UINT64 BaseAddress;
+ UINT64 AddressLength;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
+ UINT64 DoorbellPreserve;
+ UINT64 DoorbellWrite;
+ UINT32 NominalLatency;
+ UINT32 MaximumPeriodicAccessRate;
+ UINT16 MinimumRequestTurnaroundTime;
} EFI_ACPI_6_0_PCCT_SUBSPACE_GENERIC;
///
@@ -2054,18 +2057,18 @@
///
typedef struct {
- UINT8 Command;
- UINT8 Reserved:7;
- UINT8 GenerateSci:1;
+ UINT8 Command;
+ UINT8 Reserved : 7;
+ UINT8 GenerateSci : 1;
} EFI_ACPI_6_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;
typedef struct {
- UINT8 CommandComplete:1;
- UINT8 SciDoorbell:1;
- UINT8 Error:1;
- UINT8 PlatformNotification:1;
- UINT8 Reserved:4;
- UINT8 Reserved1;
+ UINT8 CommandComplete : 1;
+ UINT8 SciDoorbell : 1;
+ UINT8 Error : 1;
+ UINT8 PlatformNotification : 1;
+ UINT8 Reserved : 4;
+ UINT8 Reserved1;
} EFI_ACPI_6_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;
typedef struct {
@@ -2074,6 +2077,50 @@
EFI_ACPI_6_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;
} EFI_ACPI_6_0_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;
+#define EFI_ACPI_6_0_PCCT_SUBSPACE_DOORBELL_INTERRUPT_FLAGS_POLARITY BIT0
+#define EFI_ACPI_6_0_PCCT_SUBSPACE_DOORBELL_INTERRUPT_FLAGS_MODE BIT1
+
+///
+/// Type 1 HW-Reduced Communications Subspace Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT32 DoorbellInterrupt;
+ UINT8 DoorbellInterruptFlags;
+ UINT8 Reserved;
+ UINT64 BaseAddress;
+ UINT64 AddressLength;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
+ UINT64 DoorbellPreserve;
+ UINT64 DoorbellWrite;
+ UINT32 NominalLatency;
+ UINT32 MaximumPeriodicAccessRate;
+ UINT16 MinimumRequestTurnaroundTime;
+} EFI_ACPI_6_0_PCCT_SUBSPACE_1_HW_REDUCED_COMMUNICATIONS;
+
+///
+/// Type 2 HW-Reduced Communications Subspace Structure
+///
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT32 DoorbellInterrupt;
+ UINT8 DoorbellInterruptFlags;
+ UINT8 Reserved;
+ UINT64 BaseAddress;
+ UINT64 AddressLength;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
+ UINT64 DoorbellPreserve;
+ UINT64 DoorbellWrite;
+ UINT32 NominalLatency;
+ UINT32 MaximumPeriodicAccessRate;
+ UINT16 MinimumRequestTurnaroundTime;
+ EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE DoorbellAckRegister;
+ UINT64 DoorbellAckPreserve;
+ UINT64 DoorbellAckWrite;
+} EFI_ACPI_6_0_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS;
+
//
// Known table signatures
//
@@ -2284,12 +2331,17 @@
#define EFI_ACPI_6_0_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')
///
+/// "PCCT" Platform Communications Channel Table
+///
+#define EFI_ACPI_6_0_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T')
+
+///
/// "SLIC" MS Software Licensing Table Specification
///
#define EFI_ACPI_6_0_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')
///
-/// "SPCR" Serial Port Concole Redirection Table
+/// "SPCR" Serial Port Console Redirection Table
///
#define EFI_ACPI_6_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
diff --git a/src/include/ipxe/efi/IndustryStandard/AcpiAml.h b/src/include/ipxe/efi/IndustryStandard/AcpiAml.h
index a9186b4..d7a83f7 100644
--- a/src/include/ipxe/efi/IndustryStandard/AcpiAml.h
+++ b/src/include/ipxe/efi/IndustryStandard/AcpiAml.h
@@ -2,20 +2,15 @@
This file contains AML code definition in the latest ACPI spec.
Copyright (c) 2011, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2019 - 2021, Arm Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _ACPI_AML_H_
#define _ACPI_AML_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
//
// ACPI AML definition
@@ -24,154 +19,168 @@
//
// Primary OpCode
//
-#define AML_ZERO_OP 0x00
-#define AML_ONE_OP 0x01
-#define AML_ALIAS_OP 0x06
-#define AML_NAME_OP 0x08
-#define AML_BYTE_PREFIX 0x0a
-#define AML_WORD_PREFIX 0x0b
-#define AML_DWORD_PREFIX 0x0c
-#define AML_STRING_PREFIX 0x0d
-#define AML_QWORD_PREFIX 0x0e
-#define AML_SCOPE_OP 0x10
-#define AML_BUFFER_OP 0x11
-#define AML_PACKAGE_OP 0x12
-#define AML_VAR_PACKAGE_OP 0x13
-#define AML_METHOD_OP 0x14
-#define AML_DUAL_NAME_PREFIX 0x2e
-#define AML_MULTI_NAME_PREFIX 0x2f
-#define AML_NAME_CHAR_A 0x41
-#define AML_NAME_CHAR_B 0x42
-#define AML_NAME_CHAR_C 0x43
-#define AML_NAME_CHAR_D 0x44
-#define AML_NAME_CHAR_E 0x45
-#define AML_NAME_CHAR_F 0x46
-#define AML_NAME_CHAR_G 0x47
-#define AML_NAME_CHAR_H 0x48
-#define AML_NAME_CHAR_I 0x49
-#define AML_NAME_CHAR_J 0x4a
-#define AML_NAME_CHAR_K 0x4b
-#define AML_NAME_CHAR_L 0x4c
-#define AML_NAME_CHAR_M 0x4d
-#define AML_NAME_CHAR_N 0x4e
-#define AML_NAME_CHAR_O 0x4f
-#define AML_NAME_CHAR_P 0x50
-#define AML_NAME_CHAR_Q 0x51
-#define AML_NAME_CHAR_R 0x52
-#define AML_NAME_CHAR_S 0x53
-#define AML_NAME_CHAR_T 0x54
-#define AML_NAME_CHAR_U 0x55
-#define AML_NAME_CHAR_V 0x56
-#define AML_NAME_CHAR_W 0x57
-#define AML_NAME_CHAR_X 0x58
-#define AML_NAME_CHAR_Y 0x59
-#define AML_NAME_CHAR_Z 0x5a
-#define AML_ROOT_CHAR 0x5c
-#define AML_PARENT_PREFIX_CHAR 0x5e
-#define AML_NAME_CHAR__ 0x5f
-#define AML_LOCAL0 0x60
-#define AML_LOCAL1 0x61
-#define AML_LOCAL2 0x62
-#define AML_LOCAL3 0x63
-#define AML_LOCAL4 0x64
-#define AML_LOCAL5 0x65
-#define AML_LOCAL6 0x66
-#define AML_LOCAL7 0x67
-#define AML_ARG0 0x68
-#define AML_ARG1 0x69
-#define AML_ARG2 0x6a
-#define AML_ARG3 0x6b
-#define AML_ARG4 0x6c
-#define AML_ARG5 0x6d
-#define AML_ARG6 0x6e
-#define AML_STORE_OP 0x70
-#define AML_REF_OF_OP 0x71
-#define AML_ADD_OP 0x72
-#define AML_CONCAT_OP 0x73
-#define AML_SUBTRACT_OP 0x74
-#define AML_INCREMENT_OP 0x75
-#define AML_DECREMENT_OP 0x76
-#define AML_MULTIPLY_OP 0x77
-#define AML_DIVIDE_OP 0x78
-#define AML_SHIFT_LEFT_OP 0x79
-#define AML_SHIFT_RIGHT_OP 0x7a
-#define AML_AND_OP 0x7b
-#define AML_NAND_OP 0x7c
-#define AML_OR_OP 0x7d
-#define AML_NOR_OP 0x7e
-#define AML_XOR_OP 0x7f
-#define AML_NOT_OP 0x80
-#define AML_FIND_SET_LEFT_BIT_OP 0x81
-#define AML_FIND_SET_RIGHT_BIT_OP 0x82
-#define AML_DEREF_OF_OP 0x83
-#define AML_CONCAT_RES_OP 0x84
-#define AML_MOD_OP 0x85
-#define AML_NOTIFY_OP 0x86
-#define AML_SIZE_OF_OP 0x87
-#define AML_INDEX_OP 0x88
-#define AML_MATCH_OP 0x89
-#define AML_CREATE_DWORD_FIELD_OP 0x8a
-#define AML_CREATE_WORD_FIELD_OP 0x8b
-#define AML_CREATE_BYTE_FIELD_OP 0x8c
-#define AML_CREATE_BIT_FIELD_OP 0x8d
-#define AML_OBJECT_TYPE_OP 0x8e
-#define AML_CREATE_QWORD_FIELD_OP 0x8f
-#define AML_LAND_OP 0x90
-#define AML_LOR_OP 0x91
-#define AML_LNOT_OP 0x92
-#define AML_LEQUAL_OP 0x93
-#define AML_LGREATER_OP 0x94
-#define AML_LLESS_OP 0x95
-#define AML_TO_BUFFER_OP 0x96
-#define AML_TO_DEC_STRING_OP 0x97
-#define AML_TO_HEX_STRING_OP 0x98
-#define AML_TO_INTEGER_OP 0x99
-#define AML_TO_STRING_OP 0x9c
-#define AML_COPY_OBJECT_OP 0x9d
-#define AML_MID_OP 0x9e
-#define AML_CONTINUE_OP 0x9f
-#define AML_IF_OP 0xa0
-#define AML_ELSE_OP 0xa1
-#define AML_WHILE_OP 0xa2
-#define AML_NOOP_OP 0xa3
-#define AML_RETURN_OP 0xa4
-#define AML_BREAK_OP 0xa5
-#define AML_BREAK_POINT_OP 0xcc
-#define AML_ONES_OP 0xff
+#define AML_ZERO_OP 0x00
+#define AML_ONE_OP 0x01
+#define AML_ALIAS_OP 0x06
+#define AML_NAME_OP 0x08
+#define AML_BYTE_PREFIX 0x0a
+#define AML_WORD_PREFIX 0x0b
+#define AML_DWORD_PREFIX 0x0c
+#define AML_STRING_PREFIX 0x0d
+#define AML_QWORD_PREFIX 0x0e
+#define AML_SCOPE_OP 0x10
+#define AML_BUFFER_OP 0x11
+#define AML_PACKAGE_OP 0x12
+#define AML_VAR_PACKAGE_OP 0x13
+#define AML_METHOD_OP 0x14
+#define AML_EXTERNAL_OP 0x15
+#define AML_DUAL_NAME_PREFIX 0x2e
+#define AML_MULTI_NAME_PREFIX 0x2f
+#define AML_NAME_CHAR_A 0x41
+#define AML_NAME_CHAR_B 0x42
+#define AML_NAME_CHAR_C 0x43
+#define AML_NAME_CHAR_D 0x44
+#define AML_NAME_CHAR_E 0x45
+#define AML_NAME_CHAR_F 0x46
+#define AML_NAME_CHAR_G 0x47
+#define AML_NAME_CHAR_H 0x48
+#define AML_NAME_CHAR_I 0x49
+#define AML_NAME_CHAR_J 0x4a
+#define AML_NAME_CHAR_K 0x4b
+#define AML_NAME_CHAR_L 0x4c
+#define AML_NAME_CHAR_M 0x4d
+#define AML_NAME_CHAR_N 0x4e
+#define AML_NAME_CHAR_O 0x4f
+#define AML_NAME_CHAR_P 0x50
+#define AML_NAME_CHAR_Q 0x51
+#define AML_NAME_CHAR_R 0x52
+#define AML_NAME_CHAR_S 0x53
+#define AML_NAME_CHAR_T 0x54
+#define AML_NAME_CHAR_U 0x55
+#define AML_NAME_CHAR_V 0x56
+#define AML_NAME_CHAR_W 0x57
+#define AML_NAME_CHAR_X 0x58
+#define AML_NAME_CHAR_Y 0x59
+#define AML_NAME_CHAR_Z 0x5a
+#define AML_ROOT_CHAR 0x5c
+#define AML_PARENT_PREFIX_CHAR 0x5e
+#define AML_NAME_CHAR__ 0x5f
+#define AML_LOCAL0 0x60
+#define AML_LOCAL1 0x61
+#define AML_LOCAL2 0x62
+#define AML_LOCAL3 0x63
+#define AML_LOCAL4 0x64
+#define AML_LOCAL5 0x65
+#define AML_LOCAL6 0x66
+#define AML_LOCAL7 0x67
+#define AML_ARG0 0x68
+#define AML_ARG1 0x69
+#define AML_ARG2 0x6a
+#define AML_ARG3 0x6b
+#define AML_ARG4 0x6c
+#define AML_ARG5 0x6d
+#define AML_ARG6 0x6e
+#define AML_STORE_OP 0x70
+#define AML_REF_OF_OP 0x71
+#define AML_ADD_OP 0x72
+#define AML_CONCAT_OP 0x73
+#define AML_SUBTRACT_OP 0x74
+#define AML_INCREMENT_OP 0x75
+#define AML_DECREMENT_OP 0x76
+#define AML_MULTIPLY_OP 0x77
+#define AML_DIVIDE_OP 0x78
+#define AML_SHIFT_LEFT_OP 0x79
+#define AML_SHIFT_RIGHT_OP 0x7a
+#define AML_AND_OP 0x7b
+#define AML_NAND_OP 0x7c
+#define AML_OR_OP 0x7d
+#define AML_NOR_OP 0x7e
+#define AML_XOR_OP 0x7f
+#define AML_NOT_OP 0x80
+#define AML_FIND_SET_LEFT_BIT_OP 0x81
+#define AML_FIND_SET_RIGHT_BIT_OP 0x82
+#define AML_DEREF_OF_OP 0x83
+#define AML_CONCAT_RES_OP 0x84
+#define AML_MOD_OP 0x85
+#define AML_NOTIFY_OP 0x86
+#define AML_SIZE_OF_OP 0x87
+#define AML_INDEX_OP 0x88
+#define AML_MATCH_OP 0x89
+#define AML_CREATE_DWORD_FIELD_OP 0x8a
+#define AML_CREATE_WORD_FIELD_OP 0x8b
+#define AML_CREATE_BYTE_FIELD_OP 0x8c
+#define AML_CREATE_BIT_FIELD_OP 0x8d
+#define AML_OBJECT_TYPE_OP 0x8e
+#define AML_CREATE_QWORD_FIELD_OP 0x8f
+#define AML_LAND_OP 0x90
+#define AML_LOR_OP 0x91
+#define AML_LNOT_OP 0x92
+#define AML_LEQUAL_OP 0x93
+#define AML_LGREATER_OP 0x94
+#define AML_LLESS_OP 0x95
+#define AML_TO_BUFFER_OP 0x96
+#define AML_TO_DEC_STRING_OP 0x97
+#define AML_TO_HEX_STRING_OP 0x98
+#define AML_TO_INTEGER_OP 0x99
+#define AML_TO_STRING_OP 0x9c
+#define AML_COPY_OBJECT_OP 0x9d
+#define AML_MID_OP 0x9e
+#define AML_CONTINUE_OP 0x9f
+#define AML_IF_OP 0xa0
+#define AML_ELSE_OP 0xa1
+#define AML_WHILE_OP 0xa2
+#define AML_NOOP_OP 0xa3
+#define AML_RETURN_OP 0xa4
+#define AML_BREAK_OP 0xa5
+#define AML_BREAK_POINT_OP 0xcc
+#define AML_ONES_OP 0xff
//
// Extended OpCode
//
-#define AML_EXT_OP 0x5b
+#define AML_EXT_OP 0x5b
-#define AML_EXT_MUTEX_OP 0x01
-#define AML_EXT_EVENT_OP 0x02
-#define AML_EXT_COND_REF_OF_OP 0x12
-#define AML_EXT_CREATE_FIELD_OP 0x13
-#define AML_EXT_LOAD_TABLE_OP 0x1f
-#define AML_EXT_LOAD_OP 0x20
-#define AML_EXT_STALL_OP 0x21
-#define AML_EXT_SLEEP_OP 0x22
-#define AML_EXT_ACQUIRE_OP 0x23
-#define AML_EXT_SIGNAL_OP 0x24
-#define AML_EXT_WAIT_OP 0x25
-#define AML_EXT_RESET_OP 0x26
-#define AML_EXT_RELEASE_OP 0x27
-#define AML_EXT_FROM_BCD_OP 0x28
-#define AML_EXT_TO_BCD_OP 0x29
-#define AML_EXT_UNLOAD_OP 0x2a
-#define AML_EXT_REVISION_OP 0x30
-#define AML_EXT_DEBUG_OP 0x31
-#define AML_EXT_FATAL_OP 0x32
-#define AML_EXT_TIMER_OP 0x33
-#define AML_EXT_REGION_OP 0x80
-#define AML_EXT_FIELD_OP 0x81
-#define AML_EXT_DEVICE_OP 0x82
-#define AML_EXT_PROCESSOR_OP 0x83
-#define AML_EXT_POWER_RES_OP 0x84
-#define AML_EXT_THERMAL_ZONE_OP 0x85
-#define AML_EXT_INDEX_FIELD_OP 0x86
-#define AML_EXT_BANK_FIELD_OP 0x87
-#define AML_EXT_DATA_REGION_OP 0x88
+#define AML_EXT_MUTEX_OP 0x01
+#define AML_EXT_EVENT_OP 0x02
+#define AML_EXT_COND_REF_OF_OP 0x12
+#define AML_EXT_CREATE_FIELD_OP 0x13
+#define AML_EXT_LOAD_TABLE_OP 0x1f
+#define AML_EXT_LOAD_OP 0x20
+#define AML_EXT_STALL_OP 0x21
+#define AML_EXT_SLEEP_OP 0x22
+#define AML_EXT_ACQUIRE_OP 0x23
+#define AML_EXT_SIGNAL_OP 0x24
+#define AML_EXT_WAIT_OP 0x25
+#define AML_EXT_RESET_OP 0x26
+#define AML_EXT_RELEASE_OP 0x27
+#define AML_EXT_FROM_BCD_OP 0x28
+#define AML_EXT_TO_BCD_OP 0x29
+#define AML_EXT_UNLOAD_OP 0x2a
+#define AML_EXT_REVISION_OP 0x30
+#define AML_EXT_DEBUG_OP 0x31
+#define AML_EXT_FATAL_OP 0x32
+#define AML_EXT_TIMER_OP 0x33
+#define AML_EXT_REGION_OP 0x80
+#define AML_EXT_FIELD_OP 0x81
+#define AML_EXT_DEVICE_OP 0x82
+#define AML_EXT_PROCESSOR_OP 0x83
+#define AML_EXT_POWER_RES_OP 0x84
+#define AML_EXT_THERMAL_ZONE_OP 0x85
+#define AML_EXT_INDEX_FIELD_OP 0x86
+#define AML_EXT_BANK_FIELD_OP 0x87
+#define AML_EXT_DATA_REGION_OP 0x88
+
+//
+// FieldElement OpCode
+//
+#define AML_FIELD_RESERVED_OP 0x00
+#define AML_FIELD_ACCESS_OP 0x01
+#define AML_FIELD_CONNECTION_OP 0x02
+#define AML_FIELD_EXT_ACCESS_OP 0x03
+
+//
+// AML Name segment definitions
+//
+#define AML_NAME_SEG_SIZE 4
#endif
diff --git a/src/include/ipxe/efi/IndustryStandard/Bluetooth.h b/src/include/ipxe/efi/IndustryStandard/Bluetooth.h
index f63ab89..97b6526 100644
--- a/src/include/ipxe/efi/IndustryStandard/Bluetooth.h
+++ b/src/include/ipxe/efi/IndustryStandard/Bluetooth.h
@@ -2,21 +2,15 @@
This file contains the Bluetooth definitions that are consumed by drivers.
These definitions are from Bluetooth Core Specification Version 4.0 June, 2010
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _BLUETOOTH_H_
#define _BLUETOOTH_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#pragma pack(1)
@@ -27,23 +21,38 @@
///
/// 48bit Bluetooth device address.
///
- UINT8 Address[6];
+ UINT8 Address[6];
} BLUETOOTH_ADDRESS;
///
/// BLUETOOTH_CLASS_OF_DEVICE. See Bluetooth specification for detail.
///
typedef struct {
- UINT8 FormatType:2;
- UINT8 MinorDeviceClass: 6;
- UINT16 MajorDeviceClass: 5;
- UINT16 MajorServiceClass:11;
+ UINT8 FormatType : 2;
+ UINT8 MinorDeviceClass : 6;
+ UINT16 MajorDeviceClass : 5;
+ UINT16 MajorServiceClass : 11;
} BLUETOOTH_CLASS_OF_DEVICE;
+///
+/// BLUETOOTH_LE_ADDRESS
+///
+typedef struct {
+ ///
+ /// 48-bit Bluetooth device address
+ ///
+ UINT8 Address[6];
+ ///
+ /// 0x00 - Public Device Address
+ /// 0x01 - Random Device Address
+ ///
+ UINT8 Type;
+} BLUETOOTH_LE_ADDRESS;
+
#pragma pack()
-#define BLUETOOTH_HCI_COMMAND_LOCAL_READABLE_NAME_MAX_SIZE 248
+#define BLUETOOTH_HCI_COMMAND_LOCAL_READABLE_NAME_MAX_SIZE 248
-#define BLUETOOTH_HCI_LINK_KEY_SIZE 16
+#define BLUETOOTH_HCI_LINK_KEY_SIZE 16
#endif
diff --git a/src/include/ipxe/efi/IndustryStandard/Pci22.h b/src/include/ipxe/efi/IndustryStandard/Pci22.h
index c14d4b4..161333d 100644
--- a/src/include/ipxe/efi/IndustryStandard/Pci22.h
+++ b/src/include/ipxe/efi/IndustryStandard/Pci22.h
@@ -5,24 +5,18 @@
PCI Local Bus Specification, 2.2
PCI-to-PCI Bridge Architecture Specification, Revision 1.2
PC Card Standard, 8.0
- PCI Power Management Interface Specifiction, Revision 1.2
+ PCI Power Management Interface Specification, Revision 1.2
- Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2014 - 2015, Hewlett-Packard Development Company, L.P.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _PCI22_H_
#define _PCI22_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define PCI_MAX_BUS 255
#define PCI_MAX_DEVICE 31
@@ -35,16 +29,16 @@
/// Section 6.1, PCI Local Bus Specification, 2.2
///
typedef struct {
- UINT16 VendorId;
- UINT16 DeviceId;
- UINT16 Command;
- UINT16 Status;
- UINT8 RevisionID;
- UINT8 ClassCode[3];
- UINT8 CacheLineSize;
- UINT8 LatencyTimer;
- UINT8 HeaderType;
- UINT8 BIST;
+ UINT16 VendorId;
+ UINT16 DeviceId;
+ UINT16 Command;
+ UINT16 Status;
+ UINT8 RevisionID;
+ UINT8 ClassCode[3];
+ UINT8 CacheLineSize;
+ UINT8 LatencyTimer;
+ UINT8 HeaderType;
+ UINT8 BIST;
} PCI_DEVICE_INDEPENDENT_REGION;
///
@@ -52,18 +46,18 @@
/// Section 6.1, PCI Local Bus Specification, 2.2
///
typedef struct {
- UINT32 Bar[6];
- UINT32 CISPtr;
- UINT16 SubsystemVendorID;
- UINT16 SubsystemID;
- UINT32 ExpansionRomBar;
- UINT8 CapabilityPtr;
- UINT8 Reserved1[3];
- UINT32 Reserved2;
- UINT8 InterruptLine;
- UINT8 InterruptPin;
- UINT8 MinGnt;
- UINT8 MaxLat;
+ UINT32 Bar[6];
+ UINT32 CISPtr;
+ UINT16 SubsystemVendorID;
+ UINT16 SubsystemID;
+ UINT32 ExpansionRomBar;
+ UINT8 CapabilityPtr;
+ UINT8 Reserved1[3];
+ UINT32 Reserved2;
+ UINT8 InterruptLine;
+ UINT8 InterruptPin;
+ UINT8 MinGnt;
+ UINT8 MaxLat;
} PCI_DEVICE_HEADER_TYPE_REGION;
///
@@ -71,8 +65,8 @@
/// Section 6.1, PCI Local Bus Specification, 2.2
///
typedef struct {
- PCI_DEVICE_INDEPENDENT_REGION Hdr;
- PCI_DEVICE_HEADER_TYPE_REGION Device;
+ PCI_DEVICE_INDEPENDENT_REGION Hdr;
+ PCI_DEVICE_HEADER_TYPE_REGION Device;
} PCI_TYPE00;
///
@@ -80,28 +74,28 @@
/// Section 3.2, PCI-PCI Bridge Architecture, Version 1.2
///
typedef struct {
- UINT32 Bar[2];
- UINT8 PrimaryBus;
- UINT8 SecondaryBus;
- UINT8 SubordinateBus;
- UINT8 SecondaryLatencyTimer;
- UINT8 IoBase;
- UINT8 IoLimit;
- UINT16 SecondaryStatus;
- UINT16 MemoryBase;
- UINT16 MemoryLimit;
- UINT16 PrefetchableMemoryBase;
- UINT16 PrefetchableMemoryLimit;
- UINT32 PrefetchableBaseUpper32;
- UINT32 PrefetchableLimitUpper32;
- UINT16 IoBaseUpper16;
- UINT16 IoLimitUpper16;
- UINT8 CapabilityPtr;
- UINT8 Reserved[3];
- UINT32 ExpansionRomBAR;
- UINT8 InterruptLine;
- UINT8 InterruptPin;
- UINT16 BridgeControl;
+ UINT32 Bar[2];
+ UINT8 PrimaryBus;
+ UINT8 SecondaryBus;
+ UINT8 SubordinateBus;
+ UINT8 SecondaryLatencyTimer;
+ UINT8 IoBase;
+ UINT8 IoLimit;
+ UINT16 SecondaryStatus;
+ UINT16 MemoryBase;
+ UINT16 MemoryLimit;
+ UINT16 PrefetchableMemoryBase;
+ UINT16 PrefetchableMemoryLimit;
+ UINT32 PrefetchableBaseUpper32;
+ UINT32 PrefetchableLimitUpper32;
+ UINT16 IoBaseUpper16;
+ UINT16 IoLimitUpper16;
+ UINT8 CapabilityPtr;
+ UINT8 Reserved[3];
+ UINT32 ExpansionRomBAR;
+ UINT8 InterruptLine;
+ UINT8 InterruptPin;
+ UINT16 BridgeControl;
} PCI_BRIDGE_CONTROL_REGISTER;
///
@@ -109,202 +103,202 @@
/// Section 3.2, PCI-PCI Bridge Architecture, Version 1.2
///
typedef struct {
- PCI_DEVICE_INDEPENDENT_REGION Hdr;
- PCI_BRIDGE_CONTROL_REGISTER Bridge;
+ PCI_DEVICE_INDEPENDENT_REGION Hdr;
+ PCI_BRIDGE_CONTROL_REGISTER Bridge;
} PCI_TYPE01;
typedef union {
- PCI_TYPE00 Device;
- PCI_TYPE01 Bridge;
+ PCI_TYPE00 Device;
+ PCI_TYPE01 Bridge;
} PCI_TYPE_GENERIC;
///
-/// CardBus Conroller Configuration Space,
+/// CardBus Controller Configuration Space,
/// Section 4.5.1, PC Card Standard. 8.0
///
typedef struct {
- UINT32 CardBusSocketReg; ///< Cardus Socket/ExCA Base
- UINT8 Cap_Ptr;
- UINT8 Reserved;
- UINT16 SecondaryStatus; ///< Secondary Status
- UINT8 PciBusNumber; ///< PCI Bus Number
- UINT8 CardBusBusNumber; ///< CardBus Bus Number
- UINT8 SubordinateBusNumber; ///< Subordinate Bus Number
- UINT8 CardBusLatencyTimer; ///< CardBus Latency Timer
- UINT32 MemoryBase0; ///< Memory Base Register 0
- UINT32 MemoryLimit0; ///< Memory Limit Register 0
- UINT32 MemoryBase1;
- UINT32 MemoryLimit1;
- UINT32 IoBase0;
- UINT32 IoLimit0; ///< I/O Base Register 0
- UINT32 IoBase1; ///< I/O Limit Register 0
- UINT32 IoLimit1;
- UINT8 InterruptLine; ///< Interrupt Line
- UINT8 InterruptPin; ///< Interrupt Pin
- UINT16 BridgeControl; ///< Bridge Control
+ UINT32 CardBusSocketReg; ///< Cardbus Socket/ExCA Base
+ UINT8 Cap_Ptr;
+ UINT8 Reserved;
+ UINT16 SecondaryStatus; ///< Secondary Status
+ UINT8 PciBusNumber; ///< PCI Bus Number
+ UINT8 CardBusBusNumber; ///< CardBus Bus Number
+ UINT8 SubordinateBusNumber; ///< Subordinate Bus Number
+ UINT8 CardBusLatencyTimer; ///< CardBus Latency Timer
+ UINT32 MemoryBase0; ///< Memory Base Register 0
+ UINT32 MemoryLimit0; ///< Memory Limit Register 0
+ UINT32 MemoryBase1;
+ UINT32 MemoryLimit1;
+ UINT32 IoBase0;
+ UINT32 IoLimit0; ///< I/O Base Register 0
+ UINT32 IoBase1; ///< I/O Limit Register 0
+ UINT32 IoLimit1;
+ UINT8 InterruptLine; ///< Interrupt Line
+ UINT8 InterruptPin; ///< Interrupt Pin
+ UINT16 BridgeControl; ///< Bridge Control
} PCI_CARDBUS_CONTROL_REGISTER;
//
// Definitions of PCI class bytes and manipulation macros.
//
-#define PCI_CLASS_OLD 0x00
-#define PCI_CLASS_OLD_OTHER 0x00
-#define PCI_CLASS_OLD_VGA 0x01
+#define PCI_CLASS_OLD 0x00
+#define PCI_CLASS_OLD_OTHER 0x00
+#define PCI_CLASS_OLD_VGA 0x01
-#define PCI_CLASS_MASS_STORAGE 0x01
-#define PCI_CLASS_MASS_STORAGE_SCSI 0x00
-#define PCI_CLASS_MASS_STORAGE_IDE 0x01
-#define PCI_CLASS_MASS_STORAGE_FLOPPY 0x02
-#define PCI_CLASS_MASS_STORAGE_IPI 0x03
-#define PCI_CLASS_MASS_STORAGE_RAID 0x04
-#define PCI_CLASS_MASS_STORAGE_OTHER 0x80
+#define PCI_CLASS_MASS_STORAGE 0x01
+#define PCI_CLASS_MASS_STORAGE_SCSI 0x00
+#define PCI_CLASS_MASS_STORAGE_IDE 0x01
+#define PCI_CLASS_MASS_STORAGE_FLOPPY 0x02
+#define PCI_CLASS_MASS_STORAGE_IPI 0x03
+#define PCI_CLASS_MASS_STORAGE_RAID 0x04
+#define PCI_CLASS_MASS_STORAGE_OTHER 0x80
-#define PCI_CLASS_NETWORK 0x02
-#define PCI_CLASS_NETWORK_ETHERNET 0x00
-#define PCI_CLASS_NETWORK_TOKENRING 0x01
-#define PCI_CLASS_NETWORK_FDDI 0x02
-#define PCI_CLASS_NETWORK_ATM 0x03
-#define PCI_CLASS_NETWORK_ISDN 0x04
-#define PCI_CLASS_NETWORK_OTHER 0x80
+#define PCI_CLASS_NETWORK 0x02
+#define PCI_CLASS_NETWORK_ETHERNET 0x00
+#define PCI_CLASS_NETWORK_TOKENRING 0x01
+#define PCI_CLASS_NETWORK_FDDI 0x02
+#define PCI_CLASS_NETWORK_ATM 0x03
+#define PCI_CLASS_NETWORK_ISDN 0x04
+#define PCI_CLASS_NETWORK_OTHER 0x80
-#define PCI_CLASS_DISPLAY 0x03
-#define PCI_CLASS_DISPLAY_VGA 0x00
-#define PCI_IF_VGA_VGA 0x00
-#define PCI_IF_VGA_8514 0x01
-#define PCI_CLASS_DISPLAY_XGA 0x01
-#define PCI_CLASS_DISPLAY_3D 0x02
-#define PCI_CLASS_DISPLAY_OTHER 0x80
+#define PCI_CLASS_DISPLAY 0x03
+#define PCI_CLASS_DISPLAY_VGA 0x00
+#define PCI_IF_VGA_VGA 0x00
+#define PCI_IF_VGA_8514 0x01
+#define PCI_CLASS_DISPLAY_XGA 0x01
+#define PCI_CLASS_DISPLAY_3D 0x02
+#define PCI_CLASS_DISPLAY_OTHER 0x80
-#define PCI_CLASS_MEDIA 0x04
-#define PCI_CLASS_MEDIA_VIDEO 0x00
-#define PCI_CLASS_MEDIA_AUDIO 0x01
-#define PCI_CLASS_MEDIA_TELEPHONE 0x02
-#define PCI_CLASS_MEDIA_OTHER 0x80
+#define PCI_CLASS_MEDIA 0x04
+#define PCI_CLASS_MEDIA_VIDEO 0x00
+#define PCI_CLASS_MEDIA_AUDIO 0x01
+#define PCI_CLASS_MEDIA_TELEPHONE 0x02
+#define PCI_CLASS_MEDIA_OTHER 0x80
-#define PCI_CLASS_MEMORY_CONTROLLER 0x05
-#define PCI_CLASS_MEMORY_RAM 0x00
-#define PCI_CLASS_MEMORY_FLASH 0x01
-#define PCI_CLASS_MEMORY_OTHER 0x80
+#define PCI_CLASS_MEMORY_CONTROLLER 0x05
+#define PCI_CLASS_MEMORY_RAM 0x00
+#define PCI_CLASS_MEMORY_FLASH 0x01
+#define PCI_CLASS_MEMORY_OTHER 0x80
-#define PCI_CLASS_BRIDGE 0x06
-#define PCI_CLASS_BRIDGE_HOST 0x00
-#define PCI_CLASS_BRIDGE_ISA 0x01
-#define PCI_CLASS_BRIDGE_EISA 0x02
-#define PCI_CLASS_BRIDGE_MCA 0x03
-#define PCI_CLASS_BRIDGE_P2P 0x04
-#define PCI_IF_BRIDGE_P2P 0x00
-#define PCI_IF_BRIDGE_P2P_SUBTRACTIVE 0x01
-#define PCI_CLASS_BRIDGE_PCMCIA 0x05
-#define PCI_CLASS_BRIDGE_NUBUS 0x06
-#define PCI_CLASS_BRIDGE_CARDBUS 0x07
-#define PCI_CLASS_BRIDGE_RACEWAY 0x08
-#define PCI_CLASS_BRIDGE_OTHER 0x80
-#define PCI_CLASS_BRIDGE_ISA_PDECODE 0x80
+#define PCI_CLASS_BRIDGE 0x06
+#define PCI_CLASS_BRIDGE_HOST 0x00
+#define PCI_CLASS_BRIDGE_ISA 0x01
+#define PCI_CLASS_BRIDGE_EISA 0x02
+#define PCI_CLASS_BRIDGE_MCA 0x03
+#define PCI_CLASS_BRIDGE_P2P 0x04
+#define PCI_IF_BRIDGE_P2P 0x00
+#define PCI_IF_BRIDGE_P2P_SUBTRACTIVE 0x01
+#define PCI_CLASS_BRIDGE_PCMCIA 0x05
+#define PCI_CLASS_BRIDGE_NUBUS 0x06
+#define PCI_CLASS_BRIDGE_CARDBUS 0x07
+#define PCI_CLASS_BRIDGE_RACEWAY 0x08
+#define PCI_CLASS_BRIDGE_OTHER 0x80
+#define PCI_CLASS_BRIDGE_ISA_PDECODE 0x80
-#define PCI_CLASS_SCC 0x07 ///< Simple communications controllers
-#define PCI_SUBCLASS_SERIAL 0x00
-#define PCI_IF_GENERIC_XT 0x00
-#define PCI_IF_16450 0x01
-#define PCI_IF_16550 0x02
-#define PCI_IF_16650 0x03
-#define PCI_IF_16750 0x04
-#define PCI_IF_16850 0x05
-#define PCI_IF_16950 0x06
-#define PCI_SUBCLASS_PARALLEL 0x01
-#define PCI_IF_PARALLEL_PORT 0x00
-#define PCI_IF_BI_DIR_PARALLEL_PORT 0x01
-#define PCI_IF_ECP_PARALLEL_PORT 0x02
-#define PCI_IF_1284_CONTROLLER 0x03
-#define PCI_IF_1284_DEVICE 0xFE
-#define PCI_SUBCLASS_MULTIPORT_SERIAL 0x02
-#define PCI_SUBCLASS_MODEM 0x03
-#define PCI_IF_GENERIC_MODEM 0x00
-#define PCI_IF_16450_MODEM 0x01
-#define PCI_IF_16550_MODEM 0x02
-#define PCI_IF_16650_MODEM 0x03
-#define PCI_IF_16750_MODEM 0x04
-#define PCI_SUBCLASS_SCC_OTHER 0x80
+#define PCI_CLASS_SCC 0x07///< Simple communications controllers
+#define PCI_SUBCLASS_SERIAL 0x00
+#define PCI_IF_GENERIC_XT 0x00
+#define PCI_IF_16450 0x01
+#define PCI_IF_16550 0x02
+#define PCI_IF_16650 0x03
+#define PCI_IF_16750 0x04
+#define PCI_IF_16850 0x05
+#define PCI_IF_16950 0x06
+#define PCI_SUBCLASS_PARALLEL 0x01
+#define PCI_IF_PARALLEL_PORT 0x00
+#define PCI_IF_BI_DIR_PARALLEL_PORT 0x01
+#define PCI_IF_ECP_PARALLEL_PORT 0x02
+#define PCI_IF_1284_CONTROLLER 0x03
+#define PCI_IF_1284_DEVICE 0xFE
+#define PCI_SUBCLASS_MULTIPORT_SERIAL 0x02
+#define PCI_SUBCLASS_MODEM 0x03
+#define PCI_IF_GENERIC_MODEM 0x00
+#define PCI_IF_16450_MODEM 0x01
+#define PCI_IF_16550_MODEM 0x02
+#define PCI_IF_16650_MODEM 0x03
+#define PCI_IF_16750_MODEM 0x04
+#define PCI_SUBCLASS_SCC_OTHER 0x80
-#define PCI_CLASS_SYSTEM_PERIPHERAL 0x08
-#define PCI_SUBCLASS_PIC 0x00
-#define PCI_IF_8259_PIC 0x00
-#define PCI_IF_ISA_PIC 0x01
-#define PCI_IF_EISA_PIC 0x02
-#define PCI_IF_APIC_CONTROLLER 0x10 ///< I/O APIC interrupt controller , 32 bye none-prefectable memory.
-#define PCI_IF_APIC_CONTROLLER2 0x20
-#define PCI_SUBCLASS_DMA 0x01
-#define PCI_IF_8237_DMA 0x00
-#define PCI_IF_ISA_DMA 0x01
-#define PCI_IF_EISA_DMA 0x02
-#define PCI_SUBCLASS_TIMER 0x02
-#define PCI_IF_8254_TIMER 0x00
-#define PCI_IF_ISA_TIMER 0x01
-#define PCI_IF_EISA_TIMER 0x02
-#define PCI_SUBCLASS_RTC 0x03
-#define PCI_IF_GENERIC_RTC 0x00
-#define PCI_IF_ISA_RTC 0x01
-#define PCI_SUBCLASS_PNP_CONTROLLER 0x04 ///< HotPlug Controller
-#define PCI_SUBCLASS_PERIPHERAL_OTHER 0x80
+#define PCI_CLASS_SYSTEM_PERIPHERAL 0x08
+#define PCI_SUBCLASS_PIC 0x00
+#define PCI_IF_8259_PIC 0x00
+#define PCI_IF_ISA_PIC 0x01
+#define PCI_IF_EISA_PIC 0x02
+#define PCI_IF_APIC_CONTROLLER 0x10 ///< I/O APIC interrupt controller , 32 byte none-prefetchable memory.
+#define PCI_IF_APIC_CONTROLLER2 0x20
+#define PCI_SUBCLASS_DMA 0x01
+#define PCI_IF_8237_DMA 0x00
+#define PCI_IF_ISA_DMA 0x01
+#define PCI_IF_EISA_DMA 0x02
+#define PCI_SUBCLASS_TIMER 0x02
+#define PCI_IF_8254_TIMER 0x00
+#define PCI_IF_ISA_TIMER 0x01
+#define PCI_IF_EISA_TIMER 0x02
+#define PCI_SUBCLASS_RTC 0x03
+#define PCI_IF_GENERIC_RTC 0x00
+#define PCI_IF_ISA_RTC 0x01
+#define PCI_SUBCLASS_PNP_CONTROLLER 0x04 ///< HotPlug Controller
+#define PCI_SUBCLASS_PERIPHERAL_OTHER 0x80
-#define PCI_CLASS_INPUT_DEVICE 0x09
-#define PCI_SUBCLASS_KEYBOARD 0x00
-#define PCI_SUBCLASS_PEN 0x01
-#define PCI_SUBCLASS_MOUSE_CONTROLLER 0x02
-#define PCI_SUBCLASS_SCAN_CONTROLLER 0x03
-#define PCI_SUBCLASS_GAMEPORT 0x04
-#define PCI_IF_GAMEPORT 0x00
-#define PCI_IF_GAMEPORT1 0x10
-#define PCI_SUBCLASS_INPUT_OTHER 0x80
+#define PCI_CLASS_INPUT_DEVICE 0x09
+#define PCI_SUBCLASS_KEYBOARD 0x00
+#define PCI_SUBCLASS_PEN 0x01
+#define PCI_SUBCLASS_MOUSE_CONTROLLER 0x02
+#define PCI_SUBCLASS_SCAN_CONTROLLER 0x03
+#define PCI_SUBCLASS_GAMEPORT 0x04
+#define PCI_IF_GAMEPORT 0x00
+#define PCI_IF_GAMEPORT1 0x10
+#define PCI_SUBCLASS_INPUT_OTHER 0x80
-#define PCI_CLASS_DOCKING_STATION 0x0A
+#define PCI_CLASS_DOCKING_STATION 0x0A
#define PCI_SUBCLASS_DOCKING_GENERIC 0x00
#define PCI_SUBCLASS_DOCKING_OTHER 0x80
-#define PCI_CLASS_PROCESSOR 0x0B
-#define PCI_SUBCLASS_PROC_386 0x00
-#define PCI_SUBCLASS_PROC_486 0x01
-#define PCI_SUBCLASS_PROC_PENTIUM 0x02
-#define PCI_SUBCLASS_PROC_ALPHA 0x10
-#define PCI_SUBCLASS_PROC_POWERPC 0x20
-#define PCI_SUBCLASS_PROC_MIPS 0x30
-#define PCI_SUBCLASS_PROC_CO_PORC 0x40 ///< Co-Processor
+#define PCI_CLASS_PROCESSOR 0x0B
+#define PCI_SUBCLASS_PROC_386 0x00
+#define PCI_SUBCLASS_PROC_486 0x01
+#define PCI_SUBCLASS_PROC_PENTIUM 0x02
+#define PCI_SUBCLASS_PROC_ALPHA 0x10
+#define PCI_SUBCLASS_PROC_POWERPC 0x20
+#define PCI_SUBCLASS_PROC_MIPS 0x30
+#define PCI_SUBCLASS_PROC_CO_PORC 0x40 ///< Co-Processor
-#define PCI_CLASS_SERIAL 0x0C
-#define PCI_CLASS_SERIAL_FIREWIRE 0x00
-#define PCI_IF_1394 0x00
-#define PCI_IF_1394_OPEN_HCI 0x10
-#define PCI_CLASS_SERIAL_ACCESS_BUS 0x01
-#define PCI_CLASS_SERIAL_SSA 0x02
-#define PCI_CLASS_SERIAL_USB 0x03
-#define PCI_IF_UHCI 0x00
-#define PCI_IF_OHCI 0x10
-#define PCI_IF_USB_OTHER 0x80
-#define PCI_IF_USB_DEVICE 0xFE
-#define PCI_CLASS_SERIAL_FIBRECHANNEL 0x04
-#define PCI_CLASS_SERIAL_SMB 0x05
+#define PCI_CLASS_SERIAL 0x0C
+#define PCI_CLASS_SERIAL_FIREWIRE 0x00
+#define PCI_IF_1394 0x00
+#define PCI_IF_1394_OPEN_HCI 0x10
+#define PCI_CLASS_SERIAL_ACCESS_BUS 0x01
+#define PCI_CLASS_SERIAL_SSA 0x02
+#define PCI_CLASS_SERIAL_USB 0x03
+#define PCI_IF_UHCI 0x00
+#define PCI_IF_OHCI 0x10
+#define PCI_IF_USB_OTHER 0x80
+#define PCI_IF_USB_DEVICE 0xFE
+#define PCI_CLASS_SERIAL_FIBRECHANNEL 0x04
+#define PCI_CLASS_SERIAL_SMB 0x05
-#define PCI_CLASS_WIRELESS 0x0D
-#define PCI_SUBCLASS_IRDA 0x00
-#define PCI_SUBCLASS_IR 0x01
-#define PCI_SUBCLASS_RF 0x10
-#define PCI_SUBCLASS_WIRELESS_OTHER 0x80
+#define PCI_CLASS_WIRELESS 0x0D
+#define PCI_SUBCLASS_IRDA 0x00
+#define PCI_SUBCLASS_IR 0x01
+#define PCI_SUBCLASS_RF 0x10
+#define PCI_SUBCLASS_WIRELESS_OTHER 0x80
-#define PCI_CLASS_INTELLIGENT_IO 0x0E
+#define PCI_CLASS_INTELLIGENT_IO 0x0E
-#define PCI_CLASS_SATELLITE 0x0F
-#define PCI_SUBCLASS_TV 0x01
-#define PCI_SUBCLASS_AUDIO 0x02
-#define PCI_SUBCLASS_VOICE 0x03
-#define PCI_SUBCLASS_DATA 0x04
+#define PCI_CLASS_SATELLITE 0x0F
+#define PCI_SUBCLASS_TV 0x01
+#define PCI_SUBCLASS_AUDIO 0x02
+#define PCI_SUBCLASS_VOICE 0x03
+#define PCI_SUBCLASS_DATA 0x04
-#define PCI_SECURITY_CONTROLLER 0x10 ///< Encryption and decryption controller
-#define PCI_SUBCLASS_NET_COMPUT 0x00
-#define PCI_SUBCLASS_ENTERTAINMENT 0x10
-#define PCI_SUBCLASS_SECURITY_OTHER 0x80
+#define PCI_SECURITY_CONTROLLER 0x10 ///< Encryption and decryption controller
+#define PCI_SUBCLASS_NET_COMPUT 0x00
+#define PCI_SUBCLASS_ENTERTAINMENT 0x10
+#define PCI_SUBCLASS_SECURITY_OTHER 0x80
-#define PCI_CLASS_DPIO 0x11
-#define PCI_SUBCLASS_DPIO 0x00
-#define PCI_SUBCLASS_DPIO_OTHER 0x80
+#define PCI_CLASS_DPIO 0x11
+#define PCI_SUBCLASS_DPIO 0x00
+#define PCI_SUBCLASS_DPIO_OTHER 0x80
/**
Macro that checks whether the Base Class code of device matched.
@@ -316,7 +310,8 @@
@retval FALSE Base Class code doesn't match the specified device.
**/
-#define IS_CLASS1(_p, c) ((_p)->Hdr.ClassCode[2] == (c))
+#define IS_CLASS1(_p, c) ((_p)->Hdr.ClassCode[2] == (c))
+
/**
Macro that checks whether the Base Class code and Sub-Class code of device matched.
@@ -328,7 +323,8 @@
@retval FALSE Base Class code and Sub-Class code don't match the specified device.
**/
-#define IS_CLASS2(_p, c, s) (IS_CLASS1 (_p, c) && ((_p)->Hdr.ClassCode[1] == (s)))
+#define IS_CLASS2(_p, c, s) (IS_CLASS1 (_p, c) && ((_p)->Hdr.ClassCode[1] == (s)))
+
/**
Macro that checks whether the Base Class code, Sub-Class code and Interface code of device matched.
@@ -341,7 +337,7 @@
@retval FALSE Base Class code, Sub-Class code and Interface code don't match the specified device.
**/
-#define IS_CLASS3(_p, c, s, p) (IS_CLASS2 (_p, c, s) && ((_p)->Hdr.ClassCode[0] == (p)))
+#define IS_CLASS3(_p, c, s, p) (IS_CLASS2 (_p, c, s) && ((_p)->Hdr.ClassCode[0] == (p)))
/**
Macro that checks whether device is a display controller.
@@ -352,7 +348,8 @@
@retval FALSE Device is not a display controller.
**/
-#define IS_PCI_DISPLAY(_p) IS_CLASS1 (_p, PCI_CLASS_DISPLAY)
+#define IS_PCI_DISPLAY(_p) IS_CLASS1 (_p, PCI_CLASS_DISPLAY)
+
/**
Macro that checks whether device is a VGA-compatible controller.
@@ -362,7 +359,8 @@
@retval FALSE Device is not a VGA-compatible controller.
**/
-#define IS_PCI_VGA(_p) IS_CLASS3 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_VGA, PCI_IF_VGA_VGA)
+#define IS_PCI_VGA(_p) IS_CLASS3 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_VGA, PCI_IF_VGA_VGA)
+
/**
Macro that checks whether device is an 8514-compatible controller.
@@ -372,7 +370,8 @@
@retval FALSE Device is not an 8514-compatible controller.
**/
-#define IS_PCI_8514(_p) IS_CLASS3 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_VGA, PCI_IF_VGA_8514)
+#define IS_PCI_8514(_p) IS_CLASS3 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_VGA, PCI_IF_VGA_8514)
+
/**
Macro that checks whether device is built before the Class Code field was defined.
@@ -382,7 +381,8 @@
@retval FALSE Device is not an old device.
**/
-#define IS_PCI_OLD(_p) IS_CLASS1 (_p, PCI_CLASS_OLD)
+#define IS_PCI_OLD(_p) IS_CLASS1 (_p, PCI_CLASS_OLD)
+
/**
Macro that checks whether device is a VGA-compatible device built before the Class Code field was defined.
@@ -392,7 +392,8 @@
@retval FALSE Device is not an old VGA-compatible device.
**/
-#define IS_PCI_OLD_VGA(_p) IS_CLASS2 (_p, PCI_CLASS_OLD, PCI_CLASS_OLD_VGA)
+#define IS_PCI_OLD_VGA(_p) IS_CLASS2 (_p, PCI_CLASS_OLD, PCI_CLASS_OLD_VGA)
+
/**
Macro that checks whether device is an IDE controller.
@@ -402,7 +403,8 @@
@retval FALSE Device is not an IDE controller.
**/
-#define IS_PCI_IDE(_p) IS_CLASS2 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_IDE)
+#define IS_PCI_IDE(_p) IS_CLASS2 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_IDE)
+
/**
Macro that checks whether device is a SCSI bus controller.
@@ -412,7 +414,8 @@
@retval FALSE Device is not a SCSI bus controller.
**/
-#define IS_PCI_SCSI(_p) IS_CLASS2 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_SCSI)
+#define IS_PCI_SCSI(_p) IS_CLASS2 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_SCSI)
+
/**
Macro that checks whether device is a RAID controller.
@@ -422,7 +425,8 @@
@retval FALSE Device is not a RAID controller.
**/
-#define IS_PCI_RAID(_p) IS_CLASS2 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_RAID)
+#define IS_PCI_RAID(_p) IS_CLASS2 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_RAID)
+
/**
Macro that checks whether device is an ISA bridge.
@@ -432,7 +436,8 @@
@retval FALSE Device is not an ISA bridge.
**/
-#define IS_PCI_LPC(_p) IS_CLASS2 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA)
+#define IS_PCI_LPC(_p) IS_CLASS2 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA)
+
/**
Macro that checks whether device is a PCI-to-PCI bridge.
@@ -442,7 +447,8 @@
@retval FALSE Device is not a PCI-to-PCI bridge.
**/
-#define IS_PCI_P2P(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_P2P, PCI_IF_BRIDGE_P2P)
+#define IS_PCI_P2P(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_P2P, PCI_IF_BRIDGE_P2P)
+
/**
Macro that checks whether device is a Subtractive Decode PCI-to-PCI bridge.
@@ -452,7 +458,8 @@
@retval FALSE Device is not a Subtractive Decode PCI-to-PCI bridge.
**/
-#define IS_PCI_P2P_SUB(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_P2P, PCI_IF_BRIDGE_P2P_SUBTRACTIVE)
+#define IS_PCI_P2P_SUB(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_P2P, PCI_IF_BRIDGE_P2P_SUBTRACTIVE)
+
/**
Macro that checks whether device is a 16550-compatible serial controller.
@@ -462,7 +469,8 @@
@retval FALSE Device is not a 16550-compatible serial controller.
**/
-#define IS_PCI_16550_SERIAL(_p) IS_CLASS3 (_p, PCI_CLASS_SCC, PCI_SUBCLASS_SERIAL, PCI_IF_16550)
+#define IS_PCI_16550_SERIAL(_p) IS_CLASS3 (_p, PCI_CLASS_SCC, PCI_SUBCLASS_SERIAL, PCI_IF_16550)
+
/**
Macro that checks whether device is a Universal Serial Bus controller.
@@ -472,19 +480,20 @@
@retval FALSE Device is not a Universal Serial Bus controller.
**/
-#define IS_PCI_USB(_p) IS_CLASS2 (_p, PCI_CLASS_SERIAL, PCI_CLASS_SERIAL_USB)
+#define IS_PCI_USB(_p) IS_CLASS2 (_p, PCI_CLASS_SERIAL, PCI_CLASS_SERIAL_USB)
//
// the definition of Header Type
//
-#define HEADER_TYPE_DEVICE 0x00
-#define HEADER_TYPE_PCI_TO_PCI_BRIDGE 0x01
-#define HEADER_TYPE_CARDBUS_BRIDGE 0x02
-#define HEADER_TYPE_MULTI_FUNCTION 0x80
+#define HEADER_TYPE_DEVICE 0x00
+#define HEADER_TYPE_PCI_TO_PCI_BRIDGE 0x01
+#define HEADER_TYPE_CARDBUS_BRIDGE 0x02
+#define HEADER_TYPE_MULTI_FUNCTION 0x80
//
// Mask of Header type
//
-#define HEADER_LAYOUT_CODE 0x7f
+#define HEADER_LAYOUT_CODE 0x7f
+
/**
Macro that checks whether device is a PCI-PCI bridge.
@@ -494,7 +503,8 @@
@retval FALSE Device is not a PCI-PCI bridge.
**/
-#define IS_PCI_BRIDGE(_p) (((_p)->Hdr.HeaderType & HEADER_LAYOUT_CODE) == (HEADER_TYPE_PCI_TO_PCI_BRIDGE))
+#define IS_PCI_BRIDGE(_p) (((_p)->Hdr.HeaderType & HEADER_LAYOUT_CODE) == (HEADER_TYPE_PCI_TO_PCI_BRIDGE))
+
/**
Macro that checks whether device is a CardBus bridge.
@@ -504,7 +514,8 @@
@retval FALSE Device is not a CardBus bridge.
**/
-#define IS_CARDBUS_BRIDGE(_p) (((_p)->Hdr.HeaderType & HEADER_LAYOUT_CODE) == (HEADER_TYPE_CARDBUS_BRIDGE))
+#define IS_CARDBUS_BRIDGE(_p) (((_p)->Hdr.HeaderType & HEADER_LAYOUT_CODE) == (HEADER_TYPE_CARDBUS_BRIDGE))
+
/**
Macro that checks whether device is a multiple functions device.
@@ -514,38 +525,38 @@
@retval FALSE Device is not a multiple functions device.
**/
-#define IS_PCI_MULTI_FUNC(_p) ((_p)->Hdr.HeaderType & HEADER_TYPE_MULTI_FUNCTION)
+#define IS_PCI_MULTI_FUNC(_p) ((_p)->Hdr.HeaderType & HEADER_TYPE_MULTI_FUNCTION)
///
-/// Rom Base Address in Bridge, defined in PCI-to-PCI Bridge Architecure Specification,
+/// Rom Base Address in Bridge, defined in PCI-to-PCI Bridge Architecture Specification,
///
-#define PCI_BRIDGE_ROMBAR 0x38
+#define PCI_BRIDGE_ROMBAR 0x38
-#define PCI_MAX_BAR 0x0006
-#define PCI_MAX_CONFIG_OFFSET 0x0100
+#define PCI_MAX_BAR 0x0006
+#define PCI_MAX_CONFIG_OFFSET 0x0100
-#define PCI_VENDOR_ID_OFFSET 0x00
-#define PCI_DEVICE_ID_OFFSET 0x02
-#define PCI_COMMAND_OFFSET 0x04
-#define PCI_PRIMARY_STATUS_OFFSET 0x06
-#define PCI_REVISION_ID_OFFSET 0x08
-#define PCI_CLASSCODE_OFFSET 0x09
-#define PCI_CACHELINE_SIZE_OFFSET 0x0C
-#define PCI_LATENCY_TIMER_OFFSET 0x0D
-#define PCI_HEADER_TYPE_OFFSET 0x0E
-#define PCI_BIST_OFFSET 0x0F
-#define PCI_BASE_ADDRESSREG_OFFSET 0x10
-#define PCI_CARDBUS_CIS_OFFSET 0x28
-#define PCI_SVID_OFFSET 0x2C ///< SubSystem Vendor id
-#define PCI_SUBSYSTEM_VENDOR_ID_OFFSET 0x2C
-#define PCI_SID_OFFSET 0x2E ///< SubSystem ID
-#define PCI_SUBSYSTEM_ID_OFFSET 0x2E
-#define PCI_EXPANSION_ROM_BASE 0x30
-#define PCI_CAPBILITY_POINTER_OFFSET 0x34
-#define PCI_INT_LINE_OFFSET 0x3C ///< Interrupt Line Register
-#define PCI_INT_PIN_OFFSET 0x3D ///< Interrupt Pin Register
-#define PCI_MAXGNT_OFFSET 0x3E ///< Max Grant Register
-#define PCI_MAXLAT_OFFSET 0x3F ///< Max Latency Register
+#define PCI_VENDOR_ID_OFFSET 0x00
+#define PCI_DEVICE_ID_OFFSET 0x02
+#define PCI_COMMAND_OFFSET 0x04
+#define PCI_PRIMARY_STATUS_OFFSET 0x06
+#define PCI_REVISION_ID_OFFSET 0x08
+#define PCI_CLASSCODE_OFFSET 0x09
+#define PCI_CACHELINE_SIZE_OFFSET 0x0C
+#define PCI_LATENCY_TIMER_OFFSET 0x0D
+#define PCI_HEADER_TYPE_OFFSET 0x0E
+#define PCI_BIST_OFFSET 0x0F
+#define PCI_BASE_ADDRESSREG_OFFSET 0x10
+#define PCI_CARDBUS_CIS_OFFSET 0x28
+#define PCI_SVID_OFFSET 0x2C ///< SubSystem Vendor id
+#define PCI_SUBSYSTEM_VENDOR_ID_OFFSET 0x2C
+#define PCI_SID_OFFSET 0x2E ///< SubSystem ID
+#define PCI_SUBSYSTEM_ID_OFFSET 0x2E
+#define PCI_EXPANSION_ROM_BASE 0x30
+#define PCI_CAPBILITY_POINTER_OFFSET 0x34
+#define PCI_INT_LINE_OFFSET 0x3C ///< Interrupt Line Register
+#define PCI_INT_PIN_OFFSET 0x3D ///< Interrupt Pin Register
+#define PCI_MAXGNT_OFFSET 0x3E ///< Max Grant Register
+#define PCI_MAXLAT_OFFSET 0x3F ///< Max Latency Register
//
// defined in PCI-to-PCI Bridge Architecture Specification
@@ -560,35 +571,35 @@
///
/// Interrupt Line "Unknown" or "No connection" value defined for x86 based system
///
-#define PCI_INT_LINE_UNKNOWN 0xFF
+#define PCI_INT_LINE_UNKNOWN 0xFF
///
/// PCI Access Data Format
///
typedef union {
struct {
- UINT32 Reg : 8;
- UINT32 Func : 3;
- UINT32 Dev : 5;
- UINT32 Bus : 8;
- UINT32 Reserved : 7;
- UINT32 Enable : 1;
+ UINT32 Reg : 8;
+ UINT32 Func : 3;
+ UINT32 Dev : 5;
+ UINT32 Bus : 8;
+ UINT32 Reserved : 7;
+ UINT32 Enable : 1;
} Bits;
- UINT32 Uint32;
+ UINT32 Uint32;
} PCI_CONFIG_ACCESS_CF8;
#pragma pack()
-#define EFI_PCI_COMMAND_IO_SPACE BIT0 ///< 0x0001
-#define EFI_PCI_COMMAND_MEMORY_SPACE BIT1 ///< 0x0002
-#define EFI_PCI_COMMAND_BUS_MASTER BIT2 ///< 0x0004
-#define EFI_PCI_COMMAND_SPECIAL_CYCLE BIT3 ///< 0x0008
-#define EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE BIT4 ///< 0x0010
-#define EFI_PCI_COMMAND_VGA_PALETTE_SNOOP BIT5 ///< 0x0020
-#define EFI_PCI_COMMAND_PARITY_ERROR_RESPOND BIT6 ///< 0x0040
-#define EFI_PCI_COMMAND_STEPPING_CONTROL BIT7 ///< 0x0080
-#define EFI_PCI_COMMAND_SERR BIT8 ///< 0x0100
-#define EFI_PCI_COMMAND_FAST_BACK_TO_BACK BIT9 ///< 0x0200
+#define EFI_PCI_COMMAND_IO_SPACE BIT0 ///< 0x0001
+#define EFI_PCI_COMMAND_MEMORY_SPACE BIT1 ///< 0x0002
+#define EFI_PCI_COMMAND_BUS_MASTER BIT2 ///< 0x0004
+#define EFI_PCI_COMMAND_SPECIAL_CYCLE BIT3 ///< 0x0008
+#define EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE BIT4 ///< 0x0010
+#define EFI_PCI_COMMAND_VGA_PALETTE_SNOOP BIT5 ///< 0x0020
+#define EFI_PCI_COMMAND_PARITY_ERROR_RESPOND BIT6 ///< 0x0040
+#define EFI_PCI_COMMAND_STEPPING_CONTROL BIT7 ///< 0x0080
+#define EFI_PCI_COMMAND_SERR BIT8 ///< 0x0100
+#define EFI_PCI_COMMAND_FAST_BACK_TO_BACK BIT9 ///< 0x0200
//
// defined in PCI-to-PCI Bridge Architecture Specification
@@ -609,111 +620,111 @@
//
// Following are the PCI-CARDBUS bridge control bit, defined in PC Card Standard
//
-#define EFI_PCI_BRIDGE_CONTROL_IREQINT_ENABLE BIT7 ///< 0x0080
-#define EFI_PCI_BRIDGE_CONTROL_RANGE0_MEMORY_TYPE BIT8 ///< 0x0100
-#define EFI_PCI_BRIDGE_CONTROL_RANGE1_MEMORY_TYPE BIT9 ///< 0x0200
-#define EFI_PCI_BRIDGE_CONTROL_WRITE_POSTING_ENABLE BIT10 ///< 0x0400
+#define EFI_PCI_BRIDGE_CONTROL_IREQINT_ENABLE BIT7 ///< 0x0080
+#define EFI_PCI_BRIDGE_CONTROL_RANGE0_MEMORY_TYPE BIT8 ///< 0x0100
+#define EFI_PCI_BRIDGE_CONTROL_RANGE1_MEMORY_TYPE BIT9 ///< 0x0200
+#define EFI_PCI_BRIDGE_CONTROL_WRITE_POSTING_ENABLE BIT10 ///< 0x0400
//
// Following are the PCI status control bit
//
-#define EFI_PCI_STATUS_CAPABILITY BIT4 ///< 0x0010
-#define EFI_PCI_STATUS_66MZ_CAPABLE BIT5 ///< 0x0020
-#define EFI_PCI_FAST_BACK_TO_BACK_CAPABLE BIT7 ///< 0x0080
-#define EFI_PCI_MASTER_DATA_PARITY_ERROR BIT8 ///< 0x0100
+#define EFI_PCI_STATUS_CAPABILITY BIT4 ///< 0x0010
+#define EFI_PCI_STATUS_66MZ_CAPABLE BIT5 ///< 0x0020
+#define EFI_PCI_FAST_BACK_TO_BACK_CAPABLE BIT7 ///< 0x0080
+#define EFI_PCI_MASTER_DATA_PARITY_ERROR BIT8 ///< 0x0100
///
/// defined in PC Card Standard
///
-#define EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR 0x14
+#define EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR 0x14
#pragma pack(1)
//
// PCI Capability List IDs and records
//
-#define EFI_PCI_CAPABILITY_ID_PMI 0x01
-#define EFI_PCI_CAPABILITY_ID_AGP 0x02
-#define EFI_PCI_CAPABILITY_ID_VPD 0x03
-#define EFI_PCI_CAPABILITY_ID_SLOTID 0x04
-#define EFI_PCI_CAPABILITY_ID_MSI 0x05
-#define EFI_PCI_CAPABILITY_ID_HOTPLUG 0x06
-#define EFI_PCI_CAPABILITY_ID_SHPC 0x0C
+#define EFI_PCI_CAPABILITY_ID_PMI 0x01
+#define EFI_PCI_CAPABILITY_ID_AGP 0x02
+#define EFI_PCI_CAPABILITY_ID_VPD 0x03
+#define EFI_PCI_CAPABILITY_ID_SLOTID 0x04
+#define EFI_PCI_CAPABILITY_ID_MSI 0x05
+#define EFI_PCI_CAPABILITY_ID_HOTPLUG 0x06
+#define EFI_PCI_CAPABILITY_ID_SHPC 0x0C
///
/// Capabilities List Header
/// Section 6.7, PCI Local Bus Specification, 2.2
///
typedef struct {
- UINT8 CapabilityID;
- UINT8 NextItemPtr;
+ UINT8 CapabilityID;
+ UINT8 NextItemPtr;
} EFI_PCI_CAPABILITY_HDR;
///
/// PMC - Power Management Capabilities
-/// Section 3.2.3, PCI Power Management Interface Specifiction, Revision 1.2
+/// Section 3.2.3, PCI Power Management Interface Specification, Revision 1.2
///
typedef union {
struct {
- UINT16 Version : 3;
- UINT16 PmeClock : 1;
- UINT16 Reserved : 1;
- UINT16 DeviceSpecificInitialization : 1;
- UINT16 AuxCurrent : 3;
- UINT16 D1Support : 1;
- UINT16 D2Support : 1;
- UINT16 PmeSupport : 5;
+ UINT16 Version : 3;
+ UINT16 PmeClock : 1;
+ UINT16 Reserved : 1;
+ UINT16 DeviceSpecificInitialization : 1;
+ UINT16 AuxCurrent : 3;
+ UINT16 D1Support : 1;
+ UINT16 D2Support : 1;
+ UINT16 PmeSupport : 5;
} Bits;
- UINT16 Data;
+ UINT16 Data;
} EFI_PCI_PMC;
-#define EFI_PCI_PMC_D3_COLD_MASK (BIT15)
+#define EFI_PCI_PMC_D3_COLD_MASK (BIT15)
///
/// PMCSR - Power Management Control/Status
-/// Section 3.2.4, PCI Power Management Interface Specifiction, Revision 1.2
+/// Section 3.2.4, PCI Power Management Interface Specification, Revision 1.2
///
typedef union {
struct {
- UINT16 PowerState : 2;
- UINT16 ReservedForPciExpress : 1;
- UINT16 NoSoftReset : 1;
- UINT16 Reserved : 4;
- UINT16 PmeEnable : 1;
- UINT16 DataSelect : 4;
- UINT16 DataScale : 2;
- UINT16 PmeStatus : 1;
+ UINT16 PowerState : 2;
+ UINT16 ReservedForPciExpress : 1;
+ UINT16 NoSoftReset : 1;
+ UINT16 Reserved : 4;
+ UINT16 PmeEnable : 1;
+ UINT16 DataSelect : 4;
+ UINT16 DataScale : 2;
+ UINT16 PmeStatus : 1;
} Bits;
- UINT16 Data;
+ UINT16 Data;
} EFI_PCI_PMCSR;
-#define PCI_POWER_STATE_D0 0
-#define PCI_POWER_STATE_D1 1
-#define PCI_POWER_STATE_D2 2
-#define PCI_POWER_STATE_D3_HOT 3
+#define PCI_POWER_STATE_D0 0
+#define PCI_POWER_STATE_D1 1
+#define PCI_POWER_STATE_D2 2
+#define PCI_POWER_STATE_D3_HOT 3
///
/// PMCSR_BSE - PMCSR PCI-to-PCI Bridge Support Extensions
-/// Section 3.2.5, PCI Power Management Interface Specifiction, Revision 1.2
+/// Section 3.2.5, PCI Power Management Interface Specification, Revision 1.2
///
typedef union {
struct {
- UINT8 Reserved : 6;
- UINT8 B2B3 : 1;
- UINT8 BusPowerClockControl : 1;
+ UINT8 Reserved : 6;
+ UINT8 B2B3 : 1;
+ UINT8 BusPowerClockControl : 1;
} Bits;
- UINT8 Uint8;
+ UINT8 Uint8;
} EFI_PCI_PMCSR_BSE;
///
/// Power Management Register Block Definition
-/// Section 3.2, PCI Power Management Interface Specifiction, Revision 1.2
+/// Section 3.2, PCI Power Management Interface Specification, Revision 1.2
///
typedef struct {
- EFI_PCI_CAPABILITY_HDR Hdr;
- EFI_PCI_PMC PMC;
- EFI_PCI_PMCSR PMCSR;
- EFI_PCI_PMCSR_BSE BridgeExtention;
- UINT8 Data;
+ EFI_PCI_CAPABILITY_HDR Hdr;
+ EFI_PCI_PMC PMC;
+ EFI_PCI_PMCSR PMCSR;
+ EFI_PCI_PMCSR_BSE BridgeExtention;
+ UINT8 Data;
} EFI_PCI_CAPABILITY_PMI;
///
@@ -721,11 +732,11 @@
/// Section 6.1.4, Accelerated Graphics Port Interface Specification, Revision 1.0
///
typedef struct {
- EFI_PCI_CAPABILITY_HDR Hdr;
- UINT8 Rev;
- UINT8 Reserved;
- UINT32 Status;
- UINT32 Command;
+ EFI_PCI_CAPABILITY_HDR Hdr;
+ UINT8 Rev;
+ UINT8 Reserved;
+ UINT32 Status;
+ UINT32 Command;
} EFI_PCI_CAPABILITY_AGP;
///
@@ -733,19 +744,19 @@
/// Appendix I, PCI Local Bus Specification, 2.2
///
typedef struct {
- EFI_PCI_CAPABILITY_HDR Hdr;
- UINT16 AddrReg;
- UINT32 DataReg;
+ EFI_PCI_CAPABILITY_HDR Hdr;
+ UINT16 AddrReg;
+ UINT32 DataReg;
} EFI_PCI_CAPABILITY_VPD;
///
/// Slot Numbering Capabilities Register
-/// Section 3.2.6, PCI-to-PCI Bridge Architeture Specification, Revision 1.2
+/// Section 3.2.6, PCI-to-PCI Bridge Architecture Specification, Revision 1.2
///
typedef struct {
- EFI_PCI_CAPABILITY_HDR Hdr;
- UINT8 ExpnsSlotReg;
- UINT8 ChassisNo;
+ EFI_PCI_CAPABILITY_HDR Hdr;
+ UINT8 ExpnsSlotReg;
+ UINT8 ChassisNo;
} EFI_PCI_CAPABILITY_SLOTID;
///
@@ -753,10 +764,10 @@
/// Section 6.8.1, PCI Local Bus Specification, 2.2
///
typedef struct {
- EFI_PCI_CAPABILITY_HDR Hdr;
- UINT16 MsgCtrlReg;
- UINT32 MsgAddrReg;
- UINT16 MsgDataReg;
+ EFI_PCI_CAPABILITY_HDR Hdr;
+ UINT16 MsgCtrlReg;
+ UINT32 MsgAddrReg;
+ UINT16 MsgDataReg;
} EFI_PCI_CAPABILITY_MSI32;
///
@@ -764,11 +775,11 @@
/// Section 6.8.1, PCI Local Bus Specification, 2.2
///
typedef struct {
- EFI_PCI_CAPABILITY_HDR Hdr;
- UINT16 MsgCtrlReg;
- UINT32 MsgAddrRegLsdw;
- UINT32 MsgAddrRegMsdw;
- UINT16 MsgDataReg;
+ EFI_PCI_CAPABILITY_HDR Hdr;
+ UINT16 MsgCtrlReg;
+ UINT32 MsgAddrRegLsdw;
+ UINT32 MsgAddrRegMsdw;
+ UINT16 MsgDataReg;
} EFI_PCI_CAPABILITY_MSI64;
///
@@ -776,38 +787,38 @@
/// CompactPCI Hot Swap Specification PICMG 2.1, R1.0
///
typedef struct {
- EFI_PCI_CAPABILITY_HDR Hdr;
+ EFI_PCI_CAPABILITY_HDR Hdr;
///
/// not finished - fields need to go here
///
} EFI_PCI_CAPABILITY_HOTPLUG;
-#define PCI_BAR_IDX0 0x00
-#define PCI_BAR_IDX1 0x01
-#define PCI_BAR_IDX2 0x02
-#define PCI_BAR_IDX3 0x03
-#define PCI_BAR_IDX4 0x04
-#define PCI_BAR_IDX5 0x05
+#define PCI_BAR_IDX0 0x00
+#define PCI_BAR_IDX1 0x01
+#define PCI_BAR_IDX2 0x02
+#define PCI_BAR_IDX3 0x03
+#define PCI_BAR_IDX4 0x04
+#define PCI_BAR_IDX5 0x05
///
/// EFI PCI Option ROM definitions
///
-#define EFI_ROOT_BRIDGE_LIST 'eprb'
-#define EFI_PCI_EXPANSION_ROM_HEADER_EFISIGNATURE 0x0EF1 ///< defined in UEFI Spec.
+#define EFI_ROOT_BRIDGE_LIST 'eprb'
+#define EFI_PCI_EXPANSION_ROM_HEADER_EFISIGNATURE 0x0EF1 ///< defined in UEFI Spec.
-#define PCI_EXPANSION_ROM_HEADER_SIGNATURE 0xaa55
-#define PCI_DATA_STRUCTURE_SIGNATURE SIGNATURE_32 ('P', 'C', 'I', 'R')
-#define PCI_CODE_TYPE_PCAT_IMAGE 0x00
-#define EFI_PCI_EXPANSION_ROM_HEADER_COMPRESSED 0x0001 ///< defined in UEFI spec.
+#define PCI_EXPANSION_ROM_HEADER_SIGNATURE 0xaa55
+#define PCI_DATA_STRUCTURE_SIGNATURE SIGNATURE_32 ('P', 'C', 'I', 'R')
+#define PCI_CODE_TYPE_PCAT_IMAGE 0x00
+#define EFI_PCI_EXPANSION_ROM_HEADER_COMPRESSED 0x0001 ///< defined in UEFI spec.
///
/// Standard PCI Expansion ROM Header
/// Section 13.4.2, Unified Extensible Firmware Interface Specification, Version 2.1
///
typedef struct {
- UINT16 Signature; ///< 0xaa55
- UINT8 Reserved[0x16];
- UINT16 PcirOffset;
+ UINT16 Signature; ///< 0xaa55
+ UINT8 Reserved[0x16];
+ UINT16 PcirOffset;
} PCI_EXPANSION_ROM_HEADER;
///
@@ -815,11 +826,11 @@
/// Section 6.3.3.1, PCI Local Bus Specification, 2.2
///
typedef struct {
- UINT16 Signature; ///< 0xaa55
- UINT8 Size512;
- UINT8 InitEntryPoint[3];
- UINT8 Reserved[0x12];
- UINT16 PcirOffset;
+ UINT16 Signature; ///< 0xaa55
+ UINT8 Size512;
+ UINT8 InitEntryPoint[3];
+ UINT8 Reserved[0x12];
+ UINT16 PcirOffset;
} EFI_LEGACY_EXPANSION_ROM_HEADER;
///
@@ -827,18 +838,18 @@
/// Section 6.3.1.2, PCI Local Bus Specification, 2.2
///
typedef struct {
- UINT32 Signature; ///< "PCIR"
- UINT16 VendorId;
- UINT16 DeviceId;
- UINT16 Reserved0;
- UINT16 Length;
- UINT8 Revision;
- UINT8 ClassCode[3];
- UINT16 ImageLength;
- UINT16 CodeRevision;
- UINT8 CodeType;
- UINT8 Indicator;
- UINT16 Reserved1;
+ UINT32 Signature; ///< "PCIR"
+ UINT16 VendorId;
+ UINT16 DeviceId;
+ UINT16 Reserved0;
+ UINT16 Length;
+ UINT8 Revision;
+ UINT8 ClassCode[3];
+ UINT16 ImageLength;
+ UINT16 CodeRevision;
+ UINT8 CodeType;
+ UINT8 Indicator;
+ UINT16 Reserved1;
} PCI_DATA_STRUCTURE;
///
@@ -846,22 +857,22 @@
/// Section 13.4.2, Unified Extensible Firmware Interface Specification, Version 2.1
///
typedef struct {
- UINT16 Signature; ///< 0xaa55
- UINT16 InitializationSize;
- UINT32 EfiSignature; ///< 0x0EF1
- UINT16 EfiSubsystem;
- UINT16 EfiMachineType;
- UINT16 CompressionType;
- UINT8 Reserved[8];
- UINT16 EfiImageHeaderOffset;
- UINT16 PcirOffset;
+ UINT16 Signature; ///< 0xaa55
+ UINT16 InitializationSize;
+ UINT32 EfiSignature; ///< 0x0EF1
+ UINT16 EfiSubsystem;
+ UINT16 EfiMachineType;
+ UINT16 CompressionType;
+ UINT8 Reserved[8];
+ UINT16 EfiImageHeaderOffset;
+ UINT16 PcirOffset;
} EFI_PCI_EXPANSION_ROM_HEADER;
typedef union {
- UINT8 *Raw;
- PCI_EXPANSION_ROM_HEADER *Generic;
- EFI_PCI_EXPANSION_ROM_HEADER *Efi;
- EFI_LEGACY_EXPANSION_ROM_HEADER *PcAt;
+ UINT8 *Raw;
+ PCI_EXPANSION_ROM_HEADER *Generic;
+ EFI_PCI_EXPANSION_ROM_HEADER *Efi;
+ EFI_LEGACY_EXPANSION_ROM_HEADER *PcAt;
} EFI_PCI_ROM_HEADER;
#pragma pack()
diff --git a/src/include/ipxe/efi/IndustryStandard/PeImage.h b/src/include/ipxe/efi/IndustryStandard/PeImage.h
index 9499bb7..0e0f54f 100644
--- a/src/include/ipxe/efi/IndustryStandard/PeImage.h
+++ b/src/include/ipxe/efi/IndustryStandard/PeImage.h
@@ -7,31 +7,27 @@
Common Object File Format Specification, Revision 8.3 - February 6, 2013.
This file also includes some definitions in PI Specification, Revision 1.0.
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
+Portions Copyright (c) 2016 - 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __PE_IMAGE_H__
#define __PE_IMAGE_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
//
// PE32+ Subsystem type for EFI images
//
-#define EFI_IMAGE_SUBSYSTEM_EFI_APPLICATION 10
-#define EFI_IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER 11
-#define EFI_IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER 12
-#define EFI_IMAGE_SUBSYSTEM_SAL_RUNTIME_DRIVER 13 ///< defined PI Specification, 1.0
-
+#define EFI_IMAGE_SUBSYSTEM_EFI_APPLICATION 10
+#define EFI_IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER 11
+#define EFI_IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER 12
+#define EFI_IMAGE_SUBSYSTEM_SAL_RUNTIME_DRIVER 13///< defined PI Specification, 1.0
//
// PE32+ Machine type for EFI images
@@ -42,6 +38,11 @@
#define IMAGE_FILE_MACHINE_X64 0x8664
#define IMAGE_FILE_MACHINE_ARMTHUMB_MIXED 0x01c2
#define IMAGE_FILE_MACHINE_ARM64 0xAA64
+#define IMAGE_FILE_MACHINE_RISCV32 0x5032
+#define IMAGE_FILE_MACHINE_RISCV64 0x5064
+#define IMAGE_FILE_MACHINE_RISCV128 0x5128
+#define IMAGE_FILE_MACHINE_LOONGARCH32 0x6232
+#define IMAGE_FILE_MACHINE_LOONGARCH64 0x6264
//
// EXE file formats
@@ -56,51 +57,51 @@
/// under DOS it can print an error message.
///
typedef struct {
- UINT16 e_magic; ///< Magic number.
- UINT16 e_cblp; ///< Bytes on last page of file.
- UINT16 e_cp; ///< Pages in file.
- UINT16 e_crlc; ///< Relocations.
- UINT16 e_cparhdr; ///< Size of header in paragraphs.
- UINT16 e_minalloc; ///< Minimum extra paragraphs needed.
- UINT16 e_maxalloc; ///< Maximum extra paragraphs needed.
- UINT16 e_ss; ///< Initial (relative) SS value.
- UINT16 e_sp; ///< Initial SP value.
- UINT16 e_csum; ///< Checksum.
- UINT16 e_ip; ///< Initial IP value.
- UINT16 e_cs; ///< Initial (relative) CS value.
- UINT16 e_lfarlc; ///< File address of relocation table.
- UINT16 e_ovno; ///< Overlay number.
- UINT16 e_res[4]; ///< Reserved words.
- UINT16 e_oemid; ///< OEM identifier (for e_oeminfo).
- UINT16 e_oeminfo; ///< OEM information; e_oemid specific.
- UINT16 e_res2[10]; ///< Reserved words.
- UINT32 e_lfanew; ///< File address of new exe header.
+ UINT16 e_magic; ///< Magic number.
+ UINT16 e_cblp; ///< Bytes on last page of file.
+ UINT16 e_cp; ///< Pages in file.
+ UINT16 e_crlc; ///< Relocations.
+ UINT16 e_cparhdr; ///< Size of header in paragraphs.
+ UINT16 e_minalloc; ///< Minimum extra paragraphs needed.
+ UINT16 e_maxalloc; ///< Maximum extra paragraphs needed.
+ UINT16 e_ss; ///< Initial (relative) SS value.
+ UINT16 e_sp; ///< Initial SP value.
+ UINT16 e_csum; ///< Checksum.
+ UINT16 e_ip; ///< Initial IP value.
+ UINT16 e_cs; ///< Initial (relative) CS value.
+ UINT16 e_lfarlc; ///< File address of relocation table.
+ UINT16 e_ovno; ///< Overlay number.
+ UINT16 e_res[4]; ///< Reserved words.
+ UINT16 e_oemid; ///< OEM identifier (for e_oeminfo).
+ UINT16 e_oeminfo; ///< OEM information; e_oemid specific.
+ UINT16 e_res2[10]; ///< Reserved words.
+ UINT32 e_lfanew; ///< File address of new exe header.
} EFI_IMAGE_DOS_HEADER;
///
/// COFF File Header (Object and Image).
///
typedef struct {
- UINT16 Machine;
- UINT16 NumberOfSections;
- UINT32 TimeDateStamp;
- UINT32 PointerToSymbolTable;
- UINT32 NumberOfSymbols;
- UINT16 SizeOfOptionalHeader;
- UINT16 Characteristics;
+ UINT16 Machine;
+ UINT16 NumberOfSections;
+ UINT32 TimeDateStamp;
+ UINT32 PointerToSymbolTable;
+ UINT32 NumberOfSymbols;
+ UINT16 SizeOfOptionalHeader;
+ UINT16 Characteristics;
} EFI_IMAGE_FILE_HEADER;
///
/// Size of EFI_IMAGE_FILE_HEADER.
///
-#define EFI_IMAGE_SIZEOF_FILE_HEADER 20
+#define EFI_IMAGE_SIZEOF_FILE_HEADER 20
//
// Characteristics
//
#define EFI_IMAGE_FILE_RELOCS_STRIPPED BIT0 ///< 0x0001 Relocation info stripped from file.
#define EFI_IMAGE_FILE_EXECUTABLE_IMAGE BIT1 ///< 0x0002 File is executable (i.e. no unresolved externel references).
-#define EFI_IMAGE_FILE_LINE_NUMS_STRIPPED BIT2 ///< 0x0004 Line nunbers stripped from file.
+#define EFI_IMAGE_FILE_LINE_NUMS_STRIPPED BIT2 ///< 0x0004 Line numbers stripped from file.
#define EFI_IMAGE_FILE_LOCAL_SYMS_STRIPPED BIT3 ///< 0x0008 Local symbols stripped from file.
#define EFI_IMAGE_FILE_BYTES_REVERSED_LO BIT7 ///< 0x0080 Bytes of machine word are reversed.
#define EFI_IMAGE_FILE_32BIT_MACHINE BIT8 ///< 0x0100 32 bit word machine.
@@ -113,26 +114,26 @@
/// Header Data Directories.
///
typedef struct {
- UINT32 VirtualAddress;
- UINT32 Size;
+ UINT32 VirtualAddress;
+ UINT32 Size;
} EFI_IMAGE_DATA_DIRECTORY;
//
// Directory Entries
//
-#define EFI_IMAGE_DIRECTORY_ENTRY_EXPORT 0
-#define EFI_IMAGE_DIRECTORY_ENTRY_IMPORT 1
-#define EFI_IMAGE_DIRECTORY_ENTRY_RESOURCE 2
-#define EFI_IMAGE_DIRECTORY_ENTRY_EXCEPTION 3
-#define EFI_IMAGE_DIRECTORY_ENTRY_SECURITY 4
-#define EFI_IMAGE_DIRECTORY_ENTRY_BASERELOC 5
-#define EFI_IMAGE_DIRECTORY_ENTRY_DEBUG 6
-#define EFI_IMAGE_DIRECTORY_ENTRY_COPYRIGHT 7
-#define EFI_IMAGE_DIRECTORY_ENTRY_GLOBALPTR 8
-#define EFI_IMAGE_DIRECTORY_ENTRY_TLS 9
-#define EFI_IMAGE_DIRECTORY_ENTRY_LOAD_CONFIG 10
+#define EFI_IMAGE_DIRECTORY_ENTRY_EXPORT 0
+#define EFI_IMAGE_DIRECTORY_ENTRY_IMPORT 1
+#define EFI_IMAGE_DIRECTORY_ENTRY_RESOURCE 2
+#define EFI_IMAGE_DIRECTORY_ENTRY_EXCEPTION 3
+#define EFI_IMAGE_DIRECTORY_ENTRY_SECURITY 4
+#define EFI_IMAGE_DIRECTORY_ENTRY_BASERELOC 5
+#define EFI_IMAGE_DIRECTORY_ENTRY_DEBUG 6
+#define EFI_IMAGE_DIRECTORY_ENTRY_COPYRIGHT 7
+#define EFI_IMAGE_DIRECTORY_ENTRY_GLOBALPTR 8
+#define EFI_IMAGE_DIRECTORY_ENTRY_TLS 9
+#define EFI_IMAGE_DIRECTORY_ENTRY_LOAD_CONFIG 10
-#define EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES 16
+#define EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES 16
///
/// @attention
@@ -140,7 +141,7 @@
/// EFI_IMAGE_OPTIONAL_HEADER32 must be used. The data structures only vary
/// after NT additional fields.
///
-#define EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC 0x10b
+#define EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC 0x10b
///
/// Optional Header Standard Fields for PE32.
@@ -149,40 +150,40 @@
///
/// Standard fields.
///
- UINT16 Magic;
- UINT8 MajorLinkerVersion;
- UINT8 MinorLinkerVersion;
- UINT32 SizeOfCode;
- UINT32 SizeOfInitializedData;
- UINT32 SizeOfUninitializedData;
- UINT32 AddressOfEntryPoint;
- UINT32 BaseOfCode;
- UINT32 BaseOfData; ///< PE32 contains this additional field, which is absent in PE32+.
+ UINT16 Magic;
+ UINT8 MajorLinkerVersion;
+ UINT8 MinorLinkerVersion;
+ UINT32 SizeOfCode;
+ UINT32 SizeOfInitializedData;
+ UINT32 SizeOfUninitializedData;
+ UINT32 AddressOfEntryPoint;
+ UINT32 BaseOfCode;
+ UINT32 BaseOfData; ///< PE32 contains this additional field, which is absent in PE32+.
///
/// Optional Header Windows-Specific Fields.
///
- UINT32 ImageBase;
- UINT32 SectionAlignment;
- UINT32 FileAlignment;
- UINT16 MajorOperatingSystemVersion;
- UINT16 MinorOperatingSystemVersion;
- UINT16 MajorImageVersion;
- UINT16 MinorImageVersion;
- UINT16 MajorSubsystemVersion;
- UINT16 MinorSubsystemVersion;
- UINT32 Win32VersionValue;
- UINT32 SizeOfImage;
- UINT32 SizeOfHeaders;
- UINT32 CheckSum;
- UINT16 Subsystem;
- UINT16 DllCharacteristics;
- UINT32 SizeOfStackReserve;
- UINT32 SizeOfStackCommit;
- UINT32 SizeOfHeapReserve;
- UINT32 SizeOfHeapCommit;
- UINT32 LoaderFlags;
- UINT32 NumberOfRvaAndSizes;
- EFI_IMAGE_DATA_DIRECTORY DataDirectory[EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES];
+ UINT32 ImageBase;
+ UINT32 SectionAlignment;
+ UINT32 FileAlignment;
+ UINT16 MajorOperatingSystemVersion;
+ UINT16 MinorOperatingSystemVersion;
+ UINT16 MajorImageVersion;
+ UINT16 MinorImageVersion;
+ UINT16 MajorSubsystemVersion;
+ UINT16 MinorSubsystemVersion;
+ UINT32 Win32VersionValue;
+ UINT32 SizeOfImage;
+ UINT32 SizeOfHeaders;
+ UINT32 CheckSum;
+ UINT16 Subsystem;
+ UINT16 DllCharacteristics;
+ UINT32 SizeOfStackReserve;
+ UINT32 SizeOfStackCommit;
+ UINT32 SizeOfHeapReserve;
+ UINT32 SizeOfHeapCommit;
+ UINT32 LoaderFlags;
+ UINT32 NumberOfRvaAndSizes;
+ EFI_IMAGE_DATA_DIRECTORY DataDirectory[EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES];
} EFI_IMAGE_OPTIONAL_HEADER32;
///
@@ -191,7 +192,7 @@
/// EFI_IMAGE_OPTIONAL_HEADER64 must be used. The data structures only vary
/// after NT additional fields.
///
-#define EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC 0x20b
+#define EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC 0x20b
///
/// Optional Header Standard Fields for PE32+.
@@ -200,166 +201,165 @@
///
/// Standard fields.
///
- UINT16 Magic;
- UINT8 MajorLinkerVersion;
- UINT8 MinorLinkerVersion;
- UINT32 SizeOfCode;
- UINT32 SizeOfInitializedData;
- UINT32 SizeOfUninitializedData;
- UINT32 AddressOfEntryPoint;
- UINT32 BaseOfCode;
+ UINT16 Magic;
+ UINT8 MajorLinkerVersion;
+ UINT8 MinorLinkerVersion;
+ UINT32 SizeOfCode;
+ UINT32 SizeOfInitializedData;
+ UINT32 SizeOfUninitializedData;
+ UINT32 AddressOfEntryPoint;
+ UINT32 BaseOfCode;
///
/// Optional Header Windows-Specific Fields.
///
- UINT64 ImageBase;
- UINT32 SectionAlignment;
- UINT32 FileAlignment;
- UINT16 MajorOperatingSystemVersion;
- UINT16 MinorOperatingSystemVersion;
- UINT16 MajorImageVersion;
- UINT16 MinorImageVersion;
- UINT16 MajorSubsystemVersion;
- UINT16 MinorSubsystemVersion;
- UINT32 Win32VersionValue;
- UINT32 SizeOfImage;
- UINT32 SizeOfHeaders;
- UINT32 CheckSum;
- UINT16 Subsystem;
- UINT16 DllCharacteristics;
- UINT64 SizeOfStackReserve;
- UINT64 SizeOfStackCommit;
- UINT64 SizeOfHeapReserve;
- UINT64 SizeOfHeapCommit;
- UINT32 LoaderFlags;
- UINT32 NumberOfRvaAndSizes;
- EFI_IMAGE_DATA_DIRECTORY DataDirectory[EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES];
+ UINT64 ImageBase;
+ UINT32 SectionAlignment;
+ UINT32 FileAlignment;
+ UINT16 MajorOperatingSystemVersion;
+ UINT16 MinorOperatingSystemVersion;
+ UINT16 MajorImageVersion;
+ UINT16 MinorImageVersion;
+ UINT16 MajorSubsystemVersion;
+ UINT16 MinorSubsystemVersion;
+ UINT32 Win32VersionValue;
+ UINT32 SizeOfImage;
+ UINT32 SizeOfHeaders;
+ UINT32 CheckSum;
+ UINT16 Subsystem;
+ UINT16 DllCharacteristics;
+ UINT64 SizeOfStackReserve;
+ UINT64 SizeOfStackCommit;
+ UINT64 SizeOfHeapReserve;
+ UINT64 SizeOfHeapCommit;
+ UINT32 LoaderFlags;
+ UINT32 NumberOfRvaAndSizes;
+ EFI_IMAGE_DATA_DIRECTORY DataDirectory[EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES];
} EFI_IMAGE_OPTIONAL_HEADER64;
-
///
/// @attention
/// EFI_IMAGE_NT_HEADERS32 is for use ONLY by tools.
///
typedef struct {
- UINT32 Signature;
- EFI_IMAGE_FILE_HEADER FileHeader;
- EFI_IMAGE_OPTIONAL_HEADER32 OptionalHeader;
+ UINT32 Signature;
+ EFI_IMAGE_FILE_HEADER FileHeader;
+ EFI_IMAGE_OPTIONAL_HEADER32 OptionalHeader;
} EFI_IMAGE_NT_HEADERS32;
-#define EFI_IMAGE_SIZEOF_NT_OPTIONAL32_HEADER sizeof (EFI_IMAGE_NT_HEADERS32)
+#define EFI_IMAGE_SIZEOF_NT_OPTIONAL32_HEADER sizeof (EFI_IMAGE_NT_HEADERS32)
///
/// @attention
/// EFI_IMAGE_HEADERS64 is for use ONLY by tools.
///
typedef struct {
- UINT32 Signature;
- EFI_IMAGE_FILE_HEADER FileHeader;
- EFI_IMAGE_OPTIONAL_HEADER64 OptionalHeader;
+ UINT32 Signature;
+ EFI_IMAGE_FILE_HEADER FileHeader;
+ EFI_IMAGE_OPTIONAL_HEADER64 OptionalHeader;
} EFI_IMAGE_NT_HEADERS64;
-#define EFI_IMAGE_SIZEOF_NT_OPTIONAL64_HEADER sizeof (EFI_IMAGE_NT_HEADERS64)
+#define EFI_IMAGE_SIZEOF_NT_OPTIONAL64_HEADER sizeof (EFI_IMAGE_NT_HEADERS64)
//
// Other Windows Subsystem Values
//
-#define EFI_IMAGE_SUBSYSTEM_UNKNOWN 0
-#define EFI_IMAGE_SUBSYSTEM_NATIVE 1
-#define EFI_IMAGE_SUBSYSTEM_WINDOWS_GUI 2
-#define EFI_IMAGE_SUBSYSTEM_WINDOWS_CUI 3
-#define EFI_IMAGE_SUBSYSTEM_OS2_CUI 5
-#define EFI_IMAGE_SUBSYSTEM_POSIX_CUI 7
+#define EFI_IMAGE_SUBSYSTEM_UNKNOWN 0
+#define EFI_IMAGE_SUBSYSTEM_NATIVE 1
+#define EFI_IMAGE_SUBSYSTEM_WINDOWS_GUI 2
+#define EFI_IMAGE_SUBSYSTEM_WINDOWS_CUI 3
+#define EFI_IMAGE_SUBSYSTEM_OS2_CUI 5
+#define EFI_IMAGE_SUBSYSTEM_POSIX_CUI 7
///
/// Length of ShortName.
///
-#define EFI_IMAGE_SIZEOF_SHORT_NAME 8
+#define EFI_IMAGE_SIZEOF_SHORT_NAME 8
///
/// Section Table. This table immediately follows the optional header.
///
typedef struct {
- UINT8 Name[EFI_IMAGE_SIZEOF_SHORT_NAME];
+ UINT8 Name[EFI_IMAGE_SIZEOF_SHORT_NAME];
union {
- UINT32 PhysicalAddress;
- UINT32 VirtualSize;
+ UINT32 PhysicalAddress;
+ UINT32 VirtualSize;
} Misc;
- UINT32 VirtualAddress;
- UINT32 SizeOfRawData;
- UINT32 PointerToRawData;
- UINT32 PointerToRelocations;
- UINT32 PointerToLinenumbers;
- UINT16 NumberOfRelocations;
- UINT16 NumberOfLinenumbers;
- UINT32 Characteristics;
+ UINT32 VirtualAddress;
+ UINT32 SizeOfRawData;
+ UINT32 PointerToRawData;
+ UINT32 PointerToRelocations;
+ UINT32 PointerToLinenumbers;
+ UINT16 NumberOfRelocations;
+ UINT16 NumberOfLinenumbers;
+ UINT32 Characteristics;
} EFI_IMAGE_SECTION_HEADER;
///
/// Size of EFI_IMAGE_SECTION_HEADER.
///
-#define EFI_IMAGE_SIZEOF_SECTION_HEADER 40
+#define EFI_IMAGE_SIZEOF_SECTION_HEADER 40
//
// Section Flags Values
//
-#define EFI_IMAGE_SCN_TYPE_NO_PAD BIT3 ///< 0x00000008 ///< Reserved.
-#define EFI_IMAGE_SCN_CNT_CODE BIT5 ///< 0x00000020
-#define EFI_IMAGE_SCN_CNT_INITIALIZED_DATA BIT6 ///< 0x00000040
-#define EFI_IMAGE_SCN_CNT_UNINITIALIZED_DATA BIT7 ///< 0x00000080
+#define EFI_IMAGE_SCN_TYPE_NO_PAD BIT3 ///< 0x00000008 ///< Reserved.
+#define EFI_IMAGE_SCN_CNT_CODE BIT5 ///< 0x00000020
+#define EFI_IMAGE_SCN_CNT_INITIALIZED_DATA BIT6 ///< 0x00000040
+#define EFI_IMAGE_SCN_CNT_UNINITIALIZED_DATA BIT7 ///< 0x00000080
-#define EFI_IMAGE_SCN_LNK_OTHER BIT8 ///< 0x00000100 ///< Reserved.
-#define EFI_IMAGE_SCN_LNK_INFO BIT9 ///< 0x00000200 ///< Section contains comments or some other type of information.
-#define EFI_IMAGE_SCN_LNK_REMOVE BIT11 ///< 0x00000800 ///< Section contents will not become part of image.
-#define EFI_IMAGE_SCN_LNK_COMDAT BIT12 ///< 0x00001000
+#define EFI_IMAGE_SCN_LNK_OTHER BIT8 ///< 0x00000100 ///< Reserved.
+#define EFI_IMAGE_SCN_LNK_INFO BIT9 ///< 0x00000200 ///< Section contains comments or some other type of information.
+#define EFI_IMAGE_SCN_LNK_REMOVE BIT11 ///< 0x00000800 ///< Section contents will not become part of image.
+#define EFI_IMAGE_SCN_LNK_COMDAT BIT12 ///< 0x00001000
-#define EFI_IMAGE_SCN_ALIGN_1BYTES BIT20 ///< 0x00100000
-#define EFI_IMAGE_SCN_ALIGN_2BYTES BIT21 ///< 0x00200000
-#define EFI_IMAGE_SCN_ALIGN_4BYTES (BIT20|BIT21) ///< 0x00300000
-#define EFI_IMAGE_SCN_ALIGN_8BYTES BIT22 ///< 0x00400000
-#define EFI_IMAGE_SCN_ALIGN_16BYTES (BIT20|BIT22) ///< 0x00500000
-#define EFI_IMAGE_SCN_ALIGN_32BYTES (BIT21|BIT22) ///< 0x00600000
-#define EFI_IMAGE_SCN_ALIGN_64BYTES (BIT20|BIT21|BIT22) ///< 0x00700000
+#define EFI_IMAGE_SCN_ALIGN_1BYTES BIT20 ///< 0x00100000
+#define EFI_IMAGE_SCN_ALIGN_2BYTES BIT21 ///< 0x00200000
+#define EFI_IMAGE_SCN_ALIGN_4BYTES (BIT20|BIT21) ///< 0x00300000
+#define EFI_IMAGE_SCN_ALIGN_8BYTES BIT22 ///< 0x00400000
+#define EFI_IMAGE_SCN_ALIGN_16BYTES (BIT20|BIT22) ///< 0x00500000
+#define EFI_IMAGE_SCN_ALIGN_32BYTES (BIT21|BIT22) ///< 0x00600000
+#define EFI_IMAGE_SCN_ALIGN_64BYTES (BIT20|BIT21|BIT22) ///< 0x00700000
-#define EFI_IMAGE_SCN_MEM_DISCARDABLE BIT25 ///< 0x02000000
-#define EFI_IMAGE_SCN_MEM_NOT_CACHED BIT26 ///< 0x04000000
-#define EFI_IMAGE_SCN_MEM_NOT_PAGED BIT27 ///< 0x08000000
-#define EFI_IMAGE_SCN_MEM_SHARED BIT28 ///< 0x10000000
-#define EFI_IMAGE_SCN_MEM_EXECUTE BIT29 ///< 0x20000000
-#define EFI_IMAGE_SCN_MEM_READ BIT30 ///< 0x40000000
-#define EFI_IMAGE_SCN_MEM_WRITE BIT31 ///< 0x80000000
+#define EFI_IMAGE_SCN_MEM_DISCARDABLE BIT25 ///< 0x02000000
+#define EFI_IMAGE_SCN_MEM_NOT_CACHED BIT26 ///< 0x04000000
+#define EFI_IMAGE_SCN_MEM_NOT_PAGED BIT27 ///< 0x08000000
+#define EFI_IMAGE_SCN_MEM_SHARED BIT28 ///< 0x10000000
+#define EFI_IMAGE_SCN_MEM_EXECUTE BIT29 ///< 0x20000000
+#define EFI_IMAGE_SCN_MEM_READ BIT30 ///< 0x40000000
+#define EFI_IMAGE_SCN_MEM_WRITE BIT31 ///< 0x80000000
///
/// Size of a Symbol Table Record.
///
-#define EFI_IMAGE_SIZEOF_SYMBOL 18
+#define EFI_IMAGE_SIZEOF_SYMBOL 18
//
// Symbols have a section number of the section in which they are
// defined. Otherwise, section numbers have the following meanings:
//
-#define EFI_IMAGE_SYM_UNDEFINED (UINT16) 0 ///< Symbol is undefined or is common.
-#define EFI_IMAGE_SYM_ABSOLUTE (UINT16) -1 ///< Symbol is an absolute value.
-#define EFI_IMAGE_SYM_DEBUG (UINT16) -2 ///< Symbol is a special debug item.
+#define EFI_IMAGE_SYM_UNDEFINED (UINT16) 0 ///< Symbol is undefined or is common.
+#define EFI_IMAGE_SYM_ABSOLUTE (UINT16) -1 ///< Symbol is an absolute value.
+#define EFI_IMAGE_SYM_DEBUG (UINT16) -2 ///< Symbol is a special debug item.
//
// Symbol Type (fundamental) values.
//
-#define EFI_IMAGE_SYM_TYPE_NULL 0 ///< no type.
-#define EFI_IMAGE_SYM_TYPE_VOID 1 ///< no valid type.
-#define EFI_IMAGE_SYM_TYPE_CHAR 2 ///< type character.
-#define EFI_IMAGE_SYM_TYPE_SHORT 3 ///< type short integer.
-#define EFI_IMAGE_SYM_TYPE_INT 4
-#define EFI_IMAGE_SYM_TYPE_LONG 5
-#define EFI_IMAGE_SYM_TYPE_FLOAT 6
-#define EFI_IMAGE_SYM_TYPE_DOUBLE 7
-#define EFI_IMAGE_SYM_TYPE_STRUCT 8
-#define EFI_IMAGE_SYM_TYPE_UNION 9
-#define EFI_IMAGE_SYM_TYPE_ENUM 10 ///< enumeration.
-#define EFI_IMAGE_SYM_TYPE_MOE 11 ///< member of enumeration.
-#define EFI_IMAGE_SYM_TYPE_BYTE 12
-#define EFI_IMAGE_SYM_TYPE_WORD 13
-#define EFI_IMAGE_SYM_TYPE_UINT 14
-#define EFI_IMAGE_SYM_TYPE_DWORD 15
+#define EFI_IMAGE_SYM_TYPE_NULL 0 ///< no type.
+#define EFI_IMAGE_SYM_TYPE_VOID 1 ///< no valid type.
+#define EFI_IMAGE_SYM_TYPE_CHAR 2 ///< type character.
+#define EFI_IMAGE_SYM_TYPE_SHORT 3 ///< type short integer.
+#define EFI_IMAGE_SYM_TYPE_INT 4
+#define EFI_IMAGE_SYM_TYPE_LONG 5
+#define EFI_IMAGE_SYM_TYPE_FLOAT 6
+#define EFI_IMAGE_SYM_TYPE_DOUBLE 7
+#define EFI_IMAGE_SYM_TYPE_STRUCT 8
+#define EFI_IMAGE_SYM_TYPE_UNION 9
+#define EFI_IMAGE_SYM_TYPE_ENUM 10 ///< enumeration.
+#define EFI_IMAGE_SYM_TYPE_MOE 11 ///< member of enumeration.
+#define EFI_IMAGE_SYM_TYPE_BYTE 12
+#define EFI_IMAGE_SYM_TYPE_WORD 13
+#define EFI_IMAGE_SYM_TYPE_UINT 14
+#define EFI_IMAGE_SYM_TYPE_DWORD 15
//
// Symbol Type (derived) values.
@@ -412,11 +412,11 @@
//
// Communal selection types.
//
-#define EFI_IMAGE_COMDAT_SELECT_NODUPLICATES 1
-#define EFI_IMAGE_COMDAT_SELECT_ANY 2
-#define EFI_IMAGE_COMDAT_SELECT_SAME_SIZE 3
-#define EFI_IMAGE_COMDAT_SELECT_EXACT_MATCH 4
-#define EFI_IMAGE_COMDAT_SELECT_ASSOCIATIVE 5
+#define EFI_IMAGE_COMDAT_SELECT_NODUPLICATES 1
+#define EFI_IMAGE_COMDAT_SELECT_ANY 2
+#define EFI_IMAGE_COMDAT_SELECT_SAME_SIZE 3
+#define EFI_IMAGE_COMDAT_SELECT_EXACT_MATCH 4
+#define EFI_IMAGE_COMDAT_SELECT_ASSOCIATIVE 5
//
// the following values only be referred in PeCoff, not defined in PECOFF.
@@ -429,28 +429,28 @@
/// Relocation format.
///
typedef struct {
- UINT32 VirtualAddress;
- UINT32 SymbolTableIndex;
- UINT16 Type;
+ UINT32 VirtualAddress;
+ UINT32 SymbolTableIndex;
+ UINT16 Type;
} EFI_IMAGE_RELOCATION;
///
/// Size of EFI_IMAGE_RELOCATION
///
-#define EFI_IMAGE_SIZEOF_RELOCATION 10
+#define EFI_IMAGE_SIZEOF_RELOCATION 10
//
// I386 relocation types.
//
-#define EFI_IMAGE_REL_I386_ABSOLUTE 0x0000 ///< Reference is absolute, no relocation is necessary.
-#define EFI_IMAGE_REL_I386_DIR16 0x0001 ///< Direct 16-bit reference to the symbols virtual address.
-#define EFI_IMAGE_REL_I386_REL16 0x0002 ///< PC-relative 16-bit reference to the symbols virtual address.
-#define EFI_IMAGE_REL_I386_DIR32 0x0006 ///< Direct 32-bit reference to the symbols virtual address.
-#define EFI_IMAGE_REL_I386_DIR32NB 0x0007 ///< Direct 32-bit reference to the symbols virtual address, base not included.
-#define EFI_IMAGE_REL_I386_SEG12 0x0009 ///< Direct 16-bit reference to the segment-selector bits of a 32-bit virtual address.
-#define EFI_IMAGE_REL_I386_SECTION 0x000A
-#define EFI_IMAGE_REL_I386_SECREL 0x000B
-#define EFI_IMAGE_REL_I386_REL32 0x0014 ///< PC-relative 32-bit reference to the symbols virtual address.
+#define EFI_IMAGE_REL_I386_ABSOLUTE 0x0000 ///< Reference is absolute, no relocation is necessary.
+#define EFI_IMAGE_REL_I386_DIR16 0x0001 ///< Direct 16-bit reference to the symbols virtual address.
+#define EFI_IMAGE_REL_I386_REL16 0x0002 ///< PC-relative 16-bit reference to the symbols virtual address.
+#define EFI_IMAGE_REL_I386_DIR32 0x0006 ///< Direct 32-bit reference to the symbols virtual address.
+#define EFI_IMAGE_REL_I386_DIR32NB 0x0007 ///< Direct 32-bit reference to the symbols virtual address, base not included.
+#define EFI_IMAGE_REL_I386_SEG12 0x0009 ///< Direct 16-bit reference to the segment-selector bits of a 32-bit virtual address.
+#define EFI_IMAGE_REL_I386_SECTION 0x000A
+#define EFI_IMAGE_REL_I386_SECREL 0x000B
+#define EFI_IMAGE_REL_I386_REL32 0x0014 ///< PC-relative 32-bit reference to the symbols virtual address.
//
// x64 processor relocation types.
@@ -477,8 +477,8 @@
/// Based relocation format.
///
typedef struct {
- UINT32 VirtualAddress;
- UINT32 SizeOfBlock;
+ UINT32 VirtualAddress;
+ UINT32 SizeOfBlock;
} EFI_IMAGE_BASE_RELOCATION;
///
@@ -502,20 +502,33 @@
#define EFI_IMAGE_REL_BASED_DIR64 10
///
+/// Relocation types of RISC-V processor.
+///
+#define EFI_IMAGE_REL_BASED_RISCV_HI20 5
+#define EFI_IMAGE_REL_BASED_RISCV_LOW12I 7
+#define EFI_IMAGE_REL_BASED_RISCV_LOW12S 8
+
+//
+// Relocation types of LoongArch processor.
+//
+#define EFI_IMAGE_REL_BASED_LOONGARCH32_MARK_LA 8
+#define EFI_IMAGE_REL_BASED_LOONGARCH64_MARK_LA 8
+
+///
/// Line number format.
///
typedef struct {
union {
- UINT32 SymbolTableIndex; ///< Symbol table index of function name if Linenumber is 0.
- UINT32 VirtualAddress; ///< Virtual address of line number.
+ UINT32 SymbolTableIndex; ///< Symbol table index of function name if Linenumber is 0.
+ UINT32 VirtualAddress; ///< Virtual address of line number.
} Type;
- UINT16 Linenumber; ///< Line number.
+ UINT16 Linenumber; ///< Line number.
} EFI_IMAGE_LINENUMBER;
///
/// Size of EFI_IMAGE_LINENUMBER.
///
-#define EFI_IMAGE_SIZEOF_LINENUMBER 6
+#define EFI_IMAGE_SIZEOF_LINENUMBER 6
//
// Archive format.
@@ -531,20 +544,19 @@
/// Archive Member Headers
///
typedef struct {
- UINT8 Name[16]; ///< File member name - `/' terminated.
- UINT8 Date[12]; ///< File member date - decimal.
- UINT8 UserID[6]; ///< File member user id - decimal.
- UINT8 GroupID[6]; ///< File member group id - decimal.
- UINT8 Mode[8]; ///< File member mode - octal.
- UINT8 Size[10]; ///< File member size - decimal.
- UINT8 EndHeader[2]; ///< String to end header. (0x60 0x0A).
+ UINT8 Name[16]; ///< File member name - `/' terminated.
+ UINT8 Date[12]; ///< File member date - decimal.
+ UINT8 UserID[6]; ///< File member user id - decimal.
+ UINT8 GroupID[6]; ///< File member group id - decimal.
+ UINT8 Mode[8]; ///< File member mode - octal.
+ UINT8 Size[10]; ///< File member size - decimal.
+ UINT8 EndHeader[2]; ///< String to end header. (0x60 0x0A).
} EFI_IMAGE_ARCHIVE_MEMBER_HEADER;
///
/// Size of EFI_IMAGE_ARCHIVE_MEMBER_HEADER.
///
-#define EFI_IMAGE_SIZEOF_ARCHIVE_MEMBER_HDR 60
-
+#define EFI_IMAGE_SIZEOF_ARCHIVE_MEMBER_HDR 60
//
// DLL Support
@@ -554,25 +566,25 @@
/// Export Directory Table.
///
typedef struct {
- UINT32 Characteristics;
- UINT32 TimeDateStamp;
- UINT16 MajorVersion;
- UINT16 MinorVersion;
- UINT32 Name;
- UINT32 Base;
- UINT32 NumberOfFunctions;
- UINT32 NumberOfNames;
- UINT32 AddressOfFunctions;
- UINT32 AddressOfNames;
- UINT32 AddressOfNameOrdinals;
+ UINT32 Characteristics;
+ UINT32 TimeDateStamp;
+ UINT16 MajorVersion;
+ UINT16 MinorVersion;
+ UINT32 Name;
+ UINT32 Base;
+ UINT32 NumberOfFunctions;
+ UINT32 NumberOfNames;
+ UINT32 AddressOfFunctions;
+ UINT32 AddressOfNames;
+ UINT32 AddressOfNameOrdinals;
} EFI_IMAGE_EXPORT_DIRECTORY;
///
/// Hint/Name Table.
///
typedef struct {
- UINT16 Hint;
- UINT8 Name[1];
+ UINT16 Hint;
+ UINT8 Name[1];
} EFI_IMAGE_IMPORT_BY_NAME;
///
@@ -580,13 +592,13 @@
///
typedef struct {
union {
- UINT32 Function;
- UINT32 Ordinal;
- EFI_IMAGE_IMPORT_BY_NAME *AddressOfData;
+ UINT32 Function;
+ UINT32 Ordinal;
+ EFI_IMAGE_IMPORT_BY_NAME *AddressOfData;
} u1;
} EFI_IMAGE_THUNK_DATA;
-#define EFI_IMAGE_ORDINAL_FLAG BIT31 ///< Flag for PE32.
+#define EFI_IMAGE_ORDINAL_FLAG BIT31 ///< Flag for PE32.
#define EFI_IMAGE_SNAP_BY_ORDINAL(Ordinal) ((Ordinal & EFI_IMAGE_ORDINAL_FLAG) != 0)
#define EFI_IMAGE_ORDINAL(Ordinal) (Ordinal & 0xffff)
@@ -594,39 +606,38 @@
/// Import Directory Table
///
typedef struct {
- UINT32 Characteristics;
- UINT32 TimeDateStamp;
- UINT32 ForwarderChain;
- UINT32 Name;
- EFI_IMAGE_THUNK_DATA *FirstThunk;
+ UINT32 Characteristics;
+ UINT32 TimeDateStamp;
+ UINT32 ForwarderChain;
+ UINT32 Name;
+ EFI_IMAGE_THUNK_DATA *FirstThunk;
} EFI_IMAGE_IMPORT_DESCRIPTOR;
-
///
/// Debug Directory Format.
///
typedef struct {
- UINT32 Characteristics;
- UINT32 TimeDateStamp;
- UINT16 MajorVersion;
- UINT16 MinorVersion;
- UINT32 Type;
- UINT32 SizeOfData;
- UINT32 RVA; ///< The address of the debug data when loaded, relative to the image base.
- UINT32 FileOffset; ///< The file pointer to the debug data.
+ UINT32 Characteristics;
+ UINT32 TimeDateStamp;
+ UINT16 MajorVersion;
+ UINT16 MinorVersion;
+ UINT32 Type;
+ UINT32 SizeOfData;
+ UINT32 RVA; ///< The address of the debug data when loaded, relative to the image base.
+ UINT32 FileOffset; ///< The file pointer to the debug data.
} EFI_IMAGE_DEBUG_DIRECTORY_ENTRY;
-#define EFI_IMAGE_DEBUG_TYPE_CODEVIEW 2 ///< The Visual C++ debug information.
+#define EFI_IMAGE_DEBUG_TYPE_CODEVIEW 2 ///< The Visual C++ debug information.
///
/// Debug Data Structure defined in Microsoft C++.
///
#define CODEVIEW_SIGNATURE_NB10 SIGNATURE_32('N', 'B', '1', '0')
typedef struct {
- UINT32 Signature; ///< "NB10"
- UINT32 Unknown;
- UINT32 Unknown2;
- UINT32 Unknown3;
+ UINT32 Signature; ///< "NB10"
+ UINT32 Unknown;
+ UINT32 Unknown2;
+ UINT32 Unknown3;
//
// Filename of .PDB goes here
//
@@ -637,18 +648,17 @@
///
#define CODEVIEW_SIGNATURE_RSDS SIGNATURE_32('R', 'S', 'D', 'S')
typedef struct {
- UINT32 Signature; ///< "RSDS".
- UINT32 Unknown;
- UINT32 Unknown2;
- UINT32 Unknown3;
- UINT32 Unknown4;
- UINT32 Unknown5;
+ UINT32 Signature; ///< "RSDS".
+ UINT32 Unknown;
+ UINT32 Unknown2;
+ UINT32 Unknown3;
+ UINT32 Unknown4;
+ UINT32 Unknown5;
//
// Filename of .PDB goes here
//
} EFI_IMAGE_DEBUG_CODEVIEW_RSDS_ENTRY;
-
///
/// Debug Data Structure defined by Apple Mach-O to Coff utility.
///
@@ -665,12 +675,12 @@
/// Resource format.
///
typedef struct {
- UINT32 Characteristics;
- UINT32 TimeDateStamp;
- UINT16 MajorVersion;
- UINT16 MinorVersion;
- UINT16 NumberOfNamedEntries;
- UINT16 NumberOfIdEntries;
+ UINT32 Characteristics;
+ UINT32 TimeDateStamp;
+ UINT16 MajorVersion;
+ UINT16 MinorVersion;
+ UINT16 NumberOfNamedEntries;
+ UINT16 NumberOfIdEntries;
//
// Array of EFI_IMAGE_RESOURCE_DIRECTORY_ENTRY entries goes here.
//
@@ -682,16 +692,16 @@
typedef struct {
union {
struct {
- UINT32 NameOffset:31;
- UINT32 NameIsString:1;
+ UINT32 NameOffset : 31;
+ UINT32 NameIsString : 1;
} s;
- UINT32 Id;
+ UINT32 Id;
} u1;
union {
- UINT32 OffsetToData;
+ UINT32 OffsetToData;
struct {
- UINT32 OffsetToDirectory:31;
- UINT32 DataIsDirectory:1;
+ UINT32 OffsetToDirectory : 31;
+ UINT32 DataIsDirectory : 1;
} s;
} u2;
} EFI_IMAGE_RESOURCE_DIRECTORY_ENTRY;
@@ -700,36 +710,35 @@
/// Resource directory entry for string.
///
typedef struct {
- UINT16 Length;
- CHAR16 String[1];
+ UINT16 Length;
+ CHAR16 String[1];
} EFI_IMAGE_RESOURCE_DIRECTORY_STRING;
///
/// Resource directory entry for data array.
///
typedef struct {
- UINT32 OffsetToData;
- UINT32 Size;
- UINT32 CodePage;
- UINT32 Reserved;
+ UINT32 OffsetToData;
+ UINT32 Size;
+ UINT32 CodePage;
+ UINT32 Reserved;
} EFI_IMAGE_RESOURCE_DATA_ENTRY;
///
/// Header format for TE images, defined in the PI Specification, 1.0.
///
typedef struct {
- UINT16 Signature; ///< The signature for TE format = "VZ".
- UINT16 Machine; ///< From the original file header.
- UINT8 NumberOfSections; ///< From the original file header.
- UINT8 Subsystem; ///< From original optional header.
- UINT16 StrippedSize; ///< Number of bytes we removed from the header.
- UINT32 AddressOfEntryPoint; ///< Offset to entry point -- from original optional header.
- UINT32 BaseOfCode; ///< From original image -- required for ITP debug.
- UINT64 ImageBase; ///< From original file header.
- EFI_IMAGE_DATA_DIRECTORY DataDirectory[2]; ///< Only base relocation and debug directory.
+ UINT16 Signature; ///< The signature for TE format = "VZ".
+ UINT16 Machine; ///< From the original file header.
+ UINT8 NumberOfSections; ///< From the original file header.
+ UINT8 Subsystem; ///< From original optional header.
+ UINT16 StrippedSize; ///< Number of bytes we removed from the header.
+ UINT32 AddressOfEntryPoint; ///< Offset to entry point -- from original optional header.
+ UINT32 BaseOfCode; ///< From original image -- required for ITP debug.
+ UINT64 ImageBase; ///< From original file header.
+ EFI_IMAGE_DATA_DIRECTORY DataDirectory[2]; ///< Only base relocation and debug directory.
} EFI_TE_IMAGE_HEADER;
-
#define EFI_TE_IMAGE_HEADER_SIGNATURE SIGNATURE_16('V', 'Z')
//
@@ -738,21 +747,20 @@
#define EFI_TE_IMAGE_DIRECTORY_ENTRY_BASERELOC 0
#define EFI_TE_IMAGE_DIRECTORY_ENTRY_DEBUG 1
-
///
/// Union of PE32, PE32+, and TE headers.
///
typedef union {
- EFI_IMAGE_NT_HEADERS32 Pe32;
- EFI_IMAGE_NT_HEADERS64 Pe32Plus;
- EFI_TE_IMAGE_HEADER Te;
+ EFI_IMAGE_NT_HEADERS32 Pe32;
+ EFI_IMAGE_NT_HEADERS64 Pe32Plus;
+ EFI_TE_IMAGE_HEADER Te;
} EFI_IMAGE_OPTIONAL_HEADER_UNION;
typedef union {
- EFI_IMAGE_NT_HEADERS32 *Pe32;
- EFI_IMAGE_NT_HEADERS64 *Pe32Plus;
- EFI_TE_IMAGE_HEADER *Te;
- EFI_IMAGE_OPTIONAL_HEADER_UNION *Union;
+ EFI_IMAGE_NT_HEADERS32 *Pe32;
+ EFI_IMAGE_NT_HEADERS64 *Pe32Plus;
+ EFI_TE_IMAGE_HEADER *Te;
+ EFI_IMAGE_OPTIONAL_HEADER_UNION *Union;
} EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION;
#endif
diff --git a/src/include/ipxe/efi/IndustryStandard/Tpm12.h b/src/include/ipxe/efi/IndustryStandard/Tpm12.h
index 509425c..6bebcb7 100644
--- a/src/include/ipxe/efi/IndustryStandard/Tpm12.h
+++ b/src/include/ipxe/efi/IndustryStandard/Tpm12.h
@@ -2,26 +2,19 @@
TPM Specification data structures (TCG TPM Specification Version 1.2 Revision 103)
See http://trustedcomputinggroup.org for latest specification updates
- Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#ifndef _TPM12_H_
#define _TPM12_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
///
/// The start of TPM return codes
///
-#define TPM_BASE 0
+#define TPM_BASE 0
//
// All structures MUST be packed on a byte boundary.
@@ -35,246 +28,246 @@
///
/// Indicates the conditions where it is required that authorization be presented
///
-typedef UINT8 TPM_AUTH_DATA_USAGE;
+typedef UINT8 TPM_AUTH_DATA_USAGE;
///
/// The information as to what the payload is in an encrypted structure
///
-typedef UINT8 TPM_PAYLOAD_TYPE;
+typedef UINT8 TPM_PAYLOAD_TYPE;
///
/// The version info breakdown
///
-typedef UINT8 TPM_VERSION_BYTE;
+typedef UINT8 TPM_VERSION_BYTE;
///
/// The state of the dictionary attack mitigation logic
///
-typedef UINT8 TPM_DA_STATE;
+typedef UINT8 TPM_DA_STATE;
///
/// The request or response authorization type
///
-typedef UINT16 TPM_TAG;
+typedef UINT16 TPM_TAG;
///
/// The protocol in use
///
-typedef UINT16 TPM_PROTOCOL_ID;
+typedef UINT16 TPM_PROTOCOL_ID;
///
/// Indicates the start state
///
-typedef UINT16 TPM_STARTUP_TYPE;
+typedef UINT16 TPM_STARTUP_TYPE;
///
/// The definition of the encryption scheme
///
-typedef UINT16 TPM_ENC_SCHEME;
+typedef UINT16 TPM_ENC_SCHEME;
///
/// The definition of the signature scheme
///
-typedef UINT16 TPM_SIG_SCHEME;
+typedef UINT16 TPM_SIG_SCHEME;
///
/// The definition of the migration scheme
///
-typedef UINT16 TPM_MIGRATE_SCHEME;
+typedef UINT16 TPM_MIGRATE_SCHEME;
///
/// Sets the state of the physical presence mechanism
///
-typedef UINT16 TPM_PHYSICAL_PRESENCE;
+typedef UINT16 TPM_PHYSICAL_PRESENCE;
///
/// Indicates the types of entity that are supported by the TPM
///
-typedef UINT16 TPM_ENTITY_TYPE;
+typedef UINT16 TPM_ENTITY_TYPE;
///
/// Indicates the permitted usage of the key
///
-typedef UINT16 TPM_KEY_USAGE;
+typedef UINT16 TPM_KEY_USAGE;
///
/// The type of asymmetric encrypted structure in use by the endorsement key
///
-typedef UINT16 TPM_EK_TYPE;
+typedef UINT16 TPM_EK_TYPE;
///
/// The tag for the structure
///
-typedef UINT16 TPM_STRUCTURE_TAG;
+typedef UINT16 TPM_STRUCTURE_TAG;
///
/// The platform specific spec to which the information relates to
///
-typedef UINT16 TPM_PLATFORM_SPECIFIC;
+typedef UINT16 TPM_PLATFORM_SPECIFIC;
///
/// The command ordinal
///
-typedef UINT32 TPM_COMMAND_CODE;
+typedef UINT32 TPM_COMMAND_CODE;
///
/// Identifies a TPM capability area
///
-typedef UINT32 TPM_CAPABILITY_AREA;
+typedef UINT32 TPM_CAPABILITY_AREA;
///
/// Indicates information regarding a key
///
-typedef UINT32 TPM_KEY_FLAGS;
+typedef UINT32 TPM_KEY_FLAGS;
///
/// Indicates the type of algorithm
///
-typedef UINT32 TPM_ALGORITHM_ID;
+typedef UINT32 TPM_ALGORITHM_ID;
///
/// The locality modifier
///
-typedef UINT32 TPM_MODIFIER_INDICATOR;
+typedef UINT32 TPM_MODIFIER_INDICATOR;
///
/// The actual number of a counter
///
-typedef UINT32 TPM_ACTUAL_COUNT;
+typedef UINT32 TPM_ACTUAL_COUNT;
///
/// Attributes that define what options are in use for a transport session
///
-typedef UINT32 TPM_TRANSPORT_ATTRIBUTES;
+typedef UINT32 TPM_TRANSPORT_ATTRIBUTES;
///
/// Handle to an authorization session
///
-typedef UINT32 TPM_AUTHHANDLE;
+typedef UINT32 TPM_AUTHHANDLE;
///
/// Index to a DIR register
///
-typedef UINT32 TPM_DIRINDEX;
+typedef UINT32 TPM_DIRINDEX;
///
/// The area where a key is held assigned by the TPM
///
-typedef UINT32 TPM_KEY_HANDLE;
+typedef UINT32 TPM_KEY_HANDLE;
///
/// Index to a PCR register
///
-typedef UINT32 TPM_PCRINDEX;
+typedef UINT32 TPM_PCRINDEX;
///
/// The return code from a function
///
-typedef UINT32 TPM_RESULT;
+typedef UINT32 TPM_RESULT;
///
/// The types of resources that a TPM may have using internal resources
///
-typedef UINT32 TPM_RESOURCE_TYPE;
+typedef UINT32 TPM_RESOURCE_TYPE;
///
/// Allows for controlling of the key when loaded and how to handle TPM_Startup issues
///
-typedef UINT32 TPM_KEY_CONTROL;
+typedef UINT32 TPM_KEY_CONTROL;
///
/// The index into the NV storage area
///
-typedef UINT32 TPM_NV_INDEX;
+typedef UINT32 TPM_NV_INDEX;
///
/// The family ID. Family IDs are automatically assigned a sequence number by the TPM.
/// A trusted process can set the FamilyID value in an individual row to NULL, which
/// invalidates that row. The family ID resets to NULL on each change of TPM Owner.
///
-typedef UINT32 TPM_FAMILY_ID;
+typedef UINT32 TPM_FAMILY_ID;
///
/// IA value used as a label for the most recent verification of this family. Set to zero when not in use.
///
-typedef UINT32 TPM_FAMILY_VERIFICATION;
+typedef UINT32 TPM_FAMILY_VERIFICATION;
///
/// How the TPM handles var
///
-typedef UINT32 TPM_STARTUP_EFFECTS;
+typedef UINT32 TPM_STARTUP_EFFECTS;
///
/// The mode of a symmetric encryption
///
-typedef UINT32 TPM_SYM_MODE;
+typedef UINT32 TPM_SYM_MODE;
///
/// The family flags
///
-typedef UINT32 TPM_FAMILY_FLAGS;
+typedef UINT32 TPM_FAMILY_FLAGS;
///
/// The index value for the delegate NV table
///
-typedef UINT32 TPM_DELEGATE_INDEX;
+typedef UINT32 TPM_DELEGATE_INDEX;
///
/// The restrictions placed on delegation of CMK commands
///
-typedef UINT32 TPM_CMK_DELEGATE;
+typedef UINT32 TPM_CMK_DELEGATE;
///
/// The ID value of a monotonic counter
///
-typedef UINT32 TPM_COUNT_ID;
+typedef UINT32 TPM_COUNT_ID;
///
/// A command to execute
///
-typedef UINT32 TPM_REDIT_COMMAND;
+typedef UINT32 TPM_REDIT_COMMAND;
///
/// A transport session handle
///
-typedef UINT32 TPM_TRANSHANDLE;
+typedef UINT32 TPM_TRANSHANDLE;
///
/// A generic handle could be key, transport etc
///
-typedef UINT32 TPM_HANDLE;
+typedef UINT32 TPM_HANDLE;
///
/// What operation is happening
///
-typedef UINT32 TPM_FAMILY_OPERATION;
+typedef UINT32 TPM_FAMILY_OPERATION;
//
// Part 2, section 2.2.4: Vendor specific
// The following defines allow for the quick specification of a
// vendor specific item.
//
-#define TPM_Vendor_Specific32 ((UINT32) 0x00000400)
-#define TPM_Vendor_Specific8 ((UINT8) 0x80)
+#define TPM_Vendor_Specific32 ((UINT32) 0x00000400)
+#define TPM_Vendor_Specific8 ((UINT8) 0x80)
//
// Part 2, section 3.1: TPM_STRUCTURE_TAG
//
-#define TPM_TAG_CONTEXTBLOB ((TPM_STRUCTURE_TAG) 0x0001)
-#define TPM_TAG_CONTEXT_SENSITIVE ((TPM_STRUCTURE_TAG) 0x0002)
-#define TPM_TAG_CONTEXTPOINTER ((TPM_STRUCTURE_TAG) 0x0003)
-#define TPM_TAG_CONTEXTLIST ((TPM_STRUCTURE_TAG) 0x0004)
-#define TPM_TAG_SIGNINFO ((TPM_STRUCTURE_TAG) 0x0005)
-#define TPM_TAG_PCR_INFO_LONG ((TPM_STRUCTURE_TAG) 0x0006)
-#define TPM_TAG_PERSISTENT_FLAGS ((TPM_STRUCTURE_TAG) 0x0007)
-#define TPM_TAG_VOLATILE_FLAGS ((TPM_STRUCTURE_TAG) 0x0008)
-#define TPM_TAG_PERSISTENT_DATA ((TPM_STRUCTURE_TAG) 0x0009)
-#define TPM_TAG_VOLATILE_DATA ((TPM_STRUCTURE_TAG) 0x000A)
-#define TPM_TAG_SV_DATA ((TPM_STRUCTURE_TAG) 0x000B)
-#define TPM_TAG_EK_BLOB ((TPM_STRUCTURE_TAG) 0x000C)
-#define TPM_TAG_EK_BLOB_AUTH ((TPM_STRUCTURE_TAG) 0x000D)
-#define TPM_TAG_COUNTER_VALUE ((TPM_STRUCTURE_TAG) 0x000E)
-#define TPM_TAG_TRANSPORT_INTERNAL ((TPM_STRUCTURE_TAG) 0x000F)
-#define TPM_TAG_TRANSPORT_LOG_IN ((TPM_STRUCTURE_TAG) 0x0010)
-#define TPM_TAG_TRANSPORT_LOG_OUT ((TPM_STRUCTURE_TAG) 0x0011)
-#define TPM_TAG_AUDIT_EVENT_IN ((TPM_STRUCTURE_TAG) 0x0012)
-#define TPM_TAG_AUDIT_EVENT_OUT ((TPM_STRUCTURE_TAG) 0x0013)
-#define TPM_TAG_CURRENT_TICKS ((TPM_STRUCTURE_TAG) 0x0014)
-#define TPM_TAG_KEY ((TPM_STRUCTURE_TAG) 0x0015)
-#define TPM_TAG_STORED_DATA12 ((TPM_STRUCTURE_TAG) 0x0016)
-#define TPM_TAG_NV_ATTRIBUTES ((TPM_STRUCTURE_TAG) 0x0017)
-#define TPM_TAG_NV_DATA_PUBLIC ((TPM_STRUCTURE_TAG) 0x0018)
-#define TPM_TAG_NV_DATA_SENSITIVE ((TPM_STRUCTURE_TAG) 0x0019)
-#define TPM_TAG_DELEGATIONS ((TPM_STRUCTURE_TAG) 0x001A)
-#define TPM_TAG_DELEGATE_PUBLIC ((TPM_STRUCTURE_TAG) 0x001B)
-#define TPM_TAG_DELEGATE_TABLE_ROW ((TPM_STRUCTURE_TAG) 0x001C)
-#define TPM_TAG_TRANSPORT_AUTH ((TPM_STRUCTURE_TAG) 0x001D)
-#define TPM_TAG_TRANSPORT_PUBLIC ((TPM_STRUCTURE_TAG) 0x001E)
-#define TPM_TAG_PERMANENT_FLAGS ((TPM_STRUCTURE_TAG) 0x001F)
-#define TPM_TAG_STCLEAR_FLAGS ((TPM_STRUCTURE_TAG) 0x0020)
-#define TPM_TAG_STANY_FLAGS ((TPM_STRUCTURE_TAG) 0x0021)
-#define TPM_TAG_PERMANENT_DATA ((TPM_STRUCTURE_TAG) 0x0022)
-#define TPM_TAG_STCLEAR_DATA ((TPM_STRUCTURE_TAG) 0x0023)
-#define TPM_TAG_STANY_DATA ((TPM_STRUCTURE_TAG) 0x0024)
-#define TPM_TAG_FAMILY_TABLE_ENTRY ((TPM_STRUCTURE_TAG) 0x0025)
-#define TPM_TAG_DELEGATE_SENSITIVE ((TPM_STRUCTURE_TAG) 0x0026)
-#define TPM_TAG_DELG_KEY_BLOB ((TPM_STRUCTURE_TAG) 0x0027)
-#define TPM_TAG_KEY12 ((TPM_STRUCTURE_TAG) 0x0028)
-#define TPM_TAG_CERTIFY_INFO2 ((TPM_STRUCTURE_TAG) 0x0029)
-#define TPM_TAG_DELEGATE_OWNER_BLOB ((TPM_STRUCTURE_TAG) 0x002A)
-#define TPM_TAG_EK_BLOB_ACTIVATE ((TPM_STRUCTURE_TAG) 0x002B)
-#define TPM_TAG_DAA_BLOB ((TPM_STRUCTURE_TAG) 0x002C)
-#define TPM_TAG_DAA_CONTEXT ((TPM_STRUCTURE_TAG) 0x002D)
-#define TPM_TAG_DAA_ENFORCE ((TPM_STRUCTURE_TAG) 0x002E)
-#define TPM_TAG_DAA_ISSUER ((TPM_STRUCTURE_TAG) 0x002F)
-#define TPM_TAG_CAP_VERSION_INFO ((TPM_STRUCTURE_TAG) 0x0030)
-#define TPM_TAG_DAA_SENSITIVE ((TPM_STRUCTURE_TAG) 0x0031)
-#define TPM_TAG_DAA_TPM ((TPM_STRUCTURE_TAG) 0x0032)
-#define TPM_TAG_CMK_MIGAUTH ((TPM_STRUCTURE_TAG) 0x0033)
-#define TPM_TAG_CMK_SIGTICKET ((TPM_STRUCTURE_TAG) 0x0034)
-#define TPM_TAG_CMK_MA_APPROVAL ((TPM_STRUCTURE_TAG) 0x0035)
-#define TPM_TAG_QUOTE_INFO2 ((TPM_STRUCTURE_TAG) 0x0036)
-#define TPM_TAG_DA_INFO ((TPM_STRUCTURE_TAG) 0x0037)
-#define TPM_TAG_DA_LIMITED ((TPM_STRUCTURE_TAG) 0x0038)
-#define TPM_TAG_DA_ACTION_TYPE ((TPM_STRUCTURE_TAG) 0x0039)
+#define TPM_TAG_CONTEXTBLOB ((TPM_STRUCTURE_TAG) 0x0001)
+#define TPM_TAG_CONTEXT_SENSITIVE ((TPM_STRUCTURE_TAG) 0x0002)
+#define TPM_TAG_CONTEXTPOINTER ((TPM_STRUCTURE_TAG) 0x0003)
+#define TPM_TAG_CONTEXTLIST ((TPM_STRUCTURE_TAG) 0x0004)
+#define TPM_TAG_SIGNINFO ((TPM_STRUCTURE_TAG) 0x0005)
+#define TPM_TAG_PCR_INFO_LONG ((TPM_STRUCTURE_TAG) 0x0006)
+#define TPM_TAG_PERSISTENT_FLAGS ((TPM_STRUCTURE_TAG) 0x0007)
+#define TPM_TAG_VOLATILE_FLAGS ((TPM_STRUCTURE_TAG) 0x0008)
+#define TPM_TAG_PERSISTENT_DATA ((TPM_STRUCTURE_TAG) 0x0009)
+#define TPM_TAG_VOLATILE_DATA ((TPM_STRUCTURE_TAG) 0x000A)
+#define TPM_TAG_SV_DATA ((TPM_STRUCTURE_TAG) 0x000B)
+#define TPM_TAG_EK_BLOB ((TPM_STRUCTURE_TAG) 0x000C)
+#define TPM_TAG_EK_BLOB_AUTH ((TPM_STRUCTURE_TAG) 0x000D)
+#define TPM_TAG_COUNTER_VALUE ((TPM_STRUCTURE_TAG) 0x000E)
+#define TPM_TAG_TRANSPORT_INTERNAL ((TPM_STRUCTURE_TAG) 0x000F)
+#define TPM_TAG_TRANSPORT_LOG_IN ((TPM_STRUCTURE_TAG) 0x0010)
+#define TPM_TAG_TRANSPORT_LOG_OUT ((TPM_STRUCTURE_TAG) 0x0011)
+#define TPM_TAG_AUDIT_EVENT_IN ((TPM_STRUCTURE_TAG) 0x0012)
+#define TPM_TAG_AUDIT_EVENT_OUT ((TPM_STRUCTURE_TAG) 0x0013)
+#define TPM_TAG_CURRENT_TICKS ((TPM_STRUCTURE_TAG) 0x0014)
+#define TPM_TAG_KEY ((TPM_STRUCTURE_TAG) 0x0015)
+#define TPM_TAG_STORED_DATA12 ((TPM_STRUCTURE_TAG) 0x0016)
+#define TPM_TAG_NV_ATTRIBUTES ((TPM_STRUCTURE_TAG) 0x0017)
+#define TPM_TAG_NV_DATA_PUBLIC ((TPM_STRUCTURE_TAG) 0x0018)
+#define TPM_TAG_NV_DATA_SENSITIVE ((TPM_STRUCTURE_TAG) 0x0019)
+#define TPM_TAG_DELEGATIONS ((TPM_STRUCTURE_TAG) 0x001A)
+#define TPM_TAG_DELEGATE_PUBLIC ((TPM_STRUCTURE_TAG) 0x001B)
+#define TPM_TAG_DELEGATE_TABLE_ROW ((TPM_STRUCTURE_TAG) 0x001C)
+#define TPM_TAG_TRANSPORT_AUTH ((TPM_STRUCTURE_TAG) 0x001D)
+#define TPM_TAG_TRANSPORT_PUBLIC ((TPM_STRUCTURE_TAG) 0x001E)
+#define TPM_TAG_PERMANENT_FLAGS ((TPM_STRUCTURE_TAG) 0x001F)
+#define TPM_TAG_STCLEAR_FLAGS ((TPM_STRUCTURE_TAG) 0x0020)
+#define TPM_TAG_STANY_FLAGS ((TPM_STRUCTURE_TAG) 0x0021)
+#define TPM_TAG_PERMANENT_DATA ((TPM_STRUCTURE_TAG) 0x0022)
+#define TPM_TAG_STCLEAR_DATA ((TPM_STRUCTURE_TAG) 0x0023)
+#define TPM_TAG_STANY_DATA ((TPM_STRUCTURE_TAG) 0x0024)
+#define TPM_TAG_FAMILY_TABLE_ENTRY ((TPM_STRUCTURE_TAG) 0x0025)
+#define TPM_TAG_DELEGATE_SENSITIVE ((TPM_STRUCTURE_TAG) 0x0026)
+#define TPM_TAG_DELG_KEY_BLOB ((TPM_STRUCTURE_TAG) 0x0027)
+#define TPM_TAG_KEY12 ((TPM_STRUCTURE_TAG) 0x0028)
+#define TPM_TAG_CERTIFY_INFO2 ((TPM_STRUCTURE_TAG) 0x0029)
+#define TPM_TAG_DELEGATE_OWNER_BLOB ((TPM_STRUCTURE_TAG) 0x002A)
+#define TPM_TAG_EK_BLOB_ACTIVATE ((TPM_STRUCTURE_TAG) 0x002B)
+#define TPM_TAG_DAA_BLOB ((TPM_STRUCTURE_TAG) 0x002C)
+#define TPM_TAG_DAA_CONTEXT ((TPM_STRUCTURE_TAG) 0x002D)
+#define TPM_TAG_DAA_ENFORCE ((TPM_STRUCTURE_TAG) 0x002E)
+#define TPM_TAG_DAA_ISSUER ((TPM_STRUCTURE_TAG) 0x002F)
+#define TPM_TAG_CAP_VERSION_INFO ((TPM_STRUCTURE_TAG) 0x0030)
+#define TPM_TAG_DAA_SENSITIVE ((TPM_STRUCTURE_TAG) 0x0031)
+#define TPM_TAG_DAA_TPM ((TPM_STRUCTURE_TAG) 0x0032)
+#define TPM_TAG_CMK_MIGAUTH ((TPM_STRUCTURE_TAG) 0x0033)
+#define TPM_TAG_CMK_SIGTICKET ((TPM_STRUCTURE_TAG) 0x0034)
+#define TPM_TAG_CMK_MA_APPROVAL ((TPM_STRUCTURE_TAG) 0x0035)
+#define TPM_TAG_QUOTE_INFO2 ((TPM_STRUCTURE_TAG) 0x0036)
+#define TPM_TAG_DA_INFO ((TPM_STRUCTURE_TAG) 0x0037)
+#define TPM_TAG_DA_LIMITED ((TPM_STRUCTURE_TAG) 0x0038)
+#define TPM_TAG_DA_ACTION_TYPE ((TPM_STRUCTURE_TAG) 0x0039)
//
// Part 2, section 4: TPM Types
@@ -283,69 +276,69 @@
//
// Part 2, section 4.1: TPM_RESOURCE_TYPE
//
-#define TPM_RT_KEY ((TPM_RESOURCE_TYPE) 0x00000001) ///< The handle is a key handle and is the result of a LoadKey type operation
-#define TPM_RT_AUTH ((TPM_RESOURCE_TYPE) 0x00000002) ///< The handle is an authorization handle. Auth handles come from TPM_OIAP, TPM_OSAP and TPM_DSAP
-#define TPM_RT_HASH ((TPM_RESOURCE_TYPE) 0x00000003) ///< Reserved for hashes
-#define TPM_RT_TRANS ((TPM_RESOURCE_TYPE) 0x00000004) ///< The handle is for a transport session. Transport handles come from TPM_EstablishTransport
-#define TPM_RT_CONTEXT ((TPM_RESOURCE_TYPE) 0x00000005) ///< Resource wrapped and held outside the TPM using the context save/restore commands
-#define TPM_RT_COUNTER ((TPM_RESOURCE_TYPE) 0x00000006) ///< Reserved for counters
-#define TPM_RT_DELEGATE ((TPM_RESOURCE_TYPE) 0x00000007) ///< The handle is for a delegate row. These are the internal rows held in NV storage by the TPM
-#define TPM_RT_DAA_TPM ((TPM_RESOURCE_TYPE) 0x00000008) ///< The value is a DAA TPM specific blob
-#define TPM_RT_DAA_V0 ((TPM_RESOURCE_TYPE) 0x00000009) ///< The value is a DAA V0 parameter
-#define TPM_RT_DAA_V1 ((TPM_RESOURCE_TYPE) 0x0000000A) ///< The value is a DAA V1 parameter
+#define TPM_RT_KEY ((TPM_RESOURCE_TYPE) 0x00000001) ///< The handle is a key handle and is the result of a LoadKey type operation
+#define TPM_RT_AUTH ((TPM_RESOURCE_TYPE) 0x00000002) ///< The handle is an authorization handle. Auth handles come from TPM_OIAP, TPM_OSAP and TPM_DSAP
+#define TPM_RT_HASH ((TPM_RESOURCE_TYPE) 0x00000003) ///< Reserved for hashes
+#define TPM_RT_TRANS ((TPM_RESOURCE_TYPE) 0x00000004) ///< The handle is for a transport session. Transport handles come from TPM_EstablishTransport
+#define TPM_RT_CONTEXT ((TPM_RESOURCE_TYPE) 0x00000005) ///< Resource wrapped and held outside the TPM using the context save/restore commands
+#define TPM_RT_COUNTER ((TPM_RESOURCE_TYPE) 0x00000006) ///< Reserved for counters
+#define TPM_RT_DELEGATE ((TPM_RESOURCE_TYPE) 0x00000007) ///< The handle is for a delegate row. These are the internal rows held in NV storage by the TPM
+#define TPM_RT_DAA_TPM ((TPM_RESOURCE_TYPE) 0x00000008) ///< The value is a DAA TPM specific blob
+#define TPM_RT_DAA_V0 ((TPM_RESOURCE_TYPE) 0x00000009) ///< The value is a DAA V0 parameter
+#define TPM_RT_DAA_V1 ((TPM_RESOURCE_TYPE) 0x0000000A) ///< The value is a DAA V1 parameter
//
// Part 2, section 4.2: TPM_PAYLOAD_TYPE
//
-#define TPM_PT_ASYM ((TPM_PAYLOAD_TYPE) 0x01) ///< The entity is an asymmetric key
-#define TPM_PT_BIND ((TPM_PAYLOAD_TYPE) 0x02) ///< The entity is bound data
-#define TPM_PT_MIGRATE ((TPM_PAYLOAD_TYPE) 0x03) ///< The entity is a migration blob
-#define TPM_PT_MAINT ((TPM_PAYLOAD_TYPE) 0x04) ///< The entity is a maintenance blob
-#define TPM_PT_SEAL ((TPM_PAYLOAD_TYPE) 0x05) ///< The entity is sealed data
-#define TPM_PT_MIGRATE_RESTRICTED ((TPM_PAYLOAD_TYPE) 0x06) ///< The entity is a restricted-migration asymmetric key
-#define TPM_PT_MIGRATE_EXTERNAL ((TPM_PAYLOAD_TYPE) 0x07) ///< The entity is a external migratable key
-#define TPM_PT_CMK_MIGRATE ((TPM_PAYLOAD_TYPE) 0x08) ///< The entity is a CMK migratable blob
-#define TPM_PT_VENDOR_SPECIFIC ((TPM_PAYLOAD_TYPE) 0x80) ///< 0x80 - 0xFF Vendor specific payloads
+#define TPM_PT_ASYM ((TPM_PAYLOAD_TYPE) 0x01) ///< The entity is an asymmetric key
+#define TPM_PT_BIND ((TPM_PAYLOAD_TYPE) 0x02) ///< The entity is bound data
+#define TPM_PT_MIGRATE ((TPM_PAYLOAD_TYPE) 0x03) ///< The entity is a migration blob
+#define TPM_PT_MAINT ((TPM_PAYLOAD_TYPE) 0x04) ///< The entity is a maintenance blob
+#define TPM_PT_SEAL ((TPM_PAYLOAD_TYPE) 0x05) ///< The entity is sealed data
+#define TPM_PT_MIGRATE_RESTRICTED ((TPM_PAYLOAD_TYPE) 0x06) ///< The entity is a restricted-migration asymmetric key
+#define TPM_PT_MIGRATE_EXTERNAL ((TPM_PAYLOAD_TYPE) 0x07) ///< The entity is a external migratable key
+#define TPM_PT_CMK_MIGRATE ((TPM_PAYLOAD_TYPE) 0x08) ///< The entity is a CMK migratable blob
+#define TPM_PT_VENDOR_SPECIFIC ((TPM_PAYLOAD_TYPE) 0x80) ///< 0x80 - 0xFF Vendor specific payloads
//
// Part 2, section 4.3: TPM_ENTITY_TYPE
//
-#define TPM_ET_KEYHANDLE ((UINT16) 0x0001) ///< The entity is a keyHandle or key
-#define TPM_ET_OWNER ((UINT16) 0x0002) ///< The entity is the TPM Owner
-#define TPM_ET_DATA ((UINT16) 0x0003) ///< The entity is some data
-#define TPM_ET_SRK ((UINT16) 0x0004) ///< The entity is the SRK
-#define TPM_ET_KEY ((UINT16) 0x0005) ///< The entity is a key or keyHandle
-#define TPM_ET_REVOKE ((UINT16) 0x0006) ///< The entity is the RevokeTrust value
-#define TPM_ET_DEL_OWNER_BLOB ((UINT16) 0x0007) ///< The entity is a delegate owner blob
-#define TPM_ET_DEL_ROW ((UINT16) 0x0008) ///< The entity is a delegate row
-#define TPM_ET_DEL_KEY_BLOB ((UINT16) 0x0009) ///< The entity is a delegate key blob
-#define TPM_ET_COUNTER ((UINT16) 0x000A) ///< The entity is a counter
-#define TPM_ET_NV ((UINT16) 0x000B) ///< The entity is a NV index
-#define TPM_ET_OPERATOR ((UINT16) 0x000C) ///< The entity is the operator
-#define TPM_ET_RESERVED_HANDLE ((UINT16) 0x0040) ///< Reserved. This value avoids collisions with the handle MSB setting.
+#define TPM_ET_KEYHANDLE ((UINT16) 0x0001) ///< The entity is a keyHandle or key
+#define TPM_ET_OWNER ((UINT16) 0x0002) ///< The entity is the TPM Owner
+#define TPM_ET_DATA ((UINT16) 0x0003) ///< The entity is some data
+#define TPM_ET_SRK ((UINT16) 0x0004) ///< The entity is the SRK
+#define TPM_ET_KEY ((UINT16) 0x0005) ///< The entity is a key or keyHandle
+#define TPM_ET_REVOKE ((UINT16) 0x0006) ///< The entity is the RevokeTrust value
+#define TPM_ET_DEL_OWNER_BLOB ((UINT16) 0x0007) ///< The entity is a delegate owner blob
+#define TPM_ET_DEL_ROW ((UINT16) 0x0008) ///< The entity is a delegate row
+#define TPM_ET_DEL_KEY_BLOB ((UINT16) 0x0009) ///< The entity is a delegate key blob
+#define TPM_ET_COUNTER ((UINT16) 0x000A) ///< The entity is a counter
+#define TPM_ET_NV ((UINT16) 0x000B) ///< The entity is a NV index
+#define TPM_ET_OPERATOR ((UINT16) 0x000C) ///< The entity is the operator
+#define TPM_ET_RESERVED_HANDLE ((UINT16) 0x0040) ///< Reserved. This value avoids collisions with the handle MSB setting.
//
// TPM_ENTITY_TYPE MSB Values: The MSB is used to indicate the ADIP encryption sheme when applicable
//
-#define TPM_ET_XOR ((UINT16) 0x0000) ///< ADIP encryption scheme: XOR
-#define TPM_ET_AES128 ((UINT16) 0x0006) ///< ADIP encryption scheme: AES 128 bits
+#define TPM_ET_XOR ((UINT16) 0x0000) ///< ADIP encryption scheme: XOR
+#define TPM_ET_AES128 ((UINT16) 0x0006) ///< ADIP encryption scheme: AES 128 bits
//
// Part 2, section 4.4.1: Reserved Key Handles
//
-#define TPM_KH_SRK ((TPM_KEY_HANDLE) 0x40000000) ///< The handle points to the SRK
-#define TPM_KH_OWNER ((TPM_KEY_HANDLE) 0x40000001) ///< The handle points to the TPM Owner
-#define TPM_KH_REVOKE ((TPM_KEY_HANDLE) 0x40000002) ///< The handle points to the RevokeTrust value
-#define TPM_KH_TRANSPORT ((TPM_KEY_HANDLE) 0x40000003) ///< The handle points to the EstablishTransport static authorization
-#define TPM_KH_OPERATOR ((TPM_KEY_HANDLE) 0x40000004) ///< The handle points to the Operator auth
-#define TPM_KH_ADMIN ((TPM_KEY_HANDLE) 0x40000005) ///< The handle points to the delegation administration auth
-#define TPM_KH_EK ((TPM_KEY_HANDLE) 0x40000006) ///< The handle points to the PUBEK, only usable with TPM_OwnerReadInternalPub
+#define TPM_KH_SRK ((TPM_KEY_HANDLE) 0x40000000) ///< The handle points to the SRK
+#define TPM_KH_OWNER ((TPM_KEY_HANDLE) 0x40000001) ///< The handle points to the TPM Owner
+#define TPM_KH_REVOKE ((TPM_KEY_HANDLE) 0x40000002) ///< The handle points to the RevokeTrust value
+#define TPM_KH_TRANSPORT ((TPM_KEY_HANDLE) 0x40000003) ///< The handle points to the EstablishTransport static authorization
+#define TPM_KH_OPERATOR ((TPM_KEY_HANDLE) 0x40000004) ///< The handle points to the Operator auth
+#define TPM_KH_ADMIN ((TPM_KEY_HANDLE) 0x40000005) ///< The handle points to the delegation administration auth
+#define TPM_KH_EK ((TPM_KEY_HANDLE) 0x40000006) ///< The handle points to the PUBEK, only usable with TPM_OwnerReadInternalPub
//
// Part 2, section 4.5: TPM_STARTUP_TYPE
//
-#define TPM_ST_CLEAR ((TPM_STARTUP_TYPE) 0x0001) ///< The TPM is starting up from a clean state
-#define TPM_ST_STATE ((TPM_STARTUP_TYPE) 0x0002) ///< The TPM is starting up from a saved state
-#define TPM_ST_DEACTIVATED ((TPM_STARTUP_TYPE) 0x0003) ///< The TPM is to startup and set the deactivated flag to TRUE
+#define TPM_ST_CLEAR ((TPM_STARTUP_TYPE) 0x0001) ///< The TPM is starting up from a clean state
+#define TPM_ST_STATE ((TPM_STARTUP_TYPE) 0x0002) ///< The TPM is starting up from a saved state
+#define TPM_ST_DEACTIVATED ((TPM_STARTUP_TYPE) 0x0003) ///< The TPM is to startup and set the deactivated flag to TRUE
//
// Part 2, section 4.6: TPM_STATUP_EFFECTS
@@ -355,65 +348,65 @@
//
// Part 2, section 4.7: TPM_PROTOCOL_ID
//
-#define TPM_PID_OIAP ((TPM_PROTOCOL_ID) 0x0001) ///< The OIAP protocol.
-#define TPM_PID_OSAP ((TPM_PROTOCOL_ID) 0x0002) ///< The OSAP protocol.
-#define TPM_PID_ADIP ((TPM_PROTOCOL_ID) 0x0003) ///< The ADIP protocol.
-#define TPM_PID_ADCP ((TPM_PROTOCOL_ID) 0x0004) ///< The ADCP protocol.
-#define TPM_PID_OWNER ((TPM_PROTOCOL_ID) 0x0005) ///< The protocol for taking ownership of a TPM.
-#define TPM_PID_DSAP ((TPM_PROTOCOL_ID) 0x0006) ///< The DSAP protocol
-#define TPM_PID_TRANSPORT ((TPM_PROTOCOL_ID) 0x0007) ///< The transport protocol
+#define TPM_PID_OIAP ((TPM_PROTOCOL_ID) 0x0001) ///< The OIAP protocol.
+#define TPM_PID_OSAP ((TPM_PROTOCOL_ID) 0x0002) ///< The OSAP protocol.
+#define TPM_PID_ADIP ((TPM_PROTOCOL_ID) 0x0003) ///< The ADIP protocol.
+#define TPM_PID_ADCP ((TPM_PROTOCOL_ID) 0x0004) ///< The ADCP protocol.
+#define TPM_PID_OWNER ((TPM_PROTOCOL_ID) 0x0005) ///< The protocol for taking ownership of a TPM.
+#define TPM_PID_DSAP ((TPM_PROTOCOL_ID) 0x0006) ///< The DSAP protocol
+#define TPM_PID_TRANSPORT ((TPM_PROTOCOL_ID) 0x0007) ///< The transport protocol
//
// Part 2, section 4.8: TPM_ALGORITHM_ID
// The TPM MUST support the algorithms TPM_ALG_RSA, TPM_ALG_SHA, TPM_ALG_HMAC,
// TPM_ALG_MGF1
//
-#define TPM_ALG_RSA ((TPM_ALGORITHM_ID) 0x00000001) ///< The RSA algorithm.
-#define TPM_ALG_DES ((TPM_ALGORITHM_ID) 0x00000002) ///< The DES algorithm
-#define TPM_ALG_3DES ((TPM_ALGORITHM_ID) 0x00000003) ///< The 3DES algorithm in EDE mode
-#define TPM_ALG_SHA ((TPM_ALGORITHM_ID) 0x00000004) ///< The SHA1 algorithm
-#define TPM_ALG_HMAC ((TPM_ALGORITHM_ID) 0x00000005) ///< The RFC 2104 HMAC algorithm
-#define TPM_ALG_AES128 ((TPM_ALGORITHM_ID) 0x00000006) ///< The AES algorithm, key size 128
-#define TPM_ALG_MGF1 ((TPM_ALGORITHM_ID) 0x00000007) ///< The XOR algorithm using MGF1 to create a string the size of the encrypted block
-#define TPM_ALG_AES192 ((TPM_ALGORITHM_ID) 0x00000008) ///< AES, key size 192
-#define TPM_ALG_AES256 ((TPM_ALGORITHM_ID) 0x00000009) ///< AES, key size 256
-#define TPM_ALG_XOR ((TPM_ALGORITHM_ID) 0x0000000A) ///< XOR using the rolling nonces
+#define TPM_ALG_RSA ((TPM_ALGORITHM_ID) 0x00000001) ///< The RSA algorithm.
+#define TPM_ALG_DES ((TPM_ALGORITHM_ID) 0x00000002) ///< The DES algorithm
+#define TPM_ALG_3DES ((TPM_ALGORITHM_ID) 0x00000003) ///< The 3DES algorithm in EDE mode
+#define TPM_ALG_SHA ((TPM_ALGORITHM_ID) 0x00000004) ///< The SHA1 algorithm
+#define TPM_ALG_HMAC ((TPM_ALGORITHM_ID) 0x00000005) ///< The RFC 2104 HMAC algorithm
+#define TPM_ALG_AES128 ((TPM_ALGORITHM_ID) 0x00000006) ///< The AES algorithm, key size 128
+#define TPM_ALG_MGF1 ((TPM_ALGORITHM_ID) 0x00000007) ///< The XOR algorithm using MGF1 to create a string the size of the encrypted block
+#define TPM_ALG_AES192 ((TPM_ALGORITHM_ID) 0x00000008) ///< AES, key size 192
+#define TPM_ALG_AES256 ((TPM_ALGORITHM_ID) 0x00000009) ///< AES, key size 256
+#define TPM_ALG_XOR ((TPM_ALGORITHM_ID) 0x0000000A) ///< XOR using the rolling nonces
//
// Part 2, section 4.9: TPM_PHYSICAL_PRESENCE
//
-#define TPM_PHYSICAL_PRESENCE_HW_DISABLE ((TPM_PHYSICAL_PRESENCE) 0x0200) ///< Sets the physicalPresenceHWEnable to FALSE
-#define TPM_PHYSICAL_PRESENCE_CMD_DISABLE ((TPM_PHYSICAL_PRESENCE) 0x0100) ///< Sets the physicalPresenceCMDEnable to FALSE
-#define TPM_PHYSICAL_PRESENCE_LIFETIME_LOCK ((TPM_PHYSICAL_PRESENCE) 0x0080) ///< Sets the physicalPresenceLifetimeLock to TRUE
-#define TPM_PHYSICAL_PRESENCE_HW_ENABLE ((TPM_PHYSICAL_PRESENCE) 0x0040) ///< Sets the physicalPresenceHWEnable to TRUE
-#define TPM_PHYSICAL_PRESENCE_CMD_ENABLE ((TPM_PHYSICAL_PRESENCE) 0x0020) ///< Sets the physicalPresenceCMDEnable to TRUE
-#define TPM_PHYSICAL_PRESENCE_NOTPRESENT ((TPM_PHYSICAL_PRESENCE) 0x0010) ///< Sets PhysicalPresence = FALSE
-#define TPM_PHYSICAL_PRESENCE_PRESENT ((TPM_PHYSICAL_PRESENCE) 0x0008) ///< Sets PhysicalPresence = TRUE
-#define TPM_PHYSICAL_PRESENCE_LOCK ((TPM_PHYSICAL_PRESENCE) 0x0004) ///< Sets PhysicalPresenceLock = TRUE
+#define TPM_PHYSICAL_PRESENCE_HW_DISABLE ((TPM_PHYSICAL_PRESENCE) 0x0200) ///< Sets the physicalPresenceHWEnable to FALSE
+#define TPM_PHYSICAL_PRESENCE_CMD_DISABLE ((TPM_PHYSICAL_PRESENCE) 0x0100) ///< Sets the physicalPresenceCMDEnable to FALSE
+#define TPM_PHYSICAL_PRESENCE_LIFETIME_LOCK ((TPM_PHYSICAL_PRESENCE) 0x0080) ///< Sets the physicalPresenceLifetimeLock to TRUE
+#define TPM_PHYSICAL_PRESENCE_HW_ENABLE ((TPM_PHYSICAL_PRESENCE) 0x0040) ///< Sets the physicalPresenceHWEnable to TRUE
+#define TPM_PHYSICAL_PRESENCE_CMD_ENABLE ((TPM_PHYSICAL_PRESENCE) 0x0020) ///< Sets the physicalPresenceCMDEnable to TRUE
+#define TPM_PHYSICAL_PRESENCE_NOTPRESENT ((TPM_PHYSICAL_PRESENCE) 0x0010) ///< Sets PhysicalPresence = FALSE
+#define TPM_PHYSICAL_PRESENCE_PRESENT ((TPM_PHYSICAL_PRESENCE) 0x0008) ///< Sets PhysicalPresence = TRUE
+#define TPM_PHYSICAL_PRESENCE_LOCK ((TPM_PHYSICAL_PRESENCE) 0x0004) ///< Sets PhysicalPresenceLock = TRUE
//
// Part 2, section 4.10: TPM_MIGRATE_SCHEME
//
-#define TPM_MS_MIGRATE ((TPM_MIGRATE_SCHEME) 0x0001) ///< A public key that can be used with all TPM migration commands other than 'ReWrap' mode.
-#define TPM_MS_REWRAP ((TPM_MIGRATE_SCHEME) 0x0002) ///< A public key that can be used for the ReWrap mode of TPM_CreateMigrationBlob.
-#define TPM_MS_MAINT ((TPM_MIGRATE_SCHEME) 0x0003) ///< A public key that can be used for the Maintenance commands
-#define TPM_MS_RESTRICT_MIGRATE ((TPM_MIGRATE_SCHEME) 0x0004) ///< The key is to be migrated to a Migration Authority.
-#define TPM_MS_RESTRICT_APPROVE_DOUBLE ((TPM_MIGRATE_SCHEME) 0x0005) ///< The key is to be migrated to an entity approved by a Migration Authority using double wrapping
+#define TPM_MS_MIGRATE ((TPM_MIGRATE_SCHEME) 0x0001) ///< A public key that can be used with all TPM migration commands other than 'ReWrap' mode.
+#define TPM_MS_REWRAP ((TPM_MIGRATE_SCHEME) 0x0002) ///< A public key that can be used for the ReWrap mode of TPM_CreateMigrationBlob.
+#define TPM_MS_MAINT ((TPM_MIGRATE_SCHEME) 0x0003) ///< A public key that can be used for the Maintenance commands
+#define TPM_MS_RESTRICT_MIGRATE ((TPM_MIGRATE_SCHEME) 0x0004) ///< The key is to be migrated to a Migration Authority.
+#define TPM_MS_RESTRICT_APPROVE_DOUBLE ((TPM_MIGRATE_SCHEME) 0x0005) ///< The key is to be migrated to an entity approved by a Migration Authority using double wrapping
//
// Part 2, section 4.11: TPM_EK_TYPE
//
-#define TPM_EK_TYPE_ACTIVATE ((TPM_EK_TYPE) 0x0001) ///< The blob MUST be TPM_EK_BLOB_ACTIVATE
-#define TPM_EK_TYPE_AUTH ((TPM_EK_TYPE) 0x0002) ///< The blob MUST be TPM_EK_BLOB_AUTH
+#define TPM_EK_TYPE_ACTIVATE ((TPM_EK_TYPE) 0x0001) ///< The blob MUST be TPM_EK_BLOB_ACTIVATE
+#define TPM_EK_TYPE_AUTH ((TPM_EK_TYPE) 0x0002) ///< The blob MUST be TPM_EK_BLOB_AUTH
//
// Part 2, section 4.12: TPM_PLATFORM_SPECIFIC
//
-#define TPM_PS_PC_11 ((TPM_PLATFORM_SPECIFIC) 0x0001) ///< PC Specific version 1.1
-#define TPM_PS_PC_12 ((TPM_PLATFORM_SPECIFIC) 0x0002) ///< PC Specific version 1.2
-#define TPM_PS_PDA_12 ((TPM_PLATFORM_SPECIFIC) 0x0003) ///< PDA Specific version 1.2
-#define TPM_PS_Server_12 ((TPM_PLATFORM_SPECIFIC) 0x0004) ///< Server Specific version 1.2
-#define TPM_PS_Mobile_12 ((TPM_PLATFORM_SPECIFIC) 0x0005) ///< Mobil Specific version 1.2
+#define TPM_PS_PC_11 ((TPM_PLATFORM_SPECIFIC) 0x0001) ///< PC Specific version 1.1
+#define TPM_PS_PC_12 ((TPM_PLATFORM_SPECIFIC) 0x0002) ///< PC Specific version 1.2
+#define TPM_PS_PDA_12 ((TPM_PLATFORM_SPECIFIC) 0x0003) ///< PDA Specific version 1.2
+#define TPM_PS_Server_12 ((TPM_PLATFORM_SPECIFIC) 0x0004) ///< Server Specific version 1.2
+#define TPM_PS_Mobile_12 ((TPM_PLATFORM_SPECIFIC) 0x0005) ///< Mobil Specific version 1.2
//
// Part 2, section 5: Basic Structures
@@ -423,72 +416,71 @@
/// Part 2, section 5.1: TPM_STRUCT_VER
///
typedef struct tdTPM_STRUCT_VER {
- UINT8 major;
- UINT8 minor;
- UINT8 revMajor;
- UINT8 revMinor;
+ UINT8 major;
+ UINT8 minor;
+ UINT8 revMajor;
+ UINT8 revMinor;
} TPM_STRUCT_VER;
///
/// Part 2, section 5.3: TPM_VERSION
///
typedef struct tdTPM_VERSION {
- TPM_VERSION_BYTE major;
- TPM_VERSION_BYTE minor;
- UINT8 revMajor;
- UINT8 revMinor;
+ TPM_VERSION_BYTE major;
+ TPM_VERSION_BYTE minor;
+ UINT8 revMajor;
+ UINT8 revMinor;
} TPM_VERSION;
-
-#define TPM_SHA1_160_HASH_LEN 0x14
-#define TPM_SHA1BASED_NONCE_LEN TPM_SHA1_160_HASH_LEN
+#define TPM_SHA1_160_HASH_LEN 0x14
+#define TPM_SHA1BASED_NONCE_LEN TPM_SHA1_160_HASH_LEN
///
/// Part 2, section 5.4: TPM_DIGEST
///
-typedef struct tdTPM_DIGEST{
- UINT8 digest[TPM_SHA1_160_HASH_LEN];
+typedef struct tdTPM_DIGEST {
+ UINT8 digest[TPM_SHA1_160_HASH_LEN];
} TPM_DIGEST;
///
/// This SHALL be the digest of the chosen identityLabel and privacyCA for a new TPM identity
///
-typedef TPM_DIGEST TPM_CHOSENID_HASH;
+typedef TPM_DIGEST TPM_CHOSENID_HASH;
///
/// This SHALL be the hash of a list of PCR indexes and PCR values that a key or data is bound to
///
-typedef TPM_DIGEST TPM_COMPOSITE_HASH;
+typedef TPM_DIGEST TPM_COMPOSITE_HASH;
///
/// This SHALL be the value of a DIR register
///
-typedef TPM_DIGEST TPM_DIRVALUE;
+typedef TPM_DIGEST TPM_DIRVALUE;
-typedef TPM_DIGEST TPM_HMAC;
+typedef TPM_DIGEST TPM_HMAC;
///
/// The value inside of the PCR
///
-typedef TPM_DIGEST TPM_PCRVALUE;
+typedef TPM_DIGEST TPM_PCRVALUE;
///
/// This SHALL be the value of the current internal audit state
///
-typedef TPM_DIGEST TPM_AUDITDIGEST;
+typedef TPM_DIGEST TPM_AUDITDIGEST;
///
/// Part 2, section 5.5: TPM_NONCE
///
-typedef struct tdTPM_NONCE{
- UINT8 nonce[20];
+typedef struct tdTPM_NONCE {
+ UINT8 nonce[20];
} TPM_NONCE;
///
/// This SHALL be a random value generated by a TPM immediately after the EK is installed
/// in that TPM, whenever an EK is installed in that TPM
///
-typedef TPM_NONCE TPM_DAA_TPM_SEED;
+typedef TPM_NONCE TPM_DAA_TPM_SEED;
///
/// This SHALL be a random value
///
-typedef TPM_NONCE TPM_DAA_CONTEXT_SEED;
+typedef TPM_NONCE TPM_DAA_CONTEXT_SEED;
//
// Part 2, section 5.6: TPM_AUTHDATA
@@ -497,25 +489,25 @@
/// The AuthData data is the information that is saved or passed to provide proof of ownership
/// 296 of an entity
///
-typedef UINT8 tdTPM_AUTHDATA[20];
+typedef UINT8 tdTPM_AUTHDATA[20];
-typedef tdTPM_AUTHDATA TPM_AUTHDATA;
+typedef tdTPM_AUTHDATA TPM_AUTHDATA;
///
/// A secret plaintext value used in the authorization process
///
-typedef TPM_AUTHDATA TPM_SECRET;
+typedef TPM_AUTHDATA TPM_SECRET;
///
/// A ciphertext (encrypted) version of AuthData data. The encryption mechanism depends on the context
///
-typedef TPM_AUTHDATA TPM_ENCAUTH;
+typedef TPM_AUTHDATA TPM_ENCAUTH;
///
/// Part 2, section 5.7: TPM_KEY_HANDLE_LIST
/// Size of handle is loaded * sizeof(TPM_KEY_HANDLE)
///
typedef struct tdTPM_KEY_HANDLE_LIST {
- UINT16 loaded;
- TPM_KEY_HANDLE handle[1];
+ UINT16 loaded;
+ TPM_KEY_HANDLE handle[1];
} TPM_KEY_HANDLE_LIST;
//
@@ -526,27 +518,27 @@
/// used for signing operations, only. This means that it MUST be a leaf of the
/// Protected Storage key hierarchy.
///
-#define TPM_KEY_SIGNING ((UINT16) 0x0010)
+#define TPM_KEY_SIGNING ((UINT16) 0x0010)
///
/// TPM_KEY_STORAGE SHALL indicate a storage key. The key SHALL be used to wrap
/// and unwrap other keys in the Protected Storage hierarchy
///
-#define TPM_KEY_STORAGE ((UINT16) 0x0011)
+#define TPM_KEY_STORAGE ((UINT16) 0x0011)
///
/// TPM_KEY_IDENTITY SHALL indicate an identity key. The key SHALL be used for
/// operations that require a TPM identity, only.
///
-#define TPM_KEY_IDENTITY ((UINT16) 0x0012)
+#define TPM_KEY_IDENTITY ((UINT16) 0x0012)
///
/// TPM_KEY_AUTHCHANGE SHALL indicate an ephemeral key that is in use during
/// the ChangeAuthAsym process, only.
///
-#define TPM_KEY_AUTHCHANGE ((UINT16) 0x0013)
+#define TPM_KEY_AUTHCHANGE ((UINT16) 0x0013)
///
/// TPM_KEY_BIND SHALL indicate a key that can be used for TPM_Bind and
/// TPM_Unbind operations only.
///
-#define TPM_KEY_BIND ((UINT16) 0x0014)
+#define TPM_KEY_BIND ((UINT16) 0x0014)
///
/// TPM_KEY_LEGACY SHALL indicate a key that can perform signing and binding
/// operations. The key MAY be used for both signing and binding operations.
@@ -555,11 +547,11 @@
/// key type is not recommended TPM_KEY_MIGRATE 0x0016 This SHALL indicate a
/// key in use for TPM_MigrateKey
///
-#define TPM_KEY_LEGACY ((UINT16) 0x0015)
+#define TPM_KEY_LEGACY ((UINT16) 0x0015)
///
/// TPM_KEY_MIGRAGE SHALL indicate a key in use for TPM_MigrateKey
///
-#define TPM_KEY_MIGRATE ((UINT16) 0x0016)
+#define TPM_KEY_MIGRATE ((UINT16) 0x0016)
//
// Part 2, section 5.8.1: Mandatory Key Usage Schemes
@@ -580,76 +572,76 @@
//
// Part 2, section 5.9: TPM_AUTH_DATA_USAGE values
//
-#define TPM_AUTH_NEVER ((TPM_AUTH_DATA_USAGE) 0x00)
-#define TPM_AUTH_ALWAYS ((TPM_AUTH_DATA_USAGE) 0x01)
-#define TPM_AUTH_PRIV_USE_ONLY ((TPM_AUTH_DATA_USAGE) 0x03)
+#define TPM_AUTH_NEVER ((TPM_AUTH_DATA_USAGE) 0x00)
+#define TPM_AUTH_ALWAYS ((TPM_AUTH_DATA_USAGE) 0x01)
+#define TPM_AUTH_PRIV_USE_ONLY ((TPM_AUTH_DATA_USAGE) 0x03)
///
/// Part 2, section 5.10: TPM_KEY_FLAGS
///
typedef enum tdTPM_KEY_FLAGS {
- redirection = 0x00000001,
- migratable = 0x00000002,
- isVolatile = 0x00000004,
- pcrIgnoredOnRead = 0x00000008,
- migrateAuthority = 0x00000010
+ redirection = 0x00000001,
+ migratable = 0x00000002,
+ isVolatile = 0x00000004,
+ pcrIgnoredOnRead = 0x00000008,
+ migrateAuthority = 0x00000010
} TPM_KEY_FLAGS_BITS;
///
/// Part 2, section 5.11: TPM_CHANGEAUTH_VALIDATE
///
typedef struct tdTPM_CHANGEAUTH_VALIDATE {
- TPM_SECRET newAuthSecret;
- TPM_NONCE n1;
+ TPM_SECRET newAuthSecret;
+ TPM_NONCE n1;
} TPM_CHANGEAUTH_VALIDATE;
///
/// Part 2, section 5.12: TPM_MIGRATIONKEYAUTH
-/// decalared after section 10 to catch declaration of TPM_PUBKEY
+/// declared after section 10 to catch declaration of TPM_PUBKEY
///
/// Part 2 section 10.1: TPM_KEY_PARMS
/// [size_is(parmSize)] BYTE* parms;
///
typedef struct tdTPM_KEY_PARMS {
- TPM_ALGORITHM_ID algorithmID;
- TPM_ENC_SCHEME encScheme;
- TPM_SIG_SCHEME sigScheme;
- UINT32 parmSize;
- UINT8 *parms;
+ TPM_ALGORITHM_ID algorithmID;
+ TPM_ENC_SCHEME encScheme;
+ TPM_SIG_SCHEME sigScheme;
+ UINT32 parmSize;
+ UINT8 *parms;
} TPM_KEY_PARMS;
///
/// Part 2, section 10.4: TPM_STORE_PUBKEY
///
typedef struct tdTPM_STORE_PUBKEY {
- UINT32 keyLength;
- UINT8 key[1];
+ UINT32 keyLength;
+ UINT8 key[1];
} TPM_STORE_PUBKEY;
///
/// Part 2, section 10.5: TPM_PUBKEY
///
-typedef struct tdTPM_PUBKEY{
- TPM_KEY_PARMS algorithmParms;
- TPM_STORE_PUBKEY pubKey;
+typedef struct tdTPM_PUBKEY {
+ TPM_KEY_PARMS algorithmParms;
+ TPM_STORE_PUBKEY pubKey;
} TPM_PUBKEY;
///
/// Part 2, section 5.12: TPM_MIGRATIONKEYAUTH
///
-typedef struct tdTPM_MIGRATIONKEYAUTH{
- TPM_PUBKEY migrationKey;
- TPM_MIGRATE_SCHEME migrationScheme;
- TPM_DIGEST digest;
+typedef struct tdTPM_MIGRATIONKEYAUTH {
+ TPM_PUBKEY migrationKey;
+ TPM_MIGRATE_SCHEME migrationScheme;
+ TPM_DIGEST digest;
} TPM_MIGRATIONKEYAUTH;
///
/// Part 2, section 5.13: TPM_COUNTER_VALUE
///
-typedef struct tdTPM_COUNTER_VALUE{
- TPM_STRUCTURE_TAG tag;
- UINT8 label[4];
- TPM_ACTUAL_COUNT counter;
+typedef struct tdTPM_COUNTER_VALUE {
+ TPM_STRUCTURE_TAG tag;
+ UINT8 label[4];
+ TPM_ACTUAL_COUNT counter;
} TPM_COUNTER_VALUE;
///
@@ -657,11 +649,11 @@
/// Size of data indicated by dataLen
///
typedef struct tdTPM_SIGN_INFO {
- TPM_STRUCTURE_TAG tag;
- UINT8 fixed[4];
- TPM_NONCE replay;
- UINT32 dataLen;
- UINT8 *data;
+ TPM_STRUCTURE_TAG tag;
+ UINT8 fixed[4];
+ TPM_NONCE replay;
+ UINT32 dataLen;
+ UINT8 *data;
} TPM_SIGN_INFO;
///
@@ -669,163 +661,163 @@
/// Number of migAuthDigest indicated by MSAlist
///
typedef struct tdTPM_MSA_COMPOSITE {
- UINT32 MSAlist;
- TPM_DIGEST migAuthDigest[1];
+ UINT32 MSAlist;
+ TPM_DIGEST migAuthDigest[1];
} TPM_MSA_COMPOSITE;
///
/// Part 2, section 5.16: TPM_CMK_AUTH
///
-typedef struct tdTPM_CMK_AUTH{
- TPM_DIGEST migrationAuthorityDigest;
- TPM_DIGEST destinationKeyDigest;
- TPM_DIGEST sourceKeyDigest;
+typedef struct tdTPM_CMK_AUTH {
+ TPM_DIGEST migrationAuthorityDigest;
+ TPM_DIGEST destinationKeyDigest;
+ TPM_DIGEST sourceKeyDigest;
} TPM_CMK_AUTH;
//
// Part 2, section 5.17: TPM_CMK_DELEGATE
//
-#define TPM_CMK_DELEGATE_SIGNING ((TPM_CMK_DELEGATE) BIT31)
-#define TPM_CMK_DELEGATE_STORAGE ((TPM_CMK_DELEGATE) BIT30)
-#define TPM_CMK_DELEGATE_BIND ((TPM_CMK_DELEGATE) BIT29)
-#define TPM_CMK_DELEGATE_LEGACY ((TPM_CMK_DELEGATE) BIT28)
-#define TPM_CMK_DELEGATE_MIGRATE ((TPM_CMK_DELEGATE) BIT27)
+#define TPM_CMK_DELEGATE_SIGNING ((TPM_CMK_DELEGATE) BIT31)
+#define TPM_CMK_DELEGATE_STORAGE ((TPM_CMK_DELEGATE) BIT30)
+#define TPM_CMK_DELEGATE_BIND ((TPM_CMK_DELEGATE) BIT29)
+#define TPM_CMK_DELEGATE_LEGACY ((TPM_CMK_DELEGATE) BIT28)
+#define TPM_CMK_DELEGATE_MIGRATE ((TPM_CMK_DELEGATE) BIT27)
///
/// Part 2, section 5.18: TPM_SELECT_SIZE
///
typedef struct tdTPM_SELECT_SIZE {
- UINT8 major;
- UINT8 minor;
- UINT16 reqSize;
+ UINT8 major;
+ UINT8 minor;
+ UINT16 reqSize;
} TPM_SELECT_SIZE;
///
/// Part 2, section 5,19: TPM_CMK_MIGAUTH
///
-typedef struct tdTPM_CMK_MIGAUTH{
- TPM_STRUCTURE_TAG tag;
- TPM_DIGEST msaDigest;
- TPM_DIGEST pubKeyDigest;
+typedef struct tdTPM_CMK_MIGAUTH {
+ TPM_STRUCTURE_TAG tag;
+ TPM_DIGEST msaDigest;
+ TPM_DIGEST pubKeyDigest;
} TPM_CMK_MIGAUTH;
///
/// Part 2, section 5.20: TPM_CMK_SIGTICKET
///
-typedef struct tdTPM_CMK_SIGTICKET{
- TPM_STRUCTURE_TAG tag;
- TPM_DIGEST verKeyDigest;
- TPM_DIGEST signedData;
+typedef struct tdTPM_CMK_SIGTICKET {
+ TPM_STRUCTURE_TAG tag;
+ TPM_DIGEST verKeyDigest;
+ TPM_DIGEST signedData;
} TPM_CMK_SIGTICKET;
///
/// Part 2, section 5.21: TPM_CMK_MA_APPROVAL
///
-typedef struct tdTPM_CMK_MA_APPROVAL{
- TPM_STRUCTURE_TAG tag;
- TPM_DIGEST migrationAuthorityDigest;
+typedef struct tdTPM_CMK_MA_APPROVAL {
+ TPM_STRUCTURE_TAG tag;
+ TPM_DIGEST migrationAuthorityDigest;
} TPM_CMK_MA_APPROVAL;
//
// Part 2, section 6: Command Tags
//
-#define TPM_TAG_RQU_COMMAND ((TPM_STRUCTURE_TAG) 0x00C1)
-#define TPM_TAG_RQU_AUTH1_COMMAND ((TPM_STRUCTURE_TAG) 0x00C2)
-#define TPM_TAG_RQU_AUTH2_COMMAND ((TPM_STRUCTURE_TAG) 0x00C3)
-#define TPM_TAG_RSP_COMMAND ((TPM_STRUCTURE_TAG) 0x00C4)
-#define TPM_TAG_RSP_AUTH1_COMMAND ((TPM_STRUCTURE_TAG) 0x00C5)
-#define TPM_TAG_RSP_AUTH2_COMMAND ((TPM_STRUCTURE_TAG) 0x00C6)
+#define TPM_TAG_RQU_COMMAND ((TPM_STRUCTURE_TAG) 0x00C1)
+#define TPM_TAG_RQU_AUTH1_COMMAND ((TPM_STRUCTURE_TAG) 0x00C2)
+#define TPM_TAG_RQU_AUTH2_COMMAND ((TPM_STRUCTURE_TAG) 0x00C3)
+#define TPM_TAG_RSP_COMMAND ((TPM_STRUCTURE_TAG) 0x00C4)
+#define TPM_TAG_RSP_AUTH1_COMMAND ((TPM_STRUCTURE_TAG) 0x00C5)
+#define TPM_TAG_RSP_AUTH2_COMMAND ((TPM_STRUCTURE_TAG) 0x00C6)
///
/// Part 2, section 7.1: TPM_PERMANENT_FLAGS
///
-typedef struct tdTPM_PERMANENT_FLAGS{
- TPM_STRUCTURE_TAG tag;
- BOOLEAN disable;
- BOOLEAN ownership;
- BOOLEAN deactivated;
- BOOLEAN readPubek;
- BOOLEAN disableOwnerClear;
- BOOLEAN allowMaintenance;
- BOOLEAN physicalPresenceLifetimeLock;
- BOOLEAN physicalPresenceHWEnable;
- BOOLEAN physicalPresenceCMDEnable;
- BOOLEAN CEKPUsed;
- BOOLEAN TPMpost;
- BOOLEAN TPMpostLock;
- BOOLEAN FIPS;
+typedef struct tdTPM_PERMANENT_FLAGS {
+ TPM_STRUCTURE_TAG tag;
+ BOOLEAN disable;
+ BOOLEAN ownership;
+ BOOLEAN deactivated;
+ BOOLEAN readPubek;
+ BOOLEAN disableOwnerClear;
+ BOOLEAN allowMaintenance;
+ BOOLEAN physicalPresenceLifetimeLock;
+ BOOLEAN physicalPresenceHWEnable;
+ BOOLEAN physicalPresenceCMDEnable;
+ BOOLEAN CEKPUsed;
+ BOOLEAN TPMpost;
+ BOOLEAN TPMpostLock;
+ BOOLEAN FIPS;
BOOLEAN operator;
BOOLEAN enableRevokeEK;
- BOOLEAN nvLocked;
- BOOLEAN readSRKPub;
- BOOLEAN tpmEstablished;
- BOOLEAN maintenanceDone;
- BOOLEAN disableFullDALogicInfo;
+ BOOLEAN nvLocked;
+ BOOLEAN readSRKPub;
+ BOOLEAN tpmEstablished;
+ BOOLEAN maintenanceDone;
+ BOOLEAN disableFullDALogicInfo;
} TPM_PERMANENT_FLAGS;
//
// Part 2, section 7.1.1: Flag Restrictions (of TPM_PERMANENT_FLAGS)
//
-#define TPM_PF_DISABLE ((TPM_CAPABILITY_AREA) 1)
-#define TPM_PF_OWNERSHIP ((TPM_CAPABILITY_AREA) 2)
-#define TPM_PF_DEACTIVATED ((TPM_CAPABILITY_AREA) 3)
-#define TPM_PF_READPUBEK ((TPM_CAPABILITY_AREA) 4)
-#define TPM_PF_DISABLEOWNERCLEAR ((TPM_CAPABILITY_AREA) 5)
-#define TPM_PF_ALLOWMAINTENANCE ((TPM_CAPABILITY_AREA) 6)
-#define TPM_PF_PHYSICALPRESENCELIFETIMELOCK ((TPM_CAPABILITY_AREA) 7)
-#define TPM_PF_PHYSICALPRESENCEHWENABLE ((TPM_CAPABILITY_AREA) 8)
-#define TPM_PF_PHYSICALPRESENCECMDENABLE ((TPM_CAPABILITY_AREA) 9)
-#define TPM_PF_CEKPUSED ((TPM_CAPABILITY_AREA) 10)
-#define TPM_PF_TPMPOST ((TPM_CAPABILITY_AREA) 11)
-#define TPM_PF_TPMPOSTLOCK ((TPM_CAPABILITY_AREA) 12)
-#define TPM_PF_FIPS ((TPM_CAPABILITY_AREA) 13)
-#define TPM_PF_OPERATOR ((TPM_CAPABILITY_AREA) 14)
-#define TPM_PF_ENABLEREVOKEEK ((TPM_CAPABILITY_AREA) 15)
-#define TPM_PF_NV_LOCKED ((TPM_CAPABILITY_AREA) 16)
-#define TPM_PF_READSRKPUB ((TPM_CAPABILITY_AREA) 17)
-#define TPM_PF_TPMESTABLISHED ((TPM_CAPABILITY_AREA) 18)
-#define TPM_PF_MAINTENANCEDONE ((TPM_CAPABILITY_AREA) 19)
-#define TPM_PF_DISABLEFULLDALOGICINFO ((TPM_CAPABILITY_AREA) 20)
+#define TPM_PF_DISABLE ((TPM_CAPABILITY_AREA) 1)
+#define TPM_PF_OWNERSHIP ((TPM_CAPABILITY_AREA) 2)
+#define TPM_PF_DEACTIVATED ((TPM_CAPABILITY_AREA) 3)
+#define TPM_PF_READPUBEK ((TPM_CAPABILITY_AREA) 4)
+#define TPM_PF_DISABLEOWNERCLEAR ((TPM_CAPABILITY_AREA) 5)
+#define TPM_PF_ALLOWMAINTENANCE ((TPM_CAPABILITY_AREA) 6)
+#define TPM_PF_PHYSICALPRESENCELIFETIMELOCK ((TPM_CAPABILITY_AREA) 7)
+#define TPM_PF_PHYSICALPRESENCEHWENABLE ((TPM_CAPABILITY_AREA) 8)
+#define TPM_PF_PHYSICALPRESENCECMDENABLE ((TPM_CAPABILITY_AREA) 9)
+#define TPM_PF_CEKPUSED ((TPM_CAPABILITY_AREA) 10)
+#define TPM_PF_TPMPOST ((TPM_CAPABILITY_AREA) 11)
+#define TPM_PF_TPMPOSTLOCK ((TPM_CAPABILITY_AREA) 12)
+#define TPM_PF_FIPS ((TPM_CAPABILITY_AREA) 13)
+#define TPM_PF_OPERATOR ((TPM_CAPABILITY_AREA) 14)
+#define TPM_PF_ENABLEREVOKEEK ((TPM_CAPABILITY_AREA) 15)
+#define TPM_PF_NV_LOCKED ((TPM_CAPABILITY_AREA) 16)
+#define TPM_PF_READSRKPUB ((TPM_CAPABILITY_AREA) 17)
+#define TPM_PF_TPMESTABLISHED ((TPM_CAPABILITY_AREA) 18)
+#define TPM_PF_MAINTENANCEDONE ((TPM_CAPABILITY_AREA) 19)
+#define TPM_PF_DISABLEFULLDALOGICINFO ((TPM_CAPABILITY_AREA) 20)
///
/// Part 2, section 7.2: TPM_STCLEAR_FLAGS
///
-typedef struct tdTPM_STCLEAR_FLAGS{
- TPM_STRUCTURE_TAG tag;
- BOOLEAN deactivated;
- BOOLEAN disableForceClear;
- BOOLEAN physicalPresence;
- BOOLEAN physicalPresenceLock;
- BOOLEAN bGlobalLock;
+typedef struct tdTPM_STCLEAR_FLAGS {
+ TPM_STRUCTURE_TAG tag;
+ BOOLEAN deactivated;
+ BOOLEAN disableForceClear;
+ BOOLEAN physicalPresence;
+ BOOLEAN physicalPresenceLock;
+ BOOLEAN bGlobalLock;
} TPM_STCLEAR_FLAGS;
//
// Part 2, section 7.2.1: Flag Restrictions (of TPM_STCLEAR_FLAGS)
//
-#define TPM_SF_DEACTIVATED ((TPM_CAPABILITY_AREA) 1)
-#define TPM_SF_DISABLEFORCECLEAR ((TPM_CAPABILITY_AREA) 2)
-#define TPM_SF_PHYSICALPRESENCE ((TPM_CAPABILITY_AREA) 3)
-#define TPM_SF_PHYSICALPRESENCELOCK ((TPM_CAPABILITY_AREA) 4)
-#define TPM_SF_BGLOBALLOCK ((TPM_CAPABILITY_AREA) 5)
+#define TPM_SF_DEACTIVATED ((TPM_CAPABILITY_AREA) 1)
+#define TPM_SF_DISABLEFORCECLEAR ((TPM_CAPABILITY_AREA) 2)
+#define TPM_SF_PHYSICALPRESENCE ((TPM_CAPABILITY_AREA) 3)
+#define TPM_SF_PHYSICALPRESENCELOCK ((TPM_CAPABILITY_AREA) 4)
+#define TPM_SF_BGLOBALLOCK ((TPM_CAPABILITY_AREA) 5)
///
/// Part 2, section 7.3: TPM_STANY_FLAGS
///
-typedef struct tdTPM_STANY_FLAGS{
- TPM_STRUCTURE_TAG tag;
- BOOLEAN postInitialise;
- TPM_MODIFIER_INDICATOR localityModifier;
- BOOLEAN transportExclusive;
- BOOLEAN TOSPresent;
+typedef struct tdTPM_STANY_FLAGS {
+ TPM_STRUCTURE_TAG tag;
+ BOOLEAN postInitialise;
+ TPM_MODIFIER_INDICATOR localityModifier;
+ BOOLEAN transportExclusive;
+ BOOLEAN TOSPresent;
} TPM_STANY_FLAGS;
//
// Part 2, section 7.3.1: Flag Restrictions (of TPM_STANY_FLAGS)
//
-#define TPM_AF_POSTINITIALISE ((TPM_CAPABILITY_AREA) 1)
-#define TPM_AF_LOCALITYMODIFIER ((TPM_CAPABILITY_AREA) 2)
-#define TPM_AF_TRANSPORTEXCLUSIVE ((TPM_CAPABILITY_AREA) 3)
-#define TPM_AF_TOSPRESENT ((TPM_CAPABILITY_AREA) 4)
+#define TPM_AF_POSTINITIALISE ((TPM_CAPABILITY_AREA) 1)
+#define TPM_AF_LOCALITYMODIFIER ((TPM_CAPABILITY_AREA) 2)
+#define TPM_AF_TRANSPORTEXCLUSIVE ((TPM_CAPABILITY_AREA) 3)
+#define TPM_AF_TOSPRESENT ((TPM_CAPABILITY_AREA) 4)
//
// All those structures defined in section 7.4, 7.5, 7.6 are not normative and
@@ -833,10 +825,10 @@
//
// Part 2, section 7.4: TPM_PERMANENT_DATA
//
-#define TPM_MIN_COUNTERS 4 ///< the minimum number of counters is 4
-#define TPM_DELEGATE_KEY TPM_KEY
-#define TPM_NUM_PCR 16
-#define TPM_MAX_NV_WRITE_NOOWNER 64
+#define TPM_MIN_COUNTERS 4 ///< the minimum number of counters is 4
+#define TPM_DELEGATE_KEY TPM_KEY
+#define TPM_NUM_PCR 16
+#define TPM_MAX_NV_WRITE_NOOWNER 64
//
// Part 2, section 7.4.1: PERMANENT_DATA Subcap for SetCapability
@@ -871,35 +863,35 @@
/// Part 2, section 7.5: TPM_STCLEAR_DATA
/// available inside TPM only
///
- typedef struct tdTPM_STCLEAR_DATA{
- TPM_STRUCTURE_TAG tag;
- TPM_NONCE contextNonceKey;
- TPM_COUNT_ID countID;
- UINT32 ownerReference;
- BOOLEAN disableResetLock;
- TPM_PCRVALUE PCR[TPM_NUM_PCR];
- UINT32 deferredPhysicalPresence;
- }TPM_STCLEAR_DATA;
+typedef struct tdTPM_STCLEAR_DATA {
+ TPM_STRUCTURE_TAG tag;
+ TPM_NONCE contextNonceKey;
+ TPM_COUNT_ID countID;
+ UINT32 ownerReference;
+ BOOLEAN disableResetLock;
+ TPM_PCRVALUE PCR[TPM_NUM_PCR];
+ UINT32 deferredPhysicalPresence;
+} TPM_STCLEAR_DATA;
//
// Part 2, section 7.5.1: STCLEAR_DATA Subcap for SetCapability
//
-#define TPM_SD_CONTEXTNONCEKEY ((TPM_CAPABILITY_AREA)0x00000001)
-#define TPM_SD_COUNTID ((TPM_CAPABILITY_AREA)0x00000002)
-#define TPM_SD_OWNERREFERENCE ((TPM_CAPABILITY_AREA)0x00000003)
-#define TPM_SD_DISABLERESETLOCK ((TPM_CAPABILITY_AREA)0x00000004)
-#define TPM_SD_PCR ((TPM_CAPABILITY_AREA)0x00000005)
-#define TPM_SD_DEFERREDPHYSICALPRESENCE ((TPM_CAPABILITY_AREA)0x00000006)
+#define TPM_SD_CONTEXTNONCEKEY ((TPM_CAPABILITY_AREA)0x00000001)
+#define TPM_SD_COUNTID ((TPM_CAPABILITY_AREA)0x00000002)
+#define TPM_SD_OWNERREFERENCE ((TPM_CAPABILITY_AREA)0x00000003)
+#define TPM_SD_DISABLERESETLOCK ((TPM_CAPABILITY_AREA)0x00000004)
+#define TPM_SD_PCR ((TPM_CAPABILITY_AREA)0x00000005)
+#define TPM_SD_DEFERREDPHYSICALPRESENCE ((TPM_CAPABILITY_AREA)0x00000006)
//
// Part 2, section 7.6.1: STANY_DATA Subcap for SetCapability
//
-#define TPM_AD_CONTEXTNONCESESSION ((TPM_CAPABILITY_AREA) 1)
-#define TPM_AD_AUDITDIGEST ((TPM_CAPABILITY_AREA) 2)
-#define TPM_AD_CURRENTTICKS ((TPM_CAPABILITY_AREA) 3)
-#define TPM_AD_CONTEXTCOUNT ((TPM_CAPABILITY_AREA) 4)
-#define TPM_AD_CONTEXTLIST ((TPM_CAPABILITY_AREA) 5)
-#define TPM_AD_SESSIONS ((TPM_CAPABILITY_AREA) 6)
+#define TPM_AD_CONTEXTNONCESESSION ((TPM_CAPABILITY_AREA) 1)
+#define TPM_AD_AUDITDIGEST ((TPM_CAPABILITY_AREA) 2)
+#define TPM_AD_CURRENTTICKS ((TPM_CAPABILITY_AREA) 3)
+#define TPM_AD_CONTEXTCOUNT ((TPM_CAPABILITY_AREA) 4)
+#define TPM_AD_CONTEXTLIST ((TPM_CAPABILITY_AREA) 5)
+#define TPM_AD_SESSIONS ((TPM_CAPABILITY_AREA) 6)
//
// Part 2, section 8: PCR Structures
@@ -910,8 +902,8 @@
/// Size of pcrSelect[] indicated by sizeOfSelect
///
typedef struct tdTPM_PCR_SELECTION {
- UINT16 sizeOfSelect;
- UINT8 pcrSelect[1];
+ UINT16 sizeOfSelect;
+ UINT8 pcrSelect[1];
} TPM_PCR_SELECTION;
///
@@ -919,60 +911,60 @@
/// Size of pcrValue[] indicated by valueSize
///
typedef struct tdTPM_PCR_COMPOSITE {
- TPM_PCR_SELECTION select;
- UINT32 valueSize;
- TPM_PCRVALUE pcrValue[1];
+ TPM_PCR_SELECTION select;
+ UINT32 valueSize;
+ TPM_PCRVALUE pcrValue[1];
} TPM_PCR_COMPOSITE;
///
/// Part 2, section 8.3: TPM_PCR_INFO
///
typedef struct tdTPM_PCR_INFO {
- TPM_PCR_SELECTION pcrSelection;
- TPM_COMPOSITE_HASH digestAtRelease;
- TPM_COMPOSITE_HASH digestAtCreation;
+ TPM_PCR_SELECTION pcrSelection;
+ TPM_COMPOSITE_HASH digestAtRelease;
+ TPM_COMPOSITE_HASH digestAtCreation;
} TPM_PCR_INFO;
///
/// Part 2, section 8.6: TPM_LOCALITY_SELECTION
///
-typedef UINT8 TPM_LOCALITY_SELECTION;
+typedef UINT8 TPM_LOCALITY_SELECTION;
-#define TPM_LOC_FOUR ((UINT8) 0x10)
-#define TPM_LOC_THREE ((UINT8) 0x08)
-#define TPM_LOC_TWO ((UINT8) 0x04)
-#define TPM_LOC_ONE ((UINT8) 0x02)
-#define TPM_LOC_ZERO ((UINT8) 0x01)
+#define TPM_LOC_FOUR ((UINT8) 0x10)
+#define TPM_LOC_THREE ((UINT8) 0x08)
+#define TPM_LOC_TWO ((UINT8) 0x04)
+#define TPM_LOC_ONE ((UINT8) 0x02)
+#define TPM_LOC_ZERO ((UINT8) 0x01)
///
/// Part 2, section 8.4: TPM_PCR_INFO_LONG
///
typedef struct tdTPM_PCR_INFO_LONG {
- TPM_STRUCTURE_TAG tag;
- TPM_LOCALITY_SELECTION localityAtCreation;
- TPM_LOCALITY_SELECTION localityAtRelease;
- TPM_PCR_SELECTION creationPCRSelection;
- TPM_PCR_SELECTION releasePCRSelection;
- TPM_COMPOSITE_HASH digestAtCreation;
- TPM_COMPOSITE_HASH digestAtRelease;
+ TPM_STRUCTURE_TAG tag;
+ TPM_LOCALITY_SELECTION localityAtCreation;
+ TPM_LOCALITY_SELECTION localityAtRelease;
+ TPM_PCR_SELECTION creationPCRSelection;
+ TPM_PCR_SELECTION releasePCRSelection;
+ TPM_COMPOSITE_HASH digestAtCreation;
+ TPM_COMPOSITE_HASH digestAtRelease;
} TPM_PCR_INFO_LONG;
///
/// Part 2, section 8.5: TPM_PCR_INFO_SHORT
///
-typedef struct tdTPM_PCR_INFO_SHORT{
- TPM_PCR_SELECTION pcrSelection;
- TPM_LOCALITY_SELECTION localityAtRelease;
- TPM_COMPOSITE_HASH digestAtRelease;
+typedef struct tdTPM_PCR_INFO_SHORT {
+ TPM_PCR_SELECTION pcrSelection;
+ TPM_LOCALITY_SELECTION localityAtRelease;
+ TPM_COMPOSITE_HASH digestAtRelease;
} TPM_PCR_INFO_SHORT;
///
/// Part 2, section 8.8: TPM_PCR_ATTRIBUTES
///
-typedef struct tdTPM_PCR_ATTRIBUTES{
- BOOLEAN pcrReset;
- TPM_LOCALITY_SELECTION pcrExtendLocal;
- TPM_LOCALITY_SELECTION pcrResetLocal;
+typedef struct tdTPM_PCR_ATTRIBUTES {
+ BOOLEAN pcrReset;
+ TPM_LOCALITY_SELECTION pcrExtendLocal;
+ TPM_LOCALITY_SELECTION pcrResetLocal;
} TPM_PCR_ATTRIBUTES;
//
@@ -985,11 +977,11 @@
/// [size_is(encDataSize)] BYTE* encData;
///
typedef struct tdTPM_STORED_DATA {
- TPM_STRUCT_VER ver;
- UINT32 sealInfoSize;
- UINT8 *sealInfo;
- UINT32 encDataSize;
- UINT8 *encData;
+ TPM_STRUCT_VER ver;
+ UINT32 sealInfoSize;
+ UINT8 *sealInfo;
+ UINT32 encDataSize;
+ UINT8 *encData;
} TPM_STORED_DATA;
///
@@ -998,12 +990,12 @@
/// [size_is(encDataSize)] BYTE* encData;
///
typedef struct tdTPM_STORED_DATA12 {
- TPM_STRUCTURE_TAG tag;
- TPM_ENTITY_TYPE et;
- UINT32 sealInfoSize;
- UINT8 *sealInfo;
- UINT32 encDataSize;
- UINT8 *encData;
+ TPM_STRUCTURE_TAG tag;
+ TPM_ENTITY_TYPE et;
+ UINT32 sealInfoSize;
+ UINT8 *sealInfo;
+ UINT32 encDataSize;
+ UINT8 *encData;
} TPM_STORED_DATA12;
///
@@ -1011,12 +1003,12 @@
/// [size_is(dataSize)] BYTE* data;
///
typedef struct tdTPM_SEALED_DATA {
- TPM_PAYLOAD_TYPE payload;
- TPM_SECRET authData;
- TPM_NONCE tpmProof;
- TPM_DIGEST storedDigest;
- UINT32 dataSize;
- UINT8 *data;
+ TPM_PAYLOAD_TYPE payload;
+ TPM_SECRET authData;
+ TPM_NONCE tpmProof;
+ TPM_DIGEST storedDigest;
+ UINT32 dataSize;
+ UINT8 *data;
} TPM_SEALED_DATA;
///
@@ -1024,19 +1016,19 @@
/// [size_is(size)] BYTE* data;
///
typedef struct tdTPM_SYMMETRIC_KEY {
- TPM_ALGORITHM_ID algId;
- TPM_ENC_SCHEME encScheme;
- UINT16 dataSize;
- UINT8 *data;
+ TPM_ALGORITHM_ID algId;
+ TPM_ENC_SCHEME encScheme;
+ UINT16 dataSize;
+ UINT8 *data;
} TPM_SYMMETRIC_KEY;
///
/// Part 2, section 9.5: TPM_BOUND_DATA
///
typedef struct tdTPM_BOUND_DATA {
- TPM_STRUCT_VER ver;
- TPM_PAYLOAD_TYPE payload;
- UINT8 payloadData[1];
+ TPM_STRUCT_VER ver;
+ TPM_PAYLOAD_TYPE payload;
+ UINT8 payloadData[1];
} TPM_BOUND_DATA;
//
@@ -1051,35 +1043,35 @@
/// Part 2, section 10.2: TPM_KEY
/// [size_is(encDataSize)] BYTE* encData;
///
-typedef struct tdTPM_KEY{
- TPM_STRUCT_VER ver;
- TPM_KEY_USAGE keyUsage;
- TPM_KEY_FLAGS keyFlags;
- TPM_AUTH_DATA_USAGE authDataUsage;
- TPM_KEY_PARMS algorithmParms;
- UINT32 PCRInfoSize;
- UINT8 *PCRInfo;
- TPM_STORE_PUBKEY pubKey;
- UINT32 encDataSize;
- UINT8 *encData;
+typedef struct tdTPM_KEY {
+ TPM_STRUCT_VER ver;
+ TPM_KEY_USAGE keyUsage;
+ TPM_KEY_FLAGS keyFlags;
+ TPM_AUTH_DATA_USAGE authDataUsage;
+ TPM_KEY_PARMS algorithmParms;
+ UINT32 PCRInfoSize;
+ UINT8 *PCRInfo;
+ TPM_STORE_PUBKEY pubKey;
+ UINT32 encDataSize;
+ UINT8 *encData;
} TPM_KEY;
///
/// Part 2, section 10.3: TPM_KEY12
/// [size_is(encDataSize)] BYTE* encData;
///
-typedef struct tdTPM_KEY12{
- TPM_STRUCTURE_TAG tag;
- UINT16 fill;
- TPM_KEY_USAGE keyUsage;
- TPM_KEY_FLAGS keyFlags;
- TPM_AUTH_DATA_USAGE authDataUsage;
- TPM_KEY_PARMS algorithmParms;
- UINT32 PCRInfoSize;
- UINT8 *PCRInfo;
- TPM_STORE_PUBKEY pubKey;
- UINT32 encDataSize;
- UINT8 *encData;
+typedef struct tdTPM_KEY12 {
+ TPM_STRUCTURE_TAG tag;
+ UINT16 fill;
+ TPM_KEY_USAGE keyUsage;
+ TPM_KEY_FLAGS keyFlags;
+ TPM_AUTH_DATA_USAGE authDataUsage;
+ TPM_KEY_PARMS algorithmParms;
+ UINT32 PCRInfoSize;
+ UINT8 *PCRInfo;
+ TPM_STORE_PUBKEY pubKey;
+ UINT32 encDataSize;
+ UINT8 *encData;
} TPM_KEY12;
///
@@ -1087,37 +1079,39 @@
/// [size_is(keyLength)] BYTE* key;
///
typedef struct tdTPM_STORE_PRIVKEY {
- UINT32 keyLength;
- UINT8 *key;
+ UINT32 keyLength;
+ UINT8 *key;
} TPM_STORE_PRIVKEY;
///
/// Part 2, section 10.6: TPM_STORE_ASYMKEY
///
-typedef struct tdTPM_STORE_ASYMKEY { // pos len total
- TPM_PAYLOAD_TYPE payload; // 0 1 1
- TPM_SECRET usageAuth; // 1 20 21
- TPM_SECRET migrationAuth; // 21 20 41
- TPM_DIGEST pubDataDigest; // 41 20 61
- TPM_STORE_PRIVKEY privKey; // 61 132-151 193-214
+typedef struct tdTPM_STORE_ASYMKEY {
+ // pos len total
+ TPM_PAYLOAD_TYPE payload; // 0 1 1
+ TPM_SECRET usageAuth; // 1 20 21
+ TPM_SECRET migrationAuth; // 21 20 41
+ TPM_DIGEST pubDataDigest; // 41 20 61
+ TPM_STORE_PRIVKEY privKey; // 61 132-151 193-214
} TPM_STORE_ASYMKEY;
///
/// Part 2, section 10.8: TPM_MIGRATE_ASYMKEY
/// [size_is(partPrivKeyLen)] BYTE* partPrivKey;
///
-typedef struct tdTPM_MIGRATE_ASYMKEY { // pos len total
- TPM_PAYLOAD_TYPE payload; // 0 1 1
- TPM_SECRET usageAuth; // 1 20 21
- TPM_DIGEST pubDataDigest; // 21 20 41
- UINT32 partPrivKeyLen; // 41 4 45
- UINT8 *partPrivKey; // 45 112-127 157-172
+typedef struct tdTPM_MIGRATE_ASYMKEY {
+ // pos len total
+ TPM_PAYLOAD_TYPE payload; // 0 1 1
+ TPM_SECRET usageAuth; // 1 20 21
+ TPM_DIGEST pubDataDigest; // 21 20 41
+ UINT32 partPrivKeyLen; // 41 4 45
+ UINT8 *partPrivKey; // 45 112-127 157-172
} TPM_MIGRATE_ASYMKEY;
///
/// Part 2, section 10.9: TPM_KEY_CONTROL
///
-#define TPM_KEY_CONTROL_OWNER_EVICT ((UINT32) 0x00000001)
+#define TPM_KEY_CONTROL_OWNER_EVICT ((UINT32) 0x00000001)
//
// Part 2, section 11: Signed Structures
@@ -1127,56 +1121,56 @@
/// Part 2, section 11.1: TPM_CERTIFY_INFO Structure
///
typedef struct tdTPM_CERTIFY_INFO {
- TPM_STRUCT_VER version;
- TPM_KEY_USAGE keyUsage;
- TPM_KEY_FLAGS keyFlags;
- TPM_AUTH_DATA_USAGE authDataUsage;
- TPM_KEY_PARMS algorithmParms;
- TPM_DIGEST pubkeyDigest;
- TPM_NONCE data;
- BOOLEAN parentPCRStatus;
- UINT32 PCRInfoSize;
- UINT8 *PCRInfo;
+ TPM_STRUCT_VER version;
+ TPM_KEY_USAGE keyUsage;
+ TPM_KEY_FLAGS keyFlags;
+ TPM_AUTH_DATA_USAGE authDataUsage;
+ TPM_KEY_PARMS algorithmParms;
+ TPM_DIGEST pubkeyDigest;
+ TPM_NONCE data;
+ BOOLEAN parentPCRStatus;
+ UINT32 PCRInfoSize;
+ UINT8 *PCRInfo;
} TPM_CERTIFY_INFO;
///
/// Part 2, section 11.2: TPM_CERTIFY_INFO2 Structure
///
typedef struct tdTPM_CERTIFY_INFO2 {
- TPM_STRUCTURE_TAG tag;
- UINT8 fill;
- TPM_PAYLOAD_TYPE payloadType;
- TPM_KEY_USAGE keyUsage;
- TPM_KEY_FLAGS keyFlags;
- TPM_AUTH_DATA_USAGE authDataUsage;
- TPM_KEY_PARMS algorithmParms;
- TPM_DIGEST pubkeyDigest;
- TPM_NONCE data;
- BOOLEAN parentPCRStatus;
- UINT32 PCRInfoSize;
- UINT8 *PCRInfo;
- UINT32 migrationAuthoritySize;
- UINT8 *migrationAuthority;
+ TPM_STRUCTURE_TAG tag;
+ UINT8 fill;
+ TPM_PAYLOAD_TYPE payloadType;
+ TPM_KEY_USAGE keyUsage;
+ TPM_KEY_FLAGS keyFlags;
+ TPM_AUTH_DATA_USAGE authDataUsage;
+ TPM_KEY_PARMS algorithmParms;
+ TPM_DIGEST pubkeyDigest;
+ TPM_NONCE data;
+ BOOLEAN parentPCRStatus;
+ UINT32 PCRInfoSize;
+ UINT8 *PCRInfo;
+ UINT32 migrationAuthoritySize;
+ UINT8 *migrationAuthority;
} TPM_CERTIFY_INFO2;
///
/// Part 2, section 11.3 TPM_QUOTE_INFO Structure
///
typedef struct tdTPM_QUOTE_INFO {
- TPM_STRUCT_VER version;
- UINT8 fixed[4];
- TPM_COMPOSITE_HASH digestValue;
- TPM_NONCE externalData;
+ TPM_STRUCT_VER version;
+ UINT8 fixed[4];
+ TPM_COMPOSITE_HASH digestValue;
+ TPM_NONCE externalData;
} TPM_QUOTE_INFO;
///
/// Part 2, section 11.4 TPM_QUOTE_INFO2 Structure
///
typedef struct tdTPM_QUOTE_INFO2 {
- TPM_STRUCTURE_TAG tag;
- UINT8 fixed[4];
- TPM_NONCE externalData;
- TPM_PCR_INFO_SHORT infoShort;
+ TPM_STRUCTURE_TAG tag;
+ UINT8 fixed[4];
+ TPM_NONCE externalData;
+ TPM_PCR_INFO_SHORT infoShort;
} TPM_QUOTE_INFO2;
//
@@ -1187,86 +1181,85 @@
/// Part 2, section 12.1 TPM_EK_BLOB
///
typedef struct tdTPM_EK_BLOB {
- TPM_STRUCTURE_TAG tag;
- TPM_EK_TYPE ekType;
- UINT32 blobSize;
- UINT8 *blob;
+ TPM_STRUCTURE_TAG tag;
+ TPM_EK_TYPE ekType;
+ UINT32 blobSize;
+ UINT8 *blob;
} TPM_EK_BLOB;
///
/// Part 2, section 12.2 TPM_EK_BLOB_ACTIVATE
///
typedef struct tdTPM_EK_BLOB_ACTIVATE {
- TPM_STRUCTURE_TAG tag;
- TPM_SYMMETRIC_KEY sessionKey;
- TPM_DIGEST idDigest;
- TPM_PCR_INFO_SHORT pcrInfo;
+ TPM_STRUCTURE_TAG tag;
+ TPM_SYMMETRIC_KEY sessionKey;
+ TPM_DIGEST idDigest;
+ TPM_PCR_INFO_SHORT pcrInfo;
} TPM_EK_BLOB_ACTIVATE;
///
/// Part 2, section 12.3 TPM_EK_BLOB_AUTH
///
typedef struct tdTPM_EK_BLOB_AUTH {
- TPM_STRUCTURE_TAG tag;
- TPM_SECRET authValue;
+ TPM_STRUCTURE_TAG tag;
+ TPM_SECRET authValue;
} TPM_EK_BLOB_AUTH;
-
///
/// Part 2, section 12.5 TPM_IDENTITY_CONTENTS
///
typedef struct tdTPM_IDENTITY_CONTENTS {
- TPM_STRUCT_VER ver;
- UINT32 ordinal;
- TPM_CHOSENID_HASH labelPrivCADigest;
- TPM_PUBKEY identityPubKey;
+ TPM_STRUCT_VER ver;
+ UINT32 ordinal;
+ TPM_CHOSENID_HASH labelPrivCADigest;
+ TPM_PUBKEY identityPubKey;
} TPM_IDENTITY_CONTENTS;
///
/// Part 2, section 12.6 TPM_IDENTITY_REQ
///
typedef struct tdTPM_IDENTITY_REQ {
- UINT32 asymSize;
- UINT32 symSize;
- TPM_KEY_PARMS asymAlgorithm;
- TPM_KEY_PARMS symAlgorithm;
- UINT8 *asymBlob;
- UINT8 *symBlob;
+ UINT32 asymSize;
+ UINT32 symSize;
+ TPM_KEY_PARMS asymAlgorithm;
+ TPM_KEY_PARMS symAlgorithm;
+ UINT8 *asymBlob;
+ UINT8 *symBlob;
} TPM_IDENTITY_REQ;
///
/// Part 2, section 12.7 TPM_IDENTITY_PROOF
///
typedef struct tdTPM_IDENTITY_PROOF {
- TPM_STRUCT_VER ver;
- UINT32 labelSize;
- UINT32 identityBindingSize;
- UINT32 endorsementSize;
- UINT32 platformSize;
- UINT32 conformanceSize;
- TPM_PUBKEY identityKey;
- UINT8 *labelArea;
- UINT8 *identityBinding;
- UINT8 *endorsementCredential;
- UINT8 *platformCredential;
- UINT8 *conformanceCredential;
+ TPM_STRUCT_VER ver;
+ UINT32 labelSize;
+ UINT32 identityBindingSize;
+ UINT32 endorsementSize;
+ UINT32 platformSize;
+ UINT32 conformanceSize;
+ TPM_PUBKEY identityKey;
+ UINT8 *labelArea;
+ UINT8 *identityBinding;
+ UINT8 *endorsementCredential;
+ UINT8 *platformCredential;
+ UINT8 *conformanceCredential;
} TPM_IDENTITY_PROOF;
///
/// Part 2, section 12.8 TPM_ASYM_CA_CONTENTS
///
typedef struct tdTPM_ASYM_CA_CONTENTS {
- TPM_SYMMETRIC_KEY sessionKey;
- TPM_DIGEST idDigest;
+ TPM_SYMMETRIC_KEY sessionKey;
+ TPM_DIGEST idDigest;
} TPM_ASYM_CA_CONTENTS;
///
/// Part 2, section 12.9 TPM_SYM_CA_ATTESTATION
///
typedef struct tdTPM_SYM_CA_ATTESTATION {
- UINT32 credSize;
- TPM_KEY_PARMS algorithm;
- UINT8 *credential;
+ UINT32 credSize;
+ TPM_KEY_PARMS algorithm;
+ UINT8 *credential;
} TPM_SYM_CA_ATTESTATION;
///
@@ -1274,10 +1267,10 @@
/// Placed here out of order because definitions are used in section 13.
///
typedef struct tdTPM_CURRENT_TICKS {
- TPM_STRUCTURE_TAG tag;
- UINT64 currentTicks;
- UINT16 tickRate;
- TPM_NONCE tickNonce;
+ TPM_STRUCTURE_TAG tag;
+ UINT64 currentTicks;
+ UINT16 tickRate;
+ TPM_NONCE tickNonce;
} TPM_CURRENT_TICKS;
///
@@ -1288,56 +1281,56 @@
/// Part 2, section 13.1: TPM _TRANSPORT_PUBLIC
///
typedef struct tdTPM_TRANSPORT_PUBLIC {
- TPM_STRUCTURE_TAG tag;
- TPM_TRANSPORT_ATTRIBUTES transAttributes;
- TPM_ALGORITHM_ID algId;
- TPM_ENC_SCHEME encScheme;
+ TPM_STRUCTURE_TAG tag;
+ TPM_TRANSPORT_ATTRIBUTES transAttributes;
+ TPM_ALGORITHM_ID algId;
+ TPM_ENC_SCHEME encScheme;
} TPM_TRANSPORT_PUBLIC;
//
// Part 2, section 13.1.1 TPM_TRANSPORT_ATTRIBUTES Definitions
//
-#define TPM_TRANSPORT_ENCRYPT ((UINT32)BIT0)
-#define TPM_TRANSPORT_LOG ((UINT32)BIT1)
-#define TPM_TRANSPORT_EXCLUSIVE ((UINT32)BIT2)
+#define TPM_TRANSPORT_ENCRYPT ((UINT32)BIT0)
+#define TPM_TRANSPORT_LOG ((UINT32)BIT1)
+#define TPM_TRANSPORT_EXCLUSIVE ((UINT32)BIT2)
///
/// Part 2, section 13.2 TPM_TRANSPORT_INTERNAL
///
typedef struct tdTPM_TRANSPORT_INTERNAL {
- TPM_STRUCTURE_TAG tag;
- TPM_AUTHDATA authData;
- TPM_TRANSPORT_PUBLIC transPublic;
- TPM_TRANSHANDLE transHandle;
- TPM_NONCE transNonceEven;
- TPM_DIGEST transDigest;
+ TPM_STRUCTURE_TAG tag;
+ TPM_AUTHDATA authData;
+ TPM_TRANSPORT_PUBLIC transPublic;
+ TPM_TRANSHANDLE transHandle;
+ TPM_NONCE transNonceEven;
+ TPM_DIGEST transDigest;
} TPM_TRANSPORT_INTERNAL;
///
/// Part 2, section 13.3 TPM_TRANSPORT_LOG_IN structure
///
typedef struct tdTPM_TRANSPORT_LOG_IN {
- TPM_STRUCTURE_TAG tag;
- TPM_DIGEST parameters;
- TPM_DIGEST pubKeyHash;
+ TPM_STRUCTURE_TAG tag;
+ TPM_DIGEST parameters;
+ TPM_DIGEST pubKeyHash;
} TPM_TRANSPORT_LOG_IN;
///
/// Part 2, section 13.4 TPM_TRANSPORT_LOG_OUT structure
///
typedef struct tdTPM_TRANSPORT_LOG_OUT {
- TPM_STRUCTURE_TAG tag;
- TPM_CURRENT_TICKS currentTicks;
- TPM_DIGEST parameters;
- TPM_MODIFIER_INDICATOR locality;
+ TPM_STRUCTURE_TAG tag;
+ TPM_CURRENT_TICKS currentTicks;
+ TPM_DIGEST parameters;
+ TPM_MODIFIER_INDICATOR locality;
} TPM_TRANSPORT_LOG_OUT;
///
/// Part 2, section 13.5 TPM_TRANSPORT_AUTH structure
///
typedef struct tdTPM_TRANSPORT_AUTH {
- TPM_STRUCTURE_TAG tag;
- TPM_AUTHDATA authData;
+ TPM_STRUCTURE_TAG tag;
+ TPM_AUTHDATA authData;
} TPM_TRANSPORT_AUTH;
//
@@ -1348,28 +1341,28 @@
/// Part 2, section 14.1 TPM_AUDIT_EVENT_IN structure
///
typedef struct tdTPM_AUDIT_EVENT_IN {
- TPM_STRUCTURE_TAG tag;
- TPM_DIGEST inputParms;
- TPM_COUNTER_VALUE auditCount;
+ TPM_STRUCTURE_TAG tag;
+ TPM_DIGEST inputParms;
+ TPM_COUNTER_VALUE auditCount;
} TPM_AUDIT_EVENT_IN;
///
/// Part 2, section 14.2 TPM_AUDIT_EVENT_OUT structure
///
typedef struct tdTPM_AUDIT_EVENT_OUT {
- TPM_STRUCTURE_TAG tag;
- TPM_COMMAND_CODE ordinal;
- TPM_DIGEST outputParms;
- TPM_COUNTER_VALUE auditCount;
- TPM_RESULT returnCode;
+ TPM_STRUCTURE_TAG tag;
+ TPM_COMMAND_CODE ordinal;
+ TPM_DIGEST outputParms;
+ TPM_COUNTER_VALUE auditCount;
+ TPM_RESULT returnCode;
} TPM_AUDIT_EVENT_OUT;
//
// Part 2, section 16: Return Codes
//
-#define TPM_VENDOR_ERROR TPM_Vendor_Specific32
-#define TPM_NON_FATAL 0x00000800
+#define TPM_VENDOR_ERROR TPM_Vendor_Specific32
+#define TPM_NON_FATAL 0x00000800
#define TPM_SUCCESS ((TPM_RESULT) TPM_BASE)
#define TPM_AUTHFAIL ((TPM_RESULT) (TPM_BASE + 1))
@@ -1471,10 +1464,10 @@
#define TPM_BAD_SIGNATURE ((TPM_RESULT) (TPM_BASE + 98))
#define TPM_NOCONTEXTSPACE ((TPM_RESULT) (TPM_BASE + 99))
-#define TPM_RETRY ((TPM_RESULT) (TPM_BASE + TPM_NON_FATAL))
-#define TPM_NEEDS_SELFTEST ((TPM_RESULT) (TPM_BASE + TPM_NON_FATAL + 1))
-#define TPM_DOING_SELFTEST ((TPM_RESULT) (TPM_BASE + TPM_NON_FATAL + 2))
-#define TPM_DEFEND_LOCK_RUNNING ((TPM_RESULT) (TPM_BASE + TPM_NON_FATAL + 3))
+#define TPM_RETRY ((TPM_RESULT) (TPM_BASE + TPM_NON_FATAL))
+#define TPM_NEEDS_SELFTEST ((TPM_RESULT) (TPM_BASE + TPM_NON_FATAL + 1))
+#define TPM_DOING_SELFTEST ((TPM_RESULT) (TPM_BASE + TPM_NON_FATAL + 2))
+#define TPM_DEFEND_LOCK_RUNNING ((TPM_RESULT) (TPM_BASE + TPM_NON_FATAL + 3))
//
// Part 2, section 17: Ordinals
@@ -1504,131 +1497,131 @@
// * All reserved area bits are set to 0.
//
-#define TPM_ORD_ActivateIdentity ((TPM_COMMAND_CODE) 0x0000007A)
-#define TPM_ORD_AuthorizeMigrationKey ((TPM_COMMAND_CODE) 0x0000002B)
-#define TPM_ORD_CertifyKey ((TPM_COMMAND_CODE) 0x00000032)
-#define TPM_ORD_CertifyKey2 ((TPM_COMMAND_CODE) 0x00000033)
-#define TPM_ORD_CertifySelfTest ((TPM_COMMAND_CODE) 0x00000052)
-#define TPM_ORD_ChangeAuth ((TPM_COMMAND_CODE) 0x0000000C)
-#define TPM_ORD_ChangeAuthAsymFinish ((TPM_COMMAND_CODE) 0x0000000F)
-#define TPM_ORD_ChangeAuthAsymStart ((TPM_COMMAND_CODE) 0x0000000E)
-#define TPM_ORD_ChangeAuthOwner ((TPM_COMMAND_CODE) 0x00000010)
-#define TPM_ORD_CMK_ApproveMA ((TPM_COMMAND_CODE) 0x0000001D)
-#define TPM_ORD_CMK_ConvertMigration ((TPM_COMMAND_CODE) 0x00000024)
-#define TPM_ORD_CMK_CreateBlob ((TPM_COMMAND_CODE) 0x0000001B)
-#define TPM_ORD_CMK_CreateKey ((TPM_COMMAND_CODE) 0x00000013)
-#define TPM_ORD_CMK_CreateTicket ((TPM_COMMAND_CODE) 0x00000012)
-#define TPM_ORD_CMK_SetRestrictions ((TPM_COMMAND_CODE) 0x0000001C)
-#define TPM_ORD_ContinueSelfTest ((TPM_COMMAND_CODE) 0x00000053)
-#define TPM_ORD_ConvertMigrationBlob ((TPM_COMMAND_CODE) 0x0000002A)
-#define TPM_ORD_CreateCounter ((TPM_COMMAND_CODE) 0x000000DC)
-#define TPM_ORD_CreateEndorsementKeyPair ((TPM_COMMAND_CODE) 0x00000078)
-#define TPM_ORD_CreateMaintenanceArchive ((TPM_COMMAND_CODE) 0x0000002C)
-#define TPM_ORD_CreateMigrationBlob ((TPM_COMMAND_CODE) 0x00000028)
-#define TPM_ORD_CreateRevocableEK ((TPM_COMMAND_CODE) 0x0000007F)
-#define TPM_ORD_CreateWrapKey ((TPM_COMMAND_CODE) 0x0000001F)
-#define TPM_ORD_DAA_JOIN ((TPM_COMMAND_CODE) 0x00000029)
-#define TPM_ORD_DAA_SIGN ((TPM_COMMAND_CODE) 0x00000031)
-#define TPM_ORD_Delegate_CreateKeyDelegation ((TPM_COMMAND_CODE) 0x000000D4)
-#define TPM_ORD_Delegate_CreateOwnerDelegation ((TPM_COMMAND_CODE) 0x000000D5)
-#define TPM_ORD_Delegate_LoadOwnerDelegation ((TPM_COMMAND_CODE) 0x000000D8)
-#define TPM_ORD_Delegate_Manage ((TPM_COMMAND_CODE) 0x000000D2)
-#define TPM_ORD_Delegate_ReadTable ((TPM_COMMAND_CODE) 0x000000DB)
-#define TPM_ORD_Delegate_UpdateVerification ((TPM_COMMAND_CODE) 0x000000D1)
-#define TPM_ORD_Delegate_VerifyDelegation ((TPM_COMMAND_CODE) 0x000000D6)
-#define TPM_ORD_DirRead ((TPM_COMMAND_CODE) 0x0000001A)
-#define TPM_ORD_DirWriteAuth ((TPM_COMMAND_CODE) 0x00000019)
-#define TPM_ORD_DisableForceClear ((TPM_COMMAND_CODE) 0x0000005E)
-#define TPM_ORD_DisableOwnerClear ((TPM_COMMAND_CODE) 0x0000005C)
-#define TPM_ORD_DisablePubekRead ((TPM_COMMAND_CODE) 0x0000007E)
-#define TPM_ORD_DSAP ((TPM_COMMAND_CODE) 0x00000011)
-#define TPM_ORD_EstablishTransport ((TPM_COMMAND_CODE) 0x000000E6)
-#define TPM_ORD_EvictKey ((TPM_COMMAND_CODE) 0x00000022)
-#define TPM_ORD_ExecuteTransport ((TPM_COMMAND_CODE) 0x000000E7)
-#define TPM_ORD_Extend ((TPM_COMMAND_CODE) 0x00000014)
-#define TPM_ORD_FieldUpgrade ((TPM_COMMAND_CODE) 0x000000AA)
-#define TPM_ORD_FlushSpecific ((TPM_COMMAND_CODE) 0x000000BA)
-#define TPM_ORD_ForceClear ((TPM_COMMAND_CODE) 0x0000005D)
-#define TPM_ORD_GetAuditDigest ((TPM_COMMAND_CODE) 0x00000085)
-#define TPM_ORD_GetAuditDigestSigned ((TPM_COMMAND_CODE) 0x00000086)
-#define TPM_ORD_GetAuditEvent ((TPM_COMMAND_CODE) 0x00000082)
-#define TPM_ORD_GetAuditEventSigned ((TPM_COMMAND_CODE) 0x00000083)
-#define TPM_ORD_GetCapability ((TPM_COMMAND_CODE) 0x00000065)
-#define TPM_ORD_GetCapabilityOwner ((TPM_COMMAND_CODE) 0x00000066)
-#define TPM_ORD_GetCapabilitySigned ((TPM_COMMAND_CODE) 0x00000064)
-#define TPM_ORD_GetOrdinalAuditStatus ((TPM_COMMAND_CODE) 0x0000008C)
-#define TPM_ORD_GetPubKey ((TPM_COMMAND_CODE) 0x00000021)
-#define TPM_ORD_GetRandom ((TPM_COMMAND_CODE) 0x00000046)
-#define TPM_ORD_GetTestResult ((TPM_COMMAND_CODE) 0x00000054)
-#define TPM_ORD_GetTicks ((TPM_COMMAND_CODE) 0x000000F1)
-#define TPM_ORD_IncrementCounter ((TPM_COMMAND_CODE) 0x000000DD)
-#define TPM_ORD_Init ((TPM_COMMAND_CODE) 0x00000097)
-#define TPM_ORD_KeyControlOwner ((TPM_COMMAND_CODE) 0x00000023)
-#define TPM_ORD_KillMaintenanceFeature ((TPM_COMMAND_CODE) 0x0000002E)
-#define TPM_ORD_LoadAuthContext ((TPM_COMMAND_CODE) 0x000000B7)
-#define TPM_ORD_LoadContext ((TPM_COMMAND_CODE) 0x000000B9)
-#define TPM_ORD_LoadKey ((TPM_COMMAND_CODE) 0x00000020)
-#define TPM_ORD_LoadKey2 ((TPM_COMMAND_CODE) 0x00000041)
-#define TPM_ORD_LoadKeyContext ((TPM_COMMAND_CODE) 0x000000B5)
-#define TPM_ORD_LoadMaintenanceArchive ((TPM_COMMAND_CODE) 0x0000002D)
-#define TPM_ORD_LoadManuMaintPub ((TPM_COMMAND_CODE) 0x0000002F)
-#define TPM_ORD_MakeIdentity ((TPM_COMMAND_CODE) 0x00000079)
-#define TPM_ORD_MigrateKey ((TPM_COMMAND_CODE) 0x00000025)
-#define TPM_ORD_NV_DefineSpace ((TPM_COMMAND_CODE) 0x000000CC)
-#define TPM_ORD_NV_ReadValue ((TPM_COMMAND_CODE) 0x000000CF)
-#define TPM_ORD_NV_ReadValueAuth ((TPM_COMMAND_CODE) 0x000000D0)
-#define TPM_ORD_NV_WriteValue ((TPM_COMMAND_CODE) 0x000000CD)
-#define TPM_ORD_NV_WriteValueAuth ((TPM_COMMAND_CODE) 0x000000CE)
-#define TPM_ORD_OIAP ((TPM_COMMAND_CODE) 0x0000000A)
-#define TPM_ORD_OSAP ((TPM_COMMAND_CODE) 0x0000000B)
-#define TPM_ORD_OwnerClear ((TPM_COMMAND_CODE) 0x0000005B)
-#define TPM_ORD_OwnerReadInternalPub ((TPM_COMMAND_CODE) 0x00000081)
-#define TPM_ORD_OwnerReadPubek ((TPM_COMMAND_CODE) 0x0000007D)
-#define TPM_ORD_OwnerSetDisable ((TPM_COMMAND_CODE) 0x0000006E)
-#define TPM_ORD_PCR_Reset ((TPM_COMMAND_CODE) 0x000000C8)
-#define TPM_ORD_PcrRead ((TPM_COMMAND_CODE) 0x00000015)
-#define TPM_ORD_PhysicalDisable ((TPM_COMMAND_CODE) 0x00000070)
-#define TPM_ORD_PhysicalEnable ((TPM_COMMAND_CODE) 0x0000006F)
-#define TPM_ORD_PhysicalSetDeactivated ((TPM_COMMAND_CODE) 0x00000072)
-#define TPM_ORD_Quote ((TPM_COMMAND_CODE) 0x00000016)
-#define TPM_ORD_Quote2 ((TPM_COMMAND_CODE) 0x0000003E)
-#define TPM_ORD_ReadCounter ((TPM_COMMAND_CODE) 0x000000DE)
-#define TPM_ORD_ReadManuMaintPub ((TPM_COMMAND_CODE) 0x00000030)
-#define TPM_ORD_ReadPubek ((TPM_COMMAND_CODE) 0x0000007C)
-#define TPM_ORD_ReleaseCounter ((TPM_COMMAND_CODE) 0x000000DF)
-#define TPM_ORD_ReleaseCounterOwner ((TPM_COMMAND_CODE) 0x000000E0)
-#define TPM_ORD_ReleaseTransportSigned ((TPM_COMMAND_CODE) 0x000000E8)
-#define TPM_ORD_Reset ((TPM_COMMAND_CODE) 0x0000005A)
-#define TPM_ORD_ResetLockValue ((TPM_COMMAND_CODE) 0x00000040)
-#define TPM_ORD_RevokeTrust ((TPM_COMMAND_CODE) 0x00000080)
-#define TPM_ORD_SaveAuthContext ((TPM_COMMAND_CODE) 0x000000B6)
-#define TPM_ORD_SaveContext ((TPM_COMMAND_CODE) 0x000000B8)
-#define TPM_ORD_SaveKeyContext ((TPM_COMMAND_CODE) 0x000000B4)
-#define TPM_ORD_SaveState ((TPM_COMMAND_CODE) 0x00000098)
-#define TPM_ORD_Seal ((TPM_COMMAND_CODE) 0x00000017)
-#define TPM_ORD_Sealx ((TPM_COMMAND_CODE) 0x0000003D)
-#define TPM_ORD_SelfTestFull ((TPM_COMMAND_CODE) 0x00000050)
-#define TPM_ORD_SetCapability ((TPM_COMMAND_CODE) 0x0000003F)
-#define TPM_ORD_SetOperatorAuth ((TPM_COMMAND_CODE) 0x00000074)
-#define TPM_ORD_SetOrdinalAuditStatus ((TPM_COMMAND_CODE) 0x0000008D)
-#define TPM_ORD_SetOwnerInstall ((TPM_COMMAND_CODE) 0x00000071)
-#define TPM_ORD_SetOwnerPointer ((TPM_COMMAND_CODE) 0x00000075)
-#define TPM_ORD_SetRedirection ((TPM_COMMAND_CODE) 0x0000009A)
-#define TPM_ORD_SetTempDeactivated ((TPM_COMMAND_CODE) 0x00000073)
-#define TPM_ORD_SHA1Complete ((TPM_COMMAND_CODE) 0x000000A2)
-#define TPM_ORD_SHA1CompleteExtend ((TPM_COMMAND_CODE) 0x000000A3)
-#define TPM_ORD_SHA1Start ((TPM_COMMAND_CODE) 0x000000A0)
-#define TPM_ORD_SHA1Update ((TPM_COMMAND_CODE) 0x000000A1)
-#define TPM_ORD_Sign ((TPM_COMMAND_CODE) 0x0000003C)
-#define TPM_ORD_Startup ((TPM_COMMAND_CODE) 0x00000099)
-#define TPM_ORD_StirRandom ((TPM_COMMAND_CODE) 0x00000047)
-#define TPM_ORD_TakeOwnership ((TPM_COMMAND_CODE) 0x0000000D)
-#define TPM_ORD_Terminate_Handle ((TPM_COMMAND_CODE) 0x00000096)
-#define TPM_ORD_TickStampBlob ((TPM_COMMAND_CODE) 0x000000F2)
-#define TPM_ORD_UnBind ((TPM_COMMAND_CODE) 0x0000001E)
-#define TPM_ORD_Unseal ((TPM_COMMAND_CODE) 0x00000018)
-#define TSC_ORD_PhysicalPresence ((TPM_COMMAND_CODE) 0x4000000A)
-#define TSC_ORD_ResetEstablishmentBit ((TPM_COMMAND_CODE) 0x4000000B)
+#define TPM_ORD_ActivateIdentity ((TPM_COMMAND_CODE) 0x0000007A)
+#define TPM_ORD_AuthorizeMigrationKey ((TPM_COMMAND_CODE) 0x0000002B)
+#define TPM_ORD_CertifyKey ((TPM_COMMAND_CODE) 0x00000032)
+#define TPM_ORD_CertifyKey2 ((TPM_COMMAND_CODE) 0x00000033)
+#define TPM_ORD_CertifySelfTest ((TPM_COMMAND_CODE) 0x00000052)
+#define TPM_ORD_ChangeAuth ((TPM_COMMAND_CODE) 0x0000000C)
+#define TPM_ORD_ChangeAuthAsymFinish ((TPM_COMMAND_CODE) 0x0000000F)
+#define TPM_ORD_ChangeAuthAsymStart ((TPM_COMMAND_CODE) 0x0000000E)
+#define TPM_ORD_ChangeAuthOwner ((TPM_COMMAND_CODE) 0x00000010)
+#define TPM_ORD_CMK_ApproveMA ((TPM_COMMAND_CODE) 0x0000001D)
+#define TPM_ORD_CMK_ConvertMigration ((TPM_COMMAND_CODE) 0x00000024)
+#define TPM_ORD_CMK_CreateBlob ((TPM_COMMAND_CODE) 0x0000001B)
+#define TPM_ORD_CMK_CreateKey ((TPM_COMMAND_CODE) 0x00000013)
+#define TPM_ORD_CMK_CreateTicket ((TPM_COMMAND_CODE) 0x00000012)
+#define TPM_ORD_CMK_SetRestrictions ((TPM_COMMAND_CODE) 0x0000001C)
+#define TPM_ORD_ContinueSelfTest ((TPM_COMMAND_CODE) 0x00000053)
+#define TPM_ORD_ConvertMigrationBlob ((TPM_COMMAND_CODE) 0x0000002A)
+#define TPM_ORD_CreateCounter ((TPM_COMMAND_CODE) 0x000000DC)
+#define TPM_ORD_CreateEndorsementKeyPair ((TPM_COMMAND_CODE) 0x00000078)
+#define TPM_ORD_CreateMaintenanceArchive ((TPM_COMMAND_CODE) 0x0000002C)
+#define TPM_ORD_CreateMigrationBlob ((TPM_COMMAND_CODE) 0x00000028)
+#define TPM_ORD_CreateRevocableEK ((TPM_COMMAND_CODE) 0x0000007F)
+#define TPM_ORD_CreateWrapKey ((TPM_COMMAND_CODE) 0x0000001F)
+#define TPM_ORD_DAA_JOIN ((TPM_COMMAND_CODE) 0x00000029)
+#define TPM_ORD_DAA_SIGN ((TPM_COMMAND_CODE) 0x00000031)
+#define TPM_ORD_Delegate_CreateKeyDelegation ((TPM_COMMAND_CODE) 0x000000D4)
+#define TPM_ORD_Delegate_CreateOwnerDelegation ((TPM_COMMAND_CODE) 0x000000D5)
+#define TPM_ORD_Delegate_LoadOwnerDelegation ((TPM_COMMAND_CODE) 0x000000D8)
+#define TPM_ORD_Delegate_Manage ((TPM_COMMAND_CODE) 0x000000D2)
+#define TPM_ORD_Delegate_ReadTable ((TPM_COMMAND_CODE) 0x000000DB)
+#define TPM_ORD_Delegate_UpdateVerification ((TPM_COMMAND_CODE) 0x000000D1)
+#define TPM_ORD_Delegate_VerifyDelegation ((TPM_COMMAND_CODE) 0x000000D6)
+#define TPM_ORD_DirRead ((TPM_COMMAND_CODE) 0x0000001A)
+#define TPM_ORD_DirWriteAuth ((TPM_COMMAND_CODE) 0x00000019)
+#define TPM_ORD_DisableForceClear ((TPM_COMMAND_CODE) 0x0000005E)
+#define TPM_ORD_DisableOwnerClear ((TPM_COMMAND_CODE) 0x0000005C)
+#define TPM_ORD_DisablePubekRead ((TPM_COMMAND_CODE) 0x0000007E)
+#define TPM_ORD_DSAP ((TPM_COMMAND_CODE) 0x00000011)
+#define TPM_ORD_EstablishTransport ((TPM_COMMAND_CODE) 0x000000E6)
+#define TPM_ORD_EvictKey ((TPM_COMMAND_CODE) 0x00000022)
+#define TPM_ORD_ExecuteTransport ((TPM_COMMAND_CODE) 0x000000E7)
+#define TPM_ORD_Extend ((TPM_COMMAND_CODE) 0x00000014)
+#define TPM_ORD_FieldUpgrade ((TPM_COMMAND_CODE) 0x000000AA)
+#define TPM_ORD_FlushSpecific ((TPM_COMMAND_CODE) 0x000000BA)
+#define TPM_ORD_ForceClear ((TPM_COMMAND_CODE) 0x0000005D)
+#define TPM_ORD_GetAuditDigest ((TPM_COMMAND_CODE) 0x00000085)
+#define TPM_ORD_GetAuditDigestSigned ((TPM_COMMAND_CODE) 0x00000086)
+#define TPM_ORD_GetAuditEvent ((TPM_COMMAND_CODE) 0x00000082)
+#define TPM_ORD_GetAuditEventSigned ((TPM_COMMAND_CODE) 0x00000083)
+#define TPM_ORD_GetCapability ((TPM_COMMAND_CODE) 0x00000065)
+#define TPM_ORD_GetCapabilityOwner ((TPM_COMMAND_CODE) 0x00000066)
+#define TPM_ORD_GetCapabilitySigned ((TPM_COMMAND_CODE) 0x00000064)
+#define TPM_ORD_GetOrdinalAuditStatus ((TPM_COMMAND_CODE) 0x0000008C)
+#define TPM_ORD_GetPubKey ((TPM_COMMAND_CODE) 0x00000021)
+#define TPM_ORD_GetRandom ((TPM_COMMAND_CODE) 0x00000046)
+#define TPM_ORD_GetTestResult ((TPM_COMMAND_CODE) 0x00000054)
+#define TPM_ORD_GetTicks ((TPM_COMMAND_CODE) 0x000000F1)
+#define TPM_ORD_IncrementCounter ((TPM_COMMAND_CODE) 0x000000DD)
+#define TPM_ORD_Init ((TPM_COMMAND_CODE) 0x00000097)
+#define TPM_ORD_KeyControlOwner ((TPM_COMMAND_CODE) 0x00000023)
+#define TPM_ORD_KillMaintenanceFeature ((TPM_COMMAND_CODE) 0x0000002E)
+#define TPM_ORD_LoadAuthContext ((TPM_COMMAND_CODE) 0x000000B7)
+#define TPM_ORD_LoadContext ((TPM_COMMAND_CODE) 0x000000B9)
+#define TPM_ORD_LoadKey ((TPM_COMMAND_CODE) 0x00000020)
+#define TPM_ORD_LoadKey2 ((TPM_COMMAND_CODE) 0x00000041)
+#define TPM_ORD_LoadKeyContext ((TPM_COMMAND_CODE) 0x000000B5)
+#define TPM_ORD_LoadMaintenanceArchive ((TPM_COMMAND_CODE) 0x0000002D)
+#define TPM_ORD_LoadManuMaintPub ((TPM_COMMAND_CODE) 0x0000002F)
+#define TPM_ORD_MakeIdentity ((TPM_COMMAND_CODE) 0x00000079)
+#define TPM_ORD_MigrateKey ((TPM_COMMAND_CODE) 0x00000025)
+#define TPM_ORD_NV_DefineSpace ((TPM_COMMAND_CODE) 0x000000CC)
+#define TPM_ORD_NV_ReadValue ((TPM_COMMAND_CODE) 0x000000CF)
+#define TPM_ORD_NV_ReadValueAuth ((TPM_COMMAND_CODE) 0x000000D0)
+#define TPM_ORD_NV_WriteValue ((TPM_COMMAND_CODE) 0x000000CD)
+#define TPM_ORD_NV_WriteValueAuth ((TPM_COMMAND_CODE) 0x000000CE)
+#define TPM_ORD_OIAP ((TPM_COMMAND_CODE) 0x0000000A)
+#define TPM_ORD_OSAP ((TPM_COMMAND_CODE) 0x0000000B)
+#define TPM_ORD_OwnerClear ((TPM_COMMAND_CODE) 0x0000005B)
+#define TPM_ORD_OwnerReadInternalPub ((TPM_COMMAND_CODE) 0x00000081)
+#define TPM_ORD_OwnerReadPubek ((TPM_COMMAND_CODE) 0x0000007D)
+#define TPM_ORD_OwnerSetDisable ((TPM_COMMAND_CODE) 0x0000006E)
+#define TPM_ORD_PCR_Reset ((TPM_COMMAND_CODE) 0x000000C8)
+#define TPM_ORD_PcrRead ((TPM_COMMAND_CODE) 0x00000015)
+#define TPM_ORD_PhysicalDisable ((TPM_COMMAND_CODE) 0x00000070)
+#define TPM_ORD_PhysicalEnable ((TPM_COMMAND_CODE) 0x0000006F)
+#define TPM_ORD_PhysicalSetDeactivated ((TPM_COMMAND_CODE) 0x00000072)
+#define TPM_ORD_Quote ((TPM_COMMAND_CODE) 0x00000016)
+#define TPM_ORD_Quote2 ((TPM_COMMAND_CODE) 0x0000003E)
+#define TPM_ORD_ReadCounter ((TPM_COMMAND_CODE) 0x000000DE)
+#define TPM_ORD_ReadManuMaintPub ((TPM_COMMAND_CODE) 0x00000030)
+#define TPM_ORD_ReadPubek ((TPM_COMMAND_CODE) 0x0000007C)
+#define TPM_ORD_ReleaseCounter ((TPM_COMMAND_CODE) 0x000000DF)
+#define TPM_ORD_ReleaseCounterOwner ((TPM_COMMAND_CODE) 0x000000E0)
+#define TPM_ORD_ReleaseTransportSigned ((TPM_COMMAND_CODE) 0x000000E8)
+#define TPM_ORD_Reset ((TPM_COMMAND_CODE) 0x0000005A)
+#define TPM_ORD_ResetLockValue ((TPM_COMMAND_CODE) 0x00000040)
+#define TPM_ORD_RevokeTrust ((TPM_COMMAND_CODE) 0x00000080)
+#define TPM_ORD_SaveAuthContext ((TPM_COMMAND_CODE) 0x000000B6)
+#define TPM_ORD_SaveContext ((TPM_COMMAND_CODE) 0x000000B8)
+#define TPM_ORD_SaveKeyContext ((TPM_COMMAND_CODE) 0x000000B4)
+#define TPM_ORD_SaveState ((TPM_COMMAND_CODE) 0x00000098)
+#define TPM_ORD_Seal ((TPM_COMMAND_CODE) 0x00000017)
+#define TPM_ORD_Sealx ((TPM_COMMAND_CODE) 0x0000003D)
+#define TPM_ORD_SelfTestFull ((TPM_COMMAND_CODE) 0x00000050)
+#define TPM_ORD_SetCapability ((TPM_COMMAND_CODE) 0x0000003F)
+#define TPM_ORD_SetOperatorAuth ((TPM_COMMAND_CODE) 0x00000074)
+#define TPM_ORD_SetOrdinalAuditStatus ((TPM_COMMAND_CODE) 0x0000008D)
+#define TPM_ORD_SetOwnerInstall ((TPM_COMMAND_CODE) 0x00000071)
+#define TPM_ORD_SetOwnerPointer ((TPM_COMMAND_CODE) 0x00000075)
+#define TPM_ORD_SetRedirection ((TPM_COMMAND_CODE) 0x0000009A)
+#define TPM_ORD_SetTempDeactivated ((TPM_COMMAND_CODE) 0x00000073)
+#define TPM_ORD_SHA1Complete ((TPM_COMMAND_CODE) 0x000000A2)
+#define TPM_ORD_SHA1CompleteExtend ((TPM_COMMAND_CODE) 0x000000A3)
+#define TPM_ORD_SHA1Start ((TPM_COMMAND_CODE) 0x000000A0)
+#define TPM_ORD_SHA1Update ((TPM_COMMAND_CODE) 0x000000A1)
+#define TPM_ORD_Sign ((TPM_COMMAND_CODE) 0x0000003C)
+#define TPM_ORD_Startup ((TPM_COMMAND_CODE) 0x00000099)
+#define TPM_ORD_StirRandom ((TPM_COMMAND_CODE) 0x00000047)
+#define TPM_ORD_TakeOwnership ((TPM_COMMAND_CODE) 0x0000000D)
+#define TPM_ORD_Terminate_Handle ((TPM_COMMAND_CODE) 0x00000096)
+#define TPM_ORD_TickStampBlob ((TPM_COMMAND_CODE) 0x000000F2)
+#define TPM_ORD_UnBind ((TPM_COMMAND_CODE) 0x0000001E)
+#define TPM_ORD_Unseal ((TPM_COMMAND_CODE) 0x00000018)
+#define TSC_ORD_PhysicalPresence ((TPM_COMMAND_CODE) 0x4000000A)
+#define TSC_ORD_ResetEstablishmentBit ((TPM_COMMAND_CODE) 0x4000000B)
//
// Part 2, section 18: Context structures
@@ -1638,26 +1631,26 @@
/// Part 2, section 18.1: TPM_CONTEXT_BLOB
///
typedef struct tdTPM_CONTEXT_BLOB {
- TPM_STRUCTURE_TAG tag;
- TPM_RESOURCE_TYPE resourceType;
- TPM_HANDLE handle;
- UINT8 label[16];
- UINT32 contextCount;
- TPM_DIGEST integrityDigest;
- UINT32 additionalSize;
- UINT8 *additionalData;
- UINT32 sensitiveSize;
- UINT8 *sensitiveData;
+ TPM_STRUCTURE_TAG tag;
+ TPM_RESOURCE_TYPE resourceType;
+ TPM_HANDLE handle;
+ UINT8 label[16];
+ UINT32 contextCount;
+ TPM_DIGEST integrityDigest;
+ UINT32 additionalSize;
+ UINT8 *additionalData;
+ UINT32 sensitiveSize;
+ UINT8 *sensitiveData;
} TPM_CONTEXT_BLOB;
///
/// Part 2, section 18.2 TPM_CONTEXT_SENSITIVE
///
typedef struct tdTPM_CONTEXT_SENSITIVE {
- TPM_STRUCTURE_TAG tag;
- TPM_NONCE contextNonce;
- UINT32 internalSize;
- UINT8 *internalData;
+ TPM_STRUCTURE_TAG tag;
+ TPM_NONCE contextNonce;
+ UINT32 internalSize;
+ UINT8 *internalData;
} TPM_CONTEXT_SENSITIVE;
//
@@ -1667,382 +1660,382 @@
//
// Part 2, section 19.1.1: Required TPM_NV_INDEX values
//
-#define TPM_NV_INDEX_LOCK ((UINT32)0xffffffff)
-#define TPM_NV_INDEX0 ((UINT32)0x00000000)
-#define TPM_NV_INDEX_DIR ((UINT32)0x10000001)
-#define TPM_NV_INDEX_EKCert ((UINT32)0x0000f000)
-#define TPM_NV_INDEX_TPM_CC ((UINT32)0x0000f001)
-#define TPM_NV_INDEX_PlatformCert ((UINT32)0x0000f002)
-#define TPM_NV_INDEX_Platform_CC ((UINT32)0x0000f003)
+#define TPM_NV_INDEX_LOCK ((UINT32)0xffffffff)
+#define TPM_NV_INDEX0 ((UINT32)0x00000000)
+#define TPM_NV_INDEX_DIR ((UINT32)0x10000001)
+#define TPM_NV_INDEX_EKCert ((UINT32)0x0000f000)
+#define TPM_NV_INDEX_TPM_CC ((UINT32)0x0000f001)
+#define TPM_NV_INDEX_PlatformCert ((UINT32)0x0000f002)
+#define TPM_NV_INDEX_Platform_CC ((UINT32)0x0000f003)
//
// Part 2, section 19.1.2: Reserved Index values
//
-#define TPM_NV_INDEX_TSS_BASE ((UINT32)0x00011100)
-#define TPM_NV_INDEX_PC_BASE ((UINT32)0x00011200)
-#define TPM_NV_INDEX_SERVER_BASE ((UINT32)0x00011300)
-#define TPM_NV_INDEX_MOBILE_BASE ((UINT32)0x00011400)
-#define TPM_NV_INDEX_PERIPHERAL_BASE ((UINT32)0x00011500)
-#define TPM_NV_INDEX_GROUP_RESV_BASE ((UINT32)0x00010000)
+#define TPM_NV_INDEX_TSS_BASE ((UINT32)0x00011100)
+#define TPM_NV_INDEX_PC_BASE ((UINT32)0x00011200)
+#define TPM_NV_INDEX_SERVER_BASE ((UINT32)0x00011300)
+#define TPM_NV_INDEX_MOBILE_BASE ((UINT32)0x00011400)
+#define TPM_NV_INDEX_PERIPHERAL_BASE ((UINT32)0x00011500)
+#define TPM_NV_INDEX_GROUP_RESV_BASE ((UINT32)0x00010000)
///
/// Part 2, section 19.2: TPM_NV_ATTRIBUTES
///
typedef struct tdTPM_NV_ATTRIBUTES {
- TPM_STRUCTURE_TAG tag;
- UINT32 attributes;
+ TPM_STRUCTURE_TAG tag;
+ UINT32 attributes;
} TPM_NV_ATTRIBUTES;
-#define TPM_NV_PER_READ_STCLEAR (BIT31)
-#define TPM_NV_PER_AUTHREAD (BIT18)
-#define TPM_NV_PER_OWNERREAD (BIT17)
-#define TPM_NV_PER_PPREAD (BIT16)
-#define TPM_NV_PER_GLOBALLOCK (BIT15)
-#define TPM_NV_PER_WRITE_STCLEAR (BIT14)
-#define TPM_NV_PER_WRITEDEFINE (BIT13)
-#define TPM_NV_PER_WRITEALL (BIT12)
-#define TPM_NV_PER_AUTHWRITE (BIT2)
-#define TPM_NV_PER_OWNERWRITE (BIT1)
-#define TPM_NV_PER_PPWRITE (BIT0)
+#define TPM_NV_PER_READ_STCLEAR (BIT31)
+#define TPM_NV_PER_AUTHREAD (BIT18)
+#define TPM_NV_PER_OWNERREAD (BIT17)
+#define TPM_NV_PER_PPREAD (BIT16)
+#define TPM_NV_PER_GLOBALLOCK (BIT15)
+#define TPM_NV_PER_WRITE_STCLEAR (BIT14)
+#define TPM_NV_PER_WRITEDEFINE (BIT13)
+#define TPM_NV_PER_WRITEALL (BIT12)
+#define TPM_NV_PER_AUTHWRITE (BIT2)
+#define TPM_NV_PER_OWNERWRITE (BIT1)
+#define TPM_NV_PER_PPWRITE (BIT0)
///
/// Part 2, section 19.3: TPM_NV_DATA_PUBLIC
///
typedef struct tdTPM_NV_DATA_PUBLIC {
- TPM_STRUCTURE_TAG tag;
- TPM_NV_INDEX nvIndex;
- TPM_PCR_INFO_SHORT pcrInfoRead;
- TPM_PCR_INFO_SHORT pcrInfoWrite;
- TPM_NV_ATTRIBUTES permission;
- BOOLEAN bReadSTClear;
- BOOLEAN bWriteSTClear;
- BOOLEAN bWriteDefine;
- UINT32 dataSize;
+ TPM_STRUCTURE_TAG tag;
+ TPM_NV_INDEX nvIndex;
+ TPM_PCR_INFO_SHORT pcrInfoRead;
+ TPM_PCR_INFO_SHORT pcrInfoWrite;
+ TPM_NV_ATTRIBUTES permission;
+ BOOLEAN bReadSTClear;
+ BOOLEAN bWriteSTClear;
+ BOOLEAN bWriteDefine;
+ UINT32 dataSize;
} TPM_NV_DATA_PUBLIC;
//
// Part 2, section 20: Delegate Structures
//
-#define TPM_DEL_OWNER_BITS ((UINT32)0x00000001)
-#define TPM_DEL_KEY_BITS ((UINT32)0x00000002)
+#define TPM_DEL_OWNER_BITS ((UINT32)0x00000001)
+#define TPM_DEL_KEY_BITS ((UINT32)0x00000002)
///
/// Part 2, section 20.2: Delegate Definitions
///
typedef struct tdTPM_DELEGATIONS {
- TPM_STRUCTURE_TAG tag;
- UINT32 delegateType;
- UINT32 per1;
- UINT32 per2;
+ TPM_STRUCTURE_TAG tag;
+ UINT32 delegateType;
+ UINT32 per1;
+ UINT32 per2;
} TPM_DELEGATIONS;
//
// Part 2, section 20.2.1: Owner Permission Settings
//
-#define TPM_DELEGATE_SetOrdinalAuditStatus (BIT30)
-#define TPM_DELEGATE_DirWriteAuth (BIT29)
-#define TPM_DELEGATE_CMK_ApproveMA (BIT28)
-#define TPM_DELEGATE_NV_WriteValue (BIT27)
-#define TPM_DELEGATE_CMK_CreateTicket (BIT26)
-#define TPM_DELEGATE_NV_ReadValue (BIT25)
-#define TPM_DELEGATE_Delegate_LoadOwnerDelegation (BIT24)
-#define TPM_DELEGATE_DAA_Join (BIT23)
-#define TPM_DELEGATE_AuthorizeMigrationKey (BIT22)
-#define TPM_DELEGATE_CreateMaintenanceArchive (BIT21)
-#define TPM_DELEGATE_LoadMaintenanceArchive (BIT20)
-#define TPM_DELEGATE_KillMaintenanceFeature (BIT19)
-#define TPM_DELEGATE_OwnerReadInteralPub (BIT18)
-#define TPM_DELEGATE_ResetLockValue (BIT17)
-#define TPM_DELEGATE_OwnerClear (BIT16)
-#define TPM_DELEGATE_DisableOwnerClear (BIT15)
-#define TPM_DELEGATE_NV_DefineSpace (BIT14)
-#define TPM_DELEGATE_OwnerSetDisable (BIT13)
-#define TPM_DELEGATE_SetCapability (BIT12)
-#define TPM_DELEGATE_MakeIdentity (BIT11)
-#define TPM_DELEGATE_ActivateIdentity (BIT10)
-#define TPM_DELEGATE_OwnerReadPubek (BIT9)
-#define TPM_DELEGATE_DisablePubekRead (BIT8)
-#define TPM_DELEGATE_SetRedirection (BIT7)
-#define TPM_DELEGATE_FieldUpgrade (BIT6)
-#define TPM_DELEGATE_Delegate_UpdateVerification (BIT5)
-#define TPM_DELEGATE_CreateCounter (BIT4)
-#define TPM_DELEGATE_ReleaseCounterOwner (BIT3)
-#define TPM_DELEGATE_DelegateManage (BIT2)
-#define TPM_DELEGATE_Delegate_CreateOwnerDelegation (BIT1)
-#define TPM_DELEGATE_DAA_Sign (BIT0)
+#define TPM_DELEGATE_SetOrdinalAuditStatus (BIT30)
+#define TPM_DELEGATE_DirWriteAuth (BIT29)
+#define TPM_DELEGATE_CMK_ApproveMA (BIT28)
+#define TPM_DELEGATE_NV_WriteValue (BIT27)
+#define TPM_DELEGATE_CMK_CreateTicket (BIT26)
+#define TPM_DELEGATE_NV_ReadValue (BIT25)
+#define TPM_DELEGATE_Delegate_LoadOwnerDelegation (BIT24)
+#define TPM_DELEGATE_DAA_Join (BIT23)
+#define TPM_DELEGATE_AuthorizeMigrationKey (BIT22)
+#define TPM_DELEGATE_CreateMaintenanceArchive (BIT21)
+#define TPM_DELEGATE_LoadMaintenanceArchive (BIT20)
+#define TPM_DELEGATE_KillMaintenanceFeature (BIT19)
+#define TPM_DELEGATE_OwnerReadInteralPub (BIT18)
+#define TPM_DELEGATE_ResetLockValue (BIT17)
+#define TPM_DELEGATE_OwnerClear (BIT16)
+#define TPM_DELEGATE_DisableOwnerClear (BIT15)
+#define TPM_DELEGATE_NV_DefineSpace (BIT14)
+#define TPM_DELEGATE_OwnerSetDisable (BIT13)
+#define TPM_DELEGATE_SetCapability (BIT12)
+#define TPM_DELEGATE_MakeIdentity (BIT11)
+#define TPM_DELEGATE_ActivateIdentity (BIT10)
+#define TPM_DELEGATE_OwnerReadPubek (BIT9)
+#define TPM_DELEGATE_DisablePubekRead (BIT8)
+#define TPM_DELEGATE_SetRedirection (BIT7)
+#define TPM_DELEGATE_FieldUpgrade (BIT6)
+#define TPM_DELEGATE_Delegate_UpdateVerification (BIT5)
+#define TPM_DELEGATE_CreateCounter (BIT4)
+#define TPM_DELEGATE_ReleaseCounterOwner (BIT3)
+#define TPM_DELEGATE_DelegateManage (BIT2)
+#define TPM_DELEGATE_Delegate_CreateOwnerDelegation (BIT1)
+#define TPM_DELEGATE_DAA_Sign (BIT0)
//
// Part 2, section 20.2.3: Key Permission settings
//
-#define TPM_KEY_DELEGATE_CMK_ConvertMigration (BIT28)
-#define TPM_KEY_DELEGATE_TickStampBlob (BIT27)
-#define TPM_KEY_DELEGATE_ChangeAuthAsymStart (BIT26)
-#define TPM_KEY_DELEGATE_ChangeAuthAsymFinish (BIT25)
-#define TPM_KEY_DELEGATE_CMK_CreateKey (BIT24)
-#define TPM_KEY_DELEGATE_MigrateKey (BIT23)
-#define TPM_KEY_DELEGATE_LoadKey2 (BIT22)
-#define TPM_KEY_DELEGATE_EstablishTransport (BIT21)
-#define TPM_KEY_DELEGATE_ReleaseTransportSigned (BIT20)
-#define TPM_KEY_DELEGATE_Quote2 (BIT19)
-#define TPM_KEY_DELEGATE_Sealx (BIT18)
-#define TPM_KEY_DELEGATE_MakeIdentity (BIT17)
-#define TPM_KEY_DELEGATE_ActivateIdentity (BIT16)
-#define TPM_KEY_DELEGATE_GetAuditDigestSigned (BIT15)
-#define TPM_KEY_DELEGATE_Sign (BIT14)
-#define TPM_KEY_DELEGATE_CertifyKey2 (BIT13)
-#define TPM_KEY_DELEGATE_CertifyKey (BIT12)
-#define TPM_KEY_DELEGATE_CreateWrapKey (BIT11)
-#define TPM_KEY_DELEGATE_CMK_CreateBlob (BIT10)
-#define TPM_KEY_DELEGATE_CreateMigrationBlob (BIT9)
-#define TPM_KEY_DELEGATE_ConvertMigrationBlob (BIT8)
-#define TPM_KEY_DELEGATE_CreateKeyDelegation (BIT7)
-#define TPM_KEY_DELEGATE_ChangeAuth (BIT6)
-#define TPM_KEY_DELEGATE_GetPubKey (BIT5)
-#define TPM_KEY_DELEGATE_UnBind (BIT4)
-#define TPM_KEY_DELEGATE_Quote (BIT3)
-#define TPM_KEY_DELEGATE_Unseal (BIT2)
-#define TPM_KEY_DELEGATE_Seal (BIT1)
-#define TPM_KEY_DELEGATE_LoadKey (BIT0)
+#define TPM_KEY_DELEGATE_CMK_ConvertMigration (BIT28)
+#define TPM_KEY_DELEGATE_TickStampBlob (BIT27)
+#define TPM_KEY_DELEGATE_ChangeAuthAsymStart (BIT26)
+#define TPM_KEY_DELEGATE_ChangeAuthAsymFinish (BIT25)
+#define TPM_KEY_DELEGATE_CMK_CreateKey (BIT24)
+#define TPM_KEY_DELEGATE_MigrateKey (BIT23)
+#define TPM_KEY_DELEGATE_LoadKey2 (BIT22)
+#define TPM_KEY_DELEGATE_EstablishTransport (BIT21)
+#define TPM_KEY_DELEGATE_ReleaseTransportSigned (BIT20)
+#define TPM_KEY_DELEGATE_Quote2 (BIT19)
+#define TPM_KEY_DELEGATE_Sealx (BIT18)
+#define TPM_KEY_DELEGATE_MakeIdentity (BIT17)
+#define TPM_KEY_DELEGATE_ActivateIdentity (BIT16)
+#define TPM_KEY_DELEGATE_GetAuditDigestSigned (BIT15)
+#define TPM_KEY_DELEGATE_Sign (BIT14)
+#define TPM_KEY_DELEGATE_CertifyKey2 (BIT13)
+#define TPM_KEY_DELEGATE_CertifyKey (BIT12)
+#define TPM_KEY_DELEGATE_CreateWrapKey (BIT11)
+#define TPM_KEY_DELEGATE_CMK_CreateBlob (BIT10)
+#define TPM_KEY_DELEGATE_CreateMigrationBlob (BIT9)
+#define TPM_KEY_DELEGATE_ConvertMigrationBlob (BIT8)
+#define TPM_KEY_DELEGATE_CreateKeyDelegation (BIT7)
+#define TPM_KEY_DELEGATE_ChangeAuth (BIT6)
+#define TPM_KEY_DELEGATE_GetPubKey (BIT5)
+#define TPM_KEY_DELEGATE_UnBind (BIT4)
+#define TPM_KEY_DELEGATE_Quote (BIT3)
+#define TPM_KEY_DELEGATE_Unseal (BIT2)
+#define TPM_KEY_DELEGATE_Seal (BIT1)
+#define TPM_KEY_DELEGATE_LoadKey (BIT0)
//
// Part 2, section 20.3: TPM_FAMILY_FLAGS
//
-#define TPM_DELEGATE_ADMIN_LOCK (BIT1)
-#define TPM_FAMFLAG_ENABLE (BIT0)
+#define TPM_DELEGATE_ADMIN_LOCK (BIT1)
+#define TPM_FAMFLAG_ENABLE (BIT0)
///
/// Part 2, section 20.4: TPM_FAMILY_LABEL
///
typedef struct tdTPM_FAMILY_LABEL {
- UINT8 label;
+ UINT8 label;
} TPM_FAMILY_LABEL;
///
/// Part 2, section 20.5: TPM_FAMILY_TABLE_ENTRY
///
typedef struct tdTPM_FAMILY_TABLE_ENTRY {
- TPM_STRUCTURE_TAG tag;
- TPM_FAMILY_LABEL label;
- TPM_FAMILY_ID familyID;
- TPM_FAMILY_VERIFICATION verificationCount;
- TPM_FAMILY_FLAGS flags;
+ TPM_STRUCTURE_TAG tag;
+ TPM_FAMILY_LABEL label;
+ TPM_FAMILY_ID familyID;
+ TPM_FAMILY_VERIFICATION verificationCount;
+ TPM_FAMILY_FLAGS flags;
} TPM_FAMILY_TABLE_ENTRY;
//
// Part 2, section 20.6: TPM_FAMILY_TABLE
//
-#define TPM_NUM_FAMILY_TABLE_ENTRY_MIN 8
+#define TPM_NUM_FAMILY_TABLE_ENTRY_MIN 8
-typedef struct tdTPM_FAMILY_TABLE{
- TPM_FAMILY_TABLE_ENTRY famTableRow[TPM_NUM_FAMILY_TABLE_ENTRY_MIN];
+typedef struct tdTPM_FAMILY_TABLE {
+ TPM_FAMILY_TABLE_ENTRY famTableRow[TPM_NUM_FAMILY_TABLE_ENTRY_MIN];
} TPM_FAMILY_TABLE;
///
/// Part 2, section 20.7: TPM_DELEGATE_LABEL
///
typedef struct tdTPM_DELEGATE_LABEL {
- UINT8 label;
+ UINT8 label;
} TPM_DELEGATE_LABEL;
///
/// Part 2, section 20.8: TPM_DELEGATE_PUBLIC
///
typedef struct tdTPM_DELEGATE_PUBLIC {
- TPM_STRUCTURE_TAG tag;
- TPM_DELEGATE_LABEL label;
- TPM_PCR_INFO_SHORT pcrInfo;
- TPM_DELEGATIONS permissions;
- TPM_FAMILY_ID familyID;
- TPM_FAMILY_VERIFICATION verificationCount;
+ TPM_STRUCTURE_TAG tag;
+ TPM_DELEGATE_LABEL label;
+ TPM_PCR_INFO_SHORT pcrInfo;
+ TPM_DELEGATIONS permissions;
+ TPM_FAMILY_ID familyID;
+ TPM_FAMILY_VERIFICATION verificationCount;
} TPM_DELEGATE_PUBLIC;
///
/// Part 2, section 20.9: TPM_DELEGATE_TABLE_ROW
///
typedef struct tdTPM_DELEGATE_TABLE_ROW {
- TPM_STRUCTURE_TAG tag;
- TPM_DELEGATE_PUBLIC pub;
- TPM_SECRET authValue;
+ TPM_STRUCTURE_TAG tag;
+ TPM_DELEGATE_PUBLIC pub;
+ TPM_SECRET authValue;
} TPM_DELEGATE_TABLE_ROW;
//
// Part 2, section 20.10: TPM_DELEGATE_TABLE
//
-#define TPM_NUM_DELEGATE_TABLE_ENTRY_MIN 2
+#define TPM_NUM_DELEGATE_TABLE_ENTRY_MIN 2
-typedef struct tdTPM_DELEGATE_TABLE{
- TPM_DELEGATE_TABLE_ROW delRow[TPM_NUM_DELEGATE_TABLE_ENTRY_MIN];
+typedef struct tdTPM_DELEGATE_TABLE {
+ TPM_DELEGATE_TABLE_ROW delRow[TPM_NUM_DELEGATE_TABLE_ENTRY_MIN];
} TPM_DELEGATE_TABLE;
///
/// Part 2, section 20.11: TPM_DELEGATE_SENSITIVE
///
typedef struct tdTPM_DELEGATE_SENSITIVE {
- TPM_STRUCTURE_TAG tag;
- TPM_SECRET authValue;
+ TPM_STRUCTURE_TAG tag;
+ TPM_SECRET authValue;
} TPM_DELEGATE_SENSITIVE;
///
/// Part 2, section 20.12: TPM_DELEGATE_OWNER_BLOB
///
typedef struct tdTPM_DELEGATE_OWNER_BLOB {
- TPM_STRUCTURE_TAG tag;
- TPM_DELEGATE_PUBLIC pub;
- TPM_DIGEST integrityDigest;
- UINT32 additionalSize;
- UINT8 *additionalArea;
- UINT32 sensitiveSize;
- UINT8 *sensitiveArea;
+ TPM_STRUCTURE_TAG tag;
+ TPM_DELEGATE_PUBLIC pub;
+ TPM_DIGEST integrityDigest;
+ UINT32 additionalSize;
+ UINT8 *additionalArea;
+ UINT32 sensitiveSize;
+ UINT8 *sensitiveArea;
} TPM_DELEGATE_OWNER_BLOB;
///
/// Part 2, section 20.13: TTPM_DELEGATE_KEY_BLOB
///
typedef struct tdTPM_DELEGATE_KEY_BLOB {
- TPM_STRUCTURE_TAG tag;
- TPM_DELEGATE_PUBLIC pub;
- TPM_DIGEST integrityDigest;
- TPM_DIGEST pubKeyDigest;
- UINT32 additionalSize;
- UINT8 *additionalArea;
- UINT32 sensitiveSize;
- UINT8 *sensitiveArea;
+ TPM_STRUCTURE_TAG tag;
+ TPM_DELEGATE_PUBLIC pub;
+ TPM_DIGEST integrityDigest;
+ TPM_DIGEST pubKeyDigest;
+ UINT32 additionalSize;
+ UINT8 *additionalArea;
+ UINT32 sensitiveSize;
+ UINT8 *sensitiveArea;
} TPM_DELEGATE_KEY_BLOB;
//
// Part 2, section 20.14: TPM_FAMILY_OPERATION Values
//
-#define TPM_FAMILY_CREATE ((UINT32)0x00000001)
-#define TPM_FAMILY_ENABLE ((UINT32)0x00000002)
-#define TPM_FAMILY_ADMIN ((UINT32)0x00000003)
-#define TPM_FAMILY_INVALIDATE ((UINT32)0x00000004)
+#define TPM_FAMILY_CREATE ((UINT32)0x00000001)
+#define TPM_FAMILY_ENABLE ((UINT32)0x00000002)
+#define TPM_FAMILY_ADMIN ((UINT32)0x00000003)
+#define TPM_FAMILY_INVALIDATE ((UINT32)0x00000004)
//
// Part 2, section 21.1: TPM_CAPABILITY_AREA for GetCapability
//
-#define TPM_CAP_ORD ((TPM_CAPABILITY_AREA) 0x00000001)
-#define TPM_CAP_ALG ((TPM_CAPABILITY_AREA) 0x00000002)
-#define TPM_CAP_PID ((TPM_CAPABILITY_AREA) 0x00000003)
-#define TPM_CAP_FLAG ((TPM_CAPABILITY_AREA) 0x00000004)
-#define TPM_CAP_PROPERTY ((TPM_CAPABILITY_AREA) 0x00000005)
-#define TPM_CAP_VERSION ((TPM_CAPABILITY_AREA) 0x00000006)
-#define TPM_CAP_KEY_HANDLE ((TPM_CAPABILITY_AREA) 0x00000007)
-#define TPM_CAP_CHECK_LOADED ((TPM_CAPABILITY_AREA) 0x00000008)
-#define TPM_CAP_SYM_MODE ((TPM_CAPABILITY_AREA) 0x00000009)
-#define TPM_CAP_KEY_STATUS ((TPM_CAPABILITY_AREA) 0x0000000C)
-#define TPM_CAP_NV_LIST ((TPM_CAPABILITY_AREA) 0x0000000D)
-#define TPM_CAP_MFR ((TPM_CAPABILITY_AREA) 0x00000010)
-#define TPM_CAP_NV_INDEX ((TPM_CAPABILITY_AREA) 0x00000011)
-#define TPM_CAP_TRANS_ALG ((TPM_CAPABILITY_AREA) 0x00000012)
-#define TPM_CAP_HANDLE ((TPM_CAPABILITY_AREA) 0x00000014)
-#define TPM_CAP_TRANS_ES ((TPM_CAPABILITY_AREA) 0x00000015)
-#define TPM_CAP_AUTH_ENCRYPT ((TPM_CAPABILITY_AREA) 0x00000017)
-#define TPM_CAP_SELECT_SIZE ((TPM_CAPABILITY_AREA) 0x00000018)
-#define TPM_CAP_VERSION_VAL ((TPM_CAPABILITY_AREA) 0x0000001A)
+#define TPM_CAP_ORD ((TPM_CAPABILITY_AREA) 0x00000001)
+#define TPM_CAP_ALG ((TPM_CAPABILITY_AREA) 0x00000002)
+#define TPM_CAP_PID ((TPM_CAPABILITY_AREA) 0x00000003)
+#define TPM_CAP_FLAG ((TPM_CAPABILITY_AREA) 0x00000004)
+#define TPM_CAP_PROPERTY ((TPM_CAPABILITY_AREA) 0x00000005)
+#define TPM_CAP_VERSION ((TPM_CAPABILITY_AREA) 0x00000006)
+#define TPM_CAP_KEY_HANDLE ((TPM_CAPABILITY_AREA) 0x00000007)
+#define TPM_CAP_CHECK_LOADED ((TPM_CAPABILITY_AREA) 0x00000008)
+#define TPM_CAP_SYM_MODE ((TPM_CAPABILITY_AREA) 0x00000009)
+#define TPM_CAP_KEY_STATUS ((TPM_CAPABILITY_AREA) 0x0000000C)
+#define TPM_CAP_NV_LIST ((TPM_CAPABILITY_AREA) 0x0000000D)
+#define TPM_CAP_MFR ((TPM_CAPABILITY_AREA) 0x00000010)
+#define TPM_CAP_NV_INDEX ((TPM_CAPABILITY_AREA) 0x00000011)
+#define TPM_CAP_TRANS_ALG ((TPM_CAPABILITY_AREA) 0x00000012)
+#define TPM_CAP_HANDLE ((TPM_CAPABILITY_AREA) 0x00000014)
+#define TPM_CAP_TRANS_ES ((TPM_CAPABILITY_AREA) 0x00000015)
+#define TPM_CAP_AUTH_ENCRYPT ((TPM_CAPABILITY_AREA) 0x00000017)
+#define TPM_CAP_SELECT_SIZE ((TPM_CAPABILITY_AREA) 0x00000018)
+#define TPM_CAP_VERSION_VAL ((TPM_CAPABILITY_AREA) 0x0000001A)
-#define TPM_CAP_FLAG_PERMANENT ((TPM_CAPABILITY_AREA) 0x00000108)
-#define TPM_CAP_FLAG_VOLATILE ((TPM_CAPABILITY_AREA) 0x00000109)
+#define TPM_CAP_FLAG_PERMANENT ((TPM_CAPABILITY_AREA) 0x00000108)
+#define TPM_CAP_FLAG_VOLATILE ((TPM_CAPABILITY_AREA) 0x00000109)
//
// Part 2, section 21.2: CAP_PROPERTY Subcap values for GetCapability
//
-#define TPM_CAP_PROP_PCR ((TPM_CAPABILITY_AREA) 0x00000101)
-#define TPM_CAP_PROP_DIR ((TPM_CAPABILITY_AREA) 0x00000102)
-#define TPM_CAP_PROP_MANUFACTURER ((TPM_CAPABILITY_AREA) 0x00000103)
-#define TPM_CAP_PROP_KEYS ((TPM_CAPABILITY_AREA) 0x00000104)
-#define TPM_CAP_PROP_MIN_COUNTER ((TPM_CAPABILITY_AREA) 0x00000107)
-#define TPM_CAP_PROP_AUTHSESS ((TPM_CAPABILITY_AREA) 0x0000010A)
-#define TPM_CAP_PROP_TRANSESS ((TPM_CAPABILITY_AREA) 0x0000010B)
-#define TPM_CAP_PROP_COUNTERS ((TPM_CAPABILITY_AREA) 0x0000010C)
-#define TPM_CAP_PROP_MAX_AUTHSESS ((TPM_CAPABILITY_AREA) 0x0000010D)
-#define TPM_CAP_PROP_MAX_TRANSESS ((TPM_CAPABILITY_AREA) 0x0000010E)
-#define TPM_CAP_PROP_MAX_COUNTERS ((TPM_CAPABILITY_AREA) 0x0000010F)
-#define TPM_CAP_PROP_MAX_KEYS ((TPM_CAPABILITY_AREA) 0x00000110)
-#define TPM_CAP_PROP_OWNER ((TPM_CAPABILITY_AREA) 0x00000111)
-#define TPM_CAP_PROP_CONTEXT ((TPM_CAPABILITY_AREA) 0x00000112)
-#define TPM_CAP_PROP_MAX_CONTEXT ((TPM_CAPABILITY_AREA) 0x00000113)
-#define TPM_CAP_PROP_FAMILYROWS ((TPM_CAPABILITY_AREA) 0x00000114)
-#define TPM_CAP_PROP_TIS_TIMEOUT ((TPM_CAPABILITY_AREA) 0x00000115)
-#define TPM_CAP_PROP_STARTUP_EFFECT ((TPM_CAPABILITY_AREA) 0x00000116)
-#define TPM_CAP_PROP_DELEGATE_ROW ((TPM_CAPABILITY_AREA) 0x00000117)
-#define TPM_CAP_PROP_DAA_MAX ((TPM_CAPABILITY_AREA) 0x00000119)
-#define CAP_PROP_SESSION_DAA ((TPM_CAPABILITY_AREA) 0x0000011A)
-#define TPM_CAP_PROP_CONTEXT_DIST ((TPM_CAPABILITY_AREA) 0x0000011B)
-#define TPM_CAP_PROP_DAA_INTERRUPT ((TPM_CAPABILITY_AREA) 0x0000011C)
-#define TPM_CAP_PROP_SESSIONS ((TPM_CAPABILITY_AREA) 0x0000011D)
-#define TPM_CAP_PROP_MAX_SESSIONS ((TPM_CAPABILITY_AREA) 0x0000011E)
-#define TPM_CAP_PROP_CMK_RESTRICTION ((TPM_CAPABILITY_AREA) 0x0000011F)
-#define TPM_CAP_PROP_DURATION ((TPM_CAPABILITY_AREA) 0x00000120)
-#define TPM_CAP_PROP_ACTIVE_COUNTER ((TPM_CAPABILITY_AREA) 0x00000122)
-#define TPM_CAP_PROP_MAX_NV_AVAILABLE ((TPM_CAPABILITY_AREA) 0x00000123)
-#define TPM_CAP_PROP_INPUT_BUFFER ((TPM_CAPABILITY_AREA) 0x00000124)
+#define TPM_CAP_PROP_PCR ((TPM_CAPABILITY_AREA) 0x00000101)
+#define TPM_CAP_PROP_DIR ((TPM_CAPABILITY_AREA) 0x00000102)
+#define TPM_CAP_PROP_MANUFACTURER ((TPM_CAPABILITY_AREA) 0x00000103)
+#define TPM_CAP_PROP_KEYS ((TPM_CAPABILITY_AREA) 0x00000104)
+#define TPM_CAP_PROP_MIN_COUNTER ((TPM_CAPABILITY_AREA) 0x00000107)
+#define TPM_CAP_PROP_AUTHSESS ((TPM_CAPABILITY_AREA) 0x0000010A)
+#define TPM_CAP_PROP_TRANSESS ((TPM_CAPABILITY_AREA) 0x0000010B)
+#define TPM_CAP_PROP_COUNTERS ((TPM_CAPABILITY_AREA) 0x0000010C)
+#define TPM_CAP_PROP_MAX_AUTHSESS ((TPM_CAPABILITY_AREA) 0x0000010D)
+#define TPM_CAP_PROP_MAX_TRANSESS ((TPM_CAPABILITY_AREA) 0x0000010E)
+#define TPM_CAP_PROP_MAX_COUNTERS ((TPM_CAPABILITY_AREA) 0x0000010F)
+#define TPM_CAP_PROP_MAX_KEYS ((TPM_CAPABILITY_AREA) 0x00000110)
+#define TPM_CAP_PROP_OWNER ((TPM_CAPABILITY_AREA) 0x00000111)
+#define TPM_CAP_PROP_CONTEXT ((TPM_CAPABILITY_AREA) 0x00000112)
+#define TPM_CAP_PROP_MAX_CONTEXT ((TPM_CAPABILITY_AREA) 0x00000113)
+#define TPM_CAP_PROP_FAMILYROWS ((TPM_CAPABILITY_AREA) 0x00000114)
+#define TPM_CAP_PROP_TIS_TIMEOUT ((TPM_CAPABILITY_AREA) 0x00000115)
+#define TPM_CAP_PROP_STARTUP_EFFECT ((TPM_CAPABILITY_AREA) 0x00000116)
+#define TPM_CAP_PROP_DELEGATE_ROW ((TPM_CAPABILITY_AREA) 0x00000117)
+#define TPM_CAP_PROP_DAA_MAX ((TPM_CAPABILITY_AREA) 0x00000119)
+#define CAP_PROP_SESSION_DAA ((TPM_CAPABILITY_AREA) 0x0000011A)
+#define TPM_CAP_PROP_CONTEXT_DIST ((TPM_CAPABILITY_AREA) 0x0000011B)
+#define TPM_CAP_PROP_DAA_INTERRUPT ((TPM_CAPABILITY_AREA) 0x0000011C)
+#define TPM_CAP_PROP_SESSIONS ((TPM_CAPABILITY_AREA) 0x0000011D)
+#define TPM_CAP_PROP_MAX_SESSIONS ((TPM_CAPABILITY_AREA) 0x0000011E)
+#define TPM_CAP_PROP_CMK_RESTRICTION ((TPM_CAPABILITY_AREA) 0x0000011F)
+#define TPM_CAP_PROP_DURATION ((TPM_CAPABILITY_AREA) 0x00000120)
+#define TPM_CAP_PROP_ACTIVE_COUNTER ((TPM_CAPABILITY_AREA) 0x00000122)
+#define TPM_CAP_PROP_MAX_NV_AVAILABLE ((TPM_CAPABILITY_AREA) 0x00000123)
+#define TPM_CAP_PROP_INPUT_BUFFER ((TPM_CAPABILITY_AREA) 0x00000124)
//
// Part 2, section 21.4: TPM_CAPABILITY_AREA for SetCapability
//
-#define TPM_SET_PERM_FLAGS ((TPM_CAPABILITY_AREA) 0x00000001)
-#define TPM_SET_PERM_DATA ((TPM_CAPABILITY_AREA) 0x00000002)
-#define TPM_SET_STCLEAR_FLAGS ((TPM_CAPABILITY_AREA) 0x00000003)
-#define TPM_SET_STCLEAR_DATA ((TPM_CAPABILITY_AREA) 0x00000004)
-#define TPM_SET_STANY_FLAGS ((TPM_CAPABILITY_AREA) 0x00000005)
-#define TPM_SET_STANY_DATA ((TPM_CAPABILITY_AREA) 0x00000006)
+#define TPM_SET_PERM_FLAGS ((TPM_CAPABILITY_AREA) 0x00000001)
+#define TPM_SET_PERM_DATA ((TPM_CAPABILITY_AREA) 0x00000002)
+#define TPM_SET_STCLEAR_FLAGS ((TPM_CAPABILITY_AREA) 0x00000003)
+#define TPM_SET_STCLEAR_DATA ((TPM_CAPABILITY_AREA) 0x00000004)
+#define TPM_SET_STANY_FLAGS ((TPM_CAPABILITY_AREA) 0x00000005)
+#define TPM_SET_STANY_DATA ((TPM_CAPABILITY_AREA) 0x00000006)
///
/// Part 2, section 21.6: TPM_CAP_VERSION_INFO
/// [size_is(vendorSpecificSize)] BYTE* vendorSpecific;
///
typedef struct tdTPM_CAP_VERSION_INFO {
- TPM_STRUCTURE_TAG tag;
- TPM_VERSION version;
- UINT16 specLevel;
- UINT8 errataRev;
- UINT8 tpmVendorID[4];
- UINT16 vendorSpecificSize;
- UINT8 *vendorSpecific;
+ TPM_STRUCTURE_TAG tag;
+ TPM_VERSION version;
+ UINT16 specLevel;
+ UINT8 errataRev;
+ UINT8 tpmVendorID[4];
+ UINT16 vendorSpecificSize;
+ UINT8 *vendorSpecific;
} TPM_CAP_VERSION_INFO;
///
/// Part 2, section 21.10: TPM_DA_ACTION_TYPE
///
typedef struct tdTPM_DA_ACTION_TYPE {
- TPM_STRUCTURE_TAG tag;
- UINT32 actions;
+ TPM_STRUCTURE_TAG tag;
+ UINT32 actions;
} TPM_DA_ACTION_TYPE;
-#define TPM_DA_ACTION_FAILURE_MODE (((UINT32)1)<<3)
-#define TPM_DA_ACTION_DEACTIVATE (((UINT32)1)<<2)
-#define TPM_DA_ACTION_DISABLE (((UINT32)1)<<1)
-#define TPM_DA_ACTION_TIMEOUT (((UINT32)1)<<0)
+#define TPM_DA_ACTION_FAILURE_MODE (((UINT32)1)<<3)
+#define TPM_DA_ACTION_DEACTIVATE (((UINT32)1)<<2)
+#define TPM_DA_ACTION_DISABLE (((UINT32)1)<<1)
+#define TPM_DA_ACTION_TIMEOUT (((UINT32)1)<<0)
///
/// Part 2, section 21.7: TPM_DA_INFO
///
typedef struct tdTPM_DA_INFO {
- TPM_STRUCTURE_TAG tag;
- TPM_DA_STATE state;
- UINT16 currentCount;
- UINT16 thresholdCount;
- TPM_DA_ACTION_TYPE actionAtThreshold;
- UINT32 actionDependValue;
- UINT32 vendorDataSize;
- UINT8 *vendorData;
+ TPM_STRUCTURE_TAG tag;
+ TPM_DA_STATE state;
+ UINT16 currentCount;
+ UINT16 thresholdCount;
+ TPM_DA_ACTION_TYPE actionAtThreshold;
+ UINT32 actionDependValue;
+ UINT32 vendorDataSize;
+ UINT8 *vendorData;
} TPM_DA_INFO;
///
/// Part 2, section 21.8: TPM_DA_INFO_LIMITED
///
typedef struct tdTPM_DA_INFO_LIMITED {
- TPM_STRUCTURE_TAG tag;
- TPM_DA_STATE state;
- TPM_DA_ACTION_TYPE actionAtThreshold;
- UINT32 vendorDataSize;
- UINT8 *vendorData;
+ TPM_STRUCTURE_TAG tag;
+ TPM_DA_STATE state;
+ TPM_DA_ACTION_TYPE actionAtThreshold;
+ UINT32 vendorDataSize;
+ UINT8 *vendorData;
} TPM_DA_INFO_LIMITED;
//
// Part 2, section 21.9: CAP_PROPERTY Subcap values for GetCapability
//
-#define TPM_DA_STATE_INACTIVE ((UINT8)0x00)
-#define TPM_DA_STATE_ACTIVE ((UINT8)0x01)
+#define TPM_DA_STATE_INACTIVE ((UINT8)0x00)
+#define TPM_DA_STATE_ACTIVE ((UINT8)0x01)
//
// Part 2, section 22: DAA Structures
@@ -2051,94 +2044,93 @@
//
// Part 2, section 22.1: Size definitions
//
-#define TPM_DAA_SIZE_r0 (43)
-#define TPM_DAA_SIZE_r1 (43)
-#define TPM_DAA_SIZE_r2 (128)
-#define TPM_DAA_SIZE_r3 (168)
-#define TPM_DAA_SIZE_r4 (219)
-#define TPM_DAA_SIZE_NT (20)
-#define TPM_DAA_SIZE_v0 (128)
-#define TPM_DAA_SIZE_v1 (192)
-#define TPM_DAA_SIZE_NE (256)
-#define TPM_DAA_SIZE_w (256)
-#define TPM_DAA_SIZE_issuerModulus (256)
+#define TPM_DAA_SIZE_r0 (43)
+#define TPM_DAA_SIZE_r1 (43)
+#define TPM_DAA_SIZE_r2 (128)
+#define TPM_DAA_SIZE_r3 (168)
+#define TPM_DAA_SIZE_r4 (219)
+#define TPM_DAA_SIZE_NT (20)
+#define TPM_DAA_SIZE_v0 (128)
+#define TPM_DAA_SIZE_v1 (192)
+#define TPM_DAA_SIZE_NE (256)
+#define TPM_DAA_SIZE_w (256)
+#define TPM_DAA_SIZE_issuerModulus (256)
//
// Part 2, section 22.2: Constant definitions
//
-#define TPM_DAA_power0 (104)
-#define TPM_DAA_power1 (1024)
+#define TPM_DAA_power0 (104)
+#define TPM_DAA_power1 (1024)
///
/// Part 2, section 22.3: TPM_DAA_ISSUER
///
typedef struct tdTPM_DAA_ISSUER {
- TPM_STRUCTURE_TAG tag;
- TPM_DIGEST DAA_digest_R0;
- TPM_DIGEST DAA_digest_R1;
- TPM_DIGEST DAA_digest_S0;
- TPM_DIGEST DAA_digest_S1;
- TPM_DIGEST DAA_digest_n;
- TPM_DIGEST DAA_digest_gamma;
- UINT8 DAA_generic_q[26];
+ TPM_STRUCTURE_TAG tag;
+ TPM_DIGEST DAA_digest_R0;
+ TPM_DIGEST DAA_digest_R1;
+ TPM_DIGEST DAA_digest_S0;
+ TPM_DIGEST DAA_digest_S1;
+ TPM_DIGEST DAA_digest_n;
+ TPM_DIGEST DAA_digest_gamma;
+ UINT8 DAA_generic_q[26];
} TPM_DAA_ISSUER;
///
/// Part 2, section 22.4: TPM_DAA_TPM
///
typedef struct tdTPM_DAA_TPM {
- TPM_STRUCTURE_TAG tag;
- TPM_DIGEST DAA_digestIssuer;
- TPM_DIGEST DAA_digest_v0;
- TPM_DIGEST DAA_digest_v1;
- TPM_DIGEST DAA_rekey;
- UINT32 DAA_count;
+ TPM_STRUCTURE_TAG tag;
+ TPM_DIGEST DAA_digestIssuer;
+ TPM_DIGEST DAA_digest_v0;
+ TPM_DIGEST DAA_digest_v1;
+ TPM_DIGEST DAA_rekey;
+ UINT32 DAA_count;
} TPM_DAA_TPM;
///
/// Part 2, section 22.5: TPM_DAA_CONTEXT
///
typedef struct tdTPM_DAA_CONTEXT {
- TPM_STRUCTURE_TAG tag;
- TPM_DIGEST DAA_digestContext;
- TPM_DIGEST DAA_digest;
- TPM_DAA_CONTEXT_SEED DAA_contextSeed;
- UINT8 DAA_scratch[256];
- UINT8 DAA_stage;
+ TPM_STRUCTURE_TAG tag;
+ TPM_DIGEST DAA_digestContext;
+ TPM_DIGEST DAA_digest;
+ TPM_DAA_CONTEXT_SEED DAA_contextSeed;
+ UINT8 DAA_scratch[256];
+ UINT8 DAA_stage;
} TPM_DAA_CONTEXT;
///
/// Part 2, section 22.6: TPM_DAA_JOINDATA
///
typedef struct tdTPM_DAA_JOINDATA {
- UINT8 DAA_join_u0[128];
- UINT8 DAA_join_u1[138];
- TPM_DIGEST DAA_digest_n0;
+ UINT8 DAA_join_u0[128];
+ UINT8 DAA_join_u1[138];
+ TPM_DIGEST DAA_digest_n0;
} TPM_DAA_JOINDATA;
///
/// Part 2, section 22.8: TPM_DAA_BLOB
///
typedef struct tdTPM_DAA_BLOB {
- TPM_STRUCTURE_TAG tag;
- TPM_RESOURCE_TYPE resourceType;
- UINT8 label[16];
- TPM_DIGEST blobIntegrity;
- UINT32 additionalSize;
- UINT8 *additionalData;
- UINT32 sensitiveSize;
- UINT8 *sensitiveData;
+ TPM_STRUCTURE_TAG tag;
+ TPM_RESOURCE_TYPE resourceType;
+ UINT8 label[16];
+ TPM_DIGEST blobIntegrity;
+ UINT32 additionalSize;
+ UINT8 *additionalData;
+ UINT32 sensitiveSize;
+ UINT8 *sensitiveData;
} TPM_DAA_BLOB;
///
/// Part 2, section 22.9: TPM_DAA_SENSITIVE
///
typedef struct tdTPM_DAA_SENSITIVE {
- TPM_STRUCTURE_TAG tag;
- UINT32 internalSize;
- UINT8 *internalData;
+ TPM_STRUCTURE_TAG tag;
+ UINT32 internalSize;
+ UINT8 *internalData;
} TPM_DAA_SENSITIVE;
-
//
// Part 2, section 23: Redirection
//
@@ -2150,24 +2142,24 @@
/// refers to exactly one name but does not give its value. We join
/// them here.
///
-#define TPM_REDIR_GPIO (0x00000001)
+#define TPM_REDIR_GPIO (0x00000001)
///
/// TPM Command Headers defined in Part 3
///
typedef struct tdTPM_RQU_COMMAND_HDR {
- TPM_STRUCTURE_TAG tag;
- UINT32 paramSize;
- TPM_COMMAND_CODE ordinal;
+ TPM_STRUCTURE_TAG tag;
+ UINT32 paramSize;
+ TPM_COMMAND_CODE ordinal;
} TPM_RQU_COMMAND_HDR;
///
/// TPM Response Headers defined in Part 3
///
typedef struct tdTPM_RSP_COMMAND_HDR {
- TPM_STRUCTURE_TAG tag;
- UINT32 paramSize;
- TPM_RESULT returnCode;
+ TPM_STRUCTURE_TAG tag;
+ UINT32 paramSize;
+ TPM_RESULT returnCode;
} TPM_RSP_COMMAND_HDR;
#pragma pack ()
diff --git a/src/include/ipxe/efi/IndustryStandard/Tpm20.h b/src/include/ipxe/efi/IndustryStandard/Tpm20.h
index 656bf21..b314d6e 100644
--- a/src/include/ipxe/efi/IndustryStandard/Tpm20.h
+++ b/src/include/ipxe/efi/IndustryStandard/Tpm20.h
@@ -6,21 +6,14 @@
Check http://trustedcomputinggroup.org for latest specification updates.
Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved. <BR>
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#ifndef _TPM20_H_
#define _TPM20_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/IndustryStandard/Tpm12.h>
@@ -29,121 +22,121 @@
// Annex A Algorithm Constants
// Table 205 - Defines for SHA1 Hash Values
-#define SHA1_DIGEST_SIZE 20
-#define SHA1_BLOCK_SIZE 64
+#define SHA1_DIGEST_SIZE 20
+#define SHA1_BLOCK_SIZE 64
// Table 206 - Defines for SHA256 Hash Values
-#define SHA256_DIGEST_SIZE 32
-#define SHA256_BLOCK_SIZE 64
+#define SHA256_DIGEST_SIZE 32
+#define SHA256_BLOCK_SIZE 64
// Table 207 - Defines for SHA384 Hash Values
-#define SHA384_DIGEST_SIZE 48
-#define SHA384_BLOCK_SIZE 128
+#define SHA384_DIGEST_SIZE 48
+#define SHA384_BLOCK_SIZE 128
// Table 208 - Defines for SHA512 Hash Values
-#define SHA512_DIGEST_SIZE 64
-#define SHA512_BLOCK_SIZE 128
+#define SHA512_DIGEST_SIZE 64
+#define SHA512_BLOCK_SIZE 128
// Table 209 - Defines for SM3_256 Hash Values
-#define SM3_256_DIGEST_SIZE 32
-#define SM3_256_BLOCK_SIZE 64
+#define SM3_256_DIGEST_SIZE 32
+#define SM3_256_BLOCK_SIZE 64
// Table 210 - Defines for Architectural Limits Values
-#define MAX_SESSION_NUMBER 3
+#define MAX_SESSION_NUMBER 3
// Annex B Implementation Definitions
// Table 211 - Defines for Logic Values
-#define YES 1
-#define NO 0
-#define SET 1
-#define CLEAR 0
+#define YES 1
+#define NO 0
+#define SET 1
+#define CLEAR 0
// Table 215 - Defines for RSA Algorithm Constants
-#define MAX_RSA_KEY_BITS 2048
-#define MAX_RSA_KEY_BYTES ((MAX_RSA_KEY_BITS + 7) / 8)
+#define MAX_RSA_KEY_BITS 2048
+#define MAX_RSA_KEY_BYTES ((MAX_RSA_KEY_BITS + 7) / 8)
// Table 216 - Defines for ECC Algorithm Constants
-#define MAX_ECC_KEY_BITS 256
-#define MAX_ECC_KEY_BYTES ((MAX_ECC_KEY_BITS + 7) / 8)
+#define MAX_ECC_KEY_BITS 256
+#define MAX_ECC_KEY_BYTES ((MAX_ECC_KEY_BITS + 7) / 8)
// Table 217 - Defines for AES Algorithm Constants
-#define MAX_AES_KEY_BITS 128
-#define MAX_AES_BLOCK_SIZE_BYTES 16
-#define MAX_AES_KEY_BYTES ((MAX_AES_KEY_BITS + 7) / 8)
+#define MAX_AES_KEY_BITS 128
+#define MAX_AES_BLOCK_SIZE_BYTES 16
+#define MAX_AES_KEY_BYTES ((MAX_AES_KEY_BITS + 7) / 8)
// Table 218 - Defines for SM4 Algorithm Constants
-#define MAX_SM4_KEY_BITS 128
-#define MAX_SM4_BLOCK_SIZE_BYTES 16
-#define MAX_SM4_KEY_BYTES ((MAX_SM4_KEY_BITS + 7) / 8)
+#define MAX_SM4_KEY_BITS 128
+#define MAX_SM4_BLOCK_SIZE_BYTES 16
+#define MAX_SM4_KEY_BYTES ((MAX_SM4_KEY_BITS + 7) / 8)
// Table 219 - Defines for Symmetric Algorithm Constants
-#define MAX_SYM_KEY_BITS MAX_AES_KEY_BITS
-#define MAX_SYM_KEY_BYTES MAX_AES_KEY_BYTES
-#define MAX_SYM_BLOCK_SIZE MAX_AES_BLOCK_SIZE_BYTES
+#define MAX_SYM_KEY_BITS MAX_AES_KEY_BITS
+#define MAX_SYM_KEY_BYTES MAX_AES_KEY_BYTES
+#define MAX_SYM_BLOCK_SIZE MAX_AES_BLOCK_SIZE_BYTES
// Table 220 - Defines for Implementation Values
-typedef UINT16 BSIZE;
-#define BUFFER_ALIGNMENT 4
-#define IMPLEMENTATION_PCR 24
-#define PLATFORM_PCR 24
-#define DRTM_PCR 17
-#define NUM_LOCALITIES 5
-#define MAX_HANDLE_NUM 3
-#define MAX_ACTIVE_SESSIONS 64
-typedef UINT16 CONTEXT_SLOT;
-typedef UINT64 CONTEXT_COUNTER;
-#define MAX_LOADED_SESSIONS 3
-#define MAX_SESSION_NUM 3
-#define MAX_LOADED_OBJECTS 3
-#define MIN_EVICT_OBJECTS 2
-#define PCR_SELECT_MIN ((PLATFORM_PCR + 7) / 8)
-#define PCR_SELECT_MAX ((IMPLEMENTATION_PCR + 7) / 8)
-#define NUM_POLICY_PCR_GROUP 1
-#define NUM_AUTHVALUE_PCR_GROUP 1
-#define MAX_CONTEXT_SIZE 4000
-#define MAX_DIGEST_BUFFER 1024
-#define MAX_NV_INDEX_SIZE 1024
-#define MAX_CAP_BUFFER 1024
-#define NV_MEMORY_SIZE 16384
-#define NUM_STATIC_PCR 16
-#define MAX_ALG_LIST_SIZE 64
-#define TIMER_PRESCALE 100000
-#define PRIMARY_SEED_SIZE 32
-#define CONTEXT_ENCRYPT_ALG TPM_ALG_AES
-#define CONTEXT_ENCRYPT_KEY_BITS MAX_SYM_KEY_BITS
-#define CONTEXT_ENCRYPT_KEY_BYTES ((CONTEXT_ENCRYPT_KEY_BITS + 7) / 8)
-#define CONTEXT_INTEGRITY_HASH_ALG TPM_ALG_SHA256
-#define CONTEXT_INTEGRITY_HASH_SIZE SHA256_DIGEST_SIZE
-#define PROOF_SIZE CONTEXT_INTEGRITY_HASH_SIZE
-#define NV_CLOCK_UPDATE_INTERVAL 12
-#define NUM_POLICY_PCR 1
-#define MAX_COMMAND_SIZE 4096
-#define MAX_RESPONSE_SIZE 4096
-#define ORDERLY_BITS 8
-#define MAX_ORDERLY_COUNT ((1 << ORDERLY_BITS) - 1)
-#define ALG_ID_FIRST TPM_ALG_FIRST
-#define ALG_ID_LAST TPM_ALG_LAST
-#define MAX_SYM_DATA 128
-#define MAX_RNG_ENTROPY_SIZE 64
-#define RAM_INDEX_SPACE 512
-#define RSA_DEFAULT_PUBLIC_EXPONENT 0x00010001
-#define CRT_FORMAT_RSA YES
-#define PRIVATE_VENDOR_SPECIFIC_BYTES ((MAX_RSA_KEY_BYTES / 2) * ( 3 + CRT_FORMAT_RSA * 2))
+typedef UINT16 BSIZE;
+#define BUFFER_ALIGNMENT 4
+#define IMPLEMENTATION_PCR 24
+#define PLATFORM_PCR 24
+#define DRTM_PCR 17
+#define NUM_LOCALITIES 5
+#define MAX_HANDLE_NUM 3
+#define MAX_ACTIVE_SESSIONS 64
+typedef UINT16 CONTEXT_SLOT;
+typedef UINT64 CONTEXT_COUNTER;
+#define MAX_LOADED_SESSIONS 3
+#define MAX_SESSION_NUM 3
+#define MAX_LOADED_OBJECTS 3
+#define MIN_EVICT_OBJECTS 2
+#define PCR_SELECT_MIN ((PLATFORM_PCR + 7) / 8)
+#define PCR_SELECT_MAX ((IMPLEMENTATION_PCR + 7) / 8)
+#define NUM_POLICY_PCR_GROUP 1
+#define NUM_AUTHVALUE_PCR_GROUP 1
+#define MAX_CONTEXT_SIZE 4000
+#define MAX_DIGEST_BUFFER 1024
+#define MAX_NV_INDEX_SIZE 1024
+#define MAX_CAP_BUFFER 1024
+#define NV_MEMORY_SIZE 16384
+#define NUM_STATIC_PCR 16
+#define MAX_ALG_LIST_SIZE 64
+#define TIMER_PRESCALE 100000
+#define PRIMARY_SEED_SIZE 32
+#define CONTEXT_ENCRYPT_ALG TPM_ALG_AES
+#define CONTEXT_ENCRYPT_KEY_BITS MAX_SYM_KEY_BITS
+#define CONTEXT_ENCRYPT_KEY_BYTES ((CONTEXT_ENCRYPT_KEY_BITS + 7) / 8)
+#define CONTEXT_INTEGRITY_HASH_ALG TPM_ALG_SHA256
+#define CONTEXT_INTEGRITY_HASH_SIZE SHA256_DIGEST_SIZE
+#define PROOF_SIZE CONTEXT_INTEGRITY_HASH_SIZE
+#define NV_CLOCK_UPDATE_INTERVAL 12
+#define NUM_POLICY_PCR 1
+#define MAX_COMMAND_SIZE 4096
+#define MAX_RESPONSE_SIZE 4096
+#define ORDERLY_BITS 8
+#define MAX_ORDERLY_COUNT ((1 << ORDERLY_BITS) - 1)
+#define ALG_ID_FIRST TPM_ALG_FIRST
+#define ALG_ID_LAST TPM_ALG_LAST
+#define MAX_SYM_DATA 128
+#define MAX_RNG_ENTROPY_SIZE 64
+#define RAM_INDEX_SPACE 512
+#define RSA_DEFAULT_PUBLIC_EXPONENT 0x00010001
+#define CRT_FORMAT_RSA YES
+#define PRIVATE_VENDOR_SPECIFIC_BYTES ((MAX_RSA_KEY_BYTES / 2) * ( 3 + CRT_FORMAT_RSA * 2))
// Capability related MAX_ value
-#define MAX_CAP_DATA (MAX_CAP_BUFFER - sizeof(TPM_CAP) - sizeof(UINT32))
-#define MAX_CAP_ALGS (MAX_CAP_DATA / sizeof(TPMS_ALG_PROPERTY))
-#define MAX_CAP_HANDLES (MAX_CAP_DATA / sizeof(TPM_HANDLE))
-#define MAX_CAP_CC (MAX_CAP_DATA / sizeof(TPM_CC))
-#define MAX_TPM_PROPERTIES (MAX_CAP_DATA / sizeof(TPMS_TAGGED_PROPERTY))
-#define MAX_PCR_PROPERTIES (MAX_CAP_DATA / sizeof(TPMS_TAGGED_PCR_SELECT))
-#define MAX_ECC_CURVES (MAX_CAP_DATA / sizeof(TPM_ECC_CURVE))
+#define MAX_CAP_DATA (MAX_CAP_BUFFER - sizeof(TPM_CAP) - sizeof(UINT32))
+#define MAX_CAP_ALGS (MAX_CAP_DATA / sizeof(TPMS_ALG_PROPERTY))
+#define MAX_CAP_HANDLES (MAX_CAP_DATA / sizeof(TPM_HANDLE))
+#define MAX_CAP_CC (MAX_CAP_DATA / sizeof(TPM_CC))
+#define MAX_TPM_PROPERTIES (MAX_CAP_DATA / sizeof(TPMS_TAGGED_PROPERTY))
+#define MAX_PCR_PROPERTIES (MAX_CAP_DATA / sizeof(TPMS_TAGGED_PCR_SELECT))
+#define MAX_ECC_CURVES (MAX_CAP_DATA / sizeof(TPM_ECC_CURVE))
//
// Always set 5 here, because we want to support all hash algo in BIOS.
//
-#define HASH_COUNT 5
+#define HASH_COUNT 5
// 5 Base Types
@@ -154,8 +147,8 @@
//
// NOTE: Comment because it has same name as TPM1.2 (value is same, so not runtime issue)
//
-//typedef UINT32 TPM_ALGORITHM_ID;
-//typedef UINT32 TPM_MODIFIER_INDICATOR;
+// typedef UINT32 TPM_ALGORITHM_ID;
+// typedef UINT32 TPM_MODIFIER_INDICATOR;
typedef UINT32 TPM_AUTHORIZATION_SIZE;
typedef UINT32 TPM_PARAMETER_SIZE;
typedef UINT16 TPM_KEY_SIZE;
@@ -165,481 +158,481 @@
// Table 6 - TPM_GENERATED Constants
typedef UINT32 TPM_GENERATED;
-#define TPM_GENERATED_VALUE (TPM_GENERATED)(0xff544347)
+#define TPM_GENERATED_VALUE (TPM_GENERATED)(0xff544347)
// Table 7 - TPM_ALG_ID Constants
typedef UINT16 TPM_ALG_ID;
//
// NOTE: Comment some algo which has same name as TPM1.2 (value is same, so not runtime issue)
//
-#define TPM_ALG_ERROR (TPM_ALG_ID)(0x0000)
-#define TPM_ALG_FIRST (TPM_ALG_ID)(0x0001)
-//#define TPM_ALG_RSA (TPM_ALG_ID)(0x0001)
-//#define TPM_ALG_SHA (TPM_ALG_ID)(0x0004)
-#define TPM_ALG_SHA1 (TPM_ALG_ID)(0x0004)
-//#define TPM_ALG_HMAC (TPM_ALG_ID)(0x0005)
-#define TPM_ALG_AES (TPM_ALG_ID)(0x0006)
-//#define TPM_ALG_MGF1 (TPM_ALG_ID)(0x0007)
-#define TPM_ALG_KEYEDHASH (TPM_ALG_ID)(0x0008)
-//#define TPM_ALG_XOR (TPM_ALG_ID)(0x000A)
-#define TPM_ALG_SHA256 (TPM_ALG_ID)(0x000B)
-#define TPM_ALG_SHA384 (TPM_ALG_ID)(0x000C)
-#define TPM_ALG_SHA512 (TPM_ALG_ID)(0x000D)
-#define TPM_ALG_NULL (TPM_ALG_ID)(0x0010)
-#define TPM_ALG_SM3_256 (TPM_ALG_ID)(0x0012)
-#define TPM_ALG_SM4 (TPM_ALG_ID)(0x0013)
-#define TPM_ALG_RSASSA (TPM_ALG_ID)(0x0014)
-#define TPM_ALG_RSAES (TPM_ALG_ID)(0x0015)
-#define TPM_ALG_RSAPSS (TPM_ALG_ID)(0x0016)
-#define TPM_ALG_OAEP (TPM_ALG_ID)(0x0017)
-#define TPM_ALG_ECDSA (TPM_ALG_ID)(0x0018)
-#define TPM_ALG_ECDH (TPM_ALG_ID)(0x0019)
-#define TPM_ALG_ECDAA (TPM_ALG_ID)(0x001A)
-#define TPM_ALG_SM2 (TPM_ALG_ID)(0x001B)
-#define TPM_ALG_ECSCHNORR (TPM_ALG_ID)(0x001C)
-#define TPM_ALG_ECMQV (TPM_ALG_ID)(0x001D)
-#define TPM_ALG_KDF1_SP800_56a (TPM_ALG_ID)(0x0020)
-#define TPM_ALG_KDF2 (TPM_ALG_ID)(0x0021)
-#define TPM_ALG_KDF1_SP800_108 (TPM_ALG_ID)(0x0022)
-#define TPM_ALG_ECC (TPM_ALG_ID)(0x0023)
-#define TPM_ALG_SYMCIPHER (TPM_ALG_ID)(0x0025)
-#define TPM_ALG_CTR (TPM_ALG_ID)(0x0040)
-#define TPM_ALG_OFB (TPM_ALG_ID)(0x0041)
-#define TPM_ALG_CBC (TPM_ALG_ID)(0x0042)
-#define TPM_ALG_CFB (TPM_ALG_ID)(0x0043)
-#define TPM_ALG_ECB (TPM_ALG_ID)(0x0044)
-#define TPM_ALG_LAST (TPM_ALG_ID)(0x0044)
+#define TPM_ALG_ERROR (TPM_ALG_ID)(0x0000)
+#define TPM_ALG_FIRST (TPM_ALG_ID)(0x0001)
+// #define TPM_ALG_RSA (TPM_ALG_ID)(0x0001)
+// #define TPM_ALG_SHA (TPM_ALG_ID)(0x0004)
+#define TPM_ALG_SHA1 (TPM_ALG_ID)(0x0004)
+// #define TPM_ALG_HMAC (TPM_ALG_ID)(0x0005)
+#define TPM_ALG_AES (TPM_ALG_ID)(0x0006)
+// #define TPM_ALG_MGF1 (TPM_ALG_ID)(0x0007)
+#define TPM_ALG_KEYEDHASH (TPM_ALG_ID)(0x0008)
+// #define TPM_ALG_XOR (TPM_ALG_ID)(0x000A)
+#define TPM_ALG_SHA256 (TPM_ALG_ID)(0x000B)
+#define TPM_ALG_SHA384 (TPM_ALG_ID)(0x000C)
+#define TPM_ALG_SHA512 (TPM_ALG_ID)(0x000D)
+#define TPM_ALG_NULL (TPM_ALG_ID)(0x0010)
+#define TPM_ALG_SM3_256 (TPM_ALG_ID)(0x0012)
+#define TPM_ALG_SM4 (TPM_ALG_ID)(0x0013)
+#define TPM_ALG_RSASSA (TPM_ALG_ID)(0x0014)
+#define TPM_ALG_RSAES (TPM_ALG_ID)(0x0015)
+#define TPM_ALG_RSAPSS (TPM_ALG_ID)(0x0016)
+#define TPM_ALG_OAEP (TPM_ALG_ID)(0x0017)
+#define TPM_ALG_ECDSA (TPM_ALG_ID)(0x0018)
+#define TPM_ALG_ECDH (TPM_ALG_ID)(0x0019)
+#define TPM_ALG_ECDAA (TPM_ALG_ID)(0x001A)
+#define TPM_ALG_SM2 (TPM_ALG_ID)(0x001B)
+#define TPM_ALG_ECSCHNORR (TPM_ALG_ID)(0x001C)
+#define TPM_ALG_ECMQV (TPM_ALG_ID)(0x001D)
+#define TPM_ALG_KDF1_SP800_56a (TPM_ALG_ID)(0x0020)
+#define TPM_ALG_KDF2 (TPM_ALG_ID)(0x0021)
+#define TPM_ALG_KDF1_SP800_108 (TPM_ALG_ID)(0x0022)
+#define TPM_ALG_ECC (TPM_ALG_ID)(0x0023)
+#define TPM_ALG_SYMCIPHER (TPM_ALG_ID)(0x0025)
+#define TPM_ALG_CTR (TPM_ALG_ID)(0x0040)
+#define TPM_ALG_OFB (TPM_ALG_ID)(0x0041)
+#define TPM_ALG_CBC (TPM_ALG_ID)(0x0042)
+#define TPM_ALG_CFB (TPM_ALG_ID)(0x0043)
+#define TPM_ALG_ECB (TPM_ALG_ID)(0x0044)
+#define TPM_ALG_LAST (TPM_ALG_ID)(0x0044)
// Table 8 - TPM_ECC_CURVE Constants
typedef UINT16 TPM_ECC_CURVE;
-#define TPM_ECC_NONE (TPM_ECC_CURVE)(0x0000)
-#define TPM_ECC_NIST_P192 (TPM_ECC_CURVE)(0x0001)
-#define TPM_ECC_NIST_P224 (TPM_ECC_CURVE)(0x0002)
-#define TPM_ECC_NIST_P256 (TPM_ECC_CURVE)(0x0003)
-#define TPM_ECC_NIST_P384 (TPM_ECC_CURVE)(0x0004)
-#define TPM_ECC_NIST_P521 (TPM_ECC_CURVE)(0x0005)
-#define TPM_ECC_BN_P256 (TPM_ECC_CURVE)(0x0010)
-#define TPM_ECC_BN_P638 (TPM_ECC_CURVE)(0x0011)
-#define TPM_ECC_SM2_P256 (TPM_ECC_CURVE)(0x0020)
+#define TPM_ECC_NONE (TPM_ECC_CURVE)(0x0000)
+#define TPM_ECC_NIST_P192 (TPM_ECC_CURVE)(0x0001)
+#define TPM_ECC_NIST_P224 (TPM_ECC_CURVE)(0x0002)
+#define TPM_ECC_NIST_P256 (TPM_ECC_CURVE)(0x0003)
+#define TPM_ECC_NIST_P384 (TPM_ECC_CURVE)(0x0004)
+#define TPM_ECC_NIST_P521 (TPM_ECC_CURVE)(0x0005)
+#define TPM_ECC_BN_P256 (TPM_ECC_CURVE)(0x0010)
+#define TPM_ECC_BN_P638 (TPM_ECC_CURVE)(0x0011)
+#define TPM_ECC_SM2_P256 (TPM_ECC_CURVE)(0x0020)
// Table 11 - TPM_CC Constants (Numeric Order)
typedef UINT32 TPM_CC;
-#define TPM_CC_FIRST (TPM_CC)(0x0000011F)
-#define TPM_CC_PP_FIRST (TPM_CC)(0x0000011F)
-#define TPM_CC_NV_UndefineSpaceSpecial (TPM_CC)(0x0000011F)
-#define TPM_CC_EvictControl (TPM_CC)(0x00000120)
-#define TPM_CC_HierarchyControl (TPM_CC)(0x00000121)
-#define TPM_CC_NV_UndefineSpace (TPM_CC)(0x00000122)
-#define TPM_CC_ChangeEPS (TPM_CC)(0x00000124)
-#define TPM_CC_ChangePPS (TPM_CC)(0x00000125)
-#define TPM_CC_Clear (TPM_CC)(0x00000126)
-#define TPM_CC_ClearControl (TPM_CC)(0x00000127)
-#define TPM_CC_ClockSet (TPM_CC)(0x00000128)
-#define TPM_CC_HierarchyChangeAuth (TPM_CC)(0x00000129)
-#define TPM_CC_NV_DefineSpace (TPM_CC)(0x0000012A)
-#define TPM_CC_PCR_Allocate (TPM_CC)(0x0000012B)
-#define TPM_CC_PCR_SetAuthPolicy (TPM_CC)(0x0000012C)
-#define TPM_CC_PP_Commands (TPM_CC)(0x0000012D)
-#define TPM_CC_SetPrimaryPolicy (TPM_CC)(0x0000012E)
-#define TPM_CC_FieldUpgradeStart (TPM_CC)(0x0000012F)
-#define TPM_CC_ClockRateAdjust (TPM_CC)(0x00000130)
-#define TPM_CC_CreatePrimary (TPM_CC)(0x00000131)
-#define TPM_CC_NV_GlobalWriteLock (TPM_CC)(0x00000132)
-#define TPM_CC_PP_LAST (TPM_CC)(0x00000132)
-#define TPM_CC_GetCommandAuditDigest (TPM_CC)(0x00000133)
-#define TPM_CC_NV_Increment (TPM_CC)(0x00000134)
-#define TPM_CC_NV_SetBits (TPM_CC)(0x00000135)
-#define TPM_CC_NV_Extend (TPM_CC)(0x00000136)
-#define TPM_CC_NV_Write (TPM_CC)(0x00000137)
-#define TPM_CC_NV_WriteLock (TPM_CC)(0x00000138)
-#define TPM_CC_DictionaryAttackLockReset (TPM_CC)(0x00000139)
-#define TPM_CC_DictionaryAttackParameters (TPM_CC)(0x0000013A)
-#define TPM_CC_NV_ChangeAuth (TPM_CC)(0x0000013B)
-#define TPM_CC_PCR_Event (TPM_CC)(0x0000013C)
-#define TPM_CC_PCR_Reset (TPM_CC)(0x0000013D)
-#define TPM_CC_SequenceComplete (TPM_CC)(0x0000013E)
-#define TPM_CC_SetAlgorithmSet (TPM_CC)(0x0000013F)
-#define TPM_CC_SetCommandCodeAuditStatus (TPM_CC)(0x00000140)
-#define TPM_CC_FieldUpgradeData (TPM_CC)(0x00000141)
-#define TPM_CC_IncrementalSelfTest (TPM_CC)(0x00000142)
-#define TPM_CC_SelfTest (TPM_CC)(0x00000143)
-#define TPM_CC_Startup (TPM_CC)(0x00000144)
-#define TPM_CC_Shutdown (TPM_CC)(0x00000145)
-#define TPM_CC_StirRandom (TPM_CC)(0x00000146)
-#define TPM_CC_ActivateCredential (TPM_CC)(0x00000147)
-#define TPM_CC_Certify (TPM_CC)(0x00000148)
-#define TPM_CC_PolicyNV (TPM_CC)(0x00000149)
-#define TPM_CC_CertifyCreation (TPM_CC)(0x0000014A)
-#define TPM_CC_Duplicate (TPM_CC)(0x0000014B)
-#define TPM_CC_GetTime (TPM_CC)(0x0000014C)
-#define TPM_CC_GetSessionAuditDigest (TPM_CC)(0x0000014D)
-#define TPM_CC_NV_Read (TPM_CC)(0x0000014E)
-#define TPM_CC_NV_ReadLock (TPM_CC)(0x0000014F)
-#define TPM_CC_ObjectChangeAuth (TPM_CC)(0x00000150)
-#define TPM_CC_PolicySecret (TPM_CC)(0x00000151)
-#define TPM_CC_Rewrap (TPM_CC)(0x00000152)
-#define TPM_CC_Create (TPM_CC)(0x00000153)
-#define TPM_CC_ECDH_ZGen (TPM_CC)(0x00000154)
-#define TPM_CC_HMAC (TPM_CC)(0x00000155)
-#define TPM_CC_Import (TPM_CC)(0x00000156)
-#define TPM_CC_Load (TPM_CC)(0x00000157)
-#define TPM_CC_Quote (TPM_CC)(0x00000158)
-#define TPM_CC_RSA_Decrypt (TPM_CC)(0x00000159)
-#define TPM_CC_HMAC_Start (TPM_CC)(0x0000015B)
-#define TPM_CC_SequenceUpdate (TPM_CC)(0x0000015C)
-#define TPM_CC_Sign (TPM_CC)(0x0000015D)
-#define TPM_CC_Unseal (TPM_CC)(0x0000015E)
-#define TPM_CC_PolicySigned (TPM_CC)(0x00000160)
-#define TPM_CC_ContextLoad (TPM_CC)(0x00000161)
-#define TPM_CC_ContextSave (TPM_CC)(0x00000162)
-#define TPM_CC_ECDH_KeyGen (TPM_CC)(0x00000163)
-#define TPM_CC_EncryptDecrypt (TPM_CC)(0x00000164)
-#define TPM_CC_FlushContext (TPM_CC)(0x00000165)
-#define TPM_CC_LoadExternal (TPM_CC)(0x00000167)
-#define TPM_CC_MakeCredential (TPM_CC)(0x00000168)
-#define TPM_CC_NV_ReadPublic (TPM_CC)(0x00000169)
-#define TPM_CC_PolicyAuthorize (TPM_CC)(0x0000016A)
-#define TPM_CC_PolicyAuthValue (TPM_CC)(0x0000016B)
-#define TPM_CC_PolicyCommandCode (TPM_CC)(0x0000016C)
-#define TPM_CC_PolicyCounterTimer (TPM_CC)(0x0000016D)
-#define TPM_CC_PolicyCpHash (TPM_CC)(0x0000016E)
-#define TPM_CC_PolicyLocality (TPM_CC)(0x0000016F)
-#define TPM_CC_PolicyNameHash (TPM_CC)(0x00000170)
-#define TPM_CC_PolicyOR (TPM_CC)(0x00000171)
-#define TPM_CC_PolicyTicket (TPM_CC)(0x00000172)
-#define TPM_CC_ReadPublic (TPM_CC)(0x00000173)
-#define TPM_CC_RSA_Encrypt (TPM_CC)(0x00000174)
-#define TPM_CC_StartAuthSession (TPM_CC)(0x00000176)
-#define TPM_CC_VerifySignature (TPM_CC)(0x00000177)
-#define TPM_CC_ECC_Parameters (TPM_CC)(0x00000178)
-#define TPM_CC_FirmwareRead (TPM_CC)(0x00000179)
-#define TPM_CC_GetCapability (TPM_CC)(0x0000017A)
-#define TPM_CC_GetRandom (TPM_CC)(0x0000017B)
-#define TPM_CC_GetTestResult (TPM_CC)(0x0000017C)
-#define TPM_CC_Hash (TPM_CC)(0x0000017D)
-#define TPM_CC_PCR_Read (TPM_CC)(0x0000017E)
-#define TPM_CC_PolicyPCR (TPM_CC)(0x0000017F)
-#define TPM_CC_PolicyRestart (TPM_CC)(0x00000180)
-#define TPM_CC_ReadClock (TPM_CC)(0x00000181)
-#define TPM_CC_PCR_Extend (TPM_CC)(0x00000182)
-#define TPM_CC_PCR_SetAuthValue (TPM_CC)(0x00000183)
-#define TPM_CC_NV_Certify (TPM_CC)(0x00000184)
-#define TPM_CC_EventSequenceComplete (TPM_CC)(0x00000185)
-#define TPM_CC_HashSequenceStart (TPM_CC)(0x00000186)
-#define TPM_CC_PolicyPhysicalPresence (TPM_CC)(0x00000187)
-#define TPM_CC_PolicyDuplicationSelect (TPM_CC)(0x00000188)
-#define TPM_CC_PolicyGetDigest (TPM_CC)(0x00000189)
-#define TPM_CC_TestParms (TPM_CC)(0x0000018A)
-#define TPM_CC_Commit (TPM_CC)(0x0000018B)
-#define TPM_CC_PolicyPassword (TPM_CC)(0x0000018C)
-#define TPM_CC_ZGen_2Phase (TPM_CC)(0x0000018D)
-#define TPM_CC_EC_Ephemeral (TPM_CC)(0x0000018E)
-#define TPM_CC_LAST (TPM_CC)(0x0000018E)
+#define TPM_CC_FIRST (TPM_CC)(0x0000011F)
+#define TPM_CC_PP_FIRST (TPM_CC)(0x0000011F)
+#define TPM_CC_NV_UndefineSpaceSpecial (TPM_CC)(0x0000011F)
+#define TPM_CC_EvictControl (TPM_CC)(0x00000120)
+#define TPM_CC_HierarchyControl (TPM_CC)(0x00000121)
+#define TPM_CC_NV_UndefineSpace (TPM_CC)(0x00000122)
+#define TPM_CC_ChangeEPS (TPM_CC)(0x00000124)
+#define TPM_CC_ChangePPS (TPM_CC)(0x00000125)
+#define TPM_CC_Clear (TPM_CC)(0x00000126)
+#define TPM_CC_ClearControl (TPM_CC)(0x00000127)
+#define TPM_CC_ClockSet (TPM_CC)(0x00000128)
+#define TPM_CC_HierarchyChangeAuth (TPM_CC)(0x00000129)
+#define TPM_CC_NV_DefineSpace (TPM_CC)(0x0000012A)
+#define TPM_CC_PCR_Allocate (TPM_CC)(0x0000012B)
+#define TPM_CC_PCR_SetAuthPolicy (TPM_CC)(0x0000012C)
+#define TPM_CC_PP_Commands (TPM_CC)(0x0000012D)
+#define TPM_CC_SetPrimaryPolicy (TPM_CC)(0x0000012E)
+#define TPM_CC_FieldUpgradeStart (TPM_CC)(0x0000012F)
+#define TPM_CC_ClockRateAdjust (TPM_CC)(0x00000130)
+#define TPM_CC_CreatePrimary (TPM_CC)(0x00000131)
+#define TPM_CC_NV_GlobalWriteLock (TPM_CC)(0x00000132)
+#define TPM_CC_PP_LAST (TPM_CC)(0x00000132)
+#define TPM_CC_GetCommandAuditDigest (TPM_CC)(0x00000133)
+#define TPM_CC_NV_Increment (TPM_CC)(0x00000134)
+#define TPM_CC_NV_SetBits (TPM_CC)(0x00000135)
+#define TPM_CC_NV_Extend (TPM_CC)(0x00000136)
+#define TPM_CC_NV_Write (TPM_CC)(0x00000137)
+#define TPM_CC_NV_WriteLock (TPM_CC)(0x00000138)
+#define TPM_CC_DictionaryAttackLockReset (TPM_CC)(0x00000139)
+#define TPM_CC_DictionaryAttackParameters (TPM_CC)(0x0000013A)
+#define TPM_CC_NV_ChangeAuth (TPM_CC)(0x0000013B)
+#define TPM_CC_PCR_Event (TPM_CC)(0x0000013C)
+#define TPM_CC_PCR_Reset (TPM_CC)(0x0000013D)
+#define TPM_CC_SequenceComplete (TPM_CC)(0x0000013E)
+#define TPM_CC_SetAlgorithmSet (TPM_CC)(0x0000013F)
+#define TPM_CC_SetCommandCodeAuditStatus (TPM_CC)(0x00000140)
+#define TPM_CC_FieldUpgradeData (TPM_CC)(0x00000141)
+#define TPM_CC_IncrementalSelfTest (TPM_CC)(0x00000142)
+#define TPM_CC_SelfTest (TPM_CC)(0x00000143)
+#define TPM_CC_Startup (TPM_CC)(0x00000144)
+#define TPM_CC_Shutdown (TPM_CC)(0x00000145)
+#define TPM_CC_StirRandom (TPM_CC)(0x00000146)
+#define TPM_CC_ActivateCredential (TPM_CC)(0x00000147)
+#define TPM_CC_Certify (TPM_CC)(0x00000148)
+#define TPM_CC_PolicyNV (TPM_CC)(0x00000149)
+#define TPM_CC_CertifyCreation (TPM_CC)(0x0000014A)
+#define TPM_CC_Duplicate (TPM_CC)(0x0000014B)
+#define TPM_CC_GetTime (TPM_CC)(0x0000014C)
+#define TPM_CC_GetSessionAuditDigest (TPM_CC)(0x0000014D)
+#define TPM_CC_NV_Read (TPM_CC)(0x0000014E)
+#define TPM_CC_NV_ReadLock (TPM_CC)(0x0000014F)
+#define TPM_CC_ObjectChangeAuth (TPM_CC)(0x00000150)
+#define TPM_CC_PolicySecret (TPM_CC)(0x00000151)
+#define TPM_CC_Rewrap (TPM_CC)(0x00000152)
+#define TPM_CC_Create (TPM_CC)(0x00000153)
+#define TPM_CC_ECDH_ZGen (TPM_CC)(0x00000154)
+#define TPM_CC_HMAC (TPM_CC)(0x00000155)
+#define TPM_CC_Import (TPM_CC)(0x00000156)
+#define TPM_CC_Load (TPM_CC)(0x00000157)
+#define TPM_CC_Quote (TPM_CC)(0x00000158)
+#define TPM_CC_RSA_Decrypt (TPM_CC)(0x00000159)
+#define TPM_CC_HMAC_Start (TPM_CC)(0x0000015B)
+#define TPM_CC_SequenceUpdate (TPM_CC)(0x0000015C)
+#define TPM_CC_Sign (TPM_CC)(0x0000015D)
+#define TPM_CC_Unseal (TPM_CC)(0x0000015E)
+#define TPM_CC_PolicySigned (TPM_CC)(0x00000160)
+#define TPM_CC_ContextLoad (TPM_CC)(0x00000161)
+#define TPM_CC_ContextSave (TPM_CC)(0x00000162)
+#define TPM_CC_ECDH_KeyGen (TPM_CC)(0x00000163)
+#define TPM_CC_EncryptDecrypt (TPM_CC)(0x00000164)
+#define TPM_CC_FlushContext (TPM_CC)(0x00000165)
+#define TPM_CC_LoadExternal (TPM_CC)(0x00000167)
+#define TPM_CC_MakeCredential (TPM_CC)(0x00000168)
+#define TPM_CC_NV_ReadPublic (TPM_CC)(0x00000169)
+#define TPM_CC_PolicyAuthorize (TPM_CC)(0x0000016A)
+#define TPM_CC_PolicyAuthValue (TPM_CC)(0x0000016B)
+#define TPM_CC_PolicyCommandCode (TPM_CC)(0x0000016C)
+#define TPM_CC_PolicyCounterTimer (TPM_CC)(0x0000016D)
+#define TPM_CC_PolicyCpHash (TPM_CC)(0x0000016E)
+#define TPM_CC_PolicyLocality (TPM_CC)(0x0000016F)
+#define TPM_CC_PolicyNameHash (TPM_CC)(0x00000170)
+#define TPM_CC_PolicyOR (TPM_CC)(0x00000171)
+#define TPM_CC_PolicyTicket (TPM_CC)(0x00000172)
+#define TPM_CC_ReadPublic (TPM_CC)(0x00000173)
+#define TPM_CC_RSA_Encrypt (TPM_CC)(0x00000174)
+#define TPM_CC_StartAuthSession (TPM_CC)(0x00000176)
+#define TPM_CC_VerifySignature (TPM_CC)(0x00000177)
+#define TPM_CC_ECC_Parameters (TPM_CC)(0x00000178)
+#define TPM_CC_FirmwareRead (TPM_CC)(0x00000179)
+#define TPM_CC_GetCapability (TPM_CC)(0x0000017A)
+#define TPM_CC_GetRandom (TPM_CC)(0x0000017B)
+#define TPM_CC_GetTestResult (TPM_CC)(0x0000017C)
+#define TPM_CC_Hash (TPM_CC)(0x0000017D)
+#define TPM_CC_PCR_Read (TPM_CC)(0x0000017E)
+#define TPM_CC_PolicyPCR (TPM_CC)(0x0000017F)
+#define TPM_CC_PolicyRestart (TPM_CC)(0x00000180)
+#define TPM_CC_ReadClock (TPM_CC)(0x00000181)
+#define TPM_CC_PCR_Extend (TPM_CC)(0x00000182)
+#define TPM_CC_PCR_SetAuthValue (TPM_CC)(0x00000183)
+#define TPM_CC_NV_Certify (TPM_CC)(0x00000184)
+#define TPM_CC_EventSequenceComplete (TPM_CC)(0x00000185)
+#define TPM_CC_HashSequenceStart (TPM_CC)(0x00000186)
+#define TPM_CC_PolicyPhysicalPresence (TPM_CC)(0x00000187)
+#define TPM_CC_PolicyDuplicationSelect (TPM_CC)(0x00000188)
+#define TPM_CC_PolicyGetDigest (TPM_CC)(0x00000189)
+#define TPM_CC_TestParms (TPM_CC)(0x0000018A)
+#define TPM_CC_Commit (TPM_CC)(0x0000018B)
+#define TPM_CC_PolicyPassword (TPM_CC)(0x0000018C)
+#define TPM_CC_ZGen_2Phase (TPM_CC)(0x0000018D)
+#define TPM_CC_EC_Ephemeral (TPM_CC)(0x0000018E)
+#define TPM_CC_LAST (TPM_CC)(0x0000018E)
// Table 15 - TPM_RC Constants (Actions)
typedef UINT32 TPM_RC;
-#define TPM_RC_SUCCESS (TPM_RC)(0x000)
-#define TPM_RC_BAD_TAG (TPM_RC)(0x030)
-#define RC_VER1 (TPM_RC)(0x100)
-#define TPM_RC_INITIALIZE (TPM_RC)(RC_VER1 + 0x000)
-#define TPM_RC_FAILURE (TPM_RC)(RC_VER1 + 0x001)
-#define TPM_RC_SEQUENCE (TPM_RC)(RC_VER1 + 0x003)
-#define TPM_RC_PRIVATE (TPM_RC)(RC_VER1 + 0x00B)
-#define TPM_RC_HMAC (TPM_RC)(RC_VER1 + 0x019)
-#define TPM_RC_DISABLED (TPM_RC)(RC_VER1 + 0x020)
-#define TPM_RC_EXCLUSIVE (TPM_RC)(RC_VER1 + 0x021)
-#define TPM_RC_AUTH_TYPE (TPM_RC)(RC_VER1 + 0x024)
-#define TPM_RC_AUTH_MISSING (TPM_RC)(RC_VER1 + 0x025)
-#define TPM_RC_POLICY (TPM_RC)(RC_VER1 + 0x026)
-#define TPM_RC_PCR (TPM_RC)(RC_VER1 + 0x027)
-#define TPM_RC_PCR_CHANGED (TPM_RC)(RC_VER1 + 0x028)
-#define TPM_RC_UPGRADE (TPM_RC)(RC_VER1 + 0x02D)
-#define TPM_RC_TOO_MANY_CONTEXTS (TPM_RC)(RC_VER1 + 0x02E)
-#define TPM_RC_AUTH_UNAVAILABLE (TPM_RC)(RC_VER1 + 0x02F)
-#define TPM_RC_REBOOT (TPM_RC)(RC_VER1 + 0x030)
-#define TPM_RC_UNBALANCED (TPM_RC)(RC_VER1 + 0x031)
-#define TPM_RC_COMMAND_SIZE (TPM_RC)(RC_VER1 + 0x042)
-#define TPM_RC_COMMAND_CODE (TPM_RC)(RC_VER1 + 0x043)
-#define TPM_RC_AUTHSIZE (TPM_RC)(RC_VER1 + 0x044)
-#define TPM_RC_AUTH_CONTEXT (TPM_RC)(RC_VER1 + 0x045)
-#define TPM_RC_NV_RANGE (TPM_RC)(RC_VER1 + 0x046)
-#define TPM_RC_NV_SIZE (TPM_RC)(RC_VER1 + 0x047)
-#define TPM_RC_NV_LOCKED (TPM_RC)(RC_VER1 + 0x048)
-#define TPM_RC_NV_AUTHORIZATION (TPM_RC)(RC_VER1 + 0x049)
-#define TPM_RC_NV_UNINITIALIZED (TPM_RC)(RC_VER1 + 0x04A)
-#define TPM_RC_NV_SPACE (TPM_RC)(RC_VER1 + 0x04B)
-#define TPM_RC_NV_DEFINED (TPM_RC)(RC_VER1 + 0x04C)
-#define TPM_RC_BAD_CONTEXT (TPM_RC)(RC_VER1 + 0x050)
-#define TPM_RC_CPHASH (TPM_RC)(RC_VER1 + 0x051)
-#define TPM_RC_PARENT (TPM_RC)(RC_VER1 + 0x052)
-#define TPM_RC_NEEDS_TEST (TPM_RC)(RC_VER1 + 0x053)
-#define TPM_RC_NO_RESULT (TPM_RC)(RC_VER1 + 0x054)
-#define TPM_RC_SENSITIVE (TPM_RC)(RC_VER1 + 0x055)
-#define RC_MAX_FM0 (TPM_RC)(RC_VER1 + 0x07F)
-#define RC_FMT1 (TPM_RC)(0x080)
-#define TPM_RC_ASYMMETRIC (TPM_RC)(RC_FMT1 + 0x001)
-#define TPM_RC_ATTRIBUTES (TPM_RC)(RC_FMT1 + 0x002)
-#define TPM_RC_HASH (TPM_RC)(RC_FMT1 + 0x003)
-#define TPM_RC_VALUE (TPM_RC)(RC_FMT1 + 0x004)
-#define TPM_RC_HIERARCHY (TPM_RC)(RC_FMT1 + 0x005)
-#define TPM_RC_KEY_SIZE (TPM_RC)(RC_FMT1 + 0x007)
-#define TPM_RC_MGF (TPM_RC)(RC_FMT1 + 0x008)
-#define TPM_RC_MODE (TPM_RC)(RC_FMT1 + 0x009)
-#define TPM_RC_TYPE (TPM_RC)(RC_FMT1 + 0x00A)
-#define TPM_RC_HANDLE (TPM_RC)(RC_FMT1 + 0x00B)
-#define TPM_RC_KDF (TPM_RC)(RC_FMT1 + 0x00C)
-#define TPM_RC_RANGE (TPM_RC)(RC_FMT1 + 0x00D)
-#define TPM_RC_AUTH_FAIL (TPM_RC)(RC_FMT1 + 0x00E)
-#define TPM_RC_NONCE (TPM_RC)(RC_FMT1 + 0x00F)
-#define TPM_RC_PP (TPM_RC)(RC_FMT1 + 0x010)
-#define TPM_RC_SCHEME (TPM_RC)(RC_FMT1 + 0x012)
-#define TPM_RC_SIZE (TPM_RC)(RC_FMT1 + 0x015)
-#define TPM_RC_SYMMETRIC (TPM_RC)(RC_FMT1 + 0x016)
-#define TPM_RC_TAG (TPM_RC)(RC_FMT1 + 0x017)
-#define TPM_RC_SELECTOR (TPM_RC)(RC_FMT1 + 0x018)
-#define TPM_RC_INSUFFICIENT (TPM_RC)(RC_FMT1 + 0x01A)
-#define TPM_RC_SIGNATURE (TPM_RC)(RC_FMT1 + 0x01B)
-#define TPM_RC_KEY (TPM_RC)(RC_FMT1 + 0x01C)
-#define TPM_RC_POLICY_FAIL (TPM_RC)(RC_FMT1 + 0x01D)
-#define TPM_RC_INTEGRITY (TPM_RC)(RC_FMT1 + 0x01F)
-#define TPM_RC_TICKET (TPM_RC)(RC_FMT1 + 0x020)
-#define TPM_RC_RESERVED_BITS (TPM_RC)(RC_FMT1 + 0x021)
-#define TPM_RC_BAD_AUTH (TPM_RC)(RC_FMT1 + 0x022)
-#define TPM_RC_EXPIRED (TPM_RC)(RC_FMT1 + 0x023)
-#define TPM_RC_POLICY_CC (TPM_RC)(RC_FMT1 + 0x024 )
-#define TPM_RC_BINDING (TPM_RC)(RC_FMT1 + 0x025)
-#define TPM_RC_CURVE (TPM_RC)(RC_FMT1 + 0x026)
-#define TPM_RC_ECC_POINT (TPM_RC)(RC_FMT1 + 0x027)
-#define RC_WARN (TPM_RC)(0x900)
-#define TPM_RC_CONTEXT_GAP (TPM_RC)(RC_WARN + 0x001)
-#define TPM_RC_OBJECT_MEMORY (TPM_RC)(RC_WARN + 0x002)
-#define TPM_RC_SESSION_MEMORY (TPM_RC)(RC_WARN + 0x003)
-#define TPM_RC_MEMORY (TPM_RC)(RC_WARN + 0x004)
-#define TPM_RC_SESSION_HANDLES (TPM_RC)(RC_WARN + 0x005)
-#define TPM_RC_OBJECT_HANDLES (TPM_RC)(RC_WARN + 0x006)
-#define TPM_RC_LOCALITY (TPM_RC)(RC_WARN + 0x007)
-#define TPM_RC_YIELDED (TPM_RC)(RC_WARN + 0x008)
-#define TPM_RC_CANCELED (TPM_RC)(RC_WARN + 0x009)
-#define TPM_RC_TESTING (TPM_RC)(RC_WARN + 0x00A)
-#define TPM_RC_REFERENCE_H0 (TPM_RC)(RC_WARN + 0x010)
-#define TPM_RC_REFERENCE_H1 (TPM_RC)(RC_WARN + 0x011)
-#define TPM_RC_REFERENCE_H2 (TPM_RC)(RC_WARN + 0x012)
-#define TPM_RC_REFERENCE_H3 (TPM_RC)(RC_WARN + 0x013)
-#define TPM_RC_REFERENCE_H4 (TPM_RC)(RC_WARN + 0x014)
-#define TPM_RC_REFERENCE_H5 (TPM_RC)(RC_WARN + 0x015)
-#define TPM_RC_REFERENCE_H6 (TPM_RC)(RC_WARN + 0x016)
-#define TPM_RC_REFERENCE_S0 (TPM_RC)(RC_WARN + 0x018)
-#define TPM_RC_REFERENCE_S1 (TPM_RC)(RC_WARN + 0x019)
-#define TPM_RC_REFERENCE_S2 (TPM_RC)(RC_WARN + 0x01A)
-#define TPM_RC_REFERENCE_S3 (TPM_RC)(RC_WARN + 0x01B)
-#define TPM_RC_REFERENCE_S4 (TPM_RC)(RC_WARN + 0x01C)
-#define TPM_RC_REFERENCE_S5 (TPM_RC)(RC_WARN + 0x01D)
-#define TPM_RC_REFERENCE_S6 (TPM_RC)(RC_WARN + 0x01E)
-#define TPM_RC_NV_RATE (TPM_RC)(RC_WARN + 0x020)
-#define TPM_RC_LOCKOUT (TPM_RC)(RC_WARN + 0x021)
-#define TPM_RC_RETRY (TPM_RC)(RC_WARN + 0x022)
-#define TPM_RC_NV_UNAVAILABLE (TPM_RC)(RC_WARN + 0x023)
-#define TPM_RC_NOT_USED (TPM_RC)(RC_WARN + 0x7F)
-#define TPM_RC_H (TPM_RC)(0x000)
-#define TPM_RC_P (TPM_RC)(0x040)
-#define TPM_RC_S (TPM_RC)(0x800)
-#define TPM_RC_1 (TPM_RC)(0x100)
-#define TPM_RC_2 (TPM_RC)(0x200)
-#define TPM_RC_3 (TPM_RC)(0x300)
-#define TPM_RC_4 (TPM_RC)(0x400)
-#define TPM_RC_5 (TPM_RC)(0x500)
-#define TPM_RC_6 (TPM_RC)(0x600)
-#define TPM_RC_7 (TPM_RC)(0x700)
-#define TPM_RC_8 (TPM_RC)(0x800)
-#define TPM_RC_9 (TPM_RC)(0x900)
-#define TPM_RC_A (TPM_RC)(0xA00)
-#define TPM_RC_B (TPM_RC)(0xB00)
-#define TPM_RC_C (TPM_RC)(0xC00)
-#define TPM_RC_D (TPM_RC)(0xD00)
-#define TPM_RC_E (TPM_RC)(0xE00)
-#define TPM_RC_F (TPM_RC)(0xF00)
-#define TPM_RC_N_MASK (TPM_RC)(0xF00)
+#define TPM_RC_SUCCESS (TPM_RC)(0x000)
+#define TPM_RC_BAD_TAG (TPM_RC)(0x030)
+#define RC_VER1 (TPM_RC)(0x100)
+#define TPM_RC_INITIALIZE (TPM_RC)(RC_VER1 + 0x000)
+#define TPM_RC_FAILURE (TPM_RC)(RC_VER1 + 0x001)
+#define TPM_RC_SEQUENCE (TPM_RC)(RC_VER1 + 0x003)
+#define TPM_RC_PRIVATE (TPM_RC)(RC_VER1 + 0x00B)
+#define TPM_RC_HMAC (TPM_RC)(RC_VER1 + 0x019)
+#define TPM_RC_DISABLED (TPM_RC)(RC_VER1 + 0x020)
+#define TPM_RC_EXCLUSIVE (TPM_RC)(RC_VER1 + 0x021)
+#define TPM_RC_AUTH_TYPE (TPM_RC)(RC_VER1 + 0x024)
+#define TPM_RC_AUTH_MISSING (TPM_RC)(RC_VER1 + 0x025)
+#define TPM_RC_POLICY (TPM_RC)(RC_VER1 + 0x026)
+#define TPM_RC_PCR (TPM_RC)(RC_VER1 + 0x027)
+#define TPM_RC_PCR_CHANGED (TPM_RC)(RC_VER1 + 0x028)
+#define TPM_RC_UPGRADE (TPM_RC)(RC_VER1 + 0x02D)
+#define TPM_RC_TOO_MANY_CONTEXTS (TPM_RC)(RC_VER1 + 0x02E)
+#define TPM_RC_AUTH_UNAVAILABLE (TPM_RC)(RC_VER1 + 0x02F)
+#define TPM_RC_REBOOT (TPM_RC)(RC_VER1 + 0x030)
+#define TPM_RC_UNBALANCED (TPM_RC)(RC_VER1 + 0x031)
+#define TPM_RC_COMMAND_SIZE (TPM_RC)(RC_VER1 + 0x042)
+#define TPM_RC_COMMAND_CODE (TPM_RC)(RC_VER1 + 0x043)
+#define TPM_RC_AUTHSIZE (TPM_RC)(RC_VER1 + 0x044)
+#define TPM_RC_AUTH_CONTEXT (TPM_RC)(RC_VER1 + 0x045)
+#define TPM_RC_NV_RANGE (TPM_RC)(RC_VER1 + 0x046)
+#define TPM_RC_NV_SIZE (TPM_RC)(RC_VER1 + 0x047)
+#define TPM_RC_NV_LOCKED (TPM_RC)(RC_VER1 + 0x048)
+#define TPM_RC_NV_AUTHORIZATION (TPM_RC)(RC_VER1 + 0x049)
+#define TPM_RC_NV_UNINITIALIZED (TPM_RC)(RC_VER1 + 0x04A)
+#define TPM_RC_NV_SPACE (TPM_RC)(RC_VER1 + 0x04B)
+#define TPM_RC_NV_DEFINED (TPM_RC)(RC_VER1 + 0x04C)
+#define TPM_RC_BAD_CONTEXT (TPM_RC)(RC_VER1 + 0x050)
+#define TPM_RC_CPHASH (TPM_RC)(RC_VER1 + 0x051)
+#define TPM_RC_PARENT (TPM_RC)(RC_VER1 + 0x052)
+#define TPM_RC_NEEDS_TEST (TPM_RC)(RC_VER1 + 0x053)
+#define TPM_RC_NO_RESULT (TPM_RC)(RC_VER1 + 0x054)
+#define TPM_RC_SENSITIVE (TPM_RC)(RC_VER1 + 0x055)
+#define RC_MAX_FM0 (TPM_RC)(RC_VER1 + 0x07F)
+#define RC_FMT1 (TPM_RC)(0x080)
+#define TPM_RC_ASYMMETRIC (TPM_RC)(RC_FMT1 + 0x001)
+#define TPM_RC_ATTRIBUTES (TPM_RC)(RC_FMT1 + 0x002)
+#define TPM_RC_HASH (TPM_RC)(RC_FMT1 + 0x003)
+#define TPM_RC_VALUE (TPM_RC)(RC_FMT1 + 0x004)
+#define TPM_RC_HIERARCHY (TPM_RC)(RC_FMT1 + 0x005)
+#define TPM_RC_KEY_SIZE (TPM_RC)(RC_FMT1 + 0x007)
+#define TPM_RC_MGF (TPM_RC)(RC_FMT1 + 0x008)
+#define TPM_RC_MODE (TPM_RC)(RC_FMT1 + 0x009)
+#define TPM_RC_TYPE (TPM_RC)(RC_FMT1 + 0x00A)
+#define TPM_RC_HANDLE (TPM_RC)(RC_FMT1 + 0x00B)
+#define TPM_RC_KDF (TPM_RC)(RC_FMT1 + 0x00C)
+#define TPM_RC_RANGE (TPM_RC)(RC_FMT1 + 0x00D)
+#define TPM_RC_AUTH_FAIL (TPM_RC)(RC_FMT1 + 0x00E)
+#define TPM_RC_NONCE (TPM_RC)(RC_FMT1 + 0x00F)
+#define TPM_RC_PP (TPM_RC)(RC_FMT1 + 0x010)
+#define TPM_RC_SCHEME (TPM_RC)(RC_FMT1 + 0x012)
+#define TPM_RC_SIZE (TPM_RC)(RC_FMT1 + 0x015)
+#define TPM_RC_SYMMETRIC (TPM_RC)(RC_FMT1 + 0x016)
+#define TPM_RC_TAG (TPM_RC)(RC_FMT1 + 0x017)
+#define TPM_RC_SELECTOR (TPM_RC)(RC_FMT1 + 0x018)
+#define TPM_RC_INSUFFICIENT (TPM_RC)(RC_FMT1 + 0x01A)
+#define TPM_RC_SIGNATURE (TPM_RC)(RC_FMT1 + 0x01B)
+#define TPM_RC_KEY (TPM_RC)(RC_FMT1 + 0x01C)
+#define TPM_RC_POLICY_FAIL (TPM_RC)(RC_FMT1 + 0x01D)
+#define TPM_RC_INTEGRITY (TPM_RC)(RC_FMT1 + 0x01F)
+#define TPM_RC_TICKET (TPM_RC)(RC_FMT1 + 0x020)
+#define TPM_RC_RESERVED_BITS (TPM_RC)(RC_FMT1 + 0x021)
+#define TPM_RC_BAD_AUTH (TPM_RC)(RC_FMT1 + 0x022)
+#define TPM_RC_EXPIRED (TPM_RC)(RC_FMT1 + 0x023)
+#define TPM_RC_POLICY_CC (TPM_RC)(RC_FMT1 + 0x024 )
+#define TPM_RC_BINDING (TPM_RC)(RC_FMT1 + 0x025)
+#define TPM_RC_CURVE (TPM_RC)(RC_FMT1 + 0x026)
+#define TPM_RC_ECC_POINT (TPM_RC)(RC_FMT1 + 0x027)
+#define RC_WARN (TPM_RC)(0x900)
+#define TPM_RC_CONTEXT_GAP (TPM_RC)(RC_WARN + 0x001)
+#define TPM_RC_OBJECT_MEMORY (TPM_RC)(RC_WARN + 0x002)
+#define TPM_RC_SESSION_MEMORY (TPM_RC)(RC_WARN + 0x003)
+#define TPM_RC_MEMORY (TPM_RC)(RC_WARN + 0x004)
+#define TPM_RC_SESSION_HANDLES (TPM_RC)(RC_WARN + 0x005)
+#define TPM_RC_OBJECT_HANDLES (TPM_RC)(RC_WARN + 0x006)
+#define TPM_RC_LOCALITY (TPM_RC)(RC_WARN + 0x007)
+#define TPM_RC_YIELDED (TPM_RC)(RC_WARN + 0x008)
+#define TPM_RC_CANCELED (TPM_RC)(RC_WARN + 0x009)
+#define TPM_RC_TESTING (TPM_RC)(RC_WARN + 0x00A)
+#define TPM_RC_REFERENCE_H0 (TPM_RC)(RC_WARN + 0x010)
+#define TPM_RC_REFERENCE_H1 (TPM_RC)(RC_WARN + 0x011)
+#define TPM_RC_REFERENCE_H2 (TPM_RC)(RC_WARN + 0x012)
+#define TPM_RC_REFERENCE_H3 (TPM_RC)(RC_WARN + 0x013)
+#define TPM_RC_REFERENCE_H4 (TPM_RC)(RC_WARN + 0x014)
+#define TPM_RC_REFERENCE_H5 (TPM_RC)(RC_WARN + 0x015)
+#define TPM_RC_REFERENCE_H6 (TPM_RC)(RC_WARN + 0x016)
+#define TPM_RC_REFERENCE_S0 (TPM_RC)(RC_WARN + 0x018)
+#define TPM_RC_REFERENCE_S1 (TPM_RC)(RC_WARN + 0x019)
+#define TPM_RC_REFERENCE_S2 (TPM_RC)(RC_WARN + 0x01A)
+#define TPM_RC_REFERENCE_S3 (TPM_RC)(RC_WARN + 0x01B)
+#define TPM_RC_REFERENCE_S4 (TPM_RC)(RC_WARN + 0x01C)
+#define TPM_RC_REFERENCE_S5 (TPM_RC)(RC_WARN + 0x01D)
+#define TPM_RC_REFERENCE_S6 (TPM_RC)(RC_WARN + 0x01E)
+#define TPM_RC_NV_RATE (TPM_RC)(RC_WARN + 0x020)
+#define TPM_RC_LOCKOUT (TPM_RC)(RC_WARN + 0x021)
+#define TPM_RC_RETRY (TPM_RC)(RC_WARN + 0x022)
+#define TPM_RC_NV_UNAVAILABLE (TPM_RC)(RC_WARN + 0x023)
+#define TPM_RC_NOT_USED (TPM_RC)(RC_WARN + 0x7F)
+#define TPM_RC_H (TPM_RC)(0x000)
+#define TPM_RC_P (TPM_RC)(0x040)
+#define TPM_RC_S (TPM_RC)(0x800)
+#define TPM_RC_1 (TPM_RC)(0x100)
+#define TPM_RC_2 (TPM_RC)(0x200)
+#define TPM_RC_3 (TPM_RC)(0x300)
+#define TPM_RC_4 (TPM_RC)(0x400)
+#define TPM_RC_5 (TPM_RC)(0x500)
+#define TPM_RC_6 (TPM_RC)(0x600)
+#define TPM_RC_7 (TPM_RC)(0x700)
+#define TPM_RC_8 (TPM_RC)(0x800)
+#define TPM_RC_9 (TPM_RC)(0x900)
+#define TPM_RC_A (TPM_RC)(0xA00)
+#define TPM_RC_B (TPM_RC)(0xB00)
+#define TPM_RC_C (TPM_RC)(0xC00)
+#define TPM_RC_D (TPM_RC)(0xD00)
+#define TPM_RC_E (TPM_RC)(0xE00)
+#define TPM_RC_F (TPM_RC)(0xF00)
+#define TPM_RC_N_MASK (TPM_RC)(0xF00)
// Table 16 - TPM_CLOCK_ADJUST Constants
typedef INT8 TPM_CLOCK_ADJUST;
-#define TPM_CLOCK_COARSE_SLOWER (TPM_CLOCK_ADJUST)(-3)
-#define TPM_CLOCK_MEDIUM_SLOWER (TPM_CLOCK_ADJUST)(-2)
-#define TPM_CLOCK_FINE_SLOWER (TPM_CLOCK_ADJUST)(-1)
-#define TPM_CLOCK_NO_CHANGE (TPM_CLOCK_ADJUST)(0)
-#define TPM_CLOCK_FINE_FASTER (TPM_CLOCK_ADJUST)(1)
-#define TPM_CLOCK_MEDIUM_FASTER (TPM_CLOCK_ADJUST)(2)
-#define TPM_CLOCK_COARSE_FASTER (TPM_CLOCK_ADJUST)(3)
+#define TPM_CLOCK_COARSE_SLOWER (TPM_CLOCK_ADJUST)(-3)
+#define TPM_CLOCK_MEDIUM_SLOWER (TPM_CLOCK_ADJUST)(-2)
+#define TPM_CLOCK_FINE_SLOWER (TPM_CLOCK_ADJUST)(-1)
+#define TPM_CLOCK_NO_CHANGE (TPM_CLOCK_ADJUST)(0)
+#define TPM_CLOCK_FINE_FASTER (TPM_CLOCK_ADJUST)(1)
+#define TPM_CLOCK_MEDIUM_FASTER (TPM_CLOCK_ADJUST)(2)
+#define TPM_CLOCK_COARSE_FASTER (TPM_CLOCK_ADJUST)(3)
// Table 17 - TPM_EO Constants
typedef UINT16 TPM_EO;
-#define TPM_EO_EQ (TPM_EO)(0x0000)
-#define TPM_EO_NEQ (TPM_EO)(0x0001)
-#define TPM_EO_SIGNED_GT (TPM_EO)(0x0002)
-#define TPM_EO_UNSIGNED_GT (TPM_EO)(0x0003)
-#define TPM_EO_SIGNED_LT (TPM_EO)(0x0004)
-#define TPM_EO_UNSIGNED_LT (TPM_EO)(0x0005)
-#define TPM_EO_SIGNED_GE (TPM_EO)(0x0006)
-#define TPM_EO_UNSIGNED_GE (TPM_EO)(0x0007)
-#define TPM_EO_SIGNED_LE (TPM_EO)(0x0008)
-#define TPM_EO_UNSIGNED_LE (TPM_EO)(0x0009)
-#define TPM_EO_BITSET (TPM_EO)(0x000A)
-#define TPM_EO_BITCLEAR (TPM_EO)(0x000B)
+#define TPM_EO_EQ (TPM_EO)(0x0000)
+#define TPM_EO_NEQ (TPM_EO)(0x0001)
+#define TPM_EO_SIGNED_GT (TPM_EO)(0x0002)
+#define TPM_EO_UNSIGNED_GT (TPM_EO)(0x0003)
+#define TPM_EO_SIGNED_LT (TPM_EO)(0x0004)
+#define TPM_EO_UNSIGNED_LT (TPM_EO)(0x0005)
+#define TPM_EO_SIGNED_GE (TPM_EO)(0x0006)
+#define TPM_EO_UNSIGNED_GE (TPM_EO)(0x0007)
+#define TPM_EO_SIGNED_LE (TPM_EO)(0x0008)
+#define TPM_EO_UNSIGNED_LE (TPM_EO)(0x0009)
+#define TPM_EO_BITSET (TPM_EO)(0x000A)
+#define TPM_EO_BITCLEAR (TPM_EO)(0x000B)
// Table 18 - TPM_ST Constants
typedef UINT16 TPM_ST;
-#define TPM_ST_RSP_COMMAND (TPM_ST)(0x00C4)
-#define TPM_ST_NULL (TPM_ST)(0X8000)
-#define TPM_ST_NO_SESSIONS (TPM_ST)(0x8001)
-#define TPM_ST_SESSIONS (TPM_ST)(0x8002)
-#define TPM_ST_ATTEST_NV (TPM_ST)(0x8014)
-#define TPM_ST_ATTEST_COMMAND_AUDIT (TPM_ST)(0x8015)
-#define TPM_ST_ATTEST_SESSION_AUDIT (TPM_ST)(0x8016)
-#define TPM_ST_ATTEST_CERTIFY (TPM_ST)(0x8017)
-#define TPM_ST_ATTEST_QUOTE (TPM_ST)(0x8018)
-#define TPM_ST_ATTEST_TIME (TPM_ST)(0x8019)
-#define TPM_ST_ATTEST_CREATION (TPM_ST)(0x801A)
-#define TPM_ST_CREATION (TPM_ST)(0x8021)
-#define TPM_ST_VERIFIED (TPM_ST)(0x8022)
-#define TPM_ST_AUTH_SECRET (TPM_ST)(0x8023)
-#define TPM_ST_HASHCHECK (TPM_ST)(0x8024)
-#define TPM_ST_AUTH_SIGNED (TPM_ST)(0x8025)
-#define TPM_ST_FU_MANIFEST (TPM_ST)(0x8029)
+#define TPM_ST_RSP_COMMAND (TPM_ST)(0x00C4)
+#define TPM_ST_NULL (TPM_ST)(0X8000)
+#define TPM_ST_NO_SESSIONS (TPM_ST)(0x8001)
+#define TPM_ST_SESSIONS (TPM_ST)(0x8002)
+#define TPM_ST_ATTEST_NV (TPM_ST)(0x8014)
+#define TPM_ST_ATTEST_COMMAND_AUDIT (TPM_ST)(0x8015)
+#define TPM_ST_ATTEST_SESSION_AUDIT (TPM_ST)(0x8016)
+#define TPM_ST_ATTEST_CERTIFY (TPM_ST)(0x8017)
+#define TPM_ST_ATTEST_QUOTE (TPM_ST)(0x8018)
+#define TPM_ST_ATTEST_TIME (TPM_ST)(0x8019)
+#define TPM_ST_ATTEST_CREATION (TPM_ST)(0x801A)
+#define TPM_ST_CREATION (TPM_ST)(0x8021)
+#define TPM_ST_VERIFIED (TPM_ST)(0x8022)
+#define TPM_ST_AUTH_SECRET (TPM_ST)(0x8023)
+#define TPM_ST_HASHCHECK (TPM_ST)(0x8024)
+#define TPM_ST_AUTH_SIGNED (TPM_ST)(0x8025)
+#define TPM_ST_FU_MANIFEST (TPM_ST)(0x8029)
// Table 19 - TPM_SU Constants
typedef UINT16 TPM_SU;
-#define TPM_SU_CLEAR (TPM_SU)(0x0000)
-#define TPM_SU_STATE (TPM_SU)(0x0001)
+#define TPM_SU_CLEAR (TPM_SU)(0x0000)
+#define TPM_SU_STATE (TPM_SU)(0x0001)
// Table 20 - TPM_SE Constants
typedef UINT8 TPM_SE;
-#define TPM_SE_HMAC (TPM_SE)(0x00)
-#define TPM_SE_POLICY (TPM_SE)(0x01)
-#define TPM_SE_TRIAL (TPM_SE)(0x03)
+#define TPM_SE_HMAC (TPM_SE)(0x00)
+#define TPM_SE_POLICY (TPM_SE)(0x01)
+#define TPM_SE_TRIAL (TPM_SE)(0x03)
// Table 21 - TPM_CAP Constants
typedef UINT32 TPM_CAP;
-#define TPM_CAP_FIRST (TPM_CAP)(0x00000000)
-#define TPM_CAP_ALGS (TPM_CAP)(0x00000000)
-#define TPM_CAP_HANDLES (TPM_CAP)(0x00000001)
-#define TPM_CAP_COMMANDS (TPM_CAP)(0x00000002)
-#define TPM_CAP_PP_COMMANDS (TPM_CAP)(0x00000003)
-#define TPM_CAP_AUDIT_COMMANDS (TPM_CAP)(0x00000004)
-#define TPM_CAP_PCRS (TPM_CAP)(0x00000005)
-#define TPM_CAP_TPM_PROPERTIES (TPM_CAP)(0x00000006)
-#define TPM_CAP_PCR_PROPERTIES (TPM_CAP)(0x00000007)
-#define TPM_CAP_ECC_CURVES (TPM_CAP)(0x00000008)
-#define TPM_CAP_LAST (TPM_CAP)(0x00000008)
-#define TPM_CAP_VENDOR_PROPERTY (TPM_CAP)(0x00000100)
+#define TPM_CAP_FIRST (TPM_CAP)(0x00000000)
+#define TPM_CAP_ALGS (TPM_CAP)(0x00000000)
+#define TPM_CAP_HANDLES (TPM_CAP)(0x00000001)
+#define TPM_CAP_COMMANDS (TPM_CAP)(0x00000002)
+#define TPM_CAP_PP_COMMANDS (TPM_CAP)(0x00000003)
+#define TPM_CAP_AUDIT_COMMANDS (TPM_CAP)(0x00000004)
+#define TPM_CAP_PCRS (TPM_CAP)(0x00000005)
+#define TPM_CAP_TPM_PROPERTIES (TPM_CAP)(0x00000006)
+#define TPM_CAP_PCR_PROPERTIES (TPM_CAP)(0x00000007)
+#define TPM_CAP_ECC_CURVES (TPM_CAP)(0x00000008)
+#define TPM_CAP_LAST (TPM_CAP)(0x00000008)
+#define TPM_CAP_VENDOR_PROPERTY (TPM_CAP)(0x00000100)
// Table 22 - TPM_PT Constants
typedef UINT32 TPM_PT;
-#define TPM_PT_NONE (TPM_PT)(0x00000000)
-#define PT_GROUP (TPM_PT)(0x00000100)
-#define PT_FIXED (TPM_PT)(PT_GROUP * 1)
-#define TPM_PT_FAMILY_INDICATOR (TPM_PT)(PT_FIXED + 0)
-#define TPM_PT_LEVEL (TPM_PT)(PT_FIXED + 1)
-#define TPM_PT_REVISION (TPM_PT)(PT_FIXED + 2)
-#define TPM_PT_DAY_OF_YEAR (TPM_PT)(PT_FIXED + 3)
-#define TPM_PT_YEAR (TPM_PT)(PT_FIXED + 4)
-#define TPM_PT_MANUFACTURER (TPM_PT)(PT_FIXED + 5)
-#define TPM_PT_VENDOR_STRING_1 (TPM_PT)(PT_FIXED + 6)
-#define TPM_PT_VENDOR_STRING_2 (TPM_PT)(PT_FIXED + 7)
-#define TPM_PT_VENDOR_STRING_3 (TPM_PT)(PT_FIXED + 8)
-#define TPM_PT_VENDOR_STRING_4 (TPM_PT)(PT_FIXED + 9)
-#define TPM_PT_VENDOR_TPM_TYPE (TPM_PT)(PT_FIXED + 10)
-#define TPM_PT_FIRMWARE_VERSION_1 (TPM_PT)(PT_FIXED + 11)
-#define TPM_PT_FIRMWARE_VERSION_2 (TPM_PT)(PT_FIXED + 12)
-#define TPM_PT_INPUT_BUFFER (TPM_PT)(PT_FIXED + 13)
-#define TPM_PT_HR_TRANSIENT_MIN (TPM_PT)(PT_FIXED + 14)
-#define TPM_PT_HR_PERSISTENT_MIN (TPM_PT)(PT_FIXED + 15)
-#define TPM_PT_HR_LOADED_MIN (TPM_PT)(PT_FIXED + 16)
-#define TPM_PT_ACTIVE_SESSIONS_MAX (TPM_PT)(PT_FIXED + 17)
-#define TPM_PT_PCR_COUNT (TPM_PT)(PT_FIXED + 18)
-#define TPM_PT_PCR_SELECT_MIN (TPM_PT)(PT_FIXED + 19)
-#define TPM_PT_CONTEXT_GAP_MAX (TPM_PT)(PT_FIXED + 20)
-#define TPM_PT_NV_COUNTERS_MAX (TPM_PT)(PT_FIXED + 22)
-#define TPM_PT_NV_INDEX_MAX (TPM_PT)(PT_FIXED + 23)
-#define TPM_PT_MEMORY (TPM_PT)(PT_FIXED + 24)
-#define TPM_PT_CLOCK_UPDATE (TPM_PT)(PT_FIXED + 25)
-#define TPM_PT_CONTEXT_HASH (TPM_PT)(PT_FIXED + 26)
-#define TPM_PT_CONTEXT_SYM (TPM_PT)(PT_FIXED + 27)
-#define TPM_PT_CONTEXT_SYM_SIZE (TPM_PT)(PT_FIXED + 28)
-#define TPM_PT_ORDERLY_COUNT (TPM_PT)(PT_FIXED + 29)
-#define TPM_PT_MAX_COMMAND_SIZE (TPM_PT)(PT_FIXED + 30)
-#define TPM_PT_MAX_RESPONSE_SIZE (TPM_PT)(PT_FIXED + 31)
-#define TPM_PT_MAX_DIGEST (TPM_PT)(PT_FIXED + 32)
-#define TPM_PT_MAX_OBJECT_CONTEXT (TPM_PT)(PT_FIXED + 33)
-#define TPM_PT_MAX_SESSION_CONTEXT (TPM_PT)(PT_FIXED + 34)
-#define TPM_PT_PS_FAMILY_INDICATOR (TPM_PT)(PT_FIXED + 35)
-#define TPM_PT_PS_LEVEL (TPM_PT)(PT_FIXED + 36)
-#define TPM_PT_PS_REVISION (TPM_PT)(PT_FIXED + 37)
-#define TPM_PT_PS_DAY_OF_YEAR (TPM_PT)(PT_FIXED + 38)
-#define TPM_PT_PS_YEAR (TPM_PT)(PT_FIXED + 39)
-#define TPM_PT_SPLIT_MAX (TPM_PT)(PT_FIXED + 40)
-#define TPM_PT_TOTAL_COMMANDS (TPM_PT)(PT_FIXED + 41)
-#define TPM_PT_LIBRARY_COMMANDS (TPM_PT)(PT_FIXED + 42)
-#define TPM_PT_VENDOR_COMMANDS (TPM_PT)(PT_FIXED + 43)
-#define PT_VAR (TPM_PT)(PT_GROUP * 2)
-#define TPM_PT_PERMANENT (TPM_PT)(PT_VAR + 0)
-#define TPM_PT_STARTUP_CLEAR (TPM_PT)(PT_VAR + 1)
-#define TPM_PT_HR_NV_INDEX (TPM_PT)(PT_VAR + 2)
-#define TPM_PT_HR_LOADED (TPM_PT)(PT_VAR + 3)
-#define TPM_PT_HR_LOADED_AVAIL (TPM_PT)(PT_VAR + 4)
-#define TPM_PT_HR_ACTIVE (TPM_PT)(PT_VAR + 5)
-#define TPM_PT_HR_ACTIVE_AVAIL (TPM_PT)(PT_VAR + 6)
-#define TPM_PT_HR_TRANSIENT_AVAIL (TPM_PT)(PT_VAR + 7)
-#define TPM_PT_HR_PERSISTENT (TPM_PT)(PT_VAR + 8)
-#define TPM_PT_HR_PERSISTENT_AVAIL (TPM_PT)(PT_VAR + 9)
-#define TPM_PT_NV_COUNTERS (TPM_PT)(PT_VAR + 10)
-#define TPM_PT_NV_COUNTERS_AVAIL (TPM_PT)(PT_VAR + 11)
-#define TPM_PT_ALGORITHM_SET (TPM_PT)(PT_VAR + 12)
-#define TPM_PT_LOADED_CURVES (TPM_PT)(PT_VAR + 13)
-#define TPM_PT_LOCKOUT_COUNTER (TPM_PT)(PT_VAR + 14)
-#define TPM_PT_MAX_AUTH_FAIL (TPM_PT)(PT_VAR + 15)
-#define TPM_PT_LOCKOUT_INTERVAL (TPM_PT)(PT_VAR + 16)
-#define TPM_PT_LOCKOUT_RECOVERY (TPM_PT)(PT_VAR + 17)
-#define TPM_PT_NV_WRITE_RECOVERY (TPM_PT)(PT_VAR + 18)
-#define TPM_PT_AUDIT_COUNTER_0 (TPM_PT)(PT_VAR + 19)
-#define TPM_PT_AUDIT_COUNTER_1 (TPM_PT)(PT_VAR + 20)
+#define TPM_PT_NONE (TPM_PT)(0x00000000)
+#define PT_GROUP (TPM_PT)(0x00000100)
+#define PT_FIXED (TPM_PT)(PT_GROUP * 1)
+#define TPM_PT_FAMILY_INDICATOR (TPM_PT)(PT_FIXED + 0)
+#define TPM_PT_LEVEL (TPM_PT)(PT_FIXED + 1)
+#define TPM_PT_REVISION (TPM_PT)(PT_FIXED + 2)
+#define TPM_PT_DAY_OF_YEAR (TPM_PT)(PT_FIXED + 3)
+#define TPM_PT_YEAR (TPM_PT)(PT_FIXED + 4)
+#define TPM_PT_MANUFACTURER (TPM_PT)(PT_FIXED + 5)
+#define TPM_PT_VENDOR_STRING_1 (TPM_PT)(PT_FIXED + 6)
+#define TPM_PT_VENDOR_STRING_2 (TPM_PT)(PT_FIXED + 7)
+#define TPM_PT_VENDOR_STRING_3 (TPM_PT)(PT_FIXED + 8)
+#define TPM_PT_VENDOR_STRING_4 (TPM_PT)(PT_FIXED + 9)
+#define TPM_PT_VENDOR_TPM_TYPE (TPM_PT)(PT_FIXED + 10)
+#define TPM_PT_FIRMWARE_VERSION_1 (TPM_PT)(PT_FIXED + 11)
+#define TPM_PT_FIRMWARE_VERSION_2 (TPM_PT)(PT_FIXED + 12)
+#define TPM_PT_INPUT_BUFFER (TPM_PT)(PT_FIXED + 13)
+#define TPM_PT_HR_TRANSIENT_MIN (TPM_PT)(PT_FIXED + 14)
+#define TPM_PT_HR_PERSISTENT_MIN (TPM_PT)(PT_FIXED + 15)
+#define TPM_PT_HR_LOADED_MIN (TPM_PT)(PT_FIXED + 16)
+#define TPM_PT_ACTIVE_SESSIONS_MAX (TPM_PT)(PT_FIXED + 17)
+#define TPM_PT_PCR_COUNT (TPM_PT)(PT_FIXED + 18)
+#define TPM_PT_PCR_SELECT_MIN (TPM_PT)(PT_FIXED + 19)
+#define TPM_PT_CONTEXT_GAP_MAX (TPM_PT)(PT_FIXED + 20)
+#define TPM_PT_NV_COUNTERS_MAX (TPM_PT)(PT_FIXED + 22)
+#define TPM_PT_NV_INDEX_MAX (TPM_PT)(PT_FIXED + 23)
+#define TPM_PT_MEMORY (TPM_PT)(PT_FIXED + 24)
+#define TPM_PT_CLOCK_UPDATE (TPM_PT)(PT_FIXED + 25)
+#define TPM_PT_CONTEXT_HASH (TPM_PT)(PT_FIXED + 26)
+#define TPM_PT_CONTEXT_SYM (TPM_PT)(PT_FIXED + 27)
+#define TPM_PT_CONTEXT_SYM_SIZE (TPM_PT)(PT_FIXED + 28)
+#define TPM_PT_ORDERLY_COUNT (TPM_PT)(PT_FIXED + 29)
+#define TPM_PT_MAX_COMMAND_SIZE (TPM_PT)(PT_FIXED + 30)
+#define TPM_PT_MAX_RESPONSE_SIZE (TPM_PT)(PT_FIXED + 31)
+#define TPM_PT_MAX_DIGEST (TPM_PT)(PT_FIXED + 32)
+#define TPM_PT_MAX_OBJECT_CONTEXT (TPM_PT)(PT_FIXED + 33)
+#define TPM_PT_MAX_SESSION_CONTEXT (TPM_PT)(PT_FIXED + 34)
+#define TPM_PT_PS_FAMILY_INDICATOR (TPM_PT)(PT_FIXED + 35)
+#define TPM_PT_PS_LEVEL (TPM_PT)(PT_FIXED + 36)
+#define TPM_PT_PS_REVISION (TPM_PT)(PT_FIXED + 37)
+#define TPM_PT_PS_DAY_OF_YEAR (TPM_PT)(PT_FIXED + 38)
+#define TPM_PT_PS_YEAR (TPM_PT)(PT_FIXED + 39)
+#define TPM_PT_SPLIT_MAX (TPM_PT)(PT_FIXED + 40)
+#define TPM_PT_TOTAL_COMMANDS (TPM_PT)(PT_FIXED + 41)
+#define TPM_PT_LIBRARY_COMMANDS (TPM_PT)(PT_FIXED + 42)
+#define TPM_PT_VENDOR_COMMANDS (TPM_PT)(PT_FIXED + 43)
+#define PT_VAR (TPM_PT)(PT_GROUP * 2)
+#define TPM_PT_PERMANENT (TPM_PT)(PT_VAR + 0)
+#define TPM_PT_STARTUP_CLEAR (TPM_PT)(PT_VAR + 1)
+#define TPM_PT_HR_NV_INDEX (TPM_PT)(PT_VAR + 2)
+#define TPM_PT_HR_LOADED (TPM_PT)(PT_VAR + 3)
+#define TPM_PT_HR_LOADED_AVAIL (TPM_PT)(PT_VAR + 4)
+#define TPM_PT_HR_ACTIVE (TPM_PT)(PT_VAR + 5)
+#define TPM_PT_HR_ACTIVE_AVAIL (TPM_PT)(PT_VAR + 6)
+#define TPM_PT_HR_TRANSIENT_AVAIL (TPM_PT)(PT_VAR + 7)
+#define TPM_PT_HR_PERSISTENT (TPM_PT)(PT_VAR + 8)
+#define TPM_PT_HR_PERSISTENT_AVAIL (TPM_PT)(PT_VAR + 9)
+#define TPM_PT_NV_COUNTERS (TPM_PT)(PT_VAR + 10)
+#define TPM_PT_NV_COUNTERS_AVAIL (TPM_PT)(PT_VAR + 11)
+#define TPM_PT_ALGORITHM_SET (TPM_PT)(PT_VAR + 12)
+#define TPM_PT_LOADED_CURVES (TPM_PT)(PT_VAR + 13)
+#define TPM_PT_LOCKOUT_COUNTER (TPM_PT)(PT_VAR + 14)
+#define TPM_PT_MAX_AUTH_FAIL (TPM_PT)(PT_VAR + 15)
+#define TPM_PT_LOCKOUT_INTERVAL (TPM_PT)(PT_VAR + 16)
+#define TPM_PT_LOCKOUT_RECOVERY (TPM_PT)(PT_VAR + 17)
+#define TPM_PT_NV_WRITE_RECOVERY (TPM_PT)(PT_VAR + 18)
+#define TPM_PT_AUDIT_COUNTER_0 (TPM_PT)(PT_VAR + 19)
+#define TPM_PT_AUDIT_COUNTER_1 (TPM_PT)(PT_VAR + 20)
// Table 23 - TPM_PT_PCR Constants
typedef UINT32 TPM_PT_PCR;
-#define TPM_PT_PCR_FIRST (TPM_PT_PCR)(0x00000000)
-#define TPM_PT_PCR_SAVE (TPM_PT_PCR)(0x00000000)
-#define TPM_PT_PCR_EXTEND_L0 (TPM_PT_PCR)(0x00000001)
-#define TPM_PT_PCR_RESET_L0 (TPM_PT_PCR)(0x00000002)
-#define TPM_PT_PCR_EXTEND_L1 (TPM_PT_PCR)(0x00000003)
-#define TPM_PT_PCR_RESET_L1 (TPM_PT_PCR)(0x00000004)
-#define TPM_PT_PCR_EXTEND_L2 (TPM_PT_PCR)(0x00000005)
-#define TPM_PT_PCR_RESET_L2 (TPM_PT_PCR)(0x00000006)
-#define TPM_PT_PCR_EXTEND_L3 (TPM_PT_PCR)(0x00000007)
-#define TPM_PT_PCR_RESET_L3 (TPM_PT_PCR)(0x00000008)
-#define TPM_PT_PCR_EXTEND_L4 (TPM_PT_PCR)(0x00000009)
-#define TPM_PT_PCR_RESET_L4 (TPM_PT_PCR)(0x0000000A)
-#define TPM_PT_PCR_NO_INCREMENT (TPM_PT_PCR)(0x00000011)
-#define TPM_PT_PCR_DRTM_RESET (TPM_PT_PCR)(0x00000012)
-#define TPM_PT_PCR_POLICY (TPM_PT_PCR)(0x00000013)
-#define TPM_PT_PCR_AUTH (TPM_PT_PCR)(0x00000014)
-#define TPM_PT_PCR_LAST (TPM_PT_PCR)(0x00000014)
+#define TPM_PT_PCR_FIRST (TPM_PT_PCR)(0x00000000)
+#define TPM_PT_PCR_SAVE (TPM_PT_PCR)(0x00000000)
+#define TPM_PT_PCR_EXTEND_L0 (TPM_PT_PCR)(0x00000001)
+#define TPM_PT_PCR_RESET_L0 (TPM_PT_PCR)(0x00000002)
+#define TPM_PT_PCR_EXTEND_L1 (TPM_PT_PCR)(0x00000003)
+#define TPM_PT_PCR_RESET_L1 (TPM_PT_PCR)(0x00000004)
+#define TPM_PT_PCR_EXTEND_L2 (TPM_PT_PCR)(0x00000005)
+#define TPM_PT_PCR_RESET_L2 (TPM_PT_PCR)(0x00000006)
+#define TPM_PT_PCR_EXTEND_L3 (TPM_PT_PCR)(0x00000007)
+#define TPM_PT_PCR_RESET_L3 (TPM_PT_PCR)(0x00000008)
+#define TPM_PT_PCR_EXTEND_L4 (TPM_PT_PCR)(0x00000009)
+#define TPM_PT_PCR_RESET_L4 (TPM_PT_PCR)(0x0000000A)
+#define TPM_PT_PCR_NO_INCREMENT (TPM_PT_PCR)(0x00000011)
+#define TPM_PT_PCR_DRTM_RESET (TPM_PT_PCR)(0x00000012)
+#define TPM_PT_PCR_POLICY (TPM_PT_PCR)(0x00000013)
+#define TPM_PT_PCR_AUTH (TPM_PT_PCR)(0x00000014)
+#define TPM_PT_PCR_LAST (TPM_PT_PCR)(0x00000014)
// Table 24 - TPM_PS Constants
typedef UINT32 TPM_PS;
-#define TPM_PS_MAIN (TPM_PS)(0x00000000)
-#define TPM_PS_PC (TPM_PS)(0x00000001)
-#define TPM_PS_PDA (TPM_PS)(0x00000002)
-#define TPM_PS_CELL_PHONE (TPM_PS)(0x00000003)
-#define TPM_PS_SERVER (TPM_PS)(0x00000004)
-#define TPM_PS_PERIPHERAL (TPM_PS)(0x00000005)
-#define TPM_PS_TSS (TPM_PS)(0x00000006)
-#define TPM_PS_STORAGE (TPM_PS)(0x00000007)
-#define TPM_PS_AUTHENTICATION (TPM_PS)(0x00000008)
-#define TPM_PS_EMBEDDED (TPM_PS)(0x00000009)
-#define TPM_PS_HARDCOPY (TPM_PS)(0x0000000A)
-#define TPM_PS_INFRASTRUCTURE (TPM_PS)(0x0000000B)
-#define TPM_PS_VIRTUALIZATION (TPM_PS)(0x0000000C)
-#define TPM_PS_TNC (TPM_PS)(0x0000000D)
-#define TPM_PS_MULTI_TENANT (TPM_PS)(0x0000000E)
-#define TPM_PS_TC (TPM_PS)(0x0000000F)
+#define TPM_PS_MAIN (TPM_PS)(0x00000000)
+#define TPM_PS_PC (TPM_PS)(0x00000001)
+#define TPM_PS_PDA (TPM_PS)(0x00000002)
+#define TPM_PS_CELL_PHONE (TPM_PS)(0x00000003)
+#define TPM_PS_SERVER (TPM_PS)(0x00000004)
+#define TPM_PS_PERIPHERAL (TPM_PS)(0x00000005)
+#define TPM_PS_TSS (TPM_PS)(0x00000006)
+#define TPM_PS_STORAGE (TPM_PS)(0x00000007)
+#define TPM_PS_AUTHENTICATION (TPM_PS)(0x00000008)
+#define TPM_PS_EMBEDDED (TPM_PS)(0x00000009)
+#define TPM_PS_HARDCOPY (TPM_PS)(0x0000000A)
+#define TPM_PS_INFRASTRUCTURE (TPM_PS)(0x0000000B)
+#define TPM_PS_VIRTUALIZATION (TPM_PS)(0x0000000C)
+#define TPM_PS_TNC (TPM_PS)(0x0000000D)
+#define TPM_PS_MULTI_TENANT (TPM_PS)(0x0000000E)
+#define TPM_PS_TC (TPM_PS)(0x0000000F)
// 7 Handles
@@ -647,117 +640,117 @@
//
// NOTE: Comment because it has same name as TPM1.2 (value is same, so not runtime issue)
//
-//typedef UINT32 TPM_HANDLE;
+// typedef UINT32 TPM_HANDLE;
// Table 26 - TPM_HT Constants
typedef UINT8 TPM_HT;
-#define TPM_HT_PCR (TPM_HT)(0x00)
-#define TPM_HT_NV_INDEX (TPM_HT)(0x01)
-#define TPM_HT_HMAC_SESSION (TPM_HT)(0x02)
-#define TPM_HT_LOADED_SESSION (TPM_HT)(0x02)
-#define TPM_HT_POLICY_SESSION (TPM_HT)(0x03)
-#define TPM_HT_ACTIVE_SESSION (TPM_HT)(0x03)
-#define TPM_HT_PERMANENT (TPM_HT)(0x40)
-#define TPM_HT_TRANSIENT (TPM_HT)(0x80)
-#define TPM_HT_PERSISTENT (TPM_HT)(0x81)
+#define TPM_HT_PCR (TPM_HT)(0x00)
+#define TPM_HT_NV_INDEX (TPM_HT)(0x01)
+#define TPM_HT_HMAC_SESSION (TPM_HT)(0x02)
+#define TPM_HT_LOADED_SESSION (TPM_HT)(0x02)
+#define TPM_HT_POLICY_SESSION (TPM_HT)(0x03)
+#define TPM_HT_ACTIVE_SESSION (TPM_HT)(0x03)
+#define TPM_HT_PERMANENT (TPM_HT)(0x40)
+#define TPM_HT_TRANSIENT (TPM_HT)(0x80)
+#define TPM_HT_PERSISTENT (TPM_HT)(0x81)
// Table 27 - TPM_RH Constants
typedef UINT32 TPM_RH;
-#define TPM_RH_FIRST (TPM_RH)(0x40000000)
-#define TPM_RH_SRK (TPM_RH)(0x40000000)
-#define TPM_RH_OWNER (TPM_RH)(0x40000001)
-#define TPM_RH_REVOKE (TPM_RH)(0x40000002)
-#define TPM_RH_TRANSPORT (TPM_RH)(0x40000003)
-#define TPM_RH_OPERATOR (TPM_RH)(0x40000004)
-#define TPM_RH_ADMIN (TPM_RH)(0x40000005)
-#define TPM_RH_EK (TPM_RH)(0x40000006)
-#define TPM_RH_NULL (TPM_RH)(0x40000007)
-#define TPM_RH_UNASSIGNED (TPM_RH)(0x40000008)
-#define TPM_RS_PW (TPM_RH)(0x40000009)
-#define TPM_RH_LOCKOUT (TPM_RH)(0x4000000A)
-#define TPM_RH_ENDORSEMENT (TPM_RH)(0x4000000B)
-#define TPM_RH_PLATFORM (TPM_RH)(0x4000000C)
-#define TPM_RH_PLATFORM_NV (TPM_RH)(0x4000000D)
-#define TPM_RH_AUTH_00 (TPM_RH)(0x40000010)
-#define TPM_RH_AUTH_FF (TPM_RH)(0x4000010F)
-#define TPM_RH_LAST (TPM_RH)(0x4000010F)
+#define TPM_RH_FIRST (TPM_RH)(0x40000000)
+#define TPM_RH_SRK (TPM_RH)(0x40000000)
+#define TPM_RH_OWNER (TPM_RH)(0x40000001)
+#define TPM_RH_REVOKE (TPM_RH)(0x40000002)
+#define TPM_RH_TRANSPORT (TPM_RH)(0x40000003)
+#define TPM_RH_OPERATOR (TPM_RH)(0x40000004)
+#define TPM_RH_ADMIN (TPM_RH)(0x40000005)
+#define TPM_RH_EK (TPM_RH)(0x40000006)
+#define TPM_RH_NULL (TPM_RH)(0x40000007)
+#define TPM_RH_UNASSIGNED (TPM_RH)(0x40000008)
+#define TPM_RS_PW (TPM_RH)(0x40000009)
+#define TPM_RH_LOCKOUT (TPM_RH)(0x4000000A)
+#define TPM_RH_ENDORSEMENT (TPM_RH)(0x4000000B)
+#define TPM_RH_PLATFORM (TPM_RH)(0x4000000C)
+#define TPM_RH_PLATFORM_NV (TPM_RH)(0x4000000D)
+#define TPM_RH_AUTH_00 (TPM_RH)(0x40000010)
+#define TPM_RH_AUTH_FF (TPM_RH)(0x4000010F)
+#define TPM_RH_LAST (TPM_RH)(0x4000010F)
// Table 28 - TPM_HC Constants
typedef TPM_HANDLE TPM_HC;
-#define HR_HANDLE_MASK (TPM_HC)(0x00FFFFFF)
-#define HR_RANGE_MASK (TPM_HC)(0xFF000000)
-#define HR_SHIFT (TPM_HC)(24)
-#define HR_PCR (TPM_HC)((TPM_HC)TPM_HT_PCR << HR_SHIFT)
-#define HR_HMAC_SESSION (TPM_HC)((TPM_HC)TPM_HT_HMAC_SESSION << HR_SHIFT)
-#define HR_POLICY_SESSION (TPM_HC)((TPM_HC)TPM_HT_POLICY_SESSION << HR_SHIFT)
-#define HR_TRANSIENT (TPM_HC)((TPM_HC)TPM_HT_TRANSIENT << HR_SHIFT)
-#define HR_PERSISTENT (TPM_HC)((TPM_HC)TPM_HT_PERSISTENT << HR_SHIFT)
-#define HR_NV_INDEX (TPM_HC)((TPM_HC)TPM_HT_NV_INDEX << HR_SHIFT)
-#define HR_PERMANENT (TPM_HC)((TPM_HC)TPM_HT_PERMANENT << HR_SHIFT)
-#define PCR_FIRST (TPM_HC)(HR_PCR + 0)
-#define PCR_LAST (TPM_HC)(PCR_FIRST + IMPLEMENTATION_PCR - 1)
-#define HMAC_SESSION_FIRST (TPM_HC)(HR_HMAC_SESSION + 0)
-#define HMAC_SESSION_LAST (TPM_HC)(HMAC_SESSION_FIRST + MAX_ACTIVE_SESSIONS - 1)
-#define LOADED_SESSION_FIRST (TPM_HC)(HMAC_SESSION_FIRST)
-#define LOADED_SESSION_LAST (TPM_HC)(HMAC_SESSION_LAST)
-#define POLICY_SESSION_FIRST (TPM_HC)(HR_POLICY_SESSION + 0)
-#define POLICY_SESSION_LAST (TPM_HC)(POLICY_SESSION_FIRST + MAX_ACTIVE_SESSIONS - 1)
-#define TRANSIENT_FIRST (TPM_HC)(HR_TRANSIENT + 0)
-#define ACTIVE_SESSION_FIRST (TPM_HC)(POLICY_SESSION_FIRST)
-#define ACTIVE_SESSION_LAST (TPM_HC)(POLICY_SESSION_LAST)
-#define TRANSIENT_LAST (TPM_HC)(TRANSIENT_FIRST+MAX_LOADED_OBJECTS - 1)
-#define PERSISTENT_FIRST (TPM_HC)(HR_PERSISTENT + 0)
-#define PERSISTENT_LAST (TPM_HC)(PERSISTENT_FIRST + 0x00FFFFFF)
-#define PLATFORM_PERSISTENT (TPM_HC)(PERSISTENT_FIRST + 0x00800000)
-#define NV_INDEX_FIRST (TPM_HC)(HR_NV_INDEX + 0)
-#define NV_INDEX_LAST (TPM_HC)(NV_INDEX_FIRST + 0x00FFFFFF)
-#define PERMANENT_FIRST (TPM_HC)(TPM_RH_FIRST)
-#define PERMANENT_LAST (TPM_HC)(TPM_RH_LAST)
+#define HR_HANDLE_MASK (TPM_HC)(0x00FFFFFF)
+#define HR_RANGE_MASK (TPM_HC)(0xFF000000)
+#define HR_SHIFT (TPM_HC)(24)
+#define HR_PCR (TPM_HC)((TPM_HC)TPM_HT_PCR << HR_SHIFT)
+#define HR_HMAC_SESSION (TPM_HC)((TPM_HC)TPM_HT_HMAC_SESSION << HR_SHIFT)
+#define HR_POLICY_SESSION (TPM_HC)((TPM_HC)TPM_HT_POLICY_SESSION << HR_SHIFT)
+#define HR_TRANSIENT (TPM_HC)((TPM_HC)TPM_HT_TRANSIENT << HR_SHIFT)
+#define HR_PERSISTENT (TPM_HC)((TPM_HC)TPM_HT_PERSISTENT << HR_SHIFT)
+#define HR_NV_INDEX (TPM_HC)((TPM_HC)TPM_HT_NV_INDEX << HR_SHIFT)
+#define HR_PERMANENT (TPM_HC)((TPM_HC)TPM_HT_PERMANENT << HR_SHIFT)
+#define PCR_FIRST (TPM_HC)(HR_PCR + 0)
+#define PCR_LAST (TPM_HC)(PCR_FIRST + IMPLEMENTATION_PCR - 1)
+#define HMAC_SESSION_FIRST (TPM_HC)(HR_HMAC_SESSION + 0)
+#define HMAC_SESSION_LAST (TPM_HC)(HMAC_SESSION_FIRST + MAX_ACTIVE_SESSIONS - 1)
+#define LOADED_SESSION_FIRST (TPM_HC)(HMAC_SESSION_FIRST)
+#define LOADED_SESSION_LAST (TPM_HC)(HMAC_SESSION_LAST)
+#define POLICY_SESSION_FIRST (TPM_HC)(HR_POLICY_SESSION + 0)
+#define POLICY_SESSION_LAST (TPM_HC)(POLICY_SESSION_FIRST + MAX_ACTIVE_SESSIONS - 1)
+#define TRANSIENT_FIRST (TPM_HC)(HR_TRANSIENT + 0)
+#define ACTIVE_SESSION_FIRST (TPM_HC)(POLICY_SESSION_FIRST)
+#define ACTIVE_SESSION_LAST (TPM_HC)(POLICY_SESSION_LAST)
+#define TRANSIENT_LAST (TPM_HC)(TRANSIENT_FIRST+MAX_LOADED_OBJECTS - 1)
+#define PERSISTENT_FIRST (TPM_HC)(HR_PERSISTENT + 0)
+#define PERSISTENT_LAST (TPM_HC)(PERSISTENT_FIRST + 0x00FFFFFF)
+#define PLATFORM_PERSISTENT (TPM_HC)(PERSISTENT_FIRST + 0x00800000)
+#define NV_INDEX_FIRST (TPM_HC)(HR_NV_INDEX + 0)
+#define NV_INDEX_LAST (TPM_HC)(NV_INDEX_FIRST + 0x00FFFFFF)
+#define PERMANENT_FIRST (TPM_HC)(TPM_RH_FIRST)
+#define PERMANENT_LAST (TPM_HC)(TPM_RH_LAST)
// 8 Attribute Structures
// Table 29 - TPMA_ALGORITHM Bits
typedef struct {
- UINT32 asymmetric : 1;
- UINT32 symmetric : 1;
- UINT32 hash : 1;
- UINT32 object : 1;
- UINT32 reserved4_7 : 4;
- UINT32 signing : 1;
- UINT32 encrypting : 1;
- UINT32 method : 1;
- UINT32 reserved11_31 : 21;
+ UINT32 asymmetric : 1;
+ UINT32 symmetric : 1;
+ UINT32 hash : 1;
+ UINT32 object : 1;
+ UINT32 reserved4_7 : 4;
+ UINT32 signing : 1;
+ UINT32 encrypting : 1;
+ UINT32 method : 1;
+ UINT32 reserved11_31 : 21;
} TPMA_ALGORITHM;
// Table 30 - TPMA_OBJECT Bits
typedef struct {
- UINT32 reserved1 : 1;
- UINT32 fixedTPM : 1;
- UINT32 stClear : 1;
- UINT32 reserved4 : 1;
- UINT32 fixedParent : 1;
- UINT32 sensitiveDataOrigin : 1;
- UINT32 userWithAuth : 1;
- UINT32 adminWithPolicy : 1;
- UINT32 reserved8_9 : 2;
- UINT32 noDA : 1;
- UINT32 encryptedDuplication : 1;
- UINT32 reserved12_15 : 4;
- UINT32 restricted : 1;
- UINT32 decrypt : 1;
- UINT32 sign : 1;
- UINT32 reserved19_31 : 13;
+ UINT32 reserved1 : 1;
+ UINT32 fixedTPM : 1;
+ UINT32 stClear : 1;
+ UINT32 reserved4 : 1;
+ UINT32 fixedParent : 1;
+ UINT32 sensitiveDataOrigin : 1;
+ UINT32 userWithAuth : 1;
+ UINT32 adminWithPolicy : 1;
+ UINT32 reserved8_9 : 2;
+ UINT32 noDA : 1;
+ UINT32 encryptedDuplication : 1;
+ UINT32 reserved12_15 : 4;
+ UINT32 restricted : 1;
+ UINT32 decrypt : 1;
+ UINT32 sign : 1;
+ UINT32 reserved19_31 : 13;
} TPMA_OBJECT;
// Table 31 - TPMA_SESSION Bits
typedef struct {
- UINT8 continueSession : 1;
- UINT8 auditExclusive : 1;
- UINT8 auditReset : 1;
- UINT8 reserved3_4 : 2;
- UINT8 decrypt : 1;
- UINT8 encrypt : 1;
- UINT8 audit : 1;
+ UINT8 continueSession : 1;
+ UINT8 auditExclusive : 1;
+ UINT8 auditReset : 1;
+ UINT8 reserved3_4 : 2;
+ UINT8 decrypt : 1;
+ UINT8 encrypt : 1;
+ UINT8 audit : 1;
} TPMA_SESSION;
// Table 32 - TPMA_LOCALITY Bits
@@ -765,54 +758,54 @@
// NOTE: Use low case here to resolve conflict
//
typedef struct {
- UINT8 locZero : 1;
- UINT8 locOne : 1;
- UINT8 locTwo : 1;
- UINT8 locThree : 1;
- UINT8 locFour : 1;
- UINT8 Extended : 3;
+ UINT8 locZero : 1;
+ UINT8 locOne : 1;
+ UINT8 locTwo : 1;
+ UINT8 locThree : 1;
+ UINT8 locFour : 1;
+ UINT8 Extended : 3;
} TPMA_LOCALITY;
// Table 33 - TPMA_PERMANENT Bits
typedef struct {
- UINT32 ownerAuthSet : 1;
- UINT32 endorsementAuthSet : 1;
- UINT32 lockoutAuthSet : 1;
- UINT32 reserved3_7 : 5;
- UINT32 disableClear : 1;
- UINT32 inLockout : 1;
- UINT32 tpmGeneratedEPS : 1;
- UINT32 reserved11_31 : 21;
+ UINT32 ownerAuthSet : 1;
+ UINT32 endorsementAuthSet : 1;
+ UINT32 lockoutAuthSet : 1;
+ UINT32 reserved3_7 : 5;
+ UINT32 disableClear : 1;
+ UINT32 inLockout : 1;
+ UINT32 tpmGeneratedEPS : 1;
+ UINT32 reserved11_31 : 21;
} TPMA_PERMANENT;
// Table 34 - TPMA_STARTUP_CLEAR Bits
typedef struct {
- UINT32 phEnable : 1;
- UINT32 shEnable : 1;
- UINT32 ehEnable : 1;
- UINT32 reserved3_30 : 28;
- UINT32 orderly : 1;
+ UINT32 phEnable : 1;
+ UINT32 shEnable : 1;
+ UINT32 ehEnable : 1;
+ UINT32 reserved3_30 : 28;
+ UINT32 orderly : 1;
} TPMA_STARTUP_CLEAR;
// Table 35 - TPMA_MEMORY Bits
typedef struct {
- UINT32 sharedRAM : 1;
- UINT32 sharedNV : 1;
- UINT32 objectCopiedToRam : 1;
- UINT32 reserved3_31 : 29;
+ UINT32 sharedRAM : 1;
+ UINT32 sharedNV : 1;
+ UINT32 objectCopiedToRam : 1;
+ UINT32 reserved3_31 : 29;
} TPMA_MEMORY;
// Table 36 - TPMA_CC Bits
typedef struct {
- UINT32 commandIndex : 16;
- UINT32 reserved16_21 : 6;
- UINT32 nv : 1;
- UINT32 extensive : 1;
- UINT32 flushed : 1;
- UINT32 cHandles : 3;
- UINT32 rHandle : 1;
- UINT32 V : 1;
- UINT32 Res : 2;
+ UINT32 commandIndex : 16;
+ UINT32 reserved16_21 : 6;
+ UINT32 nv : 1;
+ UINT32 extensive : 1;
+ UINT32 flushed : 1;
+ UINT32 cHandles : 3;
+ UINT32 rHandle : 1;
+ UINT32 V : 1;
+ UINT32 Res : 2;
} TPMA_CC;
// 9 Interface Types
@@ -905,35 +898,35 @@
// Table 65 - TPMS_ALGORITHM_DESCRIPTION Structure
typedef struct {
- TPM_ALG_ID alg;
- TPMA_ALGORITHM attributes;
+ TPM_ALG_ID alg;
+ TPMA_ALGORITHM attributes;
} TPMS_ALGORITHM_DESCRIPTION;
// Table 66 - TPMU_HA Union
typedef union {
- BYTE sha1[SHA1_DIGEST_SIZE];
- BYTE sha256[SHA256_DIGEST_SIZE];
- BYTE sm3_256[SM3_256_DIGEST_SIZE];
- BYTE sha384[SHA384_DIGEST_SIZE];
- BYTE sha512[SHA512_DIGEST_SIZE];
+ BYTE sha1[SHA1_DIGEST_SIZE];
+ BYTE sha256[SHA256_DIGEST_SIZE];
+ BYTE sm3_256[SM3_256_DIGEST_SIZE];
+ BYTE sha384[SHA384_DIGEST_SIZE];
+ BYTE sha512[SHA512_DIGEST_SIZE];
} TPMU_HA;
// Table 67 - TPMT_HA Structure
typedef struct {
- TPMI_ALG_HASH hashAlg;
- TPMU_HA digest;
+ TPMI_ALG_HASH hashAlg;
+ TPMU_HA digest;
} TPMT_HA;
// Table 68 - TPM2B_DIGEST Structure
typedef struct {
- UINT16 size;
- BYTE buffer[sizeof(TPMU_HA)];
+ UINT16 size;
+ BYTE buffer[sizeof (TPMU_HA)];
} TPM2B_DIGEST;
// Table 69 - TPM2B_DATA Structure
typedef struct {
- UINT16 size;
- BYTE buffer[sizeof(TPMT_HA)];
+ UINT16 size;
+ BYTE buffer[sizeof (TPMT_HA)];
} TPM2B_DATA;
// Table 70 - TPM2B_NONCE Types
@@ -947,254 +940,254 @@
// Table 73 - TPM2B_EVENT Structure
typedef struct {
- UINT16 size;
- BYTE buffer[1024];
+ UINT16 size;
+ BYTE buffer[1024];
} TPM2B_EVENT;
// Table 74 - TPM2B_MAX_BUFFER Structure
typedef struct {
- UINT16 size;
- BYTE buffer[MAX_DIGEST_BUFFER];
+ UINT16 size;
+ BYTE buffer[MAX_DIGEST_BUFFER];
} TPM2B_MAX_BUFFER;
// Table 75 - TPM2B_MAX_NV_BUFFER Structure
typedef struct {
- UINT16 size;
- BYTE buffer[MAX_NV_INDEX_SIZE];
+ UINT16 size;
+ BYTE buffer[MAX_NV_INDEX_SIZE];
} TPM2B_MAX_NV_BUFFER;
// Table 76 - TPM2B_TIMEOUT Structure
typedef struct {
- UINT16 size;
- BYTE buffer[sizeof(UINT64)];
+ UINT16 size;
+ BYTE buffer[sizeof (UINT64)];
} TPM2B_TIMEOUT;
// Table 77 -- TPM2B_IV Structure <I/O>
typedef struct {
- UINT16 size;
- BYTE buffer[MAX_SYM_BLOCK_SIZE];
+ UINT16 size;
+ BYTE buffer[MAX_SYM_BLOCK_SIZE];
} TPM2B_IV;
// Table 78 - TPMU_NAME Union
typedef union {
- TPMT_HA digest;
- TPM_HANDLE handle;
+ TPMT_HA digest;
+ TPM_HANDLE handle;
} TPMU_NAME;
// Table 79 - TPM2B_NAME Structure
typedef struct {
- UINT16 size;
- BYTE name[sizeof(TPMU_NAME)];
+ UINT16 size;
+ BYTE name[sizeof (TPMU_NAME)];
} TPM2B_NAME;
// Table 80 - TPMS_PCR_SELECT Structure
typedef struct {
- UINT8 sizeofSelect;
- BYTE pcrSelect[PCR_SELECT_MAX];
+ UINT8 sizeofSelect;
+ BYTE pcrSelect[PCR_SELECT_MAX];
} TPMS_PCR_SELECT;
// Table 81 - TPMS_PCR_SELECTION Structure
typedef struct {
- TPMI_ALG_HASH hash;
- UINT8 sizeofSelect;
- BYTE pcrSelect[PCR_SELECT_MAX];
+ TPMI_ALG_HASH hash;
+ UINT8 sizeofSelect;
+ BYTE pcrSelect[PCR_SELECT_MAX];
} TPMS_PCR_SELECTION;
// Table 84 - TPMT_TK_CREATION Structure
typedef struct {
- TPM_ST tag;
- TPMI_RH_HIERARCHY hierarchy;
- TPM2B_DIGEST digest;
+ TPM_ST tag;
+ TPMI_RH_HIERARCHY hierarchy;
+ TPM2B_DIGEST digest;
} TPMT_TK_CREATION;
// Table 85 - TPMT_TK_VERIFIED Structure
typedef struct {
- TPM_ST tag;
- TPMI_RH_HIERARCHY hierarchy;
- TPM2B_DIGEST digest;
+ TPM_ST tag;
+ TPMI_RH_HIERARCHY hierarchy;
+ TPM2B_DIGEST digest;
} TPMT_TK_VERIFIED;
// Table 86 - TPMT_TK_AUTH Structure
typedef struct {
- TPM_ST tag;
- TPMI_RH_HIERARCHY hierarchy;
- TPM2B_DIGEST digest;
+ TPM_ST tag;
+ TPMI_RH_HIERARCHY hierarchy;
+ TPM2B_DIGEST digest;
} TPMT_TK_AUTH;
// Table 87 - TPMT_TK_HASHCHECK Structure
typedef struct {
- TPM_ST tag;
- TPMI_RH_HIERARCHY hierarchy;
- TPM2B_DIGEST digest;
+ TPM_ST tag;
+ TPMI_RH_HIERARCHY hierarchy;
+ TPM2B_DIGEST digest;
} TPMT_TK_HASHCHECK;
// Table 88 - TPMS_ALG_PROPERTY Structure
typedef struct {
- TPM_ALG_ID alg;
- TPMA_ALGORITHM algProperties;
+ TPM_ALG_ID alg;
+ TPMA_ALGORITHM algProperties;
} TPMS_ALG_PROPERTY;
// Table 89 - TPMS_TAGGED_PROPERTY Structure
typedef struct {
- TPM_PT property;
- UINT32 value;
+ TPM_PT property;
+ UINT32 value;
} TPMS_TAGGED_PROPERTY;
// Table 90 - TPMS_TAGGED_PCR_SELECT Structure
typedef struct {
- TPM_PT tag;
- UINT8 sizeofSelect;
- BYTE pcrSelect[PCR_SELECT_MAX];
+ TPM_PT tag;
+ UINT8 sizeofSelect;
+ BYTE pcrSelect[PCR_SELECT_MAX];
} TPMS_TAGGED_PCR_SELECT;
// Table 91 - TPML_CC Structure
typedef struct {
- UINT32 count;
- TPM_CC commandCodes[MAX_CAP_CC];
+ UINT32 count;
+ TPM_CC commandCodes[MAX_CAP_CC];
} TPML_CC;
// Table 92 - TPML_CCA Structure
typedef struct {
- UINT32 count;
- TPMA_CC commandAttributes[MAX_CAP_CC];
+ UINT32 count;
+ TPMA_CC commandAttributes[MAX_CAP_CC];
} TPML_CCA;
// Table 93 - TPML_ALG Structure
typedef struct {
- UINT32 count;
- TPM_ALG_ID algorithms[MAX_ALG_LIST_SIZE];
+ UINT32 count;
+ TPM_ALG_ID algorithms[MAX_ALG_LIST_SIZE];
} TPML_ALG;
// Table 94 - TPML_HANDLE Structure
typedef struct {
- UINT32 count;
- TPM_HANDLE handle[MAX_CAP_HANDLES];
+ UINT32 count;
+ TPM_HANDLE handle[MAX_CAP_HANDLES];
} TPML_HANDLE;
// Table 95 - TPML_DIGEST Structure
typedef struct {
- UINT32 count;
- TPM2B_DIGEST digests[8];
+ UINT32 count;
+ TPM2B_DIGEST digests[8];
} TPML_DIGEST;
// Table 96 -- TPML_DIGEST_VALUES Structure <I/O>
typedef struct {
- UINT32 count;
- TPMT_HA digests[HASH_COUNT];
+ UINT32 count;
+ TPMT_HA digests[HASH_COUNT];
} TPML_DIGEST_VALUES;
// Table 97 - TPM2B_DIGEST_VALUES Structure
typedef struct {
- UINT16 size;
- BYTE buffer[sizeof(TPML_DIGEST_VALUES)];
+ UINT16 size;
+ BYTE buffer[sizeof (TPML_DIGEST_VALUES)];
} TPM2B_DIGEST_VALUES;
// Table 98 - TPML_PCR_SELECTION Structure
typedef struct {
- UINT32 count;
- TPMS_PCR_SELECTION pcrSelections[HASH_COUNT];
+ UINT32 count;
+ TPMS_PCR_SELECTION pcrSelections[HASH_COUNT];
} TPML_PCR_SELECTION;
// Table 99 - TPML_ALG_PROPERTY Structure
typedef struct {
- UINT32 count;
- TPMS_ALG_PROPERTY algProperties[MAX_CAP_ALGS];
+ UINT32 count;
+ TPMS_ALG_PROPERTY algProperties[MAX_CAP_ALGS];
} TPML_ALG_PROPERTY;
// Table 100 - TPML_TAGGED_TPM_PROPERTY Structure
typedef struct {
- UINT32 count;
- TPMS_TAGGED_PROPERTY tpmProperty[MAX_TPM_PROPERTIES];
+ UINT32 count;
+ TPMS_TAGGED_PROPERTY tpmProperty[MAX_TPM_PROPERTIES];
} TPML_TAGGED_TPM_PROPERTY;
// Table 101 - TPML_TAGGED_PCR_PROPERTY Structure
typedef struct {
- UINT32 count;
- TPMS_TAGGED_PCR_SELECT pcrProperty[MAX_PCR_PROPERTIES];
+ UINT32 count;
+ TPMS_TAGGED_PCR_SELECT pcrProperty[MAX_PCR_PROPERTIES];
} TPML_TAGGED_PCR_PROPERTY;
// Table 102 - TPML_ECC_CURVE Structure
typedef struct {
- UINT32 count;
- TPM_ECC_CURVE eccCurves[MAX_ECC_CURVES];
+ UINT32 count;
+ TPM_ECC_CURVE eccCurves[MAX_ECC_CURVES];
} TPML_ECC_CURVE;
// Table 103 - TPMU_CAPABILITIES Union
typedef union {
- TPML_ALG_PROPERTY algorithms;
- TPML_HANDLE handles;
- TPML_CCA command;
- TPML_CC ppCommands;
- TPML_CC auditCommands;
- TPML_PCR_SELECTION assignedPCR;
- TPML_TAGGED_TPM_PROPERTY tpmProperties;
- TPML_TAGGED_PCR_PROPERTY pcrProperties;
- TPML_ECC_CURVE eccCurves;
+ TPML_ALG_PROPERTY algorithms;
+ TPML_HANDLE handles;
+ TPML_CCA command;
+ TPML_CC ppCommands;
+ TPML_CC auditCommands;
+ TPML_PCR_SELECTION assignedPCR;
+ TPML_TAGGED_TPM_PROPERTY tpmProperties;
+ TPML_TAGGED_PCR_PROPERTY pcrProperties;
+ TPML_ECC_CURVE eccCurves;
} TPMU_CAPABILITIES;
// Table 104 - TPMS_CAPABILITY_DATA Structure
typedef struct {
- TPM_CAP capability;
- TPMU_CAPABILITIES data;
+ TPM_CAP capability;
+ TPMU_CAPABILITIES data;
} TPMS_CAPABILITY_DATA;
// Table 105 - TPMS_CLOCK_INFO Structure
typedef struct {
- UINT64 clock;
- UINT32 resetCount;
- UINT32 restartCount;
- TPMI_YES_NO safe;
+ UINT64 clock;
+ UINT32 resetCount;
+ UINT32 restartCount;
+ TPMI_YES_NO safe;
} TPMS_CLOCK_INFO;
// Table 106 - TPMS_TIME_INFO Structure
typedef struct {
- UINT64 time;
- TPMS_CLOCK_INFO clockInfo;
+ UINT64 time;
+ TPMS_CLOCK_INFO clockInfo;
} TPMS_TIME_INFO;
// Table 107 - TPMS_TIME_ATTEST_INFO Structure
typedef struct {
- TPMS_TIME_INFO time;
- UINT64 firmwareVersion;
+ TPMS_TIME_INFO time;
+ UINT64 firmwareVersion;
} TPMS_TIME_ATTEST_INFO;
// Table 108 - TPMS_CERTIFY_INFO Structure
typedef struct {
- TPM2B_NAME name;
- TPM2B_NAME qualifiedName;
+ TPM2B_NAME name;
+ TPM2B_NAME qualifiedName;
} TPMS_CERTIFY_INFO;
// Table 109 - TPMS_QUOTE_INFO Structure
typedef struct {
- TPML_PCR_SELECTION pcrSelect;
- TPM2B_DIGEST pcrDigest;
+ TPML_PCR_SELECTION pcrSelect;
+ TPM2B_DIGEST pcrDigest;
} TPMS_QUOTE_INFO;
// Table 110 - TPMS_COMMAND_AUDIT_INFO Structure
typedef struct {
- UINT64 auditCounter;
- TPM_ALG_ID digestAlg;
- TPM2B_DIGEST auditDigest;
- TPM2B_DIGEST commandDigest;
+ UINT64 auditCounter;
+ TPM_ALG_ID digestAlg;
+ TPM2B_DIGEST auditDigest;
+ TPM2B_DIGEST commandDigest;
} TPMS_COMMAND_AUDIT_INFO;
// Table 111 - TPMS_SESSION_AUDIT_INFO Structure
typedef struct {
- TPMI_YES_NO exclusiveSession;
- TPM2B_DIGEST sessionDigest;
+ TPMI_YES_NO exclusiveSession;
+ TPM2B_DIGEST sessionDigest;
} TPMS_SESSION_AUDIT_INFO;
// Table 112 - TPMS_CREATION_INFO Structure
typedef struct {
- TPM2B_NAME objectName;
- TPM2B_DIGEST creationHash;
+ TPM2B_NAME objectName;
+ TPM2B_DIGEST creationHash;
} TPMS_CREATION_INFO;
// Table 113 - TPMS_NV_CERTIFY_INFO Structure
typedef struct {
- TPM2B_NAME indexName;
- UINT16 offset;
- TPM2B_MAX_NV_BUFFER nvContents;
+ TPM2B_NAME indexName;
+ UINT16 offset;
+ TPM2B_MAX_NV_BUFFER nvContents;
} TPMS_NV_CERTIFY_INFO;
// Table 114 - TPMI_ST_ATTEST Type
@@ -1202,45 +1195,45 @@
// Table 115 - TPMU_ATTEST Union
typedef union {
- TPMS_CERTIFY_INFO certify;
- TPMS_CREATION_INFO creation;
- TPMS_QUOTE_INFO quote;
- TPMS_COMMAND_AUDIT_INFO commandAudit;
- TPMS_SESSION_AUDIT_INFO sessionAudit;
- TPMS_TIME_ATTEST_INFO time;
- TPMS_NV_CERTIFY_INFO nv;
+ TPMS_CERTIFY_INFO certify;
+ TPMS_CREATION_INFO creation;
+ TPMS_QUOTE_INFO quote;
+ TPMS_COMMAND_AUDIT_INFO commandAudit;
+ TPMS_SESSION_AUDIT_INFO sessionAudit;
+ TPMS_TIME_ATTEST_INFO time;
+ TPMS_NV_CERTIFY_INFO nv;
} TPMU_ATTEST;
// Table 116 - TPMS_ATTEST Structure
typedef struct {
- TPM_GENERATED magic;
- TPMI_ST_ATTEST type;
- TPM2B_NAME qualifiedSigner;
- TPM2B_DATA extraData;
- TPMS_CLOCK_INFO clockInfo;
- UINT64 firmwareVersion;
- TPMU_ATTEST attested;
+ TPM_GENERATED magic;
+ TPMI_ST_ATTEST type;
+ TPM2B_NAME qualifiedSigner;
+ TPM2B_DATA extraData;
+ TPMS_CLOCK_INFO clockInfo;
+ UINT64 firmwareVersion;
+ TPMU_ATTEST attested;
} TPMS_ATTEST;
// Table 117 - TPM2B_ATTEST Structure
typedef struct {
- UINT16 size;
- BYTE attestationData[sizeof(TPMS_ATTEST)];
+ UINT16 size;
+ BYTE attestationData[sizeof (TPMS_ATTEST)];
} TPM2B_ATTEST;
// Table 118 - TPMS_AUTH_COMMAND Structure
typedef struct {
- TPMI_SH_AUTH_SESSION sessionHandle;
- TPM2B_NONCE nonce;
- TPMA_SESSION sessionAttributes;
- TPM2B_AUTH hmac;
+ TPMI_SH_AUTH_SESSION sessionHandle;
+ TPM2B_NONCE nonce;
+ TPMA_SESSION sessionAttributes;
+ TPM2B_AUTH hmac;
} TPMS_AUTH_COMMAND;
// Table 119 - TPMS_AUTH_RESPONSE Structure
typedef struct {
- TPM2B_NONCE nonce;
- TPMA_SESSION sessionAttributes;
- TPM2B_AUTH hmac;
+ TPM2B_NONCE nonce;
+ TPMA_SESSION sessionAttributes;
+ TPM2B_AUTH hmac;
} TPMS_AUTH_RESPONSE;
// 11 Algorithm Parameters and Structures
@@ -1253,65 +1246,65 @@
// Table 122 - TPMU_SYM_KEY_BITS Union
typedef union {
- TPMI_AES_KEY_BITS aes;
- TPMI_SM4_KEY_BITS SM4;
- TPM_KEY_BITS sym;
+ TPMI_AES_KEY_BITS aes;
+ TPMI_SM4_KEY_BITS SM4;
+ TPM_KEY_BITS sym;
TPMI_ALG_HASH xor;
} TPMU_SYM_KEY_BITS;
// Table 123 - TPMU_SYM_MODE Union
typedef union {
- TPMI_ALG_SYM_MODE aes;
- TPMI_ALG_SYM_MODE SM4;
- TPMI_ALG_SYM_MODE sym;
+ TPMI_ALG_SYM_MODE aes;
+ TPMI_ALG_SYM_MODE SM4;
+ TPMI_ALG_SYM_MODE sym;
} TPMU_SYM_MODE;
// Table 125 - TPMT_SYM_DEF Structure
typedef struct {
- TPMI_ALG_SYM algorithm;
- TPMU_SYM_KEY_BITS keyBits;
- TPMU_SYM_MODE mode;
+ TPMI_ALG_SYM algorithm;
+ TPMU_SYM_KEY_BITS keyBits;
+ TPMU_SYM_MODE mode;
} TPMT_SYM_DEF;
// Table 126 - TPMT_SYM_DEF_OBJECT Structure
typedef struct {
- TPMI_ALG_SYM_OBJECT algorithm;
- TPMU_SYM_KEY_BITS keyBits;
- TPMU_SYM_MODE mode;
+ TPMI_ALG_SYM_OBJECT algorithm;
+ TPMU_SYM_KEY_BITS keyBits;
+ TPMU_SYM_MODE mode;
} TPMT_SYM_DEF_OBJECT;
// Table 127 - TPM2B_SYM_KEY Structure
typedef struct {
- UINT16 size;
- BYTE buffer[MAX_SYM_KEY_BYTES];
+ UINT16 size;
+ BYTE buffer[MAX_SYM_KEY_BYTES];
} TPM2B_SYM_KEY;
// Table 128 - TPMS_SYMCIPHER_PARMS Structure
typedef struct {
- TPMT_SYM_DEF_OBJECT sym;
+ TPMT_SYM_DEF_OBJECT sym;
} TPMS_SYMCIPHER_PARMS;
// Table 129 - TPM2B_SENSITIVE_DATA Structure
typedef struct {
- UINT16 size;
- BYTE buffer[MAX_SYM_DATA];
+ UINT16 size;
+ BYTE buffer[MAX_SYM_DATA];
} TPM2B_SENSITIVE_DATA;
// Table 130 - TPMS_SENSITIVE_CREATE Structure
typedef struct {
- TPM2B_AUTH userAuth;
- TPM2B_SENSITIVE_DATA data;
+ TPM2B_AUTH userAuth;
+ TPM2B_SENSITIVE_DATA data;
} TPMS_SENSITIVE_CREATE;
// Table 131 - TPM2B_SENSITIVE_CREATE Structure
typedef struct {
- UINT16 size;
- TPMS_SENSITIVE_CREATE sensitive;
+ UINT16 size;
+ TPMS_SENSITIVE_CREATE sensitive;
} TPM2B_SENSITIVE_CREATE;
// Table 132 - TPMS_SCHEME_SIGHASH Structure
typedef struct {
- TPMI_ALG_HASH hashAlg;
+ TPMI_ALG_HASH hashAlg;
} TPMS_SCHEME_SIGHASH;
// Table 133 - TPMI_ALG_KEYEDHASH_SCHEME Type
@@ -1322,20 +1315,20 @@
// Table 135 - TPMS_SCHEME_XOR Structure
typedef struct {
- TPMI_ALG_HASH hashAlg;
- TPMI_ALG_KDF kdf;
+ TPMI_ALG_HASH hashAlg;
+ TPMI_ALG_KDF kdf;
} TPMS_SCHEME_XOR;
// Table 136 - TPMU_SCHEME_KEYEDHASH Union
typedef union {
- TPMS_SCHEME_HMAC hmac;
+ TPMS_SCHEME_HMAC hmac;
TPMS_SCHEME_XOR xor;
} TPMU_SCHEME_KEYEDHASH;
// Table 137 - TPMT_KEYEDHASH_SCHEME Structure
typedef struct {
- TPMI_ALG_KEYEDHASH_SCHEME scheme;
- TPMU_SCHEME_KEYEDHASH details;
+ TPMI_ALG_KEYEDHASH_SCHEME scheme;
+ TPMU_SCHEME_KEYEDHASH details;
} TPMT_KEYEDHASH_SCHEME;
// Table 138 - RSA_SIG_SCHEMES Types
@@ -1349,69 +1342,69 @@
// Table 140 - TPMS_SCHEME_ECDAA Structure
typedef struct {
- TPMI_ALG_HASH hashAlg;
- UINT16 count;
+ TPMI_ALG_HASH hashAlg;
+ UINT16 count;
} TPMS_SCHEME_ECDAA;
// Table 141 - TPMU_SIG_SCHEME Union
typedef union {
- TPMS_SCHEME_RSASSA rsassa;
- TPMS_SCHEME_RSAPSS rsapss;
- TPMS_SCHEME_ECDSA ecdsa;
- TPMS_SCHEME_ECDAA ecdaa;
- TPMS_SCHEME_ECSCHNORR ecSchnorr;
- TPMS_SCHEME_HMAC hmac;
- TPMS_SCHEME_SIGHASH any;
+ TPMS_SCHEME_RSASSA rsassa;
+ TPMS_SCHEME_RSAPSS rsapss;
+ TPMS_SCHEME_ECDSA ecdsa;
+ TPMS_SCHEME_ECDAA ecdaa;
+ TPMS_SCHEME_ECSCHNORR ecSchnorr;
+ TPMS_SCHEME_HMAC hmac;
+ TPMS_SCHEME_SIGHASH any;
} TPMU_SIG_SCHEME;
// Table 142 - TPMT_SIG_SCHEME Structure
typedef struct {
- TPMI_ALG_SIG_SCHEME scheme;
- TPMU_SIG_SCHEME details;
+ TPMI_ALG_SIG_SCHEME scheme;
+ TPMU_SIG_SCHEME details;
} TPMT_SIG_SCHEME;
// Table 143 - TPMS_SCHEME_OAEP Structure
typedef struct {
- TPMI_ALG_HASH hashAlg;
+ TPMI_ALG_HASH hashAlg;
} TPMS_SCHEME_OAEP;
// Table 144 - TPMS_SCHEME_ECDH Structure
typedef struct {
- TPMI_ALG_HASH hashAlg;
+ TPMI_ALG_HASH hashAlg;
} TPMS_SCHEME_ECDH;
// Table 145 - TPMS_SCHEME_MGF1 Structure
typedef struct {
- TPMI_ALG_HASH hashAlg;
+ TPMI_ALG_HASH hashAlg;
} TPMS_SCHEME_MGF1;
// Table 146 - TPMS_SCHEME_KDF1_SP800_56a Structure
typedef struct {
- TPMI_ALG_HASH hashAlg;
+ TPMI_ALG_HASH hashAlg;
} TPMS_SCHEME_KDF1_SP800_56a;
// Table 147 - TPMS_SCHEME_KDF2 Structure
typedef struct {
- TPMI_ALG_HASH hashAlg;
+ TPMI_ALG_HASH hashAlg;
} TPMS_SCHEME_KDF2;
// Table 148 - TPMS_SCHEME_KDF1_SP800_108 Structure
typedef struct {
- TPMI_ALG_HASH hashAlg;
+ TPMI_ALG_HASH hashAlg;
} TPMS_SCHEME_KDF1_SP800_108;
// Table 149 - TPMU_KDF_SCHEME Union
typedef union {
- TPMS_SCHEME_MGF1 mgf1;
- TPMS_SCHEME_KDF1_SP800_56a kdf1_SP800_56a;
- TPMS_SCHEME_KDF2 kdf2;
- TPMS_SCHEME_KDF1_SP800_108 kdf1_sp800_108;
+ TPMS_SCHEME_MGF1 mgf1;
+ TPMS_SCHEME_KDF1_SP800_56a kdf1_SP800_56a;
+ TPMS_SCHEME_KDF2 kdf2;
+ TPMS_SCHEME_KDF1_SP800_108 kdf1_sp800_108;
} TPMU_KDF_SCHEME;
// Table 150 - TPMT_KDF_SCHEME Structure
typedef struct {
- TPMI_ALG_KDF scheme;
- TPMU_KDF_SCHEME details;
+ TPMI_ALG_KDF scheme;
+ TPMU_KDF_SCHEME details;
} TPMT_KDF_SCHEME;
// Table 151 - TPMI_ALG_ASYM_SCHEME Type
@@ -1419,19 +1412,19 @@
// Table 152 - TPMU_ASYM_SCHEME Union
typedef union {
- TPMS_SCHEME_RSASSA rsassa;
- TPMS_SCHEME_RSAPSS rsapss;
- TPMS_SCHEME_OAEP oaep;
- TPMS_SCHEME_ECDSA ecdsa;
- TPMS_SCHEME_ECDAA ecdaa;
- TPMS_SCHEME_ECSCHNORR ecSchnorr;
- TPMS_SCHEME_SIGHASH anySig;
+ TPMS_SCHEME_RSASSA rsassa;
+ TPMS_SCHEME_RSAPSS rsapss;
+ TPMS_SCHEME_OAEP oaep;
+ TPMS_SCHEME_ECDSA ecdsa;
+ TPMS_SCHEME_ECDAA ecdaa;
+ TPMS_SCHEME_ECSCHNORR ecSchnorr;
+ TPMS_SCHEME_SIGHASH anySig;
} TPMU_ASYM_SCHEME;
// Table 153 - TPMT_ASYM_SCHEME Structure
typedef struct {
- TPMI_ALG_ASYM_SCHEME scheme;
- TPMU_ASYM_SCHEME details;
+ TPMI_ALG_ASYM_SCHEME scheme;
+ TPMU_ASYM_SCHEME details;
} TPMT_ASYM_SCHEME;
// Table 154 - TPMI_ALG_RSA_SCHEME Type
@@ -1439,8 +1432,8 @@
// Table 155 - TPMT_RSA_SCHEME Structure
typedef struct {
- TPMI_ALG_RSA_SCHEME scheme;
- TPMU_ASYM_SCHEME details;
+ TPMI_ALG_RSA_SCHEME scheme;
+ TPMU_ASYM_SCHEME details;
} TPMT_RSA_SCHEME;
// Table 156 - TPMI_ALG_RSA_DECRYPT Type
@@ -1448,14 +1441,14 @@
// Table 157 - TPMT_RSA_DECRYPT Structure
typedef struct {
- TPMI_ALG_RSA_DECRYPT scheme;
- TPMU_ASYM_SCHEME details;
+ TPMI_ALG_RSA_DECRYPT scheme;
+ TPMU_ASYM_SCHEME details;
} TPMT_RSA_DECRYPT;
// Table 158 - TPM2B_PUBLIC_KEY_RSA Structure
typedef struct {
- UINT16 size;
- BYTE buffer[MAX_RSA_KEY_BYTES];
+ UINT16 size;
+ BYTE buffer[MAX_RSA_KEY_BYTES];
} TPM2B_PUBLIC_KEY_RSA;
// Table 159 - TPMI_RSA_KEY_BITS Type
@@ -1463,26 +1456,26 @@
// Table 160 - TPM2B_PRIVATE_KEY_RSA Structure
typedef struct {
- UINT16 size;
- BYTE buffer[MAX_RSA_KEY_BYTES/2];
+ UINT16 size;
+ BYTE buffer[MAX_RSA_KEY_BYTES/2];
} TPM2B_PRIVATE_KEY_RSA;
// Table 161 - TPM2B_ECC_PARAMETER Structure
typedef struct {
- UINT16 size;
- BYTE buffer[MAX_ECC_KEY_BYTES];
+ UINT16 size;
+ BYTE buffer[MAX_ECC_KEY_BYTES];
} TPM2B_ECC_PARAMETER;
// Table 162 - TPMS_ECC_POINT Structure
typedef struct {
- TPM2B_ECC_PARAMETER x;
- TPM2B_ECC_PARAMETER y;
+ TPM2B_ECC_PARAMETER x;
+ TPM2B_ECC_PARAMETER y;
} TPMS_ECC_POINT;
// Table 163 -- TPM2B_ECC_POINT Structure <I/O>
typedef struct {
- UINT16 size;
- TPMS_ECC_POINT point;
+ UINT16 size;
+ TPMS_ECC_POINT point;
} TPM2B_ECC_POINT;
// Table 164 - TPMI_ALG_ECC_SCHEME Type
@@ -1493,74 +1486,74 @@
// Table 166 - TPMT_ECC_SCHEME Structure
typedef struct {
- TPMI_ALG_ECC_SCHEME scheme;
- TPMU_SIG_SCHEME details;
+ TPMI_ALG_ECC_SCHEME scheme;
+ TPMU_SIG_SCHEME details;
} TPMT_ECC_SCHEME;
// Table 167 - TPMS_ALGORITHM_DETAIL_ECC Structure
typedef struct {
- TPM_ECC_CURVE curveID;
- UINT16 keySize;
- TPMT_KDF_SCHEME kdf;
- TPMT_ECC_SCHEME sign;
- TPM2B_ECC_PARAMETER p;
- TPM2B_ECC_PARAMETER a;
- TPM2B_ECC_PARAMETER b;
- TPM2B_ECC_PARAMETER gX;
- TPM2B_ECC_PARAMETER gY;
- TPM2B_ECC_PARAMETER n;
- TPM2B_ECC_PARAMETER h;
+ TPM_ECC_CURVE curveID;
+ UINT16 keySize;
+ TPMT_KDF_SCHEME kdf;
+ TPMT_ECC_SCHEME sign;
+ TPM2B_ECC_PARAMETER p;
+ TPM2B_ECC_PARAMETER a;
+ TPM2B_ECC_PARAMETER b;
+ TPM2B_ECC_PARAMETER gX;
+ TPM2B_ECC_PARAMETER gY;
+ TPM2B_ECC_PARAMETER n;
+ TPM2B_ECC_PARAMETER h;
} TPMS_ALGORITHM_DETAIL_ECC;
// Table 168 - TPMS_SIGNATURE_RSASSA Structure
typedef struct {
- TPMI_ALG_HASH hash;
- TPM2B_PUBLIC_KEY_RSA sig;
+ TPMI_ALG_HASH hash;
+ TPM2B_PUBLIC_KEY_RSA sig;
} TPMS_SIGNATURE_RSASSA;
// Table 169 - TPMS_SIGNATURE_RSAPSS Structure
typedef struct {
- TPMI_ALG_HASH hash;
- TPM2B_PUBLIC_KEY_RSA sig;
+ TPMI_ALG_HASH hash;
+ TPM2B_PUBLIC_KEY_RSA sig;
} TPMS_SIGNATURE_RSAPSS;
// Table 170 - TPMS_SIGNATURE_ECDSA Structure
typedef struct {
- TPMI_ALG_HASH hash;
- TPM2B_ECC_PARAMETER signatureR;
- TPM2B_ECC_PARAMETER signatureS;
+ TPMI_ALG_HASH hash;
+ TPM2B_ECC_PARAMETER signatureR;
+ TPM2B_ECC_PARAMETER signatureS;
} TPMS_SIGNATURE_ECDSA;
// Table 171 - TPMU_SIGNATURE Union
typedef union {
- TPMS_SIGNATURE_RSASSA rsassa;
- TPMS_SIGNATURE_RSAPSS rsapss;
- TPMS_SIGNATURE_ECDSA ecdsa;
- TPMS_SIGNATURE_ECDSA sm2;
- TPMS_SIGNATURE_ECDSA ecdaa;
- TPMS_SIGNATURE_ECDSA ecschnorr;
- TPMT_HA hmac;
- TPMS_SCHEME_SIGHASH any;
+ TPMS_SIGNATURE_RSASSA rsassa;
+ TPMS_SIGNATURE_RSAPSS rsapss;
+ TPMS_SIGNATURE_ECDSA ecdsa;
+ TPMS_SIGNATURE_ECDSA sm2;
+ TPMS_SIGNATURE_ECDSA ecdaa;
+ TPMS_SIGNATURE_ECDSA ecschnorr;
+ TPMT_HA hmac;
+ TPMS_SCHEME_SIGHASH any;
} TPMU_SIGNATURE;
// Table 172 - TPMT_SIGNATURE Structure
typedef struct {
- TPMI_ALG_SIG_SCHEME sigAlg;
- TPMU_SIGNATURE signature;
+ TPMI_ALG_SIG_SCHEME sigAlg;
+ TPMU_SIGNATURE signature;
} TPMT_SIGNATURE;
// Table 173 - TPMU_ENCRYPTED_SECRET Union
typedef union {
- BYTE ecc[sizeof(TPMS_ECC_POINT)];
- BYTE rsa[MAX_RSA_KEY_BYTES];
- BYTE symmetric[sizeof(TPM2B_DIGEST)];
- BYTE keyedHash[sizeof(TPM2B_DIGEST)];
+ BYTE ecc[sizeof (TPMS_ECC_POINT)];
+ BYTE rsa[MAX_RSA_KEY_BYTES];
+ BYTE symmetric[sizeof (TPM2B_DIGEST)];
+ BYTE keyedHash[sizeof (TPM2B_DIGEST)];
} TPMU_ENCRYPTED_SECRET;
// Table 174 - TPM2B_ENCRYPTED_SECRET Structure
typedef struct {
- UINT16 size;
- BYTE secret[sizeof(TPMU_ENCRYPTED_SECRET)];
+ UINT16 size;
+ BYTE secret[sizeof (TPMU_ENCRYPTED_SECRET)];
} TPM2B_ENCRYPTED_SECRET;
// 12 Key/Object Complex
@@ -1570,122 +1563,122 @@
// Table 176 - TPMU_PUBLIC_ID Union
typedef union {
- TPM2B_DIGEST keyedHash;
- TPM2B_DIGEST sym;
- TPM2B_PUBLIC_KEY_RSA rsa;
- TPMS_ECC_POINT ecc;
+ TPM2B_DIGEST keyedHash;
+ TPM2B_DIGEST sym;
+ TPM2B_PUBLIC_KEY_RSA rsa;
+ TPMS_ECC_POINT ecc;
} TPMU_PUBLIC_ID;
// Table 177 - TPMS_KEYEDHASH_PARMS Structure
typedef struct {
- TPMT_KEYEDHASH_SCHEME scheme;
+ TPMT_KEYEDHASH_SCHEME scheme;
} TPMS_KEYEDHASH_PARMS;
// Table 178 - TPMS_ASYM_PARMS Structure
typedef struct {
- TPMT_SYM_DEF_OBJECT symmetric;
- TPMT_ASYM_SCHEME scheme;
+ TPMT_SYM_DEF_OBJECT symmetric;
+ TPMT_ASYM_SCHEME scheme;
} TPMS_ASYM_PARMS;
// Table 179 - TPMS_RSA_PARMS Structure
typedef struct {
- TPMT_SYM_DEF_OBJECT symmetric;
- TPMT_RSA_SCHEME scheme;
- TPMI_RSA_KEY_BITS keyBits;
- UINT32 exponent;
+ TPMT_SYM_DEF_OBJECT symmetric;
+ TPMT_RSA_SCHEME scheme;
+ TPMI_RSA_KEY_BITS keyBits;
+ UINT32 exponent;
} TPMS_RSA_PARMS;
// Table 180 - TPMS_ECC_PARMS Structure
typedef struct {
- TPMT_SYM_DEF_OBJECT symmetric;
- TPMT_ECC_SCHEME scheme;
- TPMI_ECC_CURVE curveID;
- TPMT_KDF_SCHEME kdf;
+ TPMT_SYM_DEF_OBJECT symmetric;
+ TPMT_ECC_SCHEME scheme;
+ TPMI_ECC_CURVE curveID;
+ TPMT_KDF_SCHEME kdf;
} TPMS_ECC_PARMS;
// Table 181 - TPMU_PUBLIC_PARMS Union
typedef union {
- TPMS_KEYEDHASH_PARMS keyedHashDetail;
- TPMT_SYM_DEF_OBJECT symDetail;
- TPMS_RSA_PARMS rsaDetail;
- TPMS_ECC_PARMS eccDetail;
- TPMS_ASYM_PARMS asymDetail;
+ TPMS_KEYEDHASH_PARMS keyedHashDetail;
+ TPMT_SYM_DEF_OBJECT symDetail;
+ TPMS_RSA_PARMS rsaDetail;
+ TPMS_ECC_PARMS eccDetail;
+ TPMS_ASYM_PARMS asymDetail;
} TPMU_PUBLIC_PARMS;
// Table 182 - TPMT_PUBLIC_PARMS Structure
typedef struct {
- TPMI_ALG_PUBLIC type;
- TPMU_PUBLIC_PARMS parameters;
+ TPMI_ALG_PUBLIC type;
+ TPMU_PUBLIC_PARMS parameters;
} TPMT_PUBLIC_PARMS;
// Table 183 - TPMT_PUBLIC Structure
typedef struct {
- TPMI_ALG_PUBLIC type;
- TPMI_ALG_HASH nameAlg;
- TPMA_OBJECT objectAttributes;
- TPM2B_DIGEST authPolicy;
- TPMU_PUBLIC_PARMS parameters;
- TPMU_PUBLIC_ID unique;
+ TPMI_ALG_PUBLIC type;
+ TPMI_ALG_HASH nameAlg;
+ TPMA_OBJECT objectAttributes;
+ TPM2B_DIGEST authPolicy;
+ TPMU_PUBLIC_PARMS parameters;
+ TPMU_PUBLIC_ID unique;
} TPMT_PUBLIC;
// Table 184 - TPM2B_PUBLIC Structure
typedef struct {
- UINT16 size;
- TPMT_PUBLIC publicArea;
+ UINT16 size;
+ TPMT_PUBLIC publicArea;
} TPM2B_PUBLIC;
// Table 185 - TPM2B_PRIVATE_VENDOR_SPECIFIC Structure
typedef struct {
- UINT16 size;
- BYTE buffer[PRIVATE_VENDOR_SPECIFIC_BYTES];
+ UINT16 size;
+ BYTE buffer[PRIVATE_VENDOR_SPECIFIC_BYTES];
} TPM2B_PRIVATE_VENDOR_SPECIFIC;
// Table 186 - TPMU_SENSITIVE_COMPOSITE Union
typedef union {
- TPM2B_PRIVATE_KEY_RSA rsa;
- TPM2B_ECC_PARAMETER ecc;
- TPM2B_SENSITIVE_DATA bits;
- TPM2B_SYM_KEY sym;
- TPM2B_PRIVATE_VENDOR_SPECIFIC any;
+ TPM2B_PRIVATE_KEY_RSA rsa;
+ TPM2B_ECC_PARAMETER ecc;
+ TPM2B_SENSITIVE_DATA bits;
+ TPM2B_SYM_KEY sym;
+ TPM2B_PRIVATE_VENDOR_SPECIFIC any;
} TPMU_SENSITIVE_COMPOSITE;
// Table 187 - TPMT_SENSITIVE Structure
typedef struct {
- TPMI_ALG_PUBLIC sensitiveType;
- TPM2B_AUTH authValue;
- TPM2B_DIGEST seedValue;
- TPMU_SENSITIVE_COMPOSITE sensitive;
+ TPMI_ALG_PUBLIC sensitiveType;
+ TPM2B_AUTH authValue;
+ TPM2B_DIGEST seedValue;
+ TPMU_SENSITIVE_COMPOSITE sensitive;
} TPMT_SENSITIVE;
// Table 188 - TPM2B_SENSITIVE Structure
typedef struct {
- UINT16 size;
- TPMT_SENSITIVE sensitiveArea;
+ UINT16 size;
+ TPMT_SENSITIVE sensitiveArea;
} TPM2B_SENSITIVE;
// Table 189 - _PRIVATE Structure
typedef struct {
- TPM2B_DIGEST integrityOuter;
- TPM2B_DIGEST integrityInner;
- TPMT_SENSITIVE sensitive;
+ TPM2B_DIGEST integrityOuter;
+ TPM2B_DIGEST integrityInner;
+ TPMT_SENSITIVE sensitive;
} _PRIVATE;
// Table 190 - TPM2B_PRIVATE Structure
typedef struct {
- UINT16 size;
- BYTE buffer[sizeof(_PRIVATE)];
+ UINT16 size;
+ BYTE buffer[sizeof (_PRIVATE)];
} TPM2B_PRIVATE;
// Table 191 - _ID_OBJECT Structure
typedef struct {
- TPM2B_DIGEST integrityHMAC;
- TPM2B_DIGEST encIdentity;
+ TPM2B_DIGEST integrityHMAC;
+ TPM2B_DIGEST encIdentity;
} _ID_OBJECT;
// Table 192 - TPM2B_ID_OBJECT Structure
typedef struct {
- UINT16 size;
- BYTE credential[sizeof(_ID_OBJECT)];
+ UINT16 size;
+ BYTE credential[sizeof (_ID_OBJECT)];
} TPM2B_ID_OBJECT;
// 13 NV Storage Structures
@@ -1694,118 +1687,117 @@
//
// NOTE: Comment here to resolve conflict
//
-//typedef struct {
+// typedef struct {
// UINT32 index : 22;
// UINT32 space : 2;
// UINT32 RH_NV : 8;
-//} TPM_NV_INDEX;
+// } TPM_NV_INDEX;
// Table 195 - TPMA_NV Bits
typedef struct {
- UINT32 TPMA_NV_PPWRITE : 1;
- UINT32 TPMA_NV_OWNERWRITE : 1;
- UINT32 TPMA_NV_AUTHWRITE : 1;
- UINT32 TPMA_NV_POLICYWRITE : 1;
- UINT32 TPMA_NV_COUNTER : 1;
- UINT32 TPMA_NV_BITS : 1;
- UINT32 TPMA_NV_EXTEND : 1;
- UINT32 reserved7_9 : 3;
- UINT32 TPMA_NV_POLICY_DELETE : 1;
- UINT32 TPMA_NV_WRITELOCKED : 1;
- UINT32 TPMA_NV_WRITEALL : 1;
- UINT32 TPMA_NV_WRITEDEFINE : 1;
- UINT32 TPMA_NV_WRITE_STCLEAR : 1;
- UINT32 TPMA_NV_GLOBALLOCK : 1;
- UINT32 TPMA_NV_PPREAD : 1;
- UINT32 TPMA_NV_OWNERREAD : 1;
- UINT32 TPMA_NV_AUTHREAD : 1;
- UINT32 TPMA_NV_POLICYREAD : 1;
- UINT32 reserved20_24 : 5;
- UINT32 TPMA_NV_NO_DA : 1;
- UINT32 TPMA_NV_ORDERLY : 1;
- UINT32 TPMA_NV_CLEAR_STCLEAR : 1;
- UINT32 TPMA_NV_READLOCKED : 1;
- UINT32 TPMA_NV_WRITTEN : 1;
- UINT32 TPMA_NV_PLATFORMCREATE : 1;
- UINT32 TPMA_NV_READ_STCLEAR : 1;
+ UINT32 TPMA_NV_PPWRITE : 1;
+ UINT32 TPMA_NV_OWNERWRITE : 1;
+ UINT32 TPMA_NV_AUTHWRITE : 1;
+ UINT32 TPMA_NV_POLICYWRITE : 1;
+ UINT32 TPMA_NV_COUNTER : 1;
+ UINT32 TPMA_NV_BITS : 1;
+ UINT32 TPMA_NV_EXTEND : 1;
+ UINT32 reserved7_9 : 3;
+ UINT32 TPMA_NV_POLICY_DELETE : 1;
+ UINT32 TPMA_NV_WRITELOCKED : 1;
+ UINT32 TPMA_NV_WRITEALL : 1;
+ UINT32 TPMA_NV_WRITEDEFINE : 1;
+ UINT32 TPMA_NV_WRITE_STCLEAR : 1;
+ UINT32 TPMA_NV_GLOBALLOCK : 1;
+ UINT32 TPMA_NV_PPREAD : 1;
+ UINT32 TPMA_NV_OWNERREAD : 1;
+ UINT32 TPMA_NV_AUTHREAD : 1;
+ UINT32 TPMA_NV_POLICYREAD : 1;
+ UINT32 reserved20_24 : 5;
+ UINT32 TPMA_NV_NO_DA : 1;
+ UINT32 TPMA_NV_ORDERLY : 1;
+ UINT32 TPMA_NV_CLEAR_STCLEAR : 1;
+ UINT32 TPMA_NV_READLOCKED : 1;
+ UINT32 TPMA_NV_WRITTEN : 1;
+ UINT32 TPMA_NV_PLATFORMCREATE : 1;
+ UINT32 TPMA_NV_READ_STCLEAR : 1;
} TPMA_NV;
// Table 196 - TPMS_NV_PUBLIC Structure
typedef struct {
- TPMI_RH_NV_INDEX nvIndex;
- TPMI_ALG_HASH nameAlg;
- TPMA_NV attributes;
- TPM2B_DIGEST authPolicy;
- UINT16 dataSize;
+ TPMI_RH_NV_INDEX nvIndex;
+ TPMI_ALG_HASH nameAlg;
+ TPMA_NV attributes;
+ TPM2B_DIGEST authPolicy;
+ UINT16 dataSize;
} TPMS_NV_PUBLIC;
// Table 197 - TPM2B_NV_PUBLIC Structure
typedef struct {
- UINT16 size;
- TPMS_NV_PUBLIC nvPublic;
+ UINT16 size;
+ TPMS_NV_PUBLIC nvPublic;
} TPM2B_NV_PUBLIC;
// 14 Context Data
// Table 198 - TPM2B_CONTEXT_SENSITIVE Structure
typedef struct {
- UINT16 size;
- BYTE buffer[MAX_CONTEXT_SIZE];
+ UINT16 size;
+ BYTE buffer[MAX_CONTEXT_SIZE];
} TPM2B_CONTEXT_SENSITIVE;
// Table 199 - TPMS_CONTEXT_DATA Structure
typedef struct {
- TPM2B_DIGEST integrity;
- TPM2B_CONTEXT_SENSITIVE encrypted;
+ TPM2B_DIGEST integrity;
+ TPM2B_CONTEXT_SENSITIVE encrypted;
} TPMS_CONTEXT_DATA;
// Table 200 - TPM2B_CONTEXT_DATA Structure
typedef struct {
- UINT16 size;
- BYTE buffer[sizeof(TPMS_CONTEXT_DATA)];
+ UINT16 size;
+ BYTE buffer[sizeof (TPMS_CONTEXT_DATA)];
} TPM2B_CONTEXT_DATA;
// Table 201 - TPMS_CONTEXT Structure
typedef struct {
- UINT64 sequence;
- TPMI_DH_CONTEXT savedHandle;
- TPMI_RH_HIERARCHY hierarchy;
- TPM2B_CONTEXT_DATA contextBlob;
+ UINT64 sequence;
+ TPMI_DH_CONTEXT savedHandle;
+ TPMI_RH_HIERARCHY hierarchy;
+ TPM2B_CONTEXT_DATA contextBlob;
} TPMS_CONTEXT;
// 15 Creation Data
// Table 203 - TPMS_CREATION_DATA Structure
typedef struct {
- TPML_PCR_SELECTION pcrSelect;
- TPM2B_DIGEST pcrDigest;
- TPMA_LOCALITY locality;
- TPM_ALG_ID parentNameAlg;
- TPM2B_NAME parentName;
- TPM2B_NAME parentQualifiedName;
- TPM2B_DATA outsideInfo;
+ TPML_PCR_SELECTION pcrSelect;
+ TPM2B_DIGEST pcrDigest;
+ TPMA_LOCALITY locality;
+ TPM_ALG_ID parentNameAlg;
+ TPM2B_NAME parentName;
+ TPM2B_NAME parentQualifiedName;
+ TPM2B_DATA outsideInfo;
} TPMS_CREATION_DATA;
// Table 204 - TPM2B_CREATION_DATA Structure
typedef struct {
- UINT16 size;
- TPMS_CREATION_DATA creationData;
+ UINT16 size;
+ TPMS_CREATION_DATA creationData;
} TPM2B_CREATION_DATA;
-
//
// Command Header
//
typedef struct {
- TPM_ST tag;
- UINT32 paramSize;
- TPM_CC commandCode;
+ TPM_ST tag;
+ UINT32 paramSize;
+ TPM_CC commandCode;
} TPM2_COMMAND_HEADER;
typedef struct {
- TPM_ST tag;
- UINT32 paramSize;
- TPM_RC responseCode;
+ TPM_ST tag;
+ UINT32 paramSize;
+ TPM_RC responseCode;
} TPM2_RESPONSE_HEADER;
#pragma pack ()
@@ -1813,10 +1805,10 @@
//
// TCG Algorithm Registry
//
-#define HASH_ALG_SHA1 0x00000001
-#define HASH_ALG_SHA256 0x00000002
-#define HASH_ALG_SHA384 0x00000004
-#define HASH_ALG_SHA512 0x00000008
-#define HASH_ALG_SM3_256 0x00000010
+#define HASH_ALG_SHA1 0x00000001
+#define HASH_ALG_SHA256 0x00000002
+#define HASH_ALG_SHA384 0x00000004
+#define HASH_ALG_SHA512 0x00000008
+#define HASH_ALG_SM3_256 0x00000010
#endif
diff --git a/src/include/ipxe/efi/IndustryStandard/UefiTcgPlatform.h b/src/include/ipxe/efi/IndustryStandard/UefiTcgPlatform.h
index 3394c7c..a899867 100644
--- a/src/include/ipxe/efi/IndustryStandard/UefiTcgPlatform.h
+++ b/src/include/ipxe/efi/IndustryStandard/UefiTcgPlatform.h
@@ -1,21 +1,16 @@
/** @file
- TCG EFI Platform Definition in TCG_EFI_Platform_1_20_Final
+ TCG EFI Platform Definition in TCG_EFI_Platform_1_20_Final and
+ TCG PC Client Platform Firmware Profile Specification, Revision 1.05
- Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __UEFI_TCG_PLATFORM_H__
#define __UEFI_TCG_PLATFORM_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/IndustryStandard/Tpm12.h>
#include <ipxe/efi/IndustryStandard/Tpm20.h>
@@ -24,32 +19,46 @@
//
// Standard event types
//
+#define EV_PREBOOT_CERT ((TCG_EVENTTYPE) 0x00000000)
#define EV_POST_CODE ((TCG_EVENTTYPE) 0x00000001)
#define EV_NO_ACTION ((TCG_EVENTTYPE) 0x00000003)
#define EV_SEPARATOR ((TCG_EVENTTYPE) 0x00000004)
+#define EV_ACTION ((TCG_EVENTTYPE) 0x00000005)
+#define EV_EVENT_TAG ((TCG_EVENTTYPE) 0x00000006)
#define EV_S_CRTM_CONTENTS ((TCG_EVENTTYPE) 0x00000007)
#define EV_S_CRTM_VERSION ((TCG_EVENTTYPE) 0x00000008)
#define EV_CPU_MICROCODE ((TCG_EVENTTYPE) 0x00000009)
+#define EV_PLATFORM_CONFIG_FLAGS ((TCG_EVENTTYPE) 0x0000000A)
#define EV_TABLE_OF_DEVICES ((TCG_EVENTTYPE) 0x0000000B)
+#define EV_COMPACT_HASH ((TCG_EVENTTYPE) 0x0000000C)
+#define EV_NONHOST_CODE ((TCG_EVENTTYPE) 0x0000000F)
+#define EV_NONHOST_CONFIG ((TCG_EVENTTYPE) 0x00000010)
+#define EV_NONHOST_INFO ((TCG_EVENTTYPE) 0x00000011)
+#define EV_OMIT_BOOT_DEVICE_EVENTS ((TCG_EVENTTYPE) 0x00000012)
//
// EFI specific event types
//
-#define EV_EFI_EVENT_BASE ((TCG_EVENTTYPE) 0x80000000)
-#define EV_EFI_VARIABLE_DRIVER_CONFIG (EV_EFI_EVENT_BASE + 1)
-#define EV_EFI_VARIABLE_BOOT (EV_EFI_EVENT_BASE + 2)
-#define EV_EFI_BOOT_SERVICES_APPLICATION (EV_EFI_EVENT_BASE + 3)
-#define EV_EFI_BOOT_SERVICES_DRIVER (EV_EFI_EVENT_BASE + 4)
-#define EV_EFI_RUNTIME_SERVICES_DRIVER (EV_EFI_EVENT_BASE + 5)
-#define EV_EFI_GPT_EVENT (EV_EFI_EVENT_BASE + 6)
-#define EV_EFI_ACTION (EV_EFI_EVENT_BASE + 7)
-#define EV_EFI_PLATFORM_FIRMWARE_BLOB (EV_EFI_EVENT_BASE + 8)
-#define EV_EFI_HANDOFF_TABLES (EV_EFI_EVENT_BASE + 9)
-#define EV_EFI_VARIABLE_AUTHORITY (EV_EFI_EVENT_BASE + 0xE0)
+#define EV_EFI_EVENT_BASE ((TCG_EVENTTYPE) 0x80000000)
+#define EV_EFI_VARIABLE_DRIVER_CONFIG (EV_EFI_EVENT_BASE + 1)
+#define EV_EFI_VARIABLE_BOOT (EV_EFI_EVENT_BASE + 2)
+#define EV_EFI_BOOT_SERVICES_APPLICATION (EV_EFI_EVENT_BASE + 3)
+#define EV_EFI_BOOT_SERVICES_DRIVER (EV_EFI_EVENT_BASE + 4)
+#define EV_EFI_RUNTIME_SERVICES_DRIVER (EV_EFI_EVENT_BASE + 5)
+#define EV_EFI_GPT_EVENT (EV_EFI_EVENT_BASE + 6)
+#define EV_EFI_ACTION (EV_EFI_EVENT_BASE + 7)
+#define EV_EFI_PLATFORM_FIRMWARE_BLOB (EV_EFI_EVENT_BASE + 8)
+#define EV_EFI_HANDOFF_TABLES (EV_EFI_EVENT_BASE + 9)
+#define EV_EFI_PLATFORM_FIRMWARE_BLOB2 (EV_EFI_EVENT_BASE + 0xA)
+#define EV_EFI_HANDOFF_TABLES2 (EV_EFI_EVENT_BASE + 0xB)
+#define EV_EFI_HCRTM_EVENT (EV_EFI_EVENT_BASE + 0x10)
+#define EV_EFI_VARIABLE_AUTHORITY (EV_EFI_EVENT_BASE + 0xE0)
+#define EV_EFI_SPDM_FIRMWARE_BLOB (EV_EFI_EVENT_BASE + 0xE1)
+#define EV_EFI_SPDM_FIRMWARE_CONFIG (EV_EFI_EVENT_BASE + 0xE2)
#define EFI_CALLING_EFI_APPLICATION \
"Calling EFI Application from Boot Option"
-#define EFI_RETURNING_FROM_EFI_APPLICATOIN \
+#define EFI_RETURNING_FROM_EFI_APPLICATION \
"Returning from EFI Application from Boot Option"
#define EFI_EXIT_BOOT_SERVICES_INVOCATION \
"Exit Boot Services Invocation"
@@ -58,24 +67,26 @@
#define EFI_EXIT_BOOT_SERVICES_SUCCEEDED \
"Exit Boot Services Returned with Success"
+#define EV_POSTCODE_INFO_POST_CODE "POST CODE"
+#define POST_CODE_STR_LEN (sizeof(EV_POSTCODE_INFO_POST_CODE) - 1)
-#define EV_POSTCODE_INFO_POST_CODE "POST CODE"
-#define POST_CODE_STR_LEN (sizeof(EV_POSTCODE_INFO_POST_CODE) - 1)
+#define EV_POSTCODE_INFO_SMM_CODE "SMM CODE"
+#define SMM_CODE_STR_LEN (sizeof(EV_POSTCODE_INFO_SMM_CODE) - 1)
-#define EV_POSTCODE_INFO_SMM_CODE "SMM CODE"
-#define SMM_CODE_STR_LEN (sizeof(EV_POSTCODE_INFO_SMM_CODE) - 1)
+#define EV_POSTCODE_INFO_ACPI_DATA "ACPI DATA"
+#define ACPI_DATA_LEN (sizeof(EV_POSTCODE_INFO_ACPI_DATA) - 1)
-#define EV_POSTCODE_INFO_ACPI_DATA "ACPI DATA"
-#define ACPI_DATA_LEN (sizeof(EV_POSTCODE_INFO_ACPI_DATA) - 1)
+#define EV_POSTCODE_INFO_BIS_CODE "BIS CODE"
+#define BIS_CODE_LEN (sizeof(EV_POSTCODE_INFO_BIS_CODE) - 1)
-#define EV_POSTCODE_INFO_BIS_CODE "BIS CODE"
-#define BIS_CODE_LEN (sizeof(EV_POSTCODE_INFO_BIS_CODE) - 1)
+#define EV_POSTCODE_INFO_UEFI_PI "UEFI PI"
+#define UEFI_PI_LEN (sizeof(EV_POSTCODE_INFO_UEFI_PI) - 1)
-#define EV_POSTCODE_INFO_UEFI_PI "UEFI PI"
-#define UEFI_PI_LEN (sizeof(EV_POSTCODE_INFO_UEFI_PI) - 1)
+#define EV_POSTCODE_INFO_OPROM "Embedded Option ROM"
+#define OPROM_LEN (sizeof(EV_POSTCODE_INFO_OPROM) - 1)
-#define EV_POSTCODE_INFO_OPROM "Embedded Option ROM"
-#define OPROM_LEN (sizeof(EV_POSTCODE_INFO_OPROM) - 1)
+#define EV_POSTCODE_INFO_EMBEDDED_UEFI_DRIVER "Embedded UEFI Driver"
+#define EMBEDDED_UEFI_DRIVER_LEN (sizeof(EV_POSTCODE_INFO_EMBEDDED_UEFI_DRIVER) - 1)
#define FIRMWARE_DEBUGGER_EVENT_STRING "UEFI Debug Mode"
#define FIRMWARE_DEBUGGER_EVENT_STRING_LEN (sizeof(FIRMWARE_DEBUGGER_EVENT_STRING) - 1)
@@ -85,30 +96,30 @@
//
#pragma pack (1)
-typedef UINT32 TCG_EVENTTYPE;
-typedef TPM_PCRINDEX TCG_PCRINDEX;
-typedef TPM_DIGEST TCG_DIGEST;
+typedef UINT32 TCG_EVENTTYPE;
+typedef TPM_PCRINDEX TCG_PCRINDEX;
+typedef TPM_DIGEST TCG_DIGEST;
///
/// Event Log Entry Structure Definition
///
typedef struct tdTCG_PCR_EVENT {
- TCG_PCRINDEX PCRIndex; ///< PCRIndex event extended to
- TCG_EVENTTYPE EventType; ///< TCG EFI event type
- TCG_DIGEST Digest; ///< Value extended into PCRIndex
- UINT32 EventSize; ///< Size of the event data
- UINT8 Event[1]; ///< The event data
+ TCG_PCRINDEX PCRIndex; ///< PCRIndex event extended to
+ TCG_EVENTTYPE EventType; ///< TCG EFI event type
+ TCG_DIGEST Digest; ///< Value extended into PCRIndex
+ UINT32 EventSize; ///< Size of the event data
+ UINT8 Event[1]; ///< The event data
} TCG_PCR_EVENT;
-#define TSS_EVENT_DATA_MAX_SIZE 256
+#define TSS_EVENT_DATA_MAX_SIZE 256
///
/// TCG_PCR_EVENT_HDR
///
typedef struct tdTCG_PCR_EVENT_HDR {
- TCG_PCRINDEX PCRIndex;
- TCG_EVENTTYPE EventType;
- TCG_DIGEST Digest;
- UINT32 EventSize;
+ TCG_PCRINDEX PCRIndex;
+ TCG_EVENTTYPE EventType;
+ TCG_DIGEST Digest;
+ UINT32 EventSize;
} TCG_PCR_EVENT_HDR;
///
@@ -118,36 +129,98 @@
/// because PEI is 32-bit while DXE is 64-bit on x64 platforms
///
typedef struct tdEFI_PLATFORM_FIRMWARE_BLOB {
- EFI_PHYSICAL_ADDRESS BlobBase;
- UINT64 BlobLength;
+ EFI_PHYSICAL_ADDRESS BlobBase;
+ UINT64 BlobLength;
} EFI_PLATFORM_FIRMWARE_BLOB;
///
+/// UEFI_PLATFORM_FIRMWARE_BLOB
+///
+/// This structure is used in EV_EFI_PLATFORM_FIRMWARE_BLOB
+/// event to facilitate the measurement of firmware volume.
+///
+typedef struct tdUEFI_PLATFORM_FIRMWARE_BLOB {
+ EFI_PHYSICAL_ADDRESS BlobBase;
+ UINT64 BlobLength;
+} UEFI_PLATFORM_FIRMWARE_BLOB;
+
+///
+/// UEFI_PLATFORM_FIRMWARE_BLOB2
+///
+/// This structure is used in EV_EFI_PLATFORM_FIRMWARE_BLOB2
+/// event to facilitate the measurement of firmware volume.
+///
+typedef struct tdUEFI_PLATFORM_FIRMWARE_BLOB2 {
+ UINT8 BlobDescriptionSize;
+ // UINT8 BlobDescription[BlobDescriptionSize];
+ // EFI_PHYSICAL_ADDRESS BlobBase;
+ // UINT64 BlobLength;
+} UEFI_PLATFORM_FIRMWARE_BLOB2;
+
+///
/// EFI_IMAGE_LOAD_EVENT
///
/// This structure is used in EV_EFI_BOOT_SERVICES_APPLICATION,
/// EV_EFI_BOOT_SERVICES_DRIVER and EV_EFI_RUNTIME_SERVICES_DRIVER
///
typedef struct tdEFI_IMAGE_LOAD_EVENT {
- EFI_PHYSICAL_ADDRESS ImageLocationInMemory;
- UINTN ImageLengthInMemory;
- UINTN ImageLinkTimeAddress;
- UINTN LengthOfDevicePath;
- EFI_DEVICE_PATH_PROTOCOL DevicePath[1];
+ EFI_PHYSICAL_ADDRESS ImageLocationInMemory;
+ UINTN ImageLengthInMemory;
+ UINTN ImageLinkTimeAddress;
+ UINTN LengthOfDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL DevicePath[1];
} EFI_IMAGE_LOAD_EVENT;
///
+/// UEFI_IMAGE_LOAD_EVENT
+///
+/// This structure is used in EV_EFI_BOOT_SERVICES_APPLICATION,
+/// EV_EFI_BOOT_SERVICES_DRIVER and EV_EFI_RUNTIME_SERVICES_DRIVER
+///
+typedef struct tdUEFI_IMAGE_LOAD_EVENT {
+ EFI_PHYSICAL_ADDRESS ImageLocationInMemory;
+ UINT64 ImageLengthInMemory;
+ UINT64 ImageLinkTimeAddress;
+ UINT64 LengthOfDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL DevicePath[1];
+} UEFI_IMAGE_LOAD_EVENT;
+
+///
/// EFI_HANDOFF_TABLE_POINTERS
///
/// This structure is used in EV_EFI_HANDOFF_TABLES event to facilitate
/// the measurement of given configuration tables.
///
typedef struct tdEFI_HANDOFF_TABLE_POINTERS {
- UINTN NumberOfTables;
- EFI_CONFIGURATION_TABLE TableEntry[1];
+ UINTN NumberOfTables;
+ EFI_CONFIGURATION_TABLE TableEntry[1];
} EFI_HANDOFF_TABLE_POINTERS;
///
+/// UEFI_HANDOFF_TABLE_POINTERS
+///
+/// This structure is used in EV_EFI_HANDOFF_TABLES event to facilitate
+/// the measurement of given configuration tables.
+///
+typedef struct tdUEFI_HANDOFF_TABLE_POINTERS {
+ UINT64 NumberOfTables;
+ EFI_CONFIGURATION_TABLE TableEntry[1];
+} UEFI_HANDOFF_TABLE_POINTERS;
+
+///
+/// UEFI_HANDOFF_TABLE_POINTERS2
+///
+/// This structure is used in EV_EFI_HANDOFF_TABLES2 event to facilitate
+/// the measurement of given configuration tables.
+///
+typedef struct tdUEFI_HANDOFF_TABLE_POINTERS2 {
+ UINT8 TableDescriptionSize;
+ // UINT8 TableDescription[TableDescriptionSize];
+ // UINT64 NumberOfTables;
+ // EFI_CONFIGURATION_TABLE TableEntry[1];
+} UEFI_HANDOFF_TABLE_POINTERS2;
+
+///
/// EFI_VARIABLE_DATA
///
/// This structure serves as the header for measuring variables. The name of the
@@ -156,11 +229,11 @@
/// This is defined in TCG EFI Platform Spec for TPM1.1 or 1.2 V1.22
///
typedef struct tdEFI_VARIABLE_DATA {
- EFI_GUID VariableName;
- UINTN UnicodeNameLength;
- UINTN VariableDataLength;
- CHAR16 UnicodeName[1];
- INT8 VariableData[1]; ///< Driver or platform-specific data
+ EFI_GUID VariableName;
+ UINTN UnicodeNameLength;
+ UINTN VariableDataLength;
+ CHAR16 UnicodeName[1];
+ INT8 VariableData[1]; ///< Driver or platform-specific data
} EFI_VARIABLE_DATA;
///
@@ -172,50 +245,110 @@
/// This is defined in TCG PC Client Firmware Profile Spec 00.21
///
typedef struct tdUEFI_VARIABLE_DATA {
- EFI_GUID VariableName;
- UINT64 UnicodeNameLength;
- UINT64 VariableDataLength;
- CHAR16 UnicodeName[1];
- INT8 VariableData[1]; ///< Driver or platform-specific data
+ EFI_GUID VariableName;
+ UINT64 UnicodeNameLength;
+ UINT64 VariableDataLength;
+ CHAR16 UnicodeName[1];
+ INT8 VariableData[1]; ///< Driver or platform-specific data
} UEFI_VARIABLE_DATA;
//
// For TrEE1.0 compatibility
//
typedef struct {
- EFI_GUID VariableName;
- UINT64 UnicodeNameLength; // The TCG Definition used UINTN
- UINT64 VariableDataLength; // The TCG Definition used UINTN
- CHAR16 UnicodeName[1];
- INT8 VariableData[1];
+ EFI_GUID VariableName;
+ UINT64 UnicodeNameLength; // The TCG Definition used UINTN
+ UINT64 VariableDataLength; // The TCG Definition used UINTN
+ CHAR16 UnicodeName[1];
+ INT8 VariableData[1];
} EFI_VARIABLE_DATA_TREE;
typedef struct tdEFI_GPT_DATA {
- EFI_PARTITION_TABLE_HEADER EfiPartitionHeader;
- UINTN NumberOfPartitions;
- EFI_PARTITION_ENTRY Partitions[1];
+ EFI_PARTITION_TABLE_HEADER EfiPartitionHeader;
+ UINTN NumberOfPartitions;
+ EFI_PARTITION_ENTRY Partitions[1];
} EFI_GPT_DATA;
+typedef struct tdUEFI_GPT_DATA {
+ EFI_PARTITION_TABLE_HEADER EfiPartitionHeader;
+ UINT64 NumberOfPartitions;
+ EFI_PARTITION_ENTRY Partitions[1];
+} UEFI_GPT_DATA;
+
+#define TCG_DEVICE_SECURITY_EVENT_DATA_SIGNATURE "SPDM Device Sec"
+#define TCG_DEVICE_SECURITY_EVENT_DATA_VERSION 1
+
+#define TCG_DEVICE_SECURITY_EVENT_DATA_DEVICE_TYPE_NULL 0
+#define TCG_DEVICE_SECURITY_EVENT_DATA_DEVICE_TYPE_PCI 1
+#define TCG_DEVICE_SECURITY_EVENT_DATA_DEVICE_TYPE_USB 2
+
+///
+/// TCG_DEVICE_SECURITY_EVENT_DATA_HEADER
+/// This is the header of TCG_DEVICE_SECURITY_EVENT_DATA, which is
+/// used in EV_EFI_SPDM_FIRMWARE_BLOB and EV_EFI_SPDM_FIRMWARE_CONFIG.
+///
+typedef struct {
+ UINT8 Signature[16];
+ UINT16 Version;
+ UINT16 Length;
+ UINT32 SpdmHashAlgo;
+ UINT32 DeviceType;
+ // SPDM_MEASUREMENT_BLOCK SpdmMeasurementBlock;
+} TCG_DEVICE_SECURITY_EVENT_DATA_HEADER;
+
+#define TCG_DEVICE_SECURITY_EVENT_DATA_PCI_CONTEXT_VERSION 0
+
+///
+/// TCG_DEVICE_SECURITY_EVENT_DATA_PCI_CONTEXT
+/// This is the PCI context data of TCG_DEVICE_SECURITY_EVENT_DATA, which is
+/// used in EV_EFI_SPDM_FIRMWARE_BLOB and EV_EFI_SPDM_FIRMWARE_CONFIG.
+///
+typedef struct {
+ UINT16 Version;
+ UINT16 Length;
+ UINT16 VendorId;
+ UINT16 DeviceId;
+ UINT8 RevisionID;
+ UINT8 ClassCode[3];
+ UINT16 SubsystemVendorID;
+ UINT16 SubsystemID;
+} TCG_DEVICE_SECURITY_EVENT_DATA_PCI_CONTEXT;
+
+#define TCG_DEVICE_SECURITY_EVENT_DATA_USB_CONTEXT_VERSION 0
+
+///
+/// TCG_DEVICE_SECURITY_EVENT_DATA_USB_CONTEXT
+/// This is the USB context data of TCG_DEVICE_SECURITY_EVENT_DATA, which is
+/// used in EV_EFI_SPDM_FIRMWARE_BLOB and EV_EFI_SPDM_FIRMWARE_CONFIG.
+///
+typedef struct {
+ UINT16 Version;
+ UINT16 Length;
+ // UINT8 DeviceDescriptor[DescLen];
+ // UINT8 BodDescriptor[DescLen];
+ // UINT8 ConfigurationDescriptor[DescLen][NumOfConfiguration];
+} TCG_DEVICE_SECURITY_EVENT_DATA_USB_CONTEXT;
+
//
// Crypto Agile Log Entry Format
//
typedef struct tdTCG_PCR_EVENT2 {
- TCG_PCRINDEX PCRIndex;
- TCG_EVENTTYPE EventType;
- TPML_DIGEST_VALUES Digest;
- UINT32 EventSize;
- UINT8 Event[1];
+ TCG_PCRINDEX PCRIndex;
+ TCG_EVENTTYPE EventType;
+ TPML_DIGEST_VALUES Digest;
+ UINT32 EventSize;
+ UINT8 Event[1];
} TCG_PCR_EVENT2;
//
// TCG PCR Event2 Header
// Follow TCG EFI Protocol Spec 5.2 Crypto Agile Log Entry Format
//
-typedef struct tdTCG_PCR_EVENT2_HDR{
- TCG_PCRINDEX PCRIndex;
- TCG_EVENTTYPE EventType;
- TPML_DIGEST_VALUES Digests;
- UINT32 EventSize;
+typedef struct tdTCG_PCR_EVENT2_HDR {
+ TCG_PCRINDEX PCRIndex;
+ TCG_EVENTTYPE EventType;
+ TPML_DIGEST_VALUES Digests;
+ UINT32 EventSize;
} TCG_PCR_EVENT2_HDR;
//
@@ -225,111 +358,140 @@
//
// TCG defined hashing algorithm ID.
//
- UINT16 algorithmId;
+ UINT16 algorithmId;
//
// The size of the digest for the respective hashing algorithm.
//
- UINT16 digestSize;
+ UINT16 digestSize;
} TCG_EfiSpecIdEventAlgorithmSize;
-#define TCG_EfiSpecIDEventStruct_SIGNATURE_02 "Spec ID Event02"
-#define TCG_EfiSpecIDEventStruct_SIGNATURE_03 "Spec ID Event03"
+#define TCG_EfiSpecIDEventStruct_SIGNATURE_02 "Spec ID Event02"
+#define TCG_EfiSpecIDEventStruct_SIGNATURE_03 "Spec ID Event03"
-#define TCG_EfiSpecIDEventStruct_SPEC_VERSION_MAJOR_TPM12 1
-#define TCG_EfiSpecIDEventStruct_SPEC_VERSION_MINOR_TPM12 2
-#define TCG_EfiSpecIDEventStruct_SPEC_ERRATA_TPM12 2
+#define TCG_EfiSpecIDEventStruct_SPEC_VERSION_MAJOR_TPM12 1
+#define TCG_EfiSpecIDEventStruct_SPEC_VERSION_MINOR_TPM12 2
+#define TCG_EfiSpecIDEventStruct_SPEC_ERRATA_TPM12 2
#define TCG_EfiSpecIDEventStruct_SPEC_VERSION_MAJOR_TPM2 2
#define TCG_EfiSpecIDEventStruct_SPEC_VERSION_MINOR_TPM2 0
#define TCG_EfiSpecIDEventStruct_SPEC_ERRATA_TPM2 0
+#define TCG_EfiSpecIDEventStruct_SPEC_ERRATA_TPM2_REV_105 105
typedef struct {
- UINT8 signature[16];
+ UINT8 signature[16];
//
// The value for the Platform Class.
// The enumeration is defined in the TCG ACPI Specification Client Common Header.
//
- UINT32 platformClass;
+ UINT32 platformClass;
//
// The TCG EFI Platform Specification minor version number this BIOS supports.
// Any BIOS supporting version (1.22) MUST set this value to 02h.
// Any BIOS supporting version (2.0) SHALL set this value to 0x00.
//
- UINT8 specVersionMinor;
+ UINT8 specVersionMinor;
//
// The TCG EFI Platform Specification major version number this BIOS supports.
// Any BIOS supporting version (1.22) MUST set this value to 01h.
// Any BIOS supporting version (2.0) SHALL set this value to 0x02.
//
- UINT8 specVersionMajor;
+ UINT8 specVersionMajor;
//
// The TCG EFI Platform Specification errata for this specification this BIOS supports.
// Any BIOS supporting version and errata (1.22) MUST set this value to 02h.
// Any BIOS supporting version and errata (2.0) SHALL set this value to 0x00.
//
- UINT8 specErrata;
+ UINT8 specErrata;
//
// Specifies the size of the UINTN fields used in various data structures used in this specification.
// 0x01 indicates UINT32 and 0x02 indicates UINT64.
//
- UINT8 uintnSize;
+ UINT8 uintnSize;
//
// This field is added in "Spec ID Event03".
// The number of hashing algorithms used in this event log (except the first event).
// All events in this event log use all hashing algorithms defined here.
//
-//UINT32 numberOfAlgorithms;
+ // UINT32 numberOfAlgorithms;
//
// This field is added in "Spec ID Event03".
// An array of size numberOfAlgorithms of value pairs.
//
-//TCG_EfiSpecIdEventAlgorithmSize digestSize[numberOfAlgorithms];
+ // TCG_EfiSpecIdEventAlgorithmSize digestSize[numberOfAlgorithms];
//
// Size in bytes of the VendorInfo field.
// Maximum value SHALL be FFh bytes.
//
-//UINT8 vendorInfoSize;
+ // UINT8 vendorInfoSize;
//
// Provided for use by the BIOS implementer.
// The value might be used, for example, to provide more detailed information about the specific BIOS such as BIOS revision numbers, etc.
// The values within this field are not standardized and are implementer-specific.
// Platform-specific or -unique information SHALL NOT be provided in this field.
//
-//UINT8 vendorInfo[vendorInfoSize];
+ // UINT8 vendorInfo[vendorInfoSize];
} TCG_EfiSpecIDEventStruct;
+typedef struct tdTCG_PCClientTaggedEvent {
+ UINT32 taggedEventID;
+ UINT32 taggedEventDataSize;
+ // UINT8 taggedEventData[taggedEventDataSize];
+} TCG_PCClientTaggedEvent;
+#define TCG_Sp800_155_PlatformId_Event_SIGNATURE "SP800-155 Event"
+#define TCG_Sp800_155_PlatformId_Event2_SIGNATURE "SP800-155 Event2"
-#define TCG_EfiStartupLocalityEvent_SIGNATURE "StartupLocality"
+typedef struct tdTCG_Sp800_155_PlatformId_Event2 {
+ UINT8 Signature[16];
+ //
+ // Where Vendor ID is an integer defined
+ // at http://www.iana.org/assignments/enterprisenumbers
+ //
+ UINT32 VendorId;
+ //
+ // 16-byte identifier of a given platform's static configuration of code
+ //
+ EFI_GUID ReferenceManifestGuid;
+ //
+ // Below structure is newly added in TCG_Sp800_155_PlatformId_Event2.
+ //
+ // UINT8 PlatformManufacturerStrSize;
+ // UINT8 PlatformManufacturerStr[PlatformManufacturerStrSize];
+ // UINT8 PlatformModelSize;
+ // UINT8 PlatformModel[PlatformModelSize];
+ // UINT8 PlatformVersionSize;
+ // UINT8 PlatformVersion[PlatformVersionSize];
+ // UINT8 PlatformModelSize;
+ // UINT8 PlatformModel[PlatformModelSize];
+ // UINT8 FirmwareManufacturerStrSize;
+ // UINT8 FirmwareManufacturerStr[FirmwareManufacturerStrSize];
+ // UINT32 FirmwareManufacturerId;
+ // UINT8 FirmwareVersion;
+ // UINT8 FirmwareVersion[FirmwareVersionSize]];
+} TCG_Sp800_155_PlatformId_Event2;
+#define TCG_EfiStartupLocalityEvent_SIGNATURE "StartupLocality"
//
-// PC Client PTP spec Table 8 Relationship between Locality and Locality Attribute
+// The Locality Indicator which sent the TPM2_Startup command
//
-#define LOCALITY_0_INDICATOR 0x01
-#define LOCALITY_1_INDICATOR 0x02
-#define LOCALITY_2_INDICATOR 0x03
-#define LOCALITY_3_INDICATOR 0x04
-#define LOCALITY_4_INDICATOR 0x05
-
+#define LOCALITY_0_INDICATOR 0x00
+#define LOCALITY_3_INDICATOR 0x03
//
// Startup Locality Event
//
-typedef struct tdTCG_EfiStartupLocalityEvent{
- UINT8 Signature[16];
+typedef struct tdTCG_EfiStartupLocalityEvent {
+ UINT8 Signature[16];
//
// The Locality Indicator which sent the TPM2_Startup command
//
- UINT8 StartupLocality;
+ UINT8 StartupLocality;
} TCG_EfiStartupLocalityEvent;
-
//
// Restore original structure alignment
//
#pragma pack ()
#endif
-
-
diff --git a/src/include/ipxe/efi/IndustryStandard/Usb.h b/src/include/ipxe/efi/IndustryStandard/Usb.h
index 7eb1a8d..8c7fe83 100644
--- a/src/include/ipxe/efi/IndustryStandard/Usb.h
+++ b/src/include/ipxe/efi/IndustryStandard/Usb.h
@@ -2,20 +2,14 @@
Support for USB 2.0 standard.
Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __USB_H__
#define __USB_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
//
// Subset of Class and Subclass definitions from USB Specs
@@ -24,52 +18,52 @@
//
// Usb mass storage class code
//
-#define USB_MASS_STORE_CLASS 0x08
+#define USB_MASS_STORE_CLASS 0x08
//
// Usb mass storage subclass code, specify the command set used.
//
-#define USB_MASS_STORE_RBC 0x01 ///< Reduced Block Commands
-#define USB_MASS_STORE_8020I 0x02 ///< SFF-8020i, typically a CD/DVD device
-#define USB_MASS_STORE_QIC 0x03 ///< Typically a tape device
-#define USB_MASS_STORE_UFI 0x04 ///< Typically a floppy disk driver device
-#define USB_MASS_STORE_8070I 0x05 ///< SFF-8070i, typically a floppy disk driver device.
-#define USB_MASS_STORE_SCSI 0x06 ///< SCSI transparent command set
+#define USB_MASS_STORE_RBC 0x01 ///< Reduced Block Commands
+#define USB_MASS_STORE_8020I 0x02 ///< SFF-8020i, typically a CD/DVD device
+#define USB_MASS_STORE_QIC 0x03 ///< Typically a tape device
+#define USB_MASS_STORE_UFI 0x04 ///< Typically a floppy disk driver device
+#define USB_MASS_STORE_8070I 0x05 ///< SFF-8070i, typically a floppy disk driver device.
+#define USB_MASS_STORE_SCSI 0x06 ///< SCSI transparent command set
//
// Usb mass storage protocol code, specify the transport protocol
//
-#define USB_MASS_STORE_CBI0 0x00 ///< CBI protocol with command completion interrupt
-#define USB_MASS_STORE_CBI1 0x01 ///< CBI protocol without command completion interrupt
-#define USB_MASS_STORE_BOT 0x50 ///< Bulk-Only Transport
+#define USB_MASS_STORE_CBI0 0x00 ///< CBI protocol with command completion interrupt
+#define USB_MASS_STORE_CBI1 0x01 ///< CBI protocol without command completion interrupt
+#define USB_MASS_STORE_BOT 0x50 ///< Bulk-Only Transport
//
// Standard device request and request type
// USB 2.0 spec, Section 9.4
//
-#define USB_DEV_GET_STATUS 0x00
-#define USB_DEV_GET_STATUS_REQ_TYPE_D 0x80 // Receiver : Device
-#define USB_DEV_GET_STATUS_REQ_TYPE_I 0x81 // Receiver : Interface
-#define USB_DEV_GET_STATUS_REQ_TYPE_E 0x82 // Receiver : Endpoint
+#define USB_DEV_GET_STATUS 0x00
+#define USB_DEV_GET_STATUS_REQ_TYPE_D 0x80 // Receiver : Device
+#define USB_DEV_GET_STATUS_REQ_TYPE_I 0x81 // Receiver : Interface
+#define USB_DEV_GET_STATUS_REQ_TYPE_E 0x82 // Receiver : Endpoint
-#define USB_DEV_CLEAR_FEATURE 0x01
-#define USB_DEV_CLEAR_FEATURE_REQ_TYPE_D 0x00 // Receiver : Device
-#define USB_DEV_CLEAR_FEATURE_REQ_TYPE_I 0x01 // Receiver : Interface
-#define USB_DEV_CLEAR_FEATURE_REQ_TYPE_E 0x02 // Receiver : Endpoint
+#define USB_DEV_CLEAR_FEATURE 0x01
+#define USB_DEV_CLEAR_FEATURE_REQ_TYPE_D 0x00 // Receiver : Device
+#define USB_DEV_CLEAR_FEATURE_REQ_TYPE_I 0x01 // Receiver : Interface
+#define USB_DEV_CLEAR_FEATURE_REQ_TYPE_E 0x02 // Receiver : Endpoint
-#define USB_DEV_SET_FEATURE 0x03
-#define USB_DEV_SET_FEATURE_REQ_TYPE_D 0x00 // Receiver : Device
-#define USB_DEV_SET_FEATURE_REQ_TYPE_I 0x01 // Receiver : Interface
-#define USB_DEV_SET_FEATURE_REQ_TYPE_E 0x02 // Receiver : Endpoint
+#define USB_DEV_SET_FEATURE 0x03
+#define USB_DEV_SET_FEATURE_REQ_TYPE_D 0x00 // Receiver : Device
+#define USB_DEV_SET_FEATURE_REQ_TYPE_I 0x01 // Receiver : Interface
+#define USB_DEV_SET_FEATURE_REQ_TYPE_E 0x02 // Receiver : Endpoint
-#define USB_DEV_SET_ADDRESS 0x05
-#define USB_DEV_SET_ADDRESS_REQ_TYPE 0x00
+#define USB_DEV_SET_ADDRESS 0x05
+#define USB_DEV_SET_ADDRESS_REQ_TYPE 0x00
-#define USB_DEV_GET_DESCRIPTOR 0x06
-#define USB_DEV_GET_DESCRIPTOR_REQ_TYPE 0x80
+#define USB_DEV_GET_DESCRIPTOR 0x06
+#define USB_DEV_GET_DESCRIPTOR_REQ_TYPE 0x80
-#define USB_DEV_SET_DESCRIPTOR 0x07
-#define USB_DEV_SET_DESCRIPTOR_REQ_TYPE 0x00
+#define USB_DEV_SET_DESCRIPTOR 0x07
+#define USB_DEV_SET_DESCRIPTOR_REQ_TYPE 0x00
#define USB_DEV_GET_CONFIGURATION 0x08
#define USB_DEV_GET_CONFIGURATION_REQ_TYPE 0x80
@@ -77,15 +71,14 @@
#define USB_DEV_SET_CONFIGURATION 0x09
#define USB_DEV_SET_CONFIGURATION_REQ_TYPE 0x00
-#define USB_DEV_GET_INTERFACE 0x0A
-#define USB_DEV_GET_INTERFACE_REQ_TYPE 0x81
+#define USB_DEV_GET_INTERFACE 0x0A
+#define USB_DEV_GET_INTERFACE_REQ_TYPE 0x81
-#define USB_DEV_SET_INTERFACE 0x0B
-#define USB_DEV_SET_INTERFACE_REQ_TYPE 0x01
+#define USB_DEV_SET_INTERFACE 0x0B
+#define USB_DEV_SET_INTERFACE_REQ_TYPE 0x01
-#define USB_DEV_SYNCH_FRAME 0x0C
-#define USB_DEV_SYNCH_FRAME_REQ_TYPE 0x82
-
+#define USB_DEV_SYNCH_FRAME 0x0C
+#define USB_DEV_SYNCH_FRAME_REQ_TYPE 0x82
//
// USB standard descriptors and reqeust
@@ -97,11 +90,11 @@
/// USB 2.0 spec, Section 9.3
///
typedef struct {
- UINT8 RequestType;
- UINT8 Request;
- UINT16 Value;
- UINT16 Index;
- UINT16 Length;
+ UINT8 RequestType;
+ UINT8 Request;
+ UINT16 Value;
+ UINT16 Index;
+ UINT16 Length;
} USB_DEVICE_REQUEST;
///
@@ -109,20 +102,20 @@
/// USB 2.0 spec, Section 9.6.1
///
typedef struct {
- UINT8 Length;
- UINT8 DescriptorType;
- UINT16 BcdUSB;
- UINT8 DeviceClass;
- UINT8 DeviceSubClass;
- UINT8 DeviceProtocol;
- UINT8 MaxPacketSize0;
- UINT16 IdVendor;
- UINT16 IdProduct;
- UINT16 BcdDevice;
- UINT8 StrManufacturer;
- UINT8 StrProduct;
- UINT8 StrSerialNumber;
- UINT8 NumConfigurations;
+ UINT8 Length;
+ UINT8 DescriptorType;
+ UINT16 BcdUSB;
+ UINT8 DeviceClass;
+ UINT8 DeviceSubClass;
+ UINT8 DeviceProtocol;
+ UINT8 MaxPacketSize0;
+ UINT16 IdVendor;
+ UINT16 IdProduct;
+ UINT16 BcdDevice;
+ UINT8 StrManufacturer;
+ UINT8 StrProduct;
+ UINT8 StrSerialNumber;
+ UINT8 NumConfigurations;
} USB_DEVICE_DESCRIPTOR;
///
@@ -130,14 +123,14 @@
/// USB 2.0 spec, Section 9.6.3
///
typedef struct {
- UINT8 Length;
- UINT8 DescriptorType;
- UINT16 TotalLength;
- UINT8 NumInterfaces;
- UINT8 ConfigurationValue;
- UINT8 Configuration;
- UINT8 Attributes;
- UINT8 MaxPower;
+ UINT8 Length;
+ UINT8 DescriptorType;
+ UINT16 TotalLength;
+ UINT8 NumInterfaces;
+ UINT8 ConfigurationValue;
+ UINT8 Configuration;
+ UINT8 Attributes;
+ UINT8 MaxPower;
} USB_CONFIG_DESCRIPTOR;
///
@@ -145,15 +138,15 @@
/// USB 2.0 spec, Section 9.6.5
///
typedef struct {
- UINT8 Length;
- UINT8 DescriptorType;
- UINT8 InterfaceNumber;
- UINT8 AlternateSetting;
- UINT8 NumEndpoints;
- UINT8 InterfaceClass;
- UINT8 InterfaceSubClass;
- UINT8 InterfaceProtocol;
- UINT8 Interface;
+ UINT8 Length;
+ UINT8 DescriptorType;
+ UINT8 InterfaceNumber;
+ UINT8 AlternateSetting;
+ UINT8 NumEndpoints;
+ UINT8 InterfaceClass;
+ UINT8 InterfaceSubClass;
+ UINT8 InterfaceProtocol;
+ UINT8 Interface;
} USB_INTERFACE_DESCRIPTOR;
///
@@ -161,12 +154,12 @@
/// USB 2.0 spec, Section 9.6.6
///
typedef struct {
- UINT8 Length;
- UINT8 DescriptorType;
- UINT8 EndpointAddress;
- UINT8 Attributes;
- UINT16 MaxPacketSize;
- UINT8 Interval;
+ UINT8 Length;
+ UINT8 DescriptorType;
+ UINT8 EndpointAddress;
+ UINT8 Attributes;
+ UINT16 MaxPacketSize;
+ UINT8 Interval;
} USB_ENDPOINT_DESCRIPTOR;
///
@@ -174,45 +167,44 @@
/// USB 2.0 spec, Section 9.6.7
///
typedef struct {
- UINT8 Length;
- UINT8 DescriptorType;
- CHAR16 String[1];
+ UINT8 Length;
+ UINT8 DescriptorType;
+ CHAR16 String[1];
} EFI_USB_STRING_DESCRIPTOR;
#pragma pack()
-
typedef enum {
//
// USB request type
//
- USB_REQ_TYPE_STANDARD = (0x00 << 5),
- USB_REQ_TYPE_CLASS = (0x01 << 5),
- USB_REQ_TYPE_VENDOR = (0x02 << 5),
+ USB_REQ_TYPE_STANDARD = (0x00 << 5),
+ USB_REQ_TYPE_CLASS = (0x01 << 5),
+ USB_REQ_TYPE_VENDOR = (0x02 << 5),
//
// Standard control transfer request type, or the value
// to fill in EFI_USB_DEVICE_REQUEST.Request
//
- USB_REQ_GET_STATUS = 0x00,
- USB_REQ_CLEAR_FEATURE = 0x01,
- USB_REQ_SET_FEATURE = 0x03,
- USB_REQ_SET_ADDRESS = 0x05,
- USB_REQ_GET_DESCRIPTOR = 0x06,
- USB_REQ_SET_DESCRIPTOR = 0x07,
- USB_REQ_GET_CONFIG = 0x08,
- USB_REQ_SET_CONFIG = 0x09,
- USB_REQ_GET_INTERFACE = 0x0A,
- USB_REQ_SET_INTERFACE = 0x0B,
- USB_REQ_SYNCH_FRAME = 0x0C,
+ USB_REQ_GET_STATUS = 0x00,
+ USB_REQ_CLEAR_FEATURE = 0x01,
+ USB_REQ_SET_FEATURE = 0x03,
+ USB_REQ_SET_ADDRESS = 0x05,
+ USB_REQ_GET_DESCRIPTOR = 0x06,
+ USB_REQ_SET_DESCRIPTOR = 0x07,
+ USB_REQ_GET_CONFIG = 0x08,
+ USB_REQ_SET_CONFIG = 0x09,
+ USB_REQ_GET_INTERFACE = 0x0A,
+ USB_REQ_SET_INTERFACE = 0x0B,
+ USB_REQ_SYNCH_FRAME = 0x0C,
//
// Usb control transfer target
//
- USB_TARGET_DEVICE = 0,
- USB_TARGET_INTERFACE = 0x01,
- USB_TARGET_ENDPOINT = 0x02,
- USB_TARGET_OTHER = 0x03,
+ USB_TARGET_DEVICE = 0,
+ USB_TARGET_INTERFACE = 0x01,
+ USB_TARGET_ENDPOINT = 0x02,
+ USB_TARGET_OTHER = 0x03,
//
// USB Descriptor types
@@ -233,21 +225,20 @@
//
// USB endpoint types: 00: control, 01: isochronous, 10: bulk, 11: interrupt
//
- USB_ENDPOINT_CONTROL = 0x00,
- USB_ENDPOINT_ISO = 0x01,
- USB_ENDPOINT_BULK = 0x02,
- USB_ENDPOINT_INTERRUPT = 0x03,
+ USB_ENDPOINT_CONTROL = 0x00,
+ USB_ENDPOINT_ISO = 0x01,
+ USB_ENDPOINT_BULK = 0x02,
+ USB_ENDPOINT_INTERRUPT = 0x03,
- USB_ENDPOINT_TYPE_MASK = 0x03,
- USB_ENDPOINT_DIR_IN = 0x80,
+ USB_ENDPOINT_TYPE_MASK = 0x03,
+ USB_ENDPOINT_DIR_IN = 0x80,
//
- //Use 200 ms to increase the error handling response time
+ // Use 200 ms to increase the error handling response time
//
EFI_USB_INTERRUPT_DELAY = 2000000
} USB_TYPES_DEFINITION;
-
//
// HID constants definition, see Device Class Definition
// for Human Interface Devices (HID) rev1.11
@@ -261,19 +252,19 @@
//
// HID specific requests.
//
-#define USB_HID_CLASS_GET_REQ_TYPE 0xa1
-#define USB_HID_CLASS_SET_REQ_TYPE 0x21
+#define USB_HID_CLASS_GET_REQ_TYPE 0xa1
+#define USB_HID_CLASS_SET_REQ_TYPE 0x21
//
// HID report item format
//
-#define HID_ITEM_FORMAT_SHORT 0
-#define HID_ITEM_FORMAT_LONG 1
+#define HID_ITEM_FORMAT_SHORT 0
+#define HID_ITEM_FORMAT_LONG 1
//
// Special tag indicating long items
//
-#define HID_ITEM_TAG_LONG 15
+#define HID_ITEM_TAG_LONG 15
//
// HID report descriptor item type (prefix bit 2,3)
@@ -295,15 +286,15 @@
//
// HID report descriptor main item contents
//
-#define HID_MAIN_ITEM_CONSTANT 0x001
-#define HID_MAIN_ITEM_VARIABLE 0x002
-#define HID_MAIN_ITEM_RELATIVE 0x004
-#define HID_MAIN_ITEM_WRAP 0x008
-#define HID_MAIN_ITEM_NONLINEAR 0x010
-#define HID_MAIN_ITEM_NO_PREFERRED 0x020
-#define HID_MAIN_ITEM_NULL_STATE 0x040
-#define HID_MAIN_ITEM_VOLATILE 0x080
-#define HID_MAIN_ITEM_BUFFERED_BYTE 0x100
+#define HID_MAIN_ITEM_CONSTANT 0x001
+#define HID_MAIN_ITEM_VARIABLE 0x002
+#define HID_MAIN_ITEM_RELATIVE 0x004
+#define HID_MAIN_ITEM_WRAP 0x008
+#define HID_MAIN_ITEM_NONLINEAR 0x010
+#define HID_MAIN_ITEM_NO_PREFERRED 0x020
+#define HID_MAIN_ITEM_NULL_STATE 0x040
+#define HID_MAIN_ITEM_VOLATILE 0x080
+#define HID_MAIN_ITEM_BUFFERED_BYTE 0x100
//
// HID report descriptor collection item types
@@ -331,16 +322,16 @@
//
// HID report descriptor local item tags
//
-#define HID_LOCAL_ITEM_TAG_USAGE 0
-#define HID_LOCAL_ITEM_TAG_USAGE_MINIMUM 1
-#define HID_LOCAL_ITEM_TAG_USAGE_MAXIMUM 2
-#define HID_LOCAL_ITEM_TAG_DESIGNATOR_INDEX 3
-#define HID_LOCAL_ITEM_TAG_DESIGNATOR_MINIMUM 4
-#define HID_LOCAL_ITEM_TAG_DESIGNATOR_MAXIMUM 5
-#define HID_LOCAL_ITEM_TAG_STRING_INDEX 7
-#define HID_LOCAL_ITEM_TAG_STRING_MINIMUM 8
-#define HID_LOCAL_ITEM_TAG_STRING_MAXIMUM 9
-#define HID_LOCAL_ITEM_TAG_DELIMITER 10
+#define HID_LOCAL_ITEM_TAG_USAGE 0
+#define HID_LOCAL_ITEM_TAG_USAGE_MINIMUM 1
+#define HID_LOCAL_ITEM_TAG_USAGE_MAXIMUM 2
+#define HID_LOCAL_ITEM_TAG_DESIGNATOR_INDEX 3
+#define HID_LOCAL_ITEM_TAG_DESIGNATOR_MINIMUM 4
+#define HID_LOCAL_ITEM_TAG_DESIGNATOR_MAXIMUM 5
+#define HID_LOCAL_ITEM_TAG_STRING_INDEX 7
+#define HID_LOCAL_ITEM_TAG_STRING_MINIMUM 8
+#define HID_LOCAL_ITEM_TAG_STRING_MAXIMUM 9
+#define HID_LOCAL_ITEM_TAG_DELIMITER 10
//
// HID report types
@@ -365,8 +356,8 @@
/// HID 1.1, section 6.2.1
///
typedef struct hid_class_descriptor {
- UINT8 DescriptorType;
- UINT16 DescriptorLength;
+ UINT8 DescriptorType;
+ UINT16 DescriptorLength;
} EFI_USB_HID_CLASS_DESCRIPTOR;
///
@@ -375,12 +366,12 @@
/// HID 1.1, section 6.2.1
///
typedef struct hid_descriptor {
- UINT8 Length;
- UINT8 DescriptorType;
- UINT16 BcdHID;
- UINT8 CountryCode;
- UINT8 NumDescriptors;
- EFI_USB_HID_CLASS_DESCRIPTOR HidClassDesc[1];
+ UINT8 Length;
+ UINT8 DescriptorType;
+ UINT16 BcdHID;
+ UINT8 CountryCode;
+ UINT8 NumDescriptors;
+ EFI_USB_HID_CLASS_DESCRIPTOR HidClassDesc[1];
} EFI_USB_HID_DESCRIPTOR;
#pragma pack()
diff --git a/src/include/ipxe/efi/Library/BaseLib.h b/src/include/ipxe/efi/Library/BaseLib.h
index a03ef30..416ca00 100644
--- a/src/include/ipxe/efi/Library/BaseLib.h
+++ b/src/include/ipxe/efi/Library/BaseLib.h
@@ -2,22 +2,20 @@
Provides string functions, linked list functions, math functions, synchronization
functions, file path functions, and CPU architecture-specific functions.
-Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
+Copyright (c) Microsoft Corporation.<BR>
+Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __BASE_LIB__
#define __BASE_LIB__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
//
// Definitions for architecture-specific types
@@ -27,88 +25,40 @@
/// The IA-32 architecture context buffer used by SetJump() and LongJump().
///
typedef struct {
- UINT32 Ebx;
- UINT32 Esi;
- UINT32 Edi;
- UINT32 Ebp;
- UINT32 Esp;
- UINT32 Eip;
+ UINT32 Ebx;
+ UINT32 Esi;
+ UINT32 Edi;
+ UINT32 Ebp;
+ UINT32 Esp;
+ UINT32 Eip;
+ UINT32 Ssp;
} BASE_LIBRARY_JUMP_BUFFER;
-#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4
+#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4
#endif // defined (MDE_CPU_IA32)
-#if defined (MDE_CPU_IPF)
-
-///
-/// The Itanium architecture context buffer used by SetJump() and LongJump().
-///
-typedef struct {
- UINT64 F2[2];
- UINT64 F3[2];
- UINT64 F4[2];
- UINT64 F5[2];
- UINT64 F16[2];
- UINT64 F17[2];
- UINT64 F18[2];
- UINT64 F19[2];
- UINT64 F20[2];
- UINT64 F21[2];
- UINT64 F22[2];
- UINT64 F23[2];
- UINT64 F24[2];
- UINT64 F25[2];
- UINT64 F26[2];
- UINT64 F27[2];
- UINT64 F28[2];
- UINT64 F29[2];
- UINT64 F30[2];
- UINT64 F31[2];
- UINT64 R4;
- UINT64 R5;
- UINT64 R6;
- UINT64 R7;
- UINT64 SP;
- UINT64 BR0;
- UINT64 BR1;
- UINT64 BR2;
- UINT64 BR3;
- UINT64 BR4;
- UINT64 BR5;
- UINT64 InitialUNAT;
- UINT64 AfterSpillUNAT;
- UINT64 PFS;
- UINT64 BSP;
- UINT64 Predicates;
- UINT64 LoopCount;
- UINT64 FPSR;
-} BASE_LIBRARY_JUMP_BUFFER;
-
-#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10
-
-#endif // defined (MDE_CPU_IPF)
-
#if defined (MDE_CPU_X64)
///
/// The x64 architecture context buffer used by SetJump() and LongJump().
///
typedef struct {
- UINT64 Rbx;
- UINT64 Rsp;
- UINT64 Rbp;
- UINT64 Rdi;
- UINT64 Rsi;
- UINT64 R12;
- UINT64 R13;
- UINT64 R14;
- UINT64 R15;
- UINT64 Rip;
- UINT64 MxCsr;
- UINT8 XmmBuffer[160]; ///< XMM6-XMM15.
+ UINT64 Rbx;
+ UINT64 Rsp;
+ UINT64 Rbp;
+ UINT64 Rdi;
+ UINT64 Rsi;
+ UINT64 R12;
+ UINT64 R13;
+ UINT64 R14;
+ UINT64 R15;
+ UINT64 Rip;
+ UINT64 MxCsr;
+ UINT8 XmmBuffer[160]; ///< XMM6-XMM15.
+ UINT64 Ssp;
} BASE_LIBRARY_JUMP_BUFFER;
-#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
+#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
#endif // defined (MDE_CPU_X64)
@@ -117,14 +67,14 @@
/// The EBC context buffer used by SetJump() and LongJump().
///
typedef struct {
- UINT64 R0;
- UINT64 R1;
- UINT64 R2;
- UINT64 R3;
- UINT64 IP;
+ UINT64 R0;
+ UINT64 R1;
+ UINT64 R2;
+ UINT64 R3;
+ UINT64 IP;
} BASE_LIBRARY_JUMP_BUFFER;
-#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
+#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
#endif // defined (MDE_CPU_EBC)
@@ -144,9 +94,9 @@
UINT32 R14;
} BASE_LIBRARY_JUMP_BUFFER;
-#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4
+#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4
-#endif // defined (MDE_CPU_ARM)
+#endif // defined (MDE_CPU_ARM)
#if defined (MDE_CPU_AARCH64)
typedef struct {
@@ -176,16 +126,62 @@
UINT64 D15;
} BASE_LIBRARY_JUMP_BUFFER;
-#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
+#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
-#endif // defined (MDE_CPU_AARCH64)
+#endif // defined (MDE_CPU_AARCH64)
+#if defined (MDE_CPU_RISCV64)
+///
+/// The RISC-V architecture context buffer used by SetJump() and LongJump().
+///
+typedef struct {
+ UINT64 RA;
+ UINT64 S0;
+ UINT64 S1;
+ UINT64 S2;
+ UINT64 S3;
+ UINT64 S4;
+ UINT64 S5;
+ UINT64 S6;
+ UINT64 S7;
+ UINT64 S8;
+ UINT64 S9;
+ UINT64 S10;
+ UINT64 S11;
+ UINT64 SP;
+} BASE_LIBRARY_JUMP_BUFFER;
+
+#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
+
+#endif // defined (MDE_CPU_RISCV64)
+
+#if defined (MDE_CPU_LOONGARCH64)
+///
+/// The LoongArch architecture context buffer used by SetJump() and LongJump()
+///
+typedef struct {
+ UINT64 S0;
+ UINT64 S1;
+ UINT64 S2;
+ UINT64 S3;
+ UINT64 S4;
+ UINT64 S5;
+ UINT64 S6;
+ UINT64 S7;
+ UINT64 S8;
+ UINT64 SP;
+ UINT64 FP;
+ UINT64 RA;
+} BASE_LIBRARY_JUMP_BUFFER;
+
+#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
+
+#endif // defined (MDE_CPU_LOONGARCH64)
//
// String Services
//
-
/**
Returns the length of a Null-terminated Unicode string.
@@ -205,8 +201,8 @@
UINTN
EFIAPI
StrnLenS (
- IN CONST CHAR16 *String,
- IN UINTN MaxSize
+ IN CONST CHAR16 *String,
+ IN UINTN MaxSize
);
/**
@@ -233,8 +229,8 @@
UINTN
EFIAPI
StrnSizeS (
- IN CONST CHAR16 *String,
- IN UINTN MaxSize
+ IN CONST CHAR16 *String,
+ IN UINTN MaxSize
);
/**
@@ -245,7 +241,6 @@
If Destination is not aligned on a 16-bit boundary, then ASSERT().
If Source is not aligned on a 16-bit boundary, then ASSERT().
- If an error would be returned, then the function will also ASSERT().
If an error is returned, then the Destination is unmodified.
@@ -267,9 +262,9 @@
RETURN_STATUS
EFIAPI
StrCpyS (
- OUT CHAR16 *Destination,
- IN UINTN DestMax,
- IN CONST CHAR16 *Source
+ OUT CHAR16 *Destination,
+ IN UINTN DestMax,
+ IN CONST CHAR16 *Source
);
/**
@@ -281,7 +276,6 @@
If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
- If an error would be returned, then the function will also ASSERT().
If an error is returned, then the Destination is unmodified.
@@ -305,10 +299,10 @@
RETURN_STATUS
EFIAPI
StrnCpyS (
- OUT CHAR16 *Destination,
- IN UINTN DestMax,
- IN CONST CHAR16 *Source,
- IN UINTN Length
+ OUT CHAR16 *Destination,
+ IN UINTN DestMax,
+ IN CONST CHAR16 *Source,
+ IN UINTN Length
);
/**
@@ -319,7 +313,6 @@
If Destination is not aligned on a 16-bit boundary, then ASSERT().
If Source is not aligned on a 16-bit boundary, then ASSERT().
- If an error would be returned, then the function will also ASSERT().
If an error is returned, then the Destination is unmodified.
@@ -344,9 +337,9 @@
RETURN_STATUS
EFIAPI
StrCatS (
- IN OUT CHAR16 *Destination,
- IN UINTN DestMax,
- IN CONST CHAR16 *Source
+ IN OUT CHAR16 *Destination,
+ IN UINTN DestMax,
+ IN CONST CHAR16 *Source
);
/**
@@ -359,7 +352,6 @@
If Destination is not aligned on a 16-bit boundary, then ASSERT().
If Source is not aligned on a 16-bit boundary, then ASSERT().
- If an error would be returned, then the function will also ASSERT().
If an error is returned, then the Destination is unmodified.
@@ -385,10 +377,10 @@
RETURN_STATUS
EFIAPI
StrnCatS (
- IN OUT CHAR16 *Destination,
- IN UINTN DestMax,
- IN CONST CHAR16 *Source,
- IN UINTN Length
+ IN OUT CHAR16 *Destination,
+ IN UINTN DestMax,
+ IN CONST CHAR16 *Source,
+ IN UINTN Length
);
/**
@@ -406,12 +398,7 @@
be ignored. Then, the function stops at the first character that is a not a
valid decimal character or a Null-terminator, whichever one comes first.
- If String is NULL, then ASSERT().
- If Data is NULL, then ASSERT().
If String is not aligned in a 16-bit boundary, then ASSERT().
- If PcdMaximumUnicodeStringLength is not zero, and String contains more than
- PcdMaximumUnicodeStringLength Unicode characters, not including the
- Null-terminator, then ASSERT().
If String has no valid decimal digits in the above format, then 0 is stored
at the location pointed to by Data.
@@ -442,9 +429,9 @@
RETURN_STATUS
EFIAPI
StrDecimalToUintnS (
- IN CONST CHAR16 *String,
- OUT CHAR16 **EndPointer, OPTIONAL
- OUT UINTN *Data
+ IN CONST CHAR16 *String,
+ OUT CHAR16 **EndPointer OPTIONAL,
+ OUT UINTN *Data
);
/**
@@ -462,12 +449,7 @@
be ignored. Then, the function stops at the first character that is a not a
valid decimal character or a Null-terminator, whichever one comes first.
- If String is NULL, then ASSERT().
- If Data is NULL, then ASSERT().
If String is not aligned in a 16-bit boundary, then ASSERT().
- If PcdMaximumUnicodeStringLength is not zero, and String contains more than
- PcdMaximumUnicodeStringLength Unicode characters, not including the
- Null-terminator, then ASSERT().
If String has no valid decimal digits in the above format, then 0 is stored
at the location pointed to by Data.
@@ -498,9 +480,9 @@
RETURN_STATUS
EFIAPI
StrDecimalToUint64S (
- IN CONST CHAR16 *String,
- OUT CHAR16 **EndPointer, OPTIONAL
- OUT UINT64 *Data
+ IN CONST CHAR16 *String,
+ OUT CHAR16 **EndPointer OPTIONAL,
+ OUT UINT64 *Data
);
/**
@@ -523,12 +505,7 @@
the first character that is a not a valid hexadecimal character or NULL,
whichever one comes first.
- If String is NULL, then ASSERT().
- If Data is NULL, then ASSERT().
If String is not aligned in a 16-bit boundary, then ASSERT().
- If PcdMaximumUnicodeStringLength is not zero, and String contains more than
- PcdMaximumUnicodeStringLength Unicode characters, not including the
- Null-terminator, then ASSERT().
If String has no valid hexadecimal digits in the above format, then 0 is
stored at the location pointed to by Data.
@@ -559,9 +536,9 @@
RETURN_STATUS
EFIAPI
StrHexToUintnS (
- IN CONST CHAR16 *String,
- OUT CHAR16 **EndPointer, OPTIONAL
- OUT UINTN *Data
+ IN CONST CHAR16 *String,
+ OUT CHAR16 **EndPointer OPTIONAL,
+ OUT UINTN *Data
);
/**
@@ -584,12 +561,7 @@
the first character that is a not a valid hexadecimal character or NULL,
whichever one comes first.
- If String is NULL, then ASSERT().
- If Data is NULL, then ASSERT().
If String is not aligned in a 16-bit boundary, then ASSERT().
- If PcdMaximumUnicodeStringLength is not zero, and String contains more than
- PcdMaximumUnicodeStringLength Unicode characters, not including the
- Null-terminator, then ASSERT().
If String has no valid hexadecimal digits in the above format, then 0 is
stored at the location pointed to by Data.
@@ -620,9 +592,9 @@
RETURN_STATUS
EFIAPI
StrHexToUint64S (
- IN CONST CHAR16 *String,
- OUT CHAR16 **EndPointer, OPTIONAL
- OUT UINT64 *Data
+ IN CONST CHAR16 *String,
+ OUT CHAR16 **EndPointer OPTIONAL,
+ OUT UINT64 *Data
);
/**
@@ -642,8 +614,8 @@
UINTN
EFIAPI
AsciiStrnLenS (
- IN CONST CHAR8 *String,
- IN UINTN MaxSize
+ IN CONST CHAR8 *String,
+ IN UINTN MaxSize
);
/**
@@ -668,8 +640,8 @@
UINTN
EFIAPI
AsciiStrnSizeS (
- IN CONST CHAR8 *String,
- IN UINTN MaxSize
+ IN CONST CHAR8 *String,
+ IN UINTN MaxSize
);
/**
@@ -678,8 +650,6 @@
This function is similar as strcpy_s defined in C11.
- If an error would be returned, then the function will also ASSERT().
-
If an error is returned, then the Destination is unmodified.
@param Destination A pointer to a Null-terminated Ascii string.
@@ -712,8 +682,6 @@
This function is similar as strncpy_s defined in C11.
- If an error would be returned, then the function will also ASSERT().
-
If an error is returned, then the Destination is unmodified.
@param Destination A pointer to a Null-terminated Ascii string.
@@ -748,8 +716,6 @@
This function is similar as strcat_s defined in C11.
- If an error would be returned, then the function will also ASSERT().
-
If an error is returned, then the Destination is unmodified.
@param Destination A pointer to a Null-terminated Ascii string.
@@ -786,8 +752,6 @@
This function is similar as strncat_s defined in C11.
- If an error would be returned, then the function will also ASSERT().
-
If an error is returned, then the Destination is unmodified.
@param Destination A pointer to a Null-terminated Ascii string.
@@ -833,12 +797,6 @@
be ignored. Then, the function stops at the first character that is a not a
valid decimal character or a Null-terminator, whichever one comes first.
- If String is NULL, then ASSERT().
- If Data is NULL, then ASSERT().
- If PcdMaximumAsciiStringLength is not zero, and String contains more than
- PcdMaximumAsciiStringLength Ascii characters, not including the
- Null-terminator, then ASSERT().
-
If String has no valid decimal digits in the above format, then 0 is stored
at the location pointed to by Data.
If the number represented by String exceeds the range defined by UINTN, then
@@ -868,9 +826,9 @@
RETURN_STATUS
EFIAPI
AsciiStrDecimalToUintnS (
- IN CONST CHAR8 *String,
- OUT CHAR8 **EndPointer, OPTIONAL
- OUT UINTN *Data
+ IN CONST CHAR8 *String,
+ OUT CHAR8 **EndPointer OPTIONAL,
+ OUT UINTN *Data
);
/**
@@ -888,12 +846,6 @@
be ignored. Then, the function stops at the first character that is a not a
valid decimal character or a Null-terminator, whichever one comes first.
- If String is NULL, then ASSERT().
- If Data is NULL, then ASSERT().
- If PcdMaximumAsciiStringLength is not zero, and String contains more than
- PcdMaximumAsciiStringLength Ascii characters, not including the
- Null-terminator, then ASSERT().
-
If String has no valid decimal digits in the above format, then 0 is stored
at the location pointed to by Data.
If the number represented by String exceeds the range defined by UINT64, then
@@ -923,9 +875,9 @@
RETURN_STATUS
EFIAPI
AsciiStrDecimalToUint64S (
- IN CONST CHAR8 *String,
- OUT CHAR8 **EndPointer, OPTIONAL
- OUT UINT64 *Data
+ IN CONST CHAR8 *String,
+ OUT CHAR8 **EndPointer OPTIONAL,
+ OUT UINT64 *Data
);
/**
@@ -947,12 +899,6 @@
character that is a not a valid hexadecimal character or Null-terminator,
whichever on comes first.
- If String is NULL, then ASSERT().
- If Data is NULL, then ASSERT().
- If PcdMaximumAsciiStringLength is not zero, and String contains more than
- PcdMaximumAsciiStringLength Ascii characters, not including the
- Null-terminator, then ASSERT().
-
If String has no valid hexadecimal digits in the above format, then 0 is
stored at the location pointed to by Data.
If the number represented by String exceeds the range defined by UINTN, then
@@ -982,9 +928,9 @@
RETURN_STATUS
EFIAPI
AsciiStrHexToUintnS (
- IN CONST CHAR8 *String,
- OUT CHAR8 **EndPointer, OPTIONAL
- OUT UINTN *Data
+ IN CONST CHAR8 *String,
+ OUT CHAR8 **EndPointer OPTIONAL,
+ OUT UINTN *Data
);
/**
@@ -1006,12 +952,6 @@
character that is a not a valid hexadecimal character or Null-terminator,
whichever on comes first.
- If String is NULL, then ASSERT().
- If Data is NULL, then ASSERT().
- If PcdMaximumAsciiStringLength is not zero, and String contains more than
- PcdMaximumAsciiStringLength Ascii characters, not including the
- Null-terminator, then ASSERT().
-
If String has no valid hexadecimal digits in the above format, then 0 is
stored at the location pointed to by Data.
If the number represented by String exceeds the range defined by UINT64, then
@@ -1041,88 +981,11 @@
RETURN_STATUS
EFIAPI
AsciiStrHexToUint64S (
- IN CONST CHAR8 *String,
- OUT CHAR8 **EndPointer, OPTIONAL
- OUT UINT64 *Data
+ IN CONST CHAR8 *String,
+ OUT CHAR8 **EndPointer OPTIONAL,
+ OUT UINT64 *Data
);
-
-#ifndef DISABLE_NEW_DEPRECATED_INTERFACES
-
-/**
- [ATTENTION] This function is deprecated for security reason.
-
- Copies one Null-terminated Unicode string to another Null-terminated Unicode
- string and returns the new Unicode string.
-
- This function copies the contents of the Unicode string Source to the Unicode
- string Destination, and returns Destination. If Source and Destination
- overlap, then the results are undefined.
-
- If Destination is NULL, then ASSERT().
- If Destination is not aligned on a 16-bit boundary, then ASSERT().
- If Source is NULL, then ASSERT().
- If Source is not aligned on a 16-bit boundary, then ASSERT().
- If Source and Destination overlap, then ASSERT().
- If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
- PcdMaximumUnicodeStringLength Unicode characters not including the
- Null-terminator, then ASSERT().
-
- @param Destination The pointer to a Null-terminated Unicode string.
- @param Source The pointer to a Null-terminated Unicode string.
-
- @return Destination.
-
-**/
-CHAR16 *
-EFIAPI
-StrCpy (
- OUT CHAR16 *Destination,
- IN CONST CHAR16 *Source
- );
-
-
-/**
- [ATTENTION] This function is deprecated for security reason.
-
- Copies up to a specified length from one Null-terminated Unicode string to
- another Null-terminated Unicode string and returns the new Unicode string.
-
- This function copies the contents of the Unicode string Source to the Unicode
- string Destination, and returns Destination. At most, Length Unicode
- characters are copied from Source to Destination. If Length is 0, then
- Destination is returned unmodified. If Length is greater that the number of
- Unicode characters in Source, then Destination is padded with Null Unicode
- characters. If Source and Destination overlap, then the results are
- undefined.
-
- If Length > 0 and Destination is NULL, then ASSERT().
- If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
- If Length > 0 and Source is NULL, then ASSERT().
- If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
- If Source and Destination overlap, then ASSERT().
- If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
- PcdMaximumUnicodeStringLength, then ASSERT().
- If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
- PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
- then ASSERT().
-
- @param Destination The pointer to a Null-terminated Unicode string.
- @param Source The pointer to a Null-terminated Unicode string.
- @param Length The maximum number of Unicode characters to copy.
-
- @return Destination.
-
-**/
-CHAR16 *
-EFIAPI
-StrnCpy (
- OUT CHAR16 *Destination,
- IN CONST CHAR16 *Source,
- IN UINTN Length
- );
-#endif
-
/**
Returns the length of a Null-terminated Unicode string.
@@ -1143,10 +1006,9 @@
UINTN
EFIAPI
StrLen (
- IN CONST CHAR16 *String
+ IN CONST CHAR16 *String
);
-
/**
Returns the size of a Null-terminated Unicode string in bytes, including the
Null terminator.
@@ -1168,10 +1030,9 @@
UINTN
EFIAPI
StrSize (
- IN CONST CHAR16 *String
+ IN CONST CHAR16 *String
);
-
/**
Compares two Null-terminated Unicode strings, and returns the difference
between the first mismatched Unicode characters.
@@ -1203,11 +1064,10 @@
INTN
EFIAPI
StrCmp (
- IN CONST CHAR16 *FirstString,
- IN CONST CHAR16 *SecondString
+ IN CONST CHAR16 *FirstString,
+ IN CONST CHAR16 *SecondString
);
-
/**
Compares up to a specified length the contents of two Null-terminated Unicode strings,
and returns the difference between the first mismatched Unicode characters.
@@ -1243,105 +1103,11 @@
INTN
EFIAPI
StrnCmp (
- IN CONST CHAR16 *FirstString,
- IN CONST CHAR16 *SecondString,
- IN UINTN Length
+ IN CONST CHAR16 *FirstString,
+ IN CONST CHAR16 *SecondString,
+ IN UINTN Length
);
-
-#ifndef DISABLE_NEW_DEPRECATED_INTERFACES
-
-/**
- [ATTENTION] This function is deprecated for security reason.
-
- Concatenates one Null-terminated Unicode string to another Null-terminated
- Unicode string, and returns the concatenated Unicode string.
-
- This function concatenates two Null-terminated Unicode strings. The contents
- of Null-terminated Unicode string Source are concatenated to the end of
- Null-terminated Unicode string Destination. The Null-terminated concatenated
- Unicode String is returned. If Source and Destination overlap, then the
- results are undefined.
-
- If Destination is NULL, then ASSERT().
- If Destination is not aligned on a 16-bit boundary, then ASSERT().
- If Source is NULL, then ASSERT().
- If Source is not aligned on a 16-bit boundary, then ASSERT().
- If Source and Destination overlap, then ASSERT().
- If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
- than PcdMaximumUnicodeStringLength Unicode characters, not including the
- Null-terminator, then ASSERT().
- If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
- PcdMaximumUnicodeStringLength Unicode characters, not including the
- Null-terminator, then ASSERT().
- If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
- and Source results in a Unicode string with more than
- PcdMaximumUnicodeStringLength Unicode characters, not including the
- Null-terminator, then ASSERT().
-
- @param Destination The pointer to a Null-terminated Unicode string.
- @param Source The pointer to a Null-terminated Unicode string.
-
- @return Destination.
-
-**/
-CHAR16 *
-EFIAPI
-StrCat (
- IN OUT CHAR16 *Destination,
- IN CONST CHAR16 *Source
- );
-
-
-/**
- [ATTENTION] This function is deprecated for security reason.
-
- Concatenates up to a specified length one Null-terminated Unicode to the end
- of another Null-terminated Unicode string, and returns the concatenated
- Unicode string.
-
- This function concatenates two Null-terminated Unicode strings. The contents
- of Null-terminated Unicode string Source are concatenated to the end of
- Null-terminated Unicode string Destination, and Destination is returned. At
- most, Length Unicode characters are concatenated from Source to the end of
- Destination, and Destination is always Null-terminated. If Length is 0, then
- Destination is returned unmodified. If Source and Destination overlap, then
- the results are undefined.
-
- If Destination is NULL, then ASSERT().
- If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
- If Length > 0 and Source is NULL, then ASSERT().
- If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
- If Source and Destination overlap, then ASSERT().
- If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
- PcdMaximumUnicodeStringLength, then ASSERT().
- If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
- than PcdMaximumUnicodeStringLength Unicode characters, not including the
- Null-terminator, then ASSERT().
- If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
- PcdMaximumUnicodeStringLength Unicode characters, not including the
- Null-terminator, then ASSERT().
- If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
- and Source results in a Unicode string with more than PcdMaximumUnicodeStringLength
- Unicode characters, not including the Null-terminator, then ASSERT().
-
- @param Destination The pointer to a Null-terminated Unicode string.
- @param Source The pointer to a Null-terminated Unicode string.
- @param Length The maximum number of Unicode characters to concatenate from
- Source.
-
- @return Destination.
-
-**/
-CHAR16 *
-EFIAPI
-StrnCat (
- IN OUT CHAR16 *Destination,
- IN CONST CHAR16 *Source,
- IN UINTN Length
- );
-#endif
-
/**
Returns the first occurrence of a Null-terminated Unicode sub-string
in a Null-terminated Unicode string.
@@ -1370,8 +1136,8 @@
CHAR16 *
EFIAPI
StrStr (
- IN CONST CHAR16 *String,
- IN CONST CHAR16 *SearchString
+ IN CONST CHAR16 *String,
+ IN CONST CHAR16 *SearchString
);
/**
@@ -1411,7 +1177,7 @@
UINTN
EFIAPI
StrDecimalToUintn (
- IN CONST CHAR16 *String
+ IN CONST CHAR16 *String
);
/**
@@ -1451,10 +1217,9 @@
UINT64
EFIAPI
StrDecimalToUint64 (
- IN CONST CHAR16 *String
+ IN CONST CHAR16 *String
);
-
/**
Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.
@@ -1493,10 +1258,9 @@
UINTN
EFIAPI
StrHexToUintn (
- IN CONST CHAR16 *String
+ IN CONST CHAR16 *String
);
-
/**
Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.
@@ -1535,7 +1299,7 @@
UINT64
EFIAPI
StrHexToUint64 (
- IN CONST CHAR16 *String
+ IN CONST CHAR16 *String
);
/**
@@ -1562,16 +1326,8 @@
"::" can be used to compress one or more groups of X when X contains only 0.
The "::" can only appear once in the String.
- If String is NULL, then ASSERT().
-
- If Address is NULL, then ASSERT().
-
If String is not aligned in a 16-bit boundary, then ASSERT().
- If PcdMaximumUnicodeStringLength is not zero, and String contains more than
- PcdMaximumUnicodeStringLength Unicode characters, not including the
- Null-terminator, then ASSERT().
-
If EndPointer is not NULL and Address is translated from String, a pointer
to the character that stopped the scan is stored at the location pointed to
by EndPointer.
@@ -1599,10 +1355,10 @@
RETURN_STATUS
EFIAPI
StrToIpv6Address (
- IN CONST CHAR16 *String,
- OUT CHAR16 **EndPointer, OPTIONAL
- OUT IPv6_ADDRESS *Address,
- OUT UINT8 *PrefixLength OPTIONAL
+ IN CONST CHAR16 *String,
+ OUT CHAR16 **EndPointer OPTIONAL,
+ OUT IPv6_ADDRESS *Address,
+ OUT UINT8 *PrefixLength OPTIONAL
);
/**
@@ -1623,16 +1379,8 @@
When /P is in the String, the function stops at the first character that is not
a valid decimal digit character after P is converted.
- If String is NULL, then ASSERT().
-
- If Address is NULL, then ASSERT().
-
If String is not aligned in a 16-bit boundary, then ASSERT().
- If PcdMaximumUnicodeStringLength is not zero, and String contains more than
- PcdMaximumUnicodeStringLength Unicode characters, not including the
- Null-terminator, then ASSERT().
-
If EndPointer is not NULL and Address is translated from String, a pointer
to the character that stopped the scan is stored at the location pointed to
by EndPointer.
@@ -1657,10 +1405,10 @@
RETURN_STATUS
EFIAPI
StrToIpv4Address (
- IN CONST CHAR16 *String,
- OUT CHAR16 **EndPointer, OPTIONAL
- OUT IPv4_ADDRESS *Address,
- OUT UINT8 *PrefixLength OPTIONAL
+ IN CONST CHAR16 *String,
+ OUT CHAR16 **EndPointer OPTIONAL,
+ OUT IPv4_ADDRESS *Address,
+ OUT UINT8 *PrefixLength OPTIONAL
);
#define GUID_STRING_LENGTH 36
@@ -1696,8 +1444,6 @@
oo Data4[48:55]
pp Data4[56:63]
- If String is NULL, then ASSERT().
- If Guid is NULL, then ASSERT().
If String is not aligned in a 16-bit boundary, then ASSERT().
@param String Pointer to a Null-terminated Unicode string.
@@ -1712,8 +1458,8 @@
RETURN_STATUS
EFIAPI
StrToGuid (
- IN CONST CHAR16 *String,
- OUT GUID *Guid
+ IN CONST CHAR16 *String,
+ OUT GUID *Guid
);
/**
@@ -1732,17 +1478,6 @@
If String is not aligned in a 16-bit boundary, then ASSERT().
- If String is NULL, then ASSERT().
-
- If Buffer is NULL, then ASSERT().
-
- If Length is not multiple of 2, then ASSERT().
-
- If PcdMaximumUnicodeStringLength is not zero and Length is greater than
- PcdMaximumUnicodeStringLength, then ASSERT().
-
- If MaxBufferSize is less than (Length / 2), then ASSERT().
-
@param String Pointer to a Null-terminated Unicode string.
@param Length The number of Unicode characters to decode.
@param Buffer Pointer to the converted bytes array.
@@ -1763,58 +1498,12 @@
RETURN_STATUS
EFIAPI
StrHexToBytes (
- IN CONST CHAR16 *String,
- IN UINTN Length,
- OUT UINT8 *Buffer,
- IN UINTN MaxBufferSize
+ IN CONST CHAR16 *String,
+ IN UINTN Length,
+ OUT UINT8 *Buffer,
+ IN UINTN MaxBufferSize
);
-#ifndef DISABLE_NEW_DEPRECATED_INTERFACES
-
-/**
- [ATTENTION] This function is deprecated for security reason.
-
- Convert a Null-terminated Unicode string to a Null-terminated
- ASCII string and returns the ASCII string.
-
- This function converts the content of the Unicode string Source
- to the ASCII string Destination by copying the lower 8 bits of
- each Unicode character. It returns Destination.
-
- The caller is responsible to make sure Destination points to a buffer with size
- equal or greater than ((StrLen (Source) + 1) * sizeof (CHAR8)) in bytes.
-
- If any Unicode characters in Source contain non-zero value in
- the upper 8 bits, then ASSERT().
-
- If Destination is NULL, then ASSERT().
- If Source is NULL, then ASSERT().
- If Source is not aligned on a 16-bit boundary, then ASSERT().
- If Source and Destination overlap, then ASSERT().
-
- If PcdMaximumUnicodeStringLength is not zero, and Source contains
- more than PcdMaximumUnicodeStringLength Unicode characters not including
- the Null-terminator, then ASSERT().
-
- If PcdMaximumAsciiStringLength is not zero, and Source contains more
- than PcdMaximumAsciiStringLength Unicode characters not including the
- Null-terminator, then ASSERT().
-
- @param Source The pointer to a Null-terminated Unicode string.
- @param Destination The pointer to a Null-terminated ASCII string.
-
- @return Destination.
-
-**/
-CHAR8 *
-EFIAPI
-UnicodeStrToAsciiStr (
- IN CONST CHAR16 *Source,
- OUT CHAR8 *Destination
- );
-
-#endif
-
/**
Convert a Null-terminated Unicode string to a Null-terminated
ASCII string.
@@ -1833,7 +1522,6 @@
the upper 8 bits, then ASSERT().
If Source is not aligned on a 16-bit boundary, then ASSERT().
- If an error would be returned, then the function will also ASSERT().
If an error is returned, then the Destination is unmodified.
@@ -1859,9 +1547,9 @@
RETURN_STATUS
EFIAPI
UnicodeStrToAsciiStrS (
- IN CONST CHAR16 *Source,
- OUT CHAR8 *Destination,
- IN UINTN DestMax
+ IN CONST CHAR16 *Source,
+ OUT CHAR8 *Destination,
+ IN UINTN DestMax
);
/**
@@ -1880,7 +1568,6 @@
If any Unicode characters in Source contain non-zero value in the upper 8
bits, then ASSERT().
If Source is not aligned on a 16-bit boundary, then ASSERT().
- If an error would be returned, then the function will also ASSERT().
If an error is returned, then the Destination is unmodified.
@@ -1911,84 +1598,13 @@
RETURN_STATUS
EFIAPI
UnicodeStrnToAsciiStrS (
- IN CONST CHAR16 *Source,
- IN UINTN Length,
- OUT CHAR8 *Destination,
- IN UINTN DestMax,
- OUT UINTN *DestinationLength
+ IN CONST CHAR16 *Source,
+ IN UINTN Length,
+ OUT CHAR8 *Destination,
+ IN UINTN DestMax,
+ OUT UINTN *DestinationLength
);
-#ifndef DISABLE_NEW_DEPRECATED_INTERFACES
-
-/**
- [ATTENTION] This function is deprecated for security reason.
-
- Copies one Null-terminated ASCII string to another Null-terminated ASCII
- string and returns the new ASCII string.
-
- This function copies the contents of the ASCII string Source to the ASCII
- string Destination, and returns Destination. If Source and Destination
- overlap, then the results are undefined.
-
- If Destination is NULL, then ASSERT().
- If Source is NULL, then ASSERT().
- If Source and Destination overlap, then ASSERT().
- If PcdMaximumAsciiStringLength is not zero and Source contains more than
- PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
- then ASSERT().
-
- @param Destination The pointer to a Null-terminated ASCII string.
- @param Source The pointer to a Null-terminated ASCII string.
-
- @return Destination
-
-**/
-CHAR8 *
-EFIAPI
-AsciiStrCpy (
- OUT CHAR8 *Destination,
- IN CONST CHAR8 *Source
- );
-
-
-/**
- [ATTENTION] This function is deprecated for security reason.
-
- Copies up to a specified length one Null-terminated ASCII string to another
- Null-terminated ASCII string and returns the new ASCII string.
-
- This function copies the contents of the ASCII string Source to the ASCII
- string Destination, and returns Destination. At most, Length ASCII characters
- are copied from Source to Destination. If Length is 0, then Destination is
- returned unmodified. If Length is greater that the number of ASCII characters
- in Source, then Destination is padded with Null ASCII characters. If Source
- and Destination overlap, then the results are undefined.
-
- If Destination is NULL, then ASSERT().
- If Source is NULL, then ASSERT().
- If Source and Destination overlap, then ASSERT().
- If PcdMaximumAsciiStringLength is not zero, and Length is greater than
- PcdMaximumAsciiStringLength, then ASSERT().
- If PcdMaximumAsciiStringLength is not zero, and Source contains more than
- PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
- then ASSERT().
-
- @param Destination The pointer to a Null-terminated ASCII string.
- @param Source The pointer to a Null-terminated ASCII string.
- @param Length The maximum number of ASCII characters to copy.
-
- @return Destination
-
-**/
-CHAR8 *
-EFIAPI
-AsciiStrnCpy (
- OUT CHAR8 *Destination,
- IN CONST CHAR8 *Source,
- IN UINTN Length
- );
-#endif
-
/**
Returns the length of a Null-terminated ASCII string.
@@ -2009,10 +1625,9 @@
UINTN
EFIAPI
AsciiStrLen (
- IN CONST CHAR8 *String
+ IN CONST CHAR8 *String
);
-
/**
Returns the size of a Null-terminated ASCII string in bytes, including the
Null terminator.
@@ -2033,10 +1648,9 @@
UINTN
EFIAPI
AsciiStrSize (
- IN CONST CHAR8 *String
+ IN CONST CHAR8 *String
);
-
/**
Compares two Null-terminated ASCII strings, and returns the difference
between the first mismatched ASCII characters.
@@ -2066,11 +1680,10 @@
INTN
EFIAPI
AsciiStrCmp (
- IN CONST CHAR8 *FirstString,
- IN CONST CHAR8 *SecondString
+ IN CONST CHAR8 *FirstString,
+ IN CONST CHAR8 *SecondString
);
-
/**
Performs a case insensitive comparison of two Null-terminated ASCII strings,
and returns the difference between the first mismatched ASCII characters.
@@ -2103,11 +1716,10 @@
INTN
EFIAPI
AsciiStriCmp (
- IN CONST CHAR8 *FirstString,
- IN CONST CHAR8 *SecondString
+ IN CONST CHAR8 *FirstString,
+ IN CONST CHAR8 *SecondString
);
-
/**
Compares two Null-terminated ASCII strings with maximum lengths, and returns
the difference between the first mismatched ASCII characters.
@@ -2141,98 +1753,11 @@
INTN
EFIAPI
AsciiStrnCmp (
- IN CONST CHAR8 *FirstString,
- IN CONST CHAR8 *SecondString,
- IN UINTN Length
+ IN CONST CHAR8 *FirstString,
+ IN CONST CHAR8 *SecondString,
+ IN UINTN Length
);
-
-#ifndef DISABLE_NEW_DEPRECATED_INTERFACES
-
-/**
- [ATTENTION] This function is deprecated for security reason.
-
- Concatenates one Null-terminated ASCII string to another Null-terminated
- ASCII string, and returns the concatenated ASCII string.
-
- This function concatenates two Null-terminated ASCII strings. The contents of
- Null-terminated ASCII string Source are concatenated to the end of Null-
- terminated ASCII string Destination. The Null-terminated concatenated ASCII
- String is returned.
-
- If Destination is NULL, then ASSERT().
- If Source is NULL, then ASSERT().
- If PcdMaximumAsciiStringLength is not zero and Destination contains more than
- PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
- then ASSERT().
- If PcdMaximumAsciiStringLength is not zero and Source contains more than
- PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
- then ASSERT().
- If PcdMaximumAsciiStringLength is not zero and concatenating Destination and
- Source results in a ASCII string with more than PcdMaximumAsciiStringLength
- ASCII characters, then ASSERT().
-
- @param Destination The pointer to a Null-terminated ASCII string.
- @param Source The pointer to a Null-terminated ASCII string.
-
- @return Destination
-
-**/
-CHAR8 *
-EFIAPI
-AsciiStrCat (
- IN OUT CHAR8 *Destination,
- IN CONST CHAR8 *Source
- );
-
-
-/**
- [ATTENTION] This function is deprecated for security reason.
-
- Concatenates up to a specified length one Null-terminated ASCII string to
- the end of another Null-terminated ASCII string, and returns the
- concatenated ASCII string.
-
- This function concatenates two Null-terminated ASCII strings. The contents
- of Null-terminated ASCII string Source are concatenated to the end of Null-
- terminated ASCII string Destination, and Destination is returned. At most,
- Length ASCII characters are concatenated from Source to the end of
- Destination, and Destination is always Null-terminated. If Length is 0, then
- Destination is returned unmodified. If Source and Destination overlap, then
- the results are undefined.
-
- If Length > 0 and Destination is NULL, then ASSERT().
- If Length > 0 and Source is NULL, then ASSERT().
- If Source and Destination overlap, then ASSERT().
- If PcdMaximumAsciiStringLength is not zero, and Length is greater than
- PcdMaximumAsciiStringLength, then ASSERT().
- If PcdMaximumAsciiStringLength is not zero, and Destination contains more than
- PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
- then ASSERT().
- If PcdMaximumAsciiStringLength is not zero, and Source contains more than
- PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
- then ASSERT().
- If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and
- Source results in a ASCII string with more than PcdMaximumAsciiStringLength
- ASCII characters, not including the Null-terminator, then ASSERT().
-
- @param Destination The pointer to a Null-terminated ASCII string.
- @param Source The pointer to a Null-terminated ASCII string.
- @param Length The maximum number of ASCII characters to concatenate from
- Source.
-
- @return Destination
-
-**/
-CHAR8 *
-EFIAPI
-AsciiStrnCat (
- IN OUT CHAR8 *Destination,
- IN CONST CHAR8 *Source,
- IN UINTN Length
- );
-#endif
-
/**
Returns the first occurrence of a Null-terminated ASCII sub-string
in a Null-terminated ASCII string.
@@ -2260,11 +1785,10 @@
CHAR8 *
EFIAPI
AsciiStrStr (
- IN CONST CHAR8 *String,
- IN CONST CHAR8 *SearchString
+ IN CONST CHAR8 *String,
+ IN CONST CHAR8 *SearchString
);
-
/**
Convert a Null-terminated ASCII decimal string to a value of type
UINTN.
@@ -2298,10 +1822,9 @@
UINTN
EFIAPI
AsciiStrDecimalToUintn (
- IN CONST CHAR8 *String
+ IN CONST CHAR8 *String
);
-
/**
Convert a Null-terminated ASCII decimal string to a value of type
UINT64.
@@ -2335,10 +1858,9 @@
UINT64
EFIAPI
AsciiStrDecimalToUint64 (
- IN CONST CHAR8 *String
+ IN CONST CHAR8 *String
);
-
/**
Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.
@@ -2376,10 +1898,9 @@
UINTN
EFIAPI
AsciiStrHexToUintn (
- IN CONST CHAR8 *String
+ IN CONST CHAR8 *String
);
-
/**
Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.
@@ -2417,7 +1938,7 @@
UINT64
EFIAPI
AsciiStrHexToUint64 (
- IN CONST CHAR8 *String
+ IN CONST CHAR8 *String
);
/**
@@ -2444,10 +1965,6 @@
"::" can be used to compress one or more groups of X when X contains only 0.
The "::" can only appear once in the String.
- If String is NULL, then ASSERT().
-
- If Address is NULL, then ASSERT().
-
If EndPointer is not NULL and Address is translated from String, a pointer
to the character that stopped the scan is stored at the location pointed to
by EndPointer.
@@ -2475,10 +1992,10 @@
RETURN_STATUS
EFIAPI
AsciiStrToIpv6Address (
- IN CONST CHAR8 *String,
- OUT CHAR8 **EndPointer, OPTIONAL
- OUT IPv6_ADDRESS *Address,
- OUT UINT8 *PrefixLength OPTIONAL
+ IN CONST CHAR8 *String,
+ OUT CHAR8 **EndPointer OPTIONAL,
+ OUT IPv6_ADDRESS *Address,
+ OUT UINT8 *PrefixLength OPTIONAL
);
/**
@@ -2499,10 +2016,6 @@
When /P is in the String, the function stops at the first character that is not
a valid decimal digit character after P is converted.
- If String is NULL, then ASSERT().
-
- If Address is NULL, then ASSERT().
-
If EndPointer is not NULL and Address is translated from String, a pointer
to the character that stopped the scan is stored at the location pointed to
by EndPointer.
@@ -2527,10 +2040,10 @@
RETURN_STATUS
EFIAPI
AsciiStrToIpv4Address (
- IN CONST CHAR8 *String,
- OUT CHAR8 **EndPointer, OPTIONAL
- OUT IPv4_ADDRESS *Address,
- OUT UINT8 *PrefixLength OPTIONAL
+ IN CONST CHAR8 *String,
+ OUT CHAR8 **EndPointer OPTIONAL,
+ OUT IPv4_ADDRESS *Address,
+ OUT UINT8 *PrefixLength OPTIONAL
);
/**
@@ -2564,9 +2077,6 @@
oo Data4[48:55]
pp Data4[56:63]
- If String is NULL, then ASSERT().
- If Guid is NULL, then ASSERT().
-
@param String Pointer to a Null-terminated ASCII string.
@param Guid Pointer to the converted GUID.
@@ -2579,8 +2089,8 @@
RETURN_STATUS
EFIAPI
AsciiStrToGuid (
- IN CONST CHAR8 *String,
- OUT GUID *Guid
+ IN CONST CHAR8 *String,
+ OUT GUID *Guid
);
/**
@@ -2597,17 +2107,6 @@
decoding stops after Length of characters and outputs Buffer containing
(Length / 2) bytes.
- If String is NULL, then ASSERT().
-
- If Buffer is NULL, then ASSERT().
-
- If Length is not multiple of 2, then ASSERT().
-
- If PcdMaximumAsciiStringLength is not zero and Length is greater than
- PcdMaximumAsciiStringLength, then ASSERT().
-
- If MaxBufferSize is less than (Length / 2), then ASSERT().
-
@param String Pointer to a Null-terminated ASCII string.
@param Length The number of ASCII characters to decode.
@param Buffer Pointer to the converted bytes array.
@@ -2628,52 +2127,12 @@
RETURN_STATUS
EFIAPI
AsciiStrHexToBytes (
- IN CONST CHAR8 *String,
- IN UINTN Length,
- OUT UINT8 *Buffer,
- IN UINTN MaxBufferSize
+ IN CONST CHAR8 *String,
+ IN UINTN Length,
+ OUT UINT8 *Buffer,
+ IN UINTN MaxBufferSize
);
-#ifndef DISABLE_NEW_DEPRECATED_INTERFACES
-
-/**
- [ATTENTION] This function is deprecated for security reason.
-
- Convert one Null-terminated ASCII string to a Null-terminated
- Unicode string and returns the Unicode string.
-
- This function converts the contents of the ASCII string Source to the Unicode
- string Destination, and returns Destination. The function terminates the
- Unicode string Destination by appending a Null-terminator character at the end.
- The caller is responsible to make sure Destination points to a buffer with size
- equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.
-
- If Destination is NULL, then ASSERT().
- If Destination is not aligned on a 16-bit boundary, then ASSERT().
- If Source is NULL, then ASSERT().
- If Source and Destination overlap, then ASSERT().
- If PcdMaximumAsciiStringLength is not zero, and Source contains more than
- PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
- then ASSERT().
- If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
- PcdMaximumUnicodeStringLength ASCII characters not including the
- Null-terminator, then ASSERT().
-
- @param Source The pointer to a Null-terminated ASCII string.
- @param Destination The pointer to a Null-terminated Unicode string.
-
- @return Destination.
-
-**/
-CHAR16 *
-EFIAPI
-AsciiStrToUnicodeStr (
- IN CONST CHAR8 *Source,
- OUT CHAR16 *Destination
- );
-
-#endif
-
/**
Convert one Null-terminated ASCII string to a Null-terminated
Unicode string.
@@ -2688,7 +2147,6 @@
equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.
If Destination is not aligned on a 16-bit boundary, then ASSERT().
- If an error would be returned, then the function will also ASSERT().
If an error is returned, then the Destination is unmodified.
@@ -2714,9 +2172,9 @@
RETURN_STATUS
EFIAPI
AsciiStrToUnicodeStrS (
- IN CONST CHAR8 *Source,
- OUT CHAR16 *Destination,
- IN UINTN DestMax
+ IN CONST CHAR8 *Source,
+ OUT CHAR16 *Destination,
+ IN UINTN DestMax
);
/**
@@ -2734,7 +2192,6 @@
((MIN(AsciiStrLen(Source), Length) + 1) * sizeof (CHAR8)) in bytes.
If Destination is not aligned on a 16-bit boundary, then ASSERT().
- If an error would be returned, then the function will also ASSERT().
If an error is returned, then Destination and DestinationLength are
unmodified.
@@ -2765,11 +2222,170 @@
RETURN_STATUS
EFIAPI
AsciiStrnToUnicodeStrS (
- IN CONST CHAR8 *Source,
- IN UINTN Length,
- OUT CHAR16 *Destination,
- IN UINTN DestMax,
- OUT UINTN *DestinationLength
+ IN CONST CHAR8 *Source,
+ IN UINTN Length,
+ OUT CHAR16 *Destination,
+ IN UINTN DestMax,
+ OUT UINTN *DestinationLength
+ );
+
+/**
+ Convert a Unicode character to upper case only if
+ it maps to a valid small-case ASCII character.
+
+ This internal function only deal with Unicode character
+ which maps to a valid small-case ASCII character, i.e.
+ L'a' to L'z'. For other Unicode character, the input character
+ is returned directly.
+
+ @param Char The character to convert.
+
+ @retval LowerCharacter If the Char is with range L'a' to L'z'.
+ @retval Unchanged Otherwise.
+
+**/
+CHAR16
+EFIAPI
+CharToUpper (
+ IN CHAR16 Char
+ );
+
+/**
+ Converts a lowercase Ascii character to upper one.
+
+ If Chr is lowercase Ascii character, then converts it to upper one.
+
+ If Value >= 0xA0, then ASSERT().
+ If (Value & 0x0F) >= 0x0A, then ASSERT().
+
+ @param Chr one Ascii character
+
+ @return The uppercase value of Ascii character
+
+**/
+CHAR8
+EFIAPI
+AsciiCharToUpper (
+ IN CHAR8 Chr
+ );
+
+/**
+ Convert binary data to a Base64 encoded ascii string based on RFC4648.
+
+ Produce a Null-terminated Ascii string in the output buffer specified by Destination and DestinationSize.
+ The Ascii string is produced by converting the data string specified by Source and SourceLength.
+
+ @param Source Input UINT8 data
+ @param SourceLength Number of UINT8 bytes of data
+ @param Destination Pointer to output string buffer
+ @param DestinationSize Size of ascii buffer. Set to 0 to get the size needed.
+ Caller is responsible for passing in buffer of DestinationSize
+
+ @retval RETURN_SUCCESS When ascii buffer is filled in.
+ @retval RETURN_INVALID_PARAMETER If Source is NULL or DestinationSize is NULL.
+ @retval RETURN_INVALID_PARAMETER If SourceLength or DestinationSize is bigger than (MAX_ADDRESS - (UINTN)Destination).
+ @retval RETURN_BUFFER_TOO_SMALL If SourceLength is 0 and DestinationSize is <1.
+ @retval RETURN_BUFFER_TOO_SMALL If Destination is NULL or DestinationSize is smaller than required buffersize.
+
+**/
+RETURN_STATUS
+EFIAPI
+Base64Encode (
+ IN CONST UINT8 *Source,
+ IN UINTN SourceLength,
+ OUT CHAR8 *Destination OPTIONAL,
+ IN OUT UINTN *DestinationSize
+ );
+
+/**
+ Decode Base64 ASCII encoded data to 8-bit binary representation, based on
+ RFC4648.
+
+ Decoding occurs according to "Table 1: The Base 64 Alphabet" in RFC4648.
+
+ Whitespace is ignored at all positions:
+ - 0x09 ('\t') horizontal tab
+ - 0x0A ('\n') new line
+ - 0x0B ('\v') vertical tab
+ - 0x0C ('\f') form feed
+ - 0x0D ('\r') carriage return
+ - 0x20 (' ') space
+
+ The minimum amount of required padding (with ASCII 0x3D, '=') is tolerated
+ and enforced at the end of the Base64 ASCII encoded data, and only there.
+
+ Other characters outside of the encoding alphabet cause the function to
+ reject the Base64 ASCII encoded data.
+
+ @param[in] Source Array of CHAR8 elements containing the Base64
+ ASCII encoding. May be NULL if SourceSize is
+ zero.
+
+ @param[in] SourceSize Number of CHAR8 elements in Source.
+
+ @param[out] Destination Array of UINT8 elements receiving the decoded
+ 8-bit binary representation. Allocated by the
+ caller. May be NULL if DestinationSize is
+ zero on input. If NULL, decoding is
+ performed, but the 8-bit binary
+ representation is not stored. If non-NULL and
+ the function returns an error, the contents
+ of Destination are indeterminate.
+
+ @param[in,out] DestinationSize On input, the number of UINT8 elements that
+ the caller allocated for Destination. On
+ output, if the function returns
+ RETURN_SUCCESS or RETURN_BUFFER_TOO_SMALL,
+ the number of UINT8 elements that are
+ required for decoding the Base64 ASCII
+ representation. If the function returns a
+ value different from both RETURN_SUCCESS and
+ RETURN_BUFFER_TOO_SMALL, then DestinationSize
+ is indeterminate on output.
+
+ @retval RETURN_SUCCESS SourceSize CHAR8 elements at Source have
+ been decoded to on-output DestinationSize
+ UINT8 elements at Destination. Note that
+ RETURN_SUCCESS covers the case when
+ DestinationSize is zero on input, and
+ Source decodes to zero bytes (due to
+ containing at most ignored whitespace).
+
+ @retval RETURN_BUFFER_TOO_SMALL The input value of DestinationSize is not
+ large enough for decoding SourceSize CHAR8
+ elements at Source. The required number of
+ UINT8 elements has been stored to
+ DestinationSize.
+
+ @retval RETURN_INVALID_PARAMETER DestinationSize is NULL.
+
+ @retval RETURN_INVALID_PARAMETER Source is NULL, but SourceSize is not zero.
+
+ @retval RETURN_INVALID_PARAMETER Destination is NULL, but DestinationSize is
+ not zero on input.
+
+ @retval RETURN_INVALID_PARAMETER Source is non-NULL, and (Source +
+ SourceSize) would wrap around MAX_ADDRESS.
+
+ @retval RETURN_INVALID_PARAMETER Destination is non-NULL, and (Destination +
+ DestinationSize) would wrap around
+ MAX_ADDRESS, as specified on input.
+
+ @retval RETURN_INVALID_PARAMETER None of Source and Destination are NULL,
+ and CHAR8[SourceSize] at Source overlaps
+ UINT8[DestinationSize] at Destination, as
+ specified on input.
+
+ @retval RETURN_INVALID_PARAMETER Invalid CHAR8 element encountered in
+ Source.
+**/
+RETURN_STATUS
+EFIAPI
+Base64Decode (
+ IN CONST CHAR8 *Source OPTIONAL,
+ IN UINTN SourceSize,
+ OUT UINT8 *Destination OPTIONAL,
+ IN OUT UINTN *DestinationSize
);
/**
@@ -2788,10 +2404,9 @@
UINT8
EFIAPI
DecimalToBcd8 (
- IN UINT8 Value
+ IN UINT8 Value
);
-
/**
Converts an 8-bit BCD value to an 8-bit value.
@@ -2809,7 +2424,7 @@
UINT8
EFIAPI
BcdToDecimal8 (
- IN UINT8 Value
+ IN UINT8 Value
);
//
@@ -2826,8 +2441,8 @@
**/
BOOLEAN
EFIAPI
-PathRemoveLastItem(
- IN OUT CHAR16 *Path
+PathRemoveLastItem (
+ IN OUT CHAR16 *Path
);
/**
@@ -2843,10 +2458,10 @@
@return Returns Path, otherwise returns NULL to indicate that an error has occurred.
**/
-CHAR16*
+CHAR16 *
EFIAPI
-PathCleanUpDirectories(
- IN CHAR16 *Path
+PathCleanUpDirectories (
+ IN CHAR16 *Path
);
//
@@ -2869,6 +2484,58 @@
**/
#define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&(ListHead), &(ListHead)}
+/**
+ Iterates over each node in a doubly linked list using each node's forward link.
+
+ @param Entry A pointer to a list node used as a loop cursor during iteration
+ @param ListHead The head node of the doubly linked list
+
+**/
+#define BASE_LIST_FOR_EACH(Entry, ListHead) \
+ for(Entry = (ListHead)->ForwardLink; Entry != (ListHead); Entry = Entry->ForwardLink)
+
+/**
+ Iterates over each node in a doubly linked list using each node's forward link
+ with safety against node removal.
+
+ This macro uses NextEntry to temporarily store the next list node so the node
+ pointed to by Entry may be deleted in the current loop iteration step and
+ iteration can continue from the node pointed to by NextEntry.
+
+ @param Entry A pointer to a list node used as a loop cursor during iteration
+ @param NextEntry A pointer to a list node used to temporarily store the next node
+ @param ListHead The head node of the doubly linked list
+
+**/
+#define BASE_LIST_FOR_EACH_SAFE(Entry, NextEntry, ListHead) \
+ for(Entry = (ListHead)->ForwardLink, NextEntry = Entry->ForwardLink;\
+ Entry != (ListHead); Entry = NextEntry, NextEntry = Entry->ForwardLink)
+
+/**
+ Checks whether FirstEntry and SecondEntry are part of the same doubly-linked
+ list.
+
+ If FirstEntry is NULL, then ASSERT().
+ If FirstEntry->ForwardLink is NULL, then ASSERT().
+ If FirstEntry->BackLink is NULL, then ASSERT().
+ If SecondEntry is NULL, then ASSERT();
+ If PcdMaximumLinkedListLength is not zero, and List contains more than
+ PcdMaximumLinkedListLength nodes, then ASSERT().
+
+ @param FirstEntry A pointer to a node in a linked list.
+ @param SecondEntry A pointer to the node to locate.
+
+ @retval TRUE SecondEntry is in the same doubly-linked list as FirstEntry.
+ @retval FALSE SecondEntry isn't in the same doubly-linked list as FirstEntry,
+ or FirstEntry is invalid.
+
+**/
+BOOLEAN
+EFIAPI
+IsNodeInList (
+ IN CONST LIST_ENTRY *FirstEntry,
+ IN CONST LIST_ENTRY *SecondEntry
+ );
/**
Initializes the head node of a doubly linked list, and returns the pointer to
@@ -2889,10 +2556,9 @@
LIST_ENTRY *
EFIAPI
InitializeListHead (
- IN OUT LIST_ENTRY *ListHead
+ IN OUT LIST_ENTRY *ListHead
);
-
/**
Adds a node to the beginning of a doubly linked list, and returns the pointer
to the head node of the doubly linked list.
@@ -2918,11 +2584,10 @@
LIST_ENTRY *
EFIAPI
InsertHeadList (
- IN OUT LIST_ENTRY *ListHead,
- IN OUT LIST_ENTRY *Entry
+ IN OUT LIST_ENTRY *ListHead,
+ IN OUT LIST_ENTRY *Entry
);
-
/**
Adds a node to the end of a doubly linked list, and returns the pointer to
the head node of the doubly linked list.
@@ -2948,11 +2613,10 @@
LIST_ENTRY *
EFIAPI
InsertTailList (
- IN OUT LIST_ENTRY *ListHead,
- IN OUT LIST_ENTRY *Entry
+ IN OUT LIST_ENTRY *ListHead,
+ IN OUT LIST_ENTRY *Entry
);
-
/**
Retrieves the first node of a doubly linked list.
@@ -2976,10 +2640,9 @@
LIST_ENTRY *
EFIAPI
GetFirstNode (
- IN CONST LIST_ENTRY *List
+ IN CONST LIST_ENTRY *List
);
-
/**
Retrieves the next node of a doubly linked list.
@@ -3004,11 +2667,10 @@
LIST_ENTRY *
EFIAPI
GetNextNode (
- IN CONST LIST_ENTRY *List,
- IN CONST LIST_ENTRY *Node
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
);
-
/**
Retrieves the previous node of a doubly linked list.
@@ -3033,11 +2695,10 @@
LIST_ENTRY *
EFIAPI
GetPreviousNode (
- IN CONST LIST_ENTRY *List,
- IN CONST LIST_ENTRY *Node
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
);
-
/**
Checks to see if a doubly linked list is empty or not.
@@ -3060,10 +2721,9 @@
BOOLEAN
EFIAPI
IsListEmpty (
- IN CONST LIST_ENTRY *ListHead
+ IN CONST LIST_ENTRY *ListHead
);
-
/**
Determines if a node in a doubly linked list is the head node of a the same
doubly linked list. This function is typically used to terminate a loop that
@@ -3093,11 +2753,10 @@
BOOLEAN
EFIAPI
IsNull (
- IN CONST LIST_ENTRY *List,
- IN CONST LIST_ENTRY *Node
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
);
-
/**
Determines if a node the last node in a doubly linked list.
@@ -3124,11 +2783,10 @@
BOOLEAN
EFIAPI
IsNodeAtEnd (
- IN CONST LIST_ENTRY *List,
- IN CONST LIST_ENTRY *Node
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
);
-
/**
Swaps the location of two nodes in a doubly linked list, and returns the
first node after the swap.
@@ -3158,11 +2816,10 @@
LIST_ENTRY *
EFIAPI
SwapListEntries (
- IN OUT LIST_ENTRY *FirstEntry,
- IN OUT LIST_ENTRY *SecondEntry
+ IN OUT LIST_ENTRY *FirstEntry,
+ IN OUT LIST_ENTRY *SecondEntry
);
-
/**
Removes a node from a doubly linked list, and returns the node that follows
the removed node.
@@ -3187,7 +2844,7 @@
LIST_ENTRY *
EFIAPI
RemoveEntryList (
- IN CONST LIST_ENTRY *Entry
+ IN CONST LIST_ENTRY *Entry
);
//
@@ -3195,6 +2852,56 @@
//
/**
+ Prototype for comparison function for any two element types.
+
+ @param[in] Buffer1 The pointer to first buffer.
+ @param[in] Buffer2 The pointer to second buffer.
+
+ @retval 0 Buffer1 equal to Buffer2.
+ @return <0 Buffer1 is less than Buffer2.
+ @return >0 Buffer1 is greater than Buffer2.
+**/
+typedef
+INTN
+(EFIAPI *BASE_SORT_COMPARE)(
+ IN CONST VOID *Buffer1,
+ IN CONST VOID *Buffer2
+ );
+
+/**
+ This function is identical to perform QuickSort,
+ except that is uses the pre-allocated buffer so the in place sorting does not need to
+ allocate and free buffers constantly.
+
+ Each element must be equal sized.
+
+ if BufferToSort is NULL, then ASSERT.
+ if CompareFunction is NULL, then ASSERT.
+ if BufferOneElement is NULL, then ASSERT.
+ if ElementSize is < 1, then ASSERT.
+
+ if Count is < 2 then perform no action.
+
+ @param[in, out] BufferToSort on call a Buffer of (possibly sorted) elements
+ on return a buffer of sorted elements
+ @param[in] Count the number of elements in the buffer to sort
+ @param[in] ElementSize Size of an element in bytes
+ @param[in] CompareFunction The function to call to perform the comparison
+ of any 2 elements
+ @param[out] BufferOneElement Caller provided buffer whose size equals to ElementSize.
+ It's used by QuickSort() for swapping in sorting.
+**/
+VOID
+EFIAPI
+QuickSort (
+ IN OUT VOID *BufferToSort,
+ IN CONST UINTN Count,
+ IN CONST UINTN ElementSize,
+ IN BASE_SORT_COMPARE CompareFunction,
+ OUT VOID *BufferOneElement
+ );
+
+/**
Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled
with zeros. The shifted value is returned.
@@ -3212,11 +2919,10 @@
UINT64
EFIAPI
LShiftU64 (
- IN UINT64 Operand,
- IN UINTN Count
+ IN UINT64 Operand,
+ IN UINTN Count
);
-
/**
Shifts a 64-bit integer right between 0 and 63 bits. This high bits are
filled with zeros. The shifted value is returned.
@@ -3235,11 +2941,10 @@
UINT64
EFIAPI
RShiftU64 (
- IN UINT64 Operand,
- IN UINTN Count
+ IN UINT64 Operand,
+ IN UINTN Count
);
-
/**
Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled
with original integer's bit 63. The shifted value is returned.
@@ -3258,11 +2963,10 @@
UINT64
EFIAPI
ARShiftU64 (
- IN UINT64 Operand,
- IN UINTN Count
+ IN UINT64 Operand,
+ IN UINTN Count
);
-
/**
Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits
with the high bits that were rotated.
@@ -3282,11 +2986,10 @@
UINT32
EFIAPI
LRotU32 (
- IN UINT32 Operand,
- IN UINTN Count
+ IN UINT32 Operand,
+ IN UINTN Count
);
-
/**
Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits
with the low bits that were rotated.
@@ -3306,11 +3009,10 @@
UINT32
EFIAPI
RRotU32 (
- IN UINT32 Operand,
- IN UINTN Count
+ IN UINT32 Operand,
+ IN UINTN Count
);
-
/**
Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits
with the high bits that were rotated.
@@ -3330,11 +3032,10 @@
UINT64
EFIAPI
LRotU64 (
- IN UINT64 Operand,
- IN UINTN Count
+ IN UINT64 Operand,
+ IN UINTN Count
);
-
/**
Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits
with the high low bits that were rotated.
@@ -3354,11 +3055,10 @@
UINT64
EFIAPI
RRotU64 (
- IN UINT64 Operand,
- IN UINTN Count
+ IN UINT64 Operand,
+ IN UINTN Count
);
-
/**
Returns the bit position of the lowest bit set in a 32-bit value.
@@ -3375,10 +3075,9 @@
INTN
EFIAPI
LowBitSet32 (
- IN UINT32 Operand
+ IN UINT32 Operand
);
-
/**
Returns the bit position of the lowest bit set in a 64-bit value.
@@ -3396,10 +3095,9 @@
INTN
EFIAPI
LowBitSet64 (
- IN UINT64 Operand
+ IN UINT64 Operand
);
-
/**
Returns the bit position of the highest bit set in a 32-bit value. Equivalent
to log2(x).
@@ -3417,10 +3115,9 @@
INTN
EFIAPI
HighBitSet32 (
- IN UINT32 Operand
+ IN UINT32 Operand
);
-
/**
Returns the bit position of the highest bit set in a 64-bit value. Equivalent
to log2(x).
@@ -3438,10 +3135,9 @@
INTN
EFIAPI
HighBitSet64 (
- IN UINT64 Operand
+ IN UINT64 Operand
);
-
/**
Returns the value of the highest bit set in a 32-bit value. Equivalent to
1 << log2(x).
@@ -3458,10 +3154,9 @@
UINT32
EFIAPI
GetPowerOfTwo32 (
- IN UINT32 Operand
+ IN UINT32 Operand
);
-
/**
Returns the value of the highest bit set in a 64-bit value. Equivalent to
1 << log2(x).
@@ -3478,10 +3173,9 @@
UINT64
EFIAPI
GetPowerOfTwo64 (
- IN UINT64 Operand
+ IN UINT64 Operand
);
-
/**
Switches the endianness of a 16-bit integer.
@@ -3497,10 +3191,9 @@
UINT16
EFIAPI
SwapBytes16 (
- IN UINT16 Value
+ IN UINT16 Value
);
-
/**
Switches the endianness of a 32-bit integer.
@@ -3516,10 +3209,9 @@
UINT32
EFIAPI
SwapBytes32 (
- IN UINT32 Value
+ IN UINT32 Value
);
-
/**
Switches the endianness of a 64-bit integer.
@@ -3535,10 +3227,9 @@
UINT64
EFIAPI
SwapBytes64 (
- IN UINT64 Value
+ IN UINT64 Value
);
-
/**
Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and
generates a 64-bit unsigned result.
@@ -3556,11 +3247,10 @@
UINT64
EFIAPI
MultU64x32 (
- IN UINT64 Multiplicand,
- IN UINT32 Multiplier
+ IN UINT64 Multiplicand,
+ IN UINT32 Multiplier
);
-
/**
Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and
generates a 64-bit unsigned result.
@@ -3578,11 +3268,10 @@
UINT64
EFIAPI
MultU64x64 (
- IN UINT64 Multiplicand,
- IN UINT64 Multiplier
+ IN UINT64 Multiplicand,
+ IN UINT64 Multiplier
);
-
/**
Multiples a 64-bit signed integer by a 64-bit signed integer and generates a
64-bit signed result.
@@ -3600,11 +3289,10 @@
INT64
EFIAPI
MultS64x64 (
- IN INT64 Multiplicand,
- IN INT64 Multiplier
+ IN INT64 Multiplicand,
+ IN INT64 Multiplier
);
-
/**
Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
a 64-bit unsigned result.
@@ -3624,11 +3312,10 @@
UINT64
EFIAPI
DivU64x32 (
- IN UINT64 Dividend,
- IN UINT32 Divisor
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
);
-
/**
Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
a 32-bit unsigned remainder.
@@ -3648,11 +3335,10 @@
UINT32
EFIAPI
ModU64x32 (
- IN UINT64 Dividend,
- IN UINT32 Divisor
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
);
-
/**
Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
a 64-bit unsigned result and an optional 32-bit unsigned remainder.
@@ -3675,12 +3361,11 @@
UINT64
EFIAPI
DivU64x32Remainder (
- IN UINT64 Dividend,
- IN UINT32 Divisor,
- OUT UINT32 *Remainder OPTIONAL
+ IN UINT64 Dividend,
+ IN UINT32 Divisor,
+ OUT UINT32 *Remainder OPTIONAL
);
-
/**
Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates
a 64-bit unsigned result and an optional 64-bit unsigned remainder.
@@ -3703,12 +3388,11 @@
UINT64
EFIAPI
DivU64x64Remainder (
- IN UINT64 Dividend,
- IN UINT64 Divisor,
- OUT UINT64 *Remainder OPTIONAL
+ IN UINT64 Dividend,
+ IN UINT64 Divisor,
+ OUT UINT64 *Remainder OPTIONAL
);
-
/**
Divides a 64-bit signed integer by a 64-bit signed integer and generates a
64-bit signed result and a optional 64-bit signed remainder.
@@ -3735,12 +3419,11 @@
INT64
EFIAPI
DivS64x64Remainder (
- IN INT64 Dividend,
- IN INT64 Divisor,
- OUT INT64 *Remainder OPTIONAL
+ IN INT64 Dividend,
+ IN INT64 Divisor,
+ OUT INT64 *Remainder OPTIONAL
);
-
/**
Reads a 16-bit value from memory that may be unaligned.
@@ -3757,10 +3440,9 @@
UINT16
EFIAPI
ReadUnaligned16 (
- IN CONST UINT16 *Buffer
+ IN CONST UINT16 *Buffer
);
-
/**
Writes a 16-bit value to memory that may be unaligned.
@@ -3779,11 +3461,10 @@
UINT16
EFIAPI
WriteUnaligned16 (
- OUT UINT16 *Buffer,
- IN UINT16 Value
+ OUT UINT16 *Buffer,
+ IN UINT16 Value
);
-
/**
Reads a 24-bit value from memory that may be unaligned.
@@ -3800,10 +3481,9 @@
UINT32
EFIAPI
ReadUnaligned24 (
- IN CONST UINT32 *Buffer
+ IN CONST UINT32 *Buffer
);
-
/**
Writes a 24-bit value to memory that may be unaligned.
@@ -3822,11 +3502,10 @@
UINT32
EFIAPI
WriteUnaligned24 (
- OUT UINT32 *Buffer,
- IN UINT32 Value
+ OUT UINT32 *Buffer,
+ IN UINT32 Value
);
-
/**
Reads a 32-bit value from memory that may be unaligned.
@@ -3843,10 +3522,9 @@
UINT32
EFIAPI
ReadUnaligned32 (
- IN CONST UINT32 *Buffer
+ IN CONST UINT32 *Buffer
);
-
/**
Writes a 32-bit value to memory that may be unaligned.
@@ -3865,11 +3543,10 @@
UINT32
EFIAPI
WriteUnaligned32 (
- OUT UINT32 *Buffer,
- IN UINT32 Value
+ OUT UINT32 *Buffer,
+ IN UINT32 Value
);
-
/**
Reads a 64-bit value from memory that may be unaligned.
@@ -3886,10 +3563,9 @@
UINT64
EFIAPI
ReadUnaligned64 (
- IN CONST UINT64 *Buffer
+ IN CONST UINT64 *Buffer
);
-
/**
Writes a 64-bit value to memory that may be unaligned.
@@ -3908,11 +3584,10 @@
UINT64
EFIAPI
WriteUnaligned64 (
- OUT UINT64 *Buffer,
- IN UINT64 Value
+ OUT UINT64 *Buffer,
+ IN UINT64 Value
);
-
//
// Bit Field Functions
//
@@ -3939,12 +3614,11 @@
UINT8
EFIAPI
BitFieldRead8 (
- IN UINT8 Operand,
- IN UINTN StartBit,
- IN UINTN EndBit
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
);
-
/**
Writes a bit field to an 8-bit value, and returns the result.
@@ -3971,13 +3645,12 @@
UINT8
EFIAPI
BitFieldWrite8 (
- IN UINT8 Operand,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT8 Value
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
);
-
/**
Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the
result.
@@ -4005,13 +3678,12 @@
UINT8
EFIAPI
BitFieldOr8 (
- IN UINT8 Operand,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT8 OrData
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
);
-
/**
Reads a bit field from an 8-bit value, performs a bitwise AND, and returns
the result.
@@ -4039,13 +3711,12 @@
UINT8
EFIAPI
BitFieldAnd8 (
- IN UINT8 Operand,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT8 AndData
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
);
-
/**
Reads a bit field from an 8-bit value, performs a bitwise AND followed by a
bitwise OR, and returns the result.
@@ -4076,14 +3747,13 @@
UINT8
EFIAPI
BitFieldAndThenOr8 (
- IN UINT8 Operand,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT8 AndData,
- IN UINT8 OrData
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
);
-
/**
Returns a bit field from a 16-bit value.
@@ -4106,12 +3776,11 @@
UINT16
EFIAPI
BitFieldRead16 (
- IN UINT16 Operand,
- IN UINTN StartBit,
- IN UINTN EndBit
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
);
-
/**
Writes a bit field to a 16-bit value, and returns the result.
@@ -4138,13 +3807,12 @@
UINT16
EFIAPI
BitFieldWrite16 (
- IN UINT16 Operand,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT16 Value
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
);
-
/**
Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the
result.
@@ -4172,13 +3840,12 @@
UINT16
EFIAPI
BitFieldOr16 (
- IN UINT16 Operand,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT16 OrData
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
);
-
/**
Reads a bit field from a 16-bit value, performs a bitwise AND, and returns
the result.
@@ -4206,13 +3873,12 @@
UINT16
EFIAPI
BitFieldAnd16 (
- IN UINT16 Operand,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT16 AndData
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
);
-
/**
Reads a bit field from a 16-bit value, performs a bitwise AND followed by a
bitwise OR, and returns the result.
@@ -4243,14 +3909,13 @@
UINT16
EFIAPI
BitFieldAndThenOr16 (
- IN UINT16 Operand,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT16 AndData,
- IN UINT16 OrData
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
);
-
/**
Returns a bit field from a 32-bit value.
@@ -4273,12 +3938,11 @@
UINT32
EFIAPI
BitFieldRead32 (
- IN UINT32 Operand,
- IN UINTN StartBit,
- IN UINTN EndBit
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
);
-
/**
Writes a bit field to a 32-bit value, and returns the result.
@@ -4305,13 +3969,12 @@
UINT32
EFIAPI
BitFieldWrite32 (
- IN UINT32 Operand,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 Value
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
);
-
/**
Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the
result.
@@ -4339,13 +4002,12 @@
UINT32
EFIAPI
BitFieldOr32 (
- IN UINT32 Operand,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 OrData
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
);
-
/**
Reads a bit field from a 32-bit value, performs a bitwise AND, and returns
the result.
@@ -4373,13 +4035,12 @@
UINT32
EFIAPI
BitFieldAnd32 (
- IN UINT32 Operand,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 AndData
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
);
-
/**
Reads a bit field from a 32-bit value, performs a bitwise AND followed by a
bitwise OR, and returns the result.
@@ -4410,14 +4071,13 @@
UINT32
EFIAPI
BitFieldAndThenOr32 (
- IN UINT32 Operand,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 AndData,
- IN UINT32 OrData
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
);
-
/**
Returns a bit field from a 64-bit value.
@@ -4440,12 +4100,11 @@
UINT64
EFIAPI
BitFieldRead64 (
- IN UINT64 Operand,
- IN UINTN StartBit,
- IN UINTN EndBit
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
);
-
/**
Writes a bit field to a 64-bit value, and returns the result.
@@ -4472,13 +4131,12 @@
UINT64
EFIAPI
BitFieldWrite64 (
- IN UINT64 Operand,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT64 Value
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
);
-
/**
Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the
result.
@@ -4506,13 +4164,12 @@
UINT64
EFIAPI
BitFieldOr64 (
- IN UINT64 Operand,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT64 OrData
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
);
-
/**
Reads a bit field from a 64-bit value, performs a bitwise AND, and returns
the result.
@@ -4540,13 +4197,12 @@
UINT64
EFIAPI
BitFieldAnd64 (
- IN UINT64 Operand,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT64 AndData
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
);
-
/**
Reads a bit field from a 64-bit value, performs a bitwise AND followed by a
bitwise OR, and returns the result.
@@ -4577,11 +4233,67 @@
UINT64
EFIAPI
BitFieldAndThenOr64 (
- IN UINT64 Operand,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT64 AndData,
- IN UINT64 OrData
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads a bit field from a 32-bit value, counts and returns
+ the number of set bits.
+
+ Counts the number of set bits in the bit field specified by
+ StartBit and EndBit in Operand. The count is returned.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The number of bits set between StartBit and EndBit.
+
+**/
+UINT8
+EFIAPI
+BitFieldCountOnes32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Reads a bit field from a 64-bit value, counts and returns
+ the number of set bits.
+
+ Counts the number of set bits in the bit field specified by
+ StartBit and EndBit in Operand. The count is returned.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The number of bits set between StartBit and EndBit.
+
+**/
+UINT8
+EFIAPI
+BitFieldCountOnes64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
);
//
@@ -4609,11 +4321,10 @@
UINT8
EFIAPI
CalculateSum8 (
- IN CONST UINT8 *Buffer,
- IN UINTN Length
+ IN CONST UINT8 *Buffer,
+ IN UINTN Length
);
-
/**
Returns the two's complement checksum of all elements in a buffer
of 8-bit values.
@@ -4635,11 +4346,10 @@
UINT8
EFIAPI
CalculateCheckSum8 (
- IN CONST UINT8 *Buffer,
- IN UINTN Length
+ IN CONST UINT8 *Buffer,
+ IN UINTN Length
);
-
/**
Returns the sum of all elements in a buffer of 16-bit values. During
calculation, the carry bits are dropped.
@@ -4662,11 +4372,10 @@
UINT16
EFIAPI
CalculateSum16 (
- IN CONST UINT16 *Buffer,
- IN UINTN Length
+ IN CONST UINT16 *Buffer,
+ IN UINTN Length
);
-
/**
Returns the two's complement checksum of all elements in a buffer of
16-bit values.
@@ -4690,11 +4399,10 @@
UINT16
EFIAPI
CalculateCheckSum16 (
- IN CONST UINT16 *Buffer,
- IN UINTN Length
+ IN CONST UINT16 *Buffer,
+ IN UINTN Length
);
-
/**
Returns the sum of all elements in a buffer of 32-bit values. During
calculation, the carry bits are dropped.
@@ -4717,11 +4425,10 @@
UINT32
EFIAPI
CalculateSum32 (
- IN CONST UINT32 *Buffer,
- IN UINTN Length
+ IN CONST UINT32 *Buffer,
+ IN UINTN Length
);
-
/**
Returns the two's complement checksum of all elements in a buffer of
32-bit values.
@@ -4745,11 +4452,10 @@
UINT32
EFIAPI
CalculateCheckSum32 (
- IN CONST UINT32 *Buffer,
- IN UINTN Length
+ IN CONST UINT32 *Buffer,
+ IN UINTN Length
);
-
/**
Returns the sum of all elements in a buffer of 64-bit values. During
calculation, the carry bits are dropped.
@@ -4772,11 +4478,10 @@
UINT64
EFIAPI
CalculateSum64 (
- IN CONST UINT64 *Buffer,
- IN UINTN Length
+ IN CONST UINT64 *Buffer,
+ IN UINTN Length
);
-
/**
Returns the two's complement checksum of all elements in a buffer of
64-bit values.
@@ -4800,10 +4505,63 @@
UINT64
EFIAPI
CalculateCheckSum64 (
- IN CONST UINT64 *Buffer,
- IN UINTN Length
+ IN CONST UINT64 *Buffer,
+ IN UINTN Length
);
+/**
+ Computes and returns a 32-bit CRC for a data buffer.
+ CRC32 value bases on ITU-T V.42.
+
+ If Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param[in] Buffer A pointer to the buffer on which the 32-bit CRC is to be computed.
+ @param[in] Length The number of bytes in the buffer Data.
+
+ @retval Crc32 The 32-bit CRC was computed for the data buffer.
+
+**/
+UINT32
+EFIAPI
+CalculateCrc32 (
+ IN VOID *Buffer,
+ IN UINTN Length
+ );
+
+/**
+ Calculates the CRC16-ANSI checksum of the given buffer.
+
+ @param[in] Buffer Pointer to the buffer.
+ @param[in] Length Length of the buffer, in bytes.
+ @param[in] InitialValue Initial value of the CRC.
+
+ @return The CRC16-ANSI checksum.
+**/
+UINT16
+EFIAPI
+CalculateCrc16Ansi (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 InitialValue
+ );
+
+/**
+ Calculates the CRC32c checksum of the given buffer.
+
+ @param[in] Buffer Pointer to the buffer.
+ @param[in] Length Length of the buffer, in bytes.
+ @param[in] InitialValue Initial value of the CRC.
+
+ @return The CRC32c checksum.
+**/
+UINT32
+EFIAPI
+CalculateCrc32c (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 InitialValue
+ );
//
// Base Library CPU Functions
@@ -4814,16 +4572,14 @@
@param Context1 Context1 parameter passed into SwitchStack().
@param Context2 Context2 parameter passed into SwitchStack().
-
**/
typedef
VOID
(EFIAPI *SWITCH_STACK_ENTRY_POINT)(
- IN VOID *Context1, OPTIONAL
+ IN VOID *Context1 OPTIONAL,
IN VOID *Context2 OPTIONAL
);
-
/**
Used to serialize load and store operations.
@@ -4837,7 +4593,6 @@
VOID
);
-
/**
Saves the current CPU context that can be restored with a call to LongJump()
and returns 0.
@@ -4859,13 +4614,13 @@
@retval 0 Indicates a return from SetJump().
**/
+RETURNS_TWICE
UINTN
EFIAPI
SetJump (
OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
);
-
/**
Restores the CPU context that was saved with SetJump().
@@ -4889,7 +4644,6 @@
IN UINTN Value
);
-
/**
Enables CPU interrupts.
@@ -4900,7 +4654,6 @@
VOID
);
-
/**
Disables CPU interrupts.
@@ -4911,7 +4664,6 @@
VOID
);
-
/**
Disables CPU interrupts and returns the interrupt state prior to the disable
operation.
@@ -4926,7 +4678,6 @@
VOID
);
-
/**
Enables CPU interrupts for the smallest window required to capture any
pending interrupts.
@@ -4938,7 +4689,6 @@
VOID
);
-
/**
Retrieves the current CPU interrupt state.
@@ -4955,7 +4705,6 @@
VOID
);
-
/**
Set the current CPU interrupt state.
@@ -4973,10 +4722,9 @@
BOOLEAN
EFIAPI
SetInterruptState (
- IN BOOLEAN InterruptState
+ IN BOOLEAN InterruptState
);
-
/**
Requests CPU to pause for a short period of time.
@@ -4990,7 +4738,6 @@
VOID
);
-
/**
Transfers control to a function starting with a new stack.
@@ -5024,13 +4771,12 @@
EFIAPI
SwitchStack (
IN SWITCH_STACK_ENTRY_POINT EntryPoint,
- IN VOID *Context1, OPTIONAL
- IN VOID *Context2, OPTIONAL
+ IN VOID *Context1 OPTIONAL,
+ IN VOID *Context2 OPTIONAL,
IN VOID *NewStack,
...
);
-
/**
Generates a breakpoint on the CPU.
@@ -5044,7 +4790,6 @@
VOID
);
-
/**
Executes an infinite loop.
@@ -5060,1396 +4805,169 @@
VOID
);
-#if defined (MDE_CPU_IPF)
-
/**
- Flush a range of cache lines in the cache coherency domain of the calling
- CPU.
+ Uses as a barrier to stop speculative execution.
- Flushes the cache lines specified by Address and Length. If Address is not aligned
- on a cache line boundary, then entire cache line containing Address is flushed.
- If Address + Length is not aligned on a cache line boundary, then the entire cache
- line containing Address + Length - 1 is flushed. This function may choose to flush
- the entire cache if that is more efficient than flushing the specified range. If
- Length is 0, the no cache lines are flushed. Address is returned.
- This function is only available on Itanium processors.
-
- If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
-
- @param Address The base address of the instruction lines to invalidate. If
- the CPU is in a physical addressing mode, then Address is a
- physical address. If the CPU is in a virtual addressing mode,
- then Address is a virtual address.
-
- @param Length The number of bytes to invalidate from the instruction cache.
-
- @return Address.
-
-**/
-VOID *
-EFIAPI
-AsmFlushCacheRange (
- IN VOID *Address,
- IN UINTN Length
- );
-
-
-/**
- Executes an FC instruction.
- Executes an FC instruction on the cache line specified by Address.
- The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
- An implementation may flush a larger region. This function is only available on Itanium processors.
-
- @param Address The Address of cache line to be flushed.
-
- @return The address of FC instruction executed.
-
-**/
-UINT64
-EFIAPI
-AsmFc (
- IN UINT64 Address
- );
-
-
-/**
- Executes an FC.I instruction.
- Executes an FC.I instruction on the cache line specified by Address.
- The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
- An implementation may flush a larger region. This function is only available on Itanium processors.
-
- @param Address The Address of cache line to be flushed.
-
- @return The address of the FC.I instruction executed.
-
-**/
-UINT64
-EFIAPI
-AsmFci (
- IN UINT64 Address
- );
-
-
-/**
- Reads the current value of a Processor Identifier Register (CPUID).
-
- Reads and returns the current value of Processor Identifier Register specified by Index.
- The Index of largest implemented CPUID (One less than the number of implemented CPUID
- registers) is determined by CPUID [3] bits {7:0}.
- No parameter checking is performed on Index. If the Index value is beyond the
- implemented CPUID register range, a Reserved Register/Field fault may occur. The caller
- must either guarantee that Index is valid, or the caller must set up fault handlers to
- catch the faults. This function is only available on Itanium processors.
-
- @param Index The 8-bit Processor Identifier Register index to read.
-
- @return The current value of Processor Identifier Register specified by Index.
-
-**/
-UINT64
-EFIAPI
-AsmReadCpuid (
- IN UINT8 Index
- );
-
-
-/**
- Reads the current value of 64-bit Processor Status Register (PSR).
- This function is only available on Itanium processors.
-
- @return The current value of PSR.
-
-**/
-UINT64
-EFIAPI
-AsmReadPsr (
- VOID
- );
-
-
-/**
- Writes the current value of 64-bit Processor Status Register (PSR).
-
- No parameter checking is performed on Value. All bits of Value corresponding to
- reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.
- The caller must either guarantee that Value is valid, or the caller must set up
- fault handlers to catch the faults. This function is only available on Itanium processors.
-
- @param Value The 64-bit value to write to PSR.
-
- @return The 64-bit value written to the PSR.
-
-**/
-UINT64
-EFIAPI
-AsmWritePsr (
- IN UINT64 Value
- );
-
-
-/**
- Reads the current value of 64-bit Kernel Register #0 (KR0).
-
- Reads and returns the current value of KR0.
- This function is only available on Itanium processors.
-
- @return The current value of KR0.
-
-**/
-UINT64
-EFIAPI
-AsmReadKr0 (
- VOID
- );
-
-
-/**
- Reads the current value of 64-bit Kernel Register #1 (KR1).
-
- Reads and returns the current value of KR1.
- This function is only available on Itanium processors.
-
- @return The current value of KR1.
-
-**/
-UINT64
-EFIAPI
-AsmReadKr1 (
- VOID
- );
-
-
-/**
- Reads the current value of 64-bit Kernel Register #2 (KR2).
-
- Reads and returns the current value of KR2.
- This function is only available on Itanium processors.
-
- @return The current value of KR2.
-
-**/
-UINT64
-EFIAPI
-AsmReadKr2 (
- VOID
- );
-
-
-/**
- Reads the current value of 64-bit Kernel Register #3 (KR3).
-
- Reads and returns the current value of KR3.
- This function is only available on Itanium processors.
-
- @return The current value of KR3.
-
-**/
-UINT64
-EFIAPI
-AsmReadKr3 (
- VOID
- );
-
-
-/**
- Reads the current value of 64-bit Kernel Register #4 (KR4).
-
- Reads and returns the current value of KR4.
- This function is only available on Itanium processors.
-
- @return The current value of KR4.
-
-**/
-UINT64
-EFIAPI
-AsmReadKr4 (
- VOID
- );
-
-
-/**
- Reads the current value of 64-bit Kernel Register #5 (KR5).
-
- Reads and returns the current value of KR5.
- This function is only available on Itanium processors.
-
- @return The current value of KR5.
-
-**/
-UINT64
-EFIAPI
-AsmReadKr5 (
- VOID
- );
-
-
-/**
- Reads the current value of 64-bit Kernel Register #6 (KR6).
-
- Reads and returns the current value of KR6.
- This function is only available on Itanium processors.
-
- @return The current value of KR6.
-
-**/
-UINT64
-EFIAPI
-AsmReadKr6 (
- VOID
- );
-
-
-/**
- Reads the current value of 64-bit Kernel Register #7 (KR7).
-
- Reads and returns the current value of KR7.
- This function is only available on Itanium processors.
-
- @return The current value of KR7.
-
-**/
-UINT64
-EFIAPI
-AsmReadKr7 (
- VOID
- );
-
-
-/**
- Write the current value of 64-bit Kernel Register #0 (KR0).
-
- Writes the current value of KR0. The 64-bit value written to
- the KR0 is returned. This function is only available on Itanium processors.
-
- @param Value The 64-bit value to write to KR0.
-
- @return The 64-bit value written to the KR0.
-
-**/
-UINT64
-EFIAPI
-AsmWriteKr0 (
- IN UINT64 Value
- );
-
-
-/**
- Write the current value of 64-bit Kernel Register #1 (KR1).
-
- Writes the current value of KR1. The 64-bit value written to
- the KR1 is returned. This function is only available on Itanium processors.
-
- @param Value The 64-bit value to write to KR1.
-
- @return The 64-bit value written to the KR1.
-
-**/
-UINT64
-EFIAPI
-AsmWriteKr1 (
- IN UINT64 Value
- );
-
-
-/**
- Write the current value of 64-bit Kernel Register #2 (KR2).
-
- Writes the current value of KR2. The 64-bit value written to
- the KR2 is returned. This function is only available on Itanium processors.
-
- @param Value The 64-bit value to write to KR2.
-
- @return The 64-bit value written to the KR2.
-
-**/
-UINT64
-EFIAPI
-AsmWriteKr2 (
- IN UINT64 Value
- );
-
-
-/**
- Write the current value of 64-bit Kernel Register #3 (KR3).
-
- Writes the current value of KR3. The 64-bit value written to
- the KR3 is returned. This function is only available on Itanium processors.
-
- @param Value The 64-bit value to write to KR3.
-
- @return The 64-bit value written to the KR3.
-
-**/
-UINT64
-EFIAPI
-AsmWriteKr3 (
- IN UINT64 Value
- );
-
-
-/**
- Write the current value of 64-bit Kernel Register #4 (KR4).
-
- Writes the current value of KR4. The 64-bit value written to
- the KR4 is returned. This function is only available on Itanium processors.
-
- @param Value The 64-bit value to write to KR4.
-
- @return The 64-bit value written to the KR4.
-
-**/
-UINT64
-EFIAPI
-AsmWriteKr4 (
- IN UINT64 Value
- );
-
-
-/**
- Write the current value of 64-bit Kernel Register #5 (KR5).
-
- Writes the current value of KR5. The 64-bit value written to
- the KR5 is returned. This function is only available on Itanium processors.
-
- @param Value The 64-bit value to write to KR5.
-
- @return The 64-bit value written to the KR5.
-
-**/
-UINT64
-EFIAPI
-AsmWriteKr5 (
- IN UINT64 Value
- );
-
-
-/**
- Write the current value of 64-bit Kernel Register #6 (KR6).
-
- Writes the current value of KR6. The 64-bit value written to
- the KR6 is returned. This function is only available on Itanium processors.
-
- @param Value The 64-bit value to write to KR6.
-
- @return The 64-bit value written to the KR6.
-
-**/
-UINT64
-EFIAPI
-AsmWriteKr6 (
- IN UINT64 Value
- );
-
-
-/**
- Write the current value of 64-bit Kernel Register #7 (KR7).
-
- Writes the current value of KR7. The 64-bit value written to
- the KR7 is returned. This function is only available on Itanium processors.
-
- @param Value The 64-bit value to write to KR7.
-
- @return The 64-bit value written to the KR7.
-
-**/
-UINT64
-EFIAPI
-AsmWriteKr7 (
- IN UINT64 Value
- );
-
-
-/**
- Reads the current value of Interval Timer Counter Register (ITC).
-
- Reads and returns the current value of ITC.
- This function is only available on Itanium processors.
-
- @return The current value of ITC.
-
-**/
-UINT64
-EFIAPI
-AsmReadItc (
- VOID
- );
-
-
-/**
- Reads the current value of Interval Timer Vector Register (ITV).
-
- Reads and returns the current value of ITV.
- This function is only available on Itanium processors.
-
- @return The current value of ITV.
-
-**/
-UINT64
-EFIAPI
-AsmReadItv (
- VOID
- );
-
-
-/**
- Reads the current value of Interval Timer Match Register (ITM).
-
- Reads and returns the current value of ITM.
- This function is only available on Itanium processors.
-
- @return The current value of ITM.
-**/
-UINT64
-EFIAPI
-AsmReadItm (
- VOID
- );
-
-
-/**
- Writes the current value of 64-bit Interval Timer Counter Register (ITC).
-
- Writes the current value of ITC. The 64-bit value written to the ITC is returned.
- This function is only available on Itanium processors.
-
- @param Value The 64-bit value to write to ITC.
-
- @return The 64-bit value written to the ITC.
-
-**/
-UINT64
-EFIAPI
-AsmWriteItc (
- IN UINT64 Value
- );
-
-
-/**
- Writes the current value of 64-bit Interval Timer Match Register (ITM).
-
- Writes the current value of ITM. The 64-bit value written to the ITM is returned.
- This function is only available on Itanium processors.
-
- @param Value The 64-bit value to write to ITM.
-
- @return The 64-bit value written to the ITM.
-
-**/
-UINT64
-EFIAPI
-AsmWriteItm (
- IN UINT64 Value
- );
-
-
-/**
- Writes the current value of 64-bit Interval Timer Vector Register (ITV).
-
- Writes the current value of ITV. The 64-bit value written to the ITV is returned.
- No parameter checking is performed on Value. All bits of Value corresponding to
- reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.
- The caller must either guarantee that Value is valid, or the caller must set up
- fault handlers to catch the faults.
- This function is only available on Itanium processors.
-
- @param Value The 64-bit value to write to ITV.
-
- @return The 64-bit value written to the ITV.
-
-**/
-UINT64
-EFIAPI
-AsmWriteItv (
- IN UINT64 Value
- );
-
-
-/**
- Reads the current value of Default Control Register (DCR).
-
- Reads and returns the current value of DCR. This function is only available on Itanium processors.
-
- @return The current value of DCR.
-
-**/
-UINT64
-EFIAPI
-AsmReadDcr (
- VOID
- );
-
-
-/**
- Reads the current value of Interruption Vector Address Register (IVA).
-
- Reads and returns the current value of IVA. This function is only available on Itanium processors.
-
- @return The current value of IVA.
-**/
-UINT64
-EFIAPI
-AsmReadIva (
- VOID
- );
-
-
-/**
- Reads the current value of Page Table Address Register (PTA).
-
- Reads and returns the current value of PTA. This function is only available on Itanium processors.
-
- @return The current value of PTA.
-
-**/
-UINT64
-EFIAPI
-AsmReadPta (
- VOID
- );
-
-
-/**
- Writes the current value of 64-bit Default Control Register (DCR).
-
- Writes the current value of DCR. The 64-bit value written to the DCR is returned.
- No parameter checking is performed on Value. All bits of Value corresponding to
- reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
- The caller must either guarantee that Value is valid, or the caller must set up
- fault handlers to catch the faults.
- This function is only available on Itanium processors.
-
- @param Value The 64-bit value to write to DCR.
-
- @return The 64-bit value written to the DCR.
-
-**/
-UINT64
-EFIAPI
-AsmWriteDcr (
- IN UINT64 Value
- );
-
-
-/**
- Writes the current value of 64-bit Interruption Vector Address Register (IVA).
-
- Writes the current value of IVA. The 64-bit value written to the IVA is returned.
- The size of vector table is 32 K bytes and is 32 K bytes aligned
- the low 15 bits of Value is ignored when written.
- This function is only available on Itanium processors.
-
- @param Value The 64-bit value to write to IVA.
-
- @return The 64-bit value written to the IVA.
-
-**/
-UINT64
-EFIAPI
-AsmWriteIva (
- IN UINT64 Value
- );
-
-
-/**
- Writes the current value of 64-bit Page Table Address Register (PTA).
-
- Writes the current value of PTA. The 64-bit value written to the PTA is returned.
- No parameter checking is performed on Value. All bits of Value corresponding to
- reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
- The caller must either guarantee that Value is valid, or the caller must set up
- fault handlers to catch the faults.
- This function is only available on Itanium processors.
-
- @param Value The 64-bit value to write to PTA.
-
- @return The 64-bit value written to the PTA.
-**/
-UINT64
-EFIAPI
-AsmWritePta (
- IN UINT64 Value
- );
-
-
-/**
- Reads the current value of Local Interrupt ID Register (LID).
-
- Reads and returns the current value of LID. This function is only available on Itanium processors.
-
- @return The current value of LID.
-
-**/
-UINT64
-EFIAPI
-AsmReadLid (
- VOID
- );
-
-
-/**
- Reads the current value of External Interrupt Vector Register (IVR).
-
- Reads and returns the current value of IVR. This function is only available on Itanium processors.
-
- @return The current value of IVR.
-
-**/
-UINT64
-EFIAPI
-AsmReadIvr (
- VOID
- );
-
-
-/**
- Reads the current value of Task Priority Register (TPR).
-
- Reads and returns the current value of TPR. This function is only available on Itanium processors.
-
- @return The current value of TPR.
-
-**/
-UINT64
-EFIAPI
-AsmReadTpr (
- VOID
- );
-
-
-/**
- Reads the current value of External Interrupt Request Register #0 (IRR0).
-
- Reads and returns the current value of IRR0. This function is only available on Itanium processors.
-
- @return The current value of IRR0.
-
-**/
-UINT64
-EFIAPI
-AsmReadIrr0 (
- VOID
- );
-
-
-/**
- Reads the current value of External Interrupt Request Register #1 (IRR1).
-
- Reads and returns the current value of IRR1. This function is only available on Itanium processors.
-
- @return The current value of IRR1.
-
-**/
-UINT64
-EFIAPI
-AsmReadIrr1 (
- VOID
- );
-
-
-/**
- Reads the current value of External Interrupt Request Register #2 (IRR2).
-
- Reads and returns the current value of IRR2. This function is only available on Itanium processors.
-
- @return The current value of IRR2.
-
-**/
-UINT64
-EFIAPI
-AsmReadIrr2 (
- VOID
- );
-
-
-/**
- Reads the current value of External Interrupt Request Register #3 (IRR3).
-
- Reads and returns the current value of IRR3. This function is only available on Itanium processors.
-
- @return The current value of IRR3.
-
-**/
-UINT64
-EFIAPI
-AsmReadIrr3 (
- VOID
- );
-
-
-/**
- Reads the current value of Performance Monitor Vector Register (PMV).
-
- Reads and returns the current value of PMV. This function is only available on Itanium processors.
-
- @return The current value of PMV.
-
-**/
-UINT64
-EFIAPI
-AsmReadPmv (
- VOID
- );
-
-
-/**
- Reads the current value of Corrected Machine Check Vector Register (CMCV).
-
- Reads and returns the current value of CMCV. This function is only available on Itanium processors.
-
- @return The current value of CMCV.
-
-**/
-UINT64
-EFIAPI
-AsmReadCmcv (
- VOID
- );
-
-
-/**
- Reads the current value of Local Redirection Register #0 (LRR0).
-
- Reads and returns the current value of LRR0. This function is only available on Itanium processors.
-
- @return The current value of LRR0.
-
-**/
-UINT64
-EFIAPI
-AsmReadLrr0 (
- VOID
- );
-
-
-/**
- Reads the current value of Local Redirection Register #1 (LRR1).
-
- Reads and returns the current value of LRR1. This function is only available on Itanium processors.
-
- @return The current value of LRR1.
-
-**/
-UINT64
-EFIAPI
-AsmReadLrr1 (
- VOID
- );
-
-
-/**
- Writes the current value of 64-bit Page Local Interrupt ID Register (LID).
-
- Writes the current value of LID. The 64-bit value written to the LID is returned.
- No parameter checking is performed on Value. All bits of Value corresponding to
- reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.
- The caller must either guarantee that Value is valid, or the caller must set up
- fault handlers to catch the faults.
- This function is only available on Itanium processors.
-
- @param Value The 64-bit value to write to LID.
-
- @return The 64-bit value written to the LID.
-
-**/
-UINT64
-EFIAPI
-AsmWriteLid (
- IN UINT64 Value
- );
-
-
-/**
- Writes the current value of 64-bit Task Priority Register (TPR).
-
- Writes the current value of TPR. The 64-bit value written to the TPR is returned.
- No parameter checking is performed on Value. All bits of Value corresponding to
- reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.
- The caller must either guarantee that Value is valid, or the caller must set up
- fault handlers to catch the faults.
- This function is only available on Itanium processors.
-
- @param Value The 64-bit value to write to TPR.
-
- @return The 64-bit value written to the TPR.
-
-**/
-UINT64
-EFIAPI
-AsmWriteTpr (
- IN UINT64 Value
- );
-
-
-/**
- Performs a write operation on End OF External Interrupt Register (EOI).
-
- Writes a value of 0 to the EOI Register. This function is only available on Itanium processors.
+ Ensures that no later instruction will execute speculatively, until all prior
+ instructions have completed.
**/
VOID
EFIAPI
-AsmWriteEoi (
+SpeculationBarrier (
VOID
);
+#if defined (MDE_CPU_X64) || defined (MDE_CPU_IA32)
/**
- Writes the current value of 64-bit Performance Monitor Vector Register (PMV).
+ The TDCALL instruction causes a VM exit to the Intel TDX module. It is
+ used to call guest-side Intel TDX functions, either local or a TD exit
+ to the host VMM, as selected by Leaf.
- Writes the current value of PMV. The 64-bit value written to the PMV is returned.
- No parameter checking is performed on Value. All bits of Value corresponding
- to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.
- The caller must either guarantee that Value is valid, or the caller must set up
- fault handlers to catch the faults.
- This function is only available on Itanium processors.
+ @param[in] Leaf Leaf number of TDCALL instruction
+ @param[in] Arg1 Arg1
+ @param[in] Arg2 Arg2
+ @param[in] Arg3 Arg3
+ @param[in,out] Results Returned result of the Leaf function
- @param Value The 64-bit value to write to PMV.
-
- @return The 64-bit value written to the PMV.
-
+ @return 0 A successful call
+ @return Other See individual leaf functions
**/
-UINT64
+UINTN
EFIAPI
-AsmWritePmv (
- IN UINT64 Value
+TdCall (
+ IN UINT64 Leaf,
+ IN UINT64 Arg1,
+ IN UINT64 Arg2,
+ IN UINT64 Arg3,
+ IN OUT VOID *Results
);
-
/**
- Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).
+ TDVMALL is a leaf function 0 for TDCALL. It helps invoke services from the
+ host VMM to pass/receive information.
- Writes the current value of CMCV. The 64-bit value written to the CMCV is returned.
- No parameter checking is performed on Value. All bits of Value corresponding
- to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.
- The caller must either guarantee that Value is valid, or the caller must set up
- fault handlers to catch the faults.
- This function is only available on Itanium processors.
+ @param[in] Leaf Number of sub-functions
+ @param[in] Arg1 Arg1
+ @param[in] Arg2 Arg2
+ @param[in] Arg3 Arg3
+ @param[in] Arg4 Arg4
+ @param[in,out] Results Returned result of the sub-function
- @param Value The 64-bit value to write to CMCV.
-
- @return The 64-bit value written to the CMCV.
+ @return 0 A successful call
+ @return Other See individual sub-functions
**/
-UINT64
+UINTN
EFIAPI
-AsmWriteCmcv (
- IN UINT64 Value
+TdVmCall (
+ IN UINT64 Leaf,
+ IN UINT64 Arg1,
+ IN UINT64 Arg2,
+ IN UINT64 Arg3,
+ IN UINT64 Arg4,
+ IN OUT VOID *Results
);
-
/**
- Writes the current value of 64-bit Local Redirection Register #0 (LRR0).
+ Probe if TD is enabled.
- Writes the current value of LRR0. The 64-bit value written to the LRR0 is returned.
- No parameter checking is performed on Value. All bits of Value corresponding
- to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.
- The caller must either guarantee that Value is valid, or the caller must set up
- fault handlers to catch the faults.
- This function is only available on Itanium processors.
-
- @param Value The 64-bit value to write to LRR0.
-
- @return The 64-bit value written to the LRR0.
-
+ @return TRUE TD is enabled.
+ @return FALSE TD is not enabled.
**/
-UINT64
+BOOLEAN
EFIAPI
-AsmWriteLrr0 (
- IN UINT64 Value
- );
-
-
-/**
- Writes the current value of 64-bit Local Redirection Register #1 (LRR1).
-
- Writes the current value of LRR1. The 64-bit value written to the LRR1 is returned.
- No parameter checking is performed on Value. All bits of Value corresponding
- to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.
- The caller must either guarantee that Value is valid, or the caller must
- set up fault handlers to catch the faults.
- This function is only available on Itanium processors.
-
- @param Value The 64-bit value to write to LRR1.
-
- @return The 64-bit value written to the LRR1.
-
-**/
-UINT64
-EFIAPI
-AsmWriteLrr1 (
- IN UINT64 Value
- );
-
-
-/**
- Reads the current value of Instruction Breakpoint Register (IBR).
-
- The Instruction Breakpoint Registers are used in pairs. The even numbered
- registers contain breakpoint addresses, and the odd numbered registers contain
- breakpoint mask conditions. At least four instruction registers pairs are implemented
- on all processor models. Implemented registers are contiguous starting with
- register 0. No parameter checking is performed on Index, and if the Index value
- is beyond the implemented IBR register range, a Reserved Register/Field fault may
- occur. The caller must either guarantee that Index is valid, or the caller must
- set up fault handlers to catch the faults.
- This function is only available on Itanium processors.
-
- @param Index The 8-bit Instruction Breakpoint Register index to read.
-
- @return The current value of Instruction Breakpoint Register specified by Index.
-
-**/
-UINT64
-EFIAPI
-AsmReadIbr (
- IN UINT8 Index
- );
-
-
-/**
- Reads the current value of Data Breakpoint Register (DBR).
-
- The Data Breakpoint Registers are used in pairs. The even numbered registers
- contain breakpoint addresses, and odd numbered registers contain breakpoint
- mask conditions. At least four data registers pairs are implemented on all processor
- models. Implemented registers are contiguous starting with register 0.
- No parameter checking is performed on Index. If the Index value is beyond
- the implemented DBR register range, a Reserved Register/Field fault may occur.
- The caller must either guarantee that Index is valid, or the caller must set up
- fault handlers to catch the faults.
- This function is only available on Itanium processors.
-
- @param Index The 8-bit Data Breakpoint Register index to read.
-
- @return The current value of Data Breakpoint Register specified by Index.
-
-**/
-UINT64
-EFIAPI
-AsmReadDbr (
- IN UINT8 Index
- );
-
-
-/**
- Reads the current value of Performance Monitor Configuration Register (PMC).
-
- All processor implementations provide at least four performance counters
- (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow
- status registers (PMC [0]... PMC [3]). Processor implementations may provide
- additional implementation-dependent PMC and PMD to increase the number of
- 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD
- register set is implementation dependent. No parameter checking is performed
- on Index. If the Index value is beyond the implemented PMC register range,
- zero value will be returned.
- This function is only available on Itanium processors.
-
- @param Index The 8-bit Performance Monitor Configuration Register index to read.
-
- @return The current value of Performance Monitor Configuration Register
- specified by Index.
-
-**/
-UINT64
-EFIAPI
-AsmReadPmc (
- IN UINT8 Index
- );
-
-
-/**
- Reads the current value of Performance Monitor Data Register (PMD).
-
- All processor implementations provide at least 4 performance counters
- (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter
- overflow status registers (PMC [0]... PMC [3]). Processor implementations may
- provide additional implementation-dependent PMC and PMD to increase the number
- of 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD
- register set is implementation dependent. No parameter checking is performed
- on Index. If the Index value is beyond the implemented PMD register range,
- zero value will be returned.
- This function is only available on Itanium processors.
-
- @param Index The 8-bit Performance Monitor Data Register index to read.
-
- @return The current value of Performance Monitor Data Register specified by Index.
-
-**/
-UINT64
-EFIAPI
-AsmReadPmd (
- IN UINT8 Index
- );
-
-
-/**
- Writes the current value of 64-bit Instruction Breakpoint Register (IBR).
-
- Writes current value of Instruction Breakpoint Register specified by Index.
- The Instruction Breakpoint Registers are used in pairs. The even numbered
- registers contain breakpoint addresses, and odd numbered registers contain
- breakpoint mask conditions. At least four instruction registers pairs are implemented
- on all processor models. Implemented registers are contiguous starting with
- register 0. No parameter checking is performed on Index. If the Index value
- is beyond the implemented IBR register range, a Reserved Register/Field fault may
- occur. The caller must either guarantee that Index is valid, or the caller must
- set up fault handlers to catch the faults.
- This function is only available on Itanium processors.
-
- @param Index The 8-bit Instruction Breakpoint Register index to write.
- @param Value The 64-bit value to write to IBR.
-
- @return The 64-bit value written to the IBR.
-
-**/
-UINT64
-EFIAPI
-AsmWriteIbr (
- IN UINT8 Index,
- IN UINT64 Value
- );
-
-
-/**
- Writes the current value of 64-bit Data Breakpoint Register (DBR).
-
- Writes current value of Data Breakpoint Register specified by Index.
- The Data Breakpoint Registers are used in pairs. The even numbered registers
- contain breakpoint addresses, and odd numbered registers contain breakpoint
- mask conditions. At least four data registers pairs are implemented on all processor
- models. Implemented registers are contiguous starting with register 0. No parameter
- checking is performed on Index. If the Index value is beyond the implemented
- DBR register range, a Reserved Register/Field fault may occur. The caller must
- either guarantee that Index is valid, or the caller must set up fault handlers to
- catch the faults.
- This function is only available on Itanium processors.
-
- @param Index The 8-bit Data Breakpoint Register index to write.
- @param Value The 64-bit value to write to DBR.
-
- @return The 64-bit value written to the DBR.
-
-**/
-UINT64
-EFIAPI
-AsmWriteDbr (
- IN UINT8 Index,
- IN UINT64 Value
- );
-
-
-/**
- Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).
-
- Writes current value of Performance Monitor Configuration Register specified by Index.
- All processor implementations provide at least four performance counters
- (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow status
- registers (PMC [0]... PMC [3]). Processor implementations may provide additional
- implementation-dependent PMC and PMD to increase the number of 'generic' performance
- counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation
- dependent. No parameter checking is performed on Index. If the Index value is
- beyond the implemented PMC register range, the write is ignored.
- This function is only available on Itanium processors.
-
- @param Index The 8-bit Performance Monitor Configuration Register index to write.
- @param Value The 64-bit value to write to PMC.
-
- @return The 64-bit value written to the PMC.
-
-**/
-UINT64
-EFIAPI
-AsmWritePmc (
- IN UINT8 Index,
- IN UINT64 Value
- );
-
-
-/**
- Writes the current value of 64-bit Performance Monitor Data Register (PMD).
-
- Writes current value of Performance Monitor Data Register specified by Index.
- All processor implementations provide at least four performance counters
- (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow
- status registers (PMC [0]... PMC [3]). Processor implementations may provide
- additional implementation-dependent PMC and PMD to increase the number of 'generic'
- performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set
- is implementation dependent. No parameter checking is performed on Index. If the
- Index value is beyond the implemented PMD register range, the write is ignored.
- This function is only available on Itanium processors.
-
- @param Index The 8-bit Performance Monitor Data Register index to write.
- @param Value The 64-bit value to write to PMD.
-
- @return The 64-bit value written to the PMD.
-
-**/
-UINT64
-EFIAPI
-AsmWritePmd (
- IN UINT8 Index,
- IN UINT64 Value
- );
-
-
-/**
- Reads the current value of 64-bit Global Pointer (GP).
-
- Reads and returns the current value of GP.
- This function is only available on Itanium processors.
-
- @return The current value of GP.
-
-**/
-UINT64
-EFIAPI
-AsmReadGp (
+TdIsEnabled (
VOID
);
+#endif
+
+#if defined (MDE_CPU_X64)
+//
+// The page size for the PVALIDATE instruction
+//
+typedef enum {
+ PvalidatePageSize4K = 0,
+ PvalidatePageSize2MB,
+} PVALIDATE_PAGE_SIZE;
+
+//
+// PVALIDATE Return Code.
+//
+#define PVALIDATE_RET_SUCCESS 0
+#define PVALIDATE_RET_FAIL_INPUT 1
+#define PVALIDATE_RET_SIZE_MISMATCH 6
+
+//
+// The PVALIDATE instruction did not make any changes to the RMP entry.
+//
+#define PVALIDATE_RET_NO_RMPUPDATE 255
/**
- Write the current value of 64-bit Global Pointer (GP).
+ Execute a PVALIDATE instruction to validate or to rescinds validation of a guest
+ page's RMP entry.
- Writes the current value of GP. The 64-bit value written to the GP is returned.
- No parameter checking is performed on Value.
- This function is only available on Itanium processors.
+ The instruction is available only when CPUID Fn8000_001F_EAX[SNP]=1.
- @param Value The 64-bit value to write to GP.
+ The function is available on X64.
- @return The 64-bit value written to the GP.
+ @param[in] PageSize The page size to use.
+ @param[in] Validate If TRUE, validate the guest virtual address
+ otherwise invalidate the guest virtual address.
+ @param[in] Address The guest virtual address.
+ @retval PVALIDATE_RET_SUCCESS The PVALIDATE instruction succeeded, and
+ updated the RMP entry.
+ @retval PVALIDATE_RET_NO_RMPUPDATE The PVALIDATE instruction succeeded, but
+ did not update the RMP entry.
+ @return Failure code from the PVALIDATE
+ instruction.
**/
-UINT64
+UINT32
EFIAPI
-AsmWriteGp (
- IN UINT64 Value
+AsmPvalidate (
+ IN PVALIDATE_PAGE_SIZE PageSize,
+ IN BOOLEAN Validate,
+ IN PHYSICAL_ADDRESS Address
);
+//
+// RDX settings for RMPADJUST
+//
+#define RMPADJUST_VMPL_MAX 3
+#define RMPADJUST_VMPL_MASK 0xFF
+#define RMPADJUST_VMPL_SHIFT 0
+#define RMPADJUST_PERMISSION_MASK_MASK 0xFF
+#define RMPADJUST_PERMISSION_MASK_SHIFT 8
+#define RMPADJUST_VMSA_PAGE_BIT BIT16
/**
- Reads the current value of 64-bit Stack Pointer (SP).
+ Adjusts the permissions of an SEV-SNP guest page.
- Reads and returns the current value of SP.
- This function is only available on Itanium processors.
+ Executes a RMPADJUST instruction with the register state specified by Rax,
+ Rcx, and Rdx. Returns Eax. This function is only available on X64.
- @return The current value of SP.
+ The instruction is available only when CPUID Fn8000_001F_EAX[SNP]=1.
+ @param[in] Rax The value to load into RAX before executing the RMPADJUST
+ instruction.
+ @param[in] Rcx The value to load into RCX before executing the RMPADJUST
+ instruction.
+ @param[in] Rdx The value to load into RDX before executing the RMPADJUST
+ instruction.
+
+ @return Eax
**/
-UINT64
+UINT32
EFIAPI
-AsmReadSp (
- VOID
+AsmRmpAdjust (
+ IN UINT64 Rax,
+ IN UINT64 Rcx,
+ IN UINT64 Rdx
);
-
-///
-/// Valid Index value for AsmReadControlRegister().
-///
-#define IPF_CONTROL_REGISTER_DCR 0
-#define IPF_CONTROL_REGISTER_ITM 1
-#define IPF_CONTROL_REGISTER_IVA 2
-#define IPF_CONTROL_REGISTER_PTA 8
-#define IPF_CONTROL_REGISTER_IPSR 16
-#define IPF_CONTROL_REGISTER_ISR 17
-#define IPF_CONTROL_REGISTER_IIP 19
-#define IPF_CONTROL_REGISTER_IFA 20
-#define IPF_CONTROL_REGISTER_ITIR 21
-#define IPF_CONTROL_REGISTER_IIPA 22
-#define IPF_CONTROL_REGISTER_IFS 23
-#define IPF_CONTROL_REGISTER_IIM 24
-#define IPF_CONTROL_REGISTER_IHA 25
-#define IPF_CONTROL_REGISTER_LID 64
-#define IPF_CONTROL_REGISTER_IVR 65
-#define IPF_CONTROL_REGISTER_TPR 66
-#define IPF_CONTROL_REGISTER_EOI 67
-#define IPF_CONTROL_REGISTER_IRR0 68
-#define IPF_CONTROL_REGISTER_IRR1 69
-#define IPF_CONTROL_REGISTER_IRR2 70
-#define IPF_CONTROL_REGISTER_IRR3 71
-#define IPF_CONTROL_REGISTER_ITV 72
-#define IPF_CONTROL_REGISTER_PMV 73
-#define IPF_CONTROL_REGISTER_CMCV 74
-#define IPF_CONTROL_REGISTER_LRR0 80
-#define IPF_CONTROL_REGISTER_LRR1 81
-
-/**
- Reads a 64-bit control register.
-
- Reads and returns the control register specified by Index. The valid Index valued
- are defined above in "Related Definitions".
- If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only
- available on Itanium processors.
-
- @param Index The index of the control register to read.
-
- @return The control register specified by Index.
-
-**/
-UINT64
-EFIAPI
-AsmReadControlRegister (
- IN UINT64 Index
- );
-
-
-///
-/// Valid Index value for AsmReadApplicationRegister().
-///
-#define IPF_APPLICATION_REGISTER_K0 0
-#define IPF_APPLICATION_REGISTER_K1 1
-#define IPF_APPLICATION_REGISTER_K2 2
-#define IPF_APPLICATION_REGISTER_K3 3
-#define IPF_APPLICATION_REGISTER_K4 4
-#define IPF_APPLICATION_REGISTER_K5 5
-#define IPF_APPLICATION_REGISTER_K6 6
-#define IPF_APPLICATION_REGISTER_K7 7
-#define IPF_APPLICATION_REGISTER_RSC 16
-#define IPF_APPLICATION_REGISTER_BSP 17
-#define IPF_APPLICATION_REGISTER_BSPSTORE 18
-#define IPF_APPLICATION_REGISTER_RNAT 19
-#define IPF_APPLICATION_REGISTER_FCR 21
-#define IPF_APPLICATION_REGISTER_EFLAG 24
-#define IPF_APPLICATION_REGISTER_CSD 25
-#define IPF_APPLICATION_REGISTER_SSD 26
-#define IPF_APPLICATION_REGISTER_CFLG 27
-#define IPF_APPLICATION_REGISTER_FSR 28
-#define IPF_APPLICATION_REGISTER_FIR 29
-#define IPF_APPLICATION_REGISTER_FDR 30
-#define IPF_APPLICATION_REGISTER_CCV 32
-#define IPF_APPLICATION_REGISTER_UNAT 36
-#define IPF_APPLICATION_REGISTER_FPSR 40
-#define IPF_APPLICATION_REGISTER_ITC 44
-#define IPF_APPLICATION_REGISTER_PFS 64
-#define IPF_APPLICATION_REGISTER_LC 65
-#define IPF_APPLICATION_REGISTER_EC 66
-
-/**
- Reads a 64-bit application register.
-
- Reads and returns the application register specified by Index. The valid Index
- valued are defined above in "Related Definitions".
- If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only
- available on Itanium processors.
-
- @param Index The index of the application register to read.
-
- @return The application register specified by Index.
-
-**/
-UINT64
-EFIAPI
-AsmReadApplicationRegister (
- IN UINT64 Index
- );
-
-
-/**
- Reads the current value of a Machine Specific Register (MSR).
-
- Reads and returns the current value of the Machine Specific Register specified by Index. No
- parameter checking is performed on Index, and if the Index value is beyond the implemented MSR
- register range, a Reserved Register/Field fault may occur. The caller must either guarantee that
- Index is valid, or the caller must set up fault handlers to catch the faults. This function is
- only available on Itanium processors.
-
- @param Index The 8-bit Machine Specific Register index to read.
-
- @return The current value of the Machine Specific Register specified by Index.
-
-**/
-UINT64
-EFIAPI
-AsmReadMsr (
- IN UINT8 Index
- );
-
-
-/**
- Writes the current value of a Machine Specific Register (MSR).
-
- Writes Value to the Machine Specific Register specified by Index. Value is returned. No
- parameter checking is performed on Index, and if the Index value is beyond the implemented MSR
- register range, a Reserved Register/Field fault may occur. The caller must either guarantee that
- Index is valid, or the caller must set up fault handlers to catch the faults. This function is
- only available on Itanium processors.
-
- @param Index The 8-bit Machine Specific Register index to write.
- @param Value The 64-bit value to write to the Machine Specific Register.
-
- @return The 64-bit value to write to the Machine Specific Register.
-
-**/
-UINT64
-EFIAPI
-AsmWriteMsr (
- IN UINT8 Index,
- IN UINT64 Value
- );
-
-
-/**
- Determines if the CPU is currently executing in virtual, physical, or mixed mode.
-
- Determines the current execution mode of the CPU.
- If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.
- If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.
- If the CPU is not in physical mode or virtual mode, then it is in mixed mode,
- and -1 is returned.
- This function is only available on Itanium processors.
-
- @retval 1 The CPU is in virtual mode.
- @retval 0 The CPU is in physical mode.
- @retval -1 The CPU is in mixed mode.
-
-**/
-INT64
-EFIAPI
-AsmCpuVirtual (
- VOID
- );
-
-
-/**
- Makes a PAL procedure call.
-
- This is a wrapper function to make a PAL procedure call. Based on the Index
- value this API will make static or stacked PAL call. The following table
- describes the usage of PAL Procedure Index Assignment. Architected procedures
- may be designated as required or optional. If a PAL procedure is specified
- as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the
- Status field of the PAL_CALL_RETURN structure.
- This indicates that the procedure is not present in this PAL implementation.
- It is the caller's responsibility to check for this return code after calling
- any optional PAL procedure.
- No parameter checking is performed on the 5 input parameters, but there are
- some common rules that the caller should follow when making a PAL call. Any
- address passed to PAL as buffers for return parameters must be 8-byte aligned.
- Unaligned addresses may cause undefined results. For those parameters defined
- as reserved or some fields defined as reserved must be zero filled or the invalid
- argument return value may be returned or undefined result may occur during the
- execution of the procedure. If the PalEntryPoint does not point to a valid
- PAL entry point then the system behavior is undefined. This function is only
- available on Itanium processors.
-
- @param PalEntryPoint The PAL procedure calls entry point.
- @param Index The PAL procedure Index number.
- @param Arg2 The 2nd parameter for PAL procedure calls.
- @param Arg3 The 3rd parameter for PAL procedure calls.
- @param Arg4 The 4th parameter for PAL procedure calls.
-
- @return structure returned from the PAL Call procedure, including the status and return value.
-
-**/
-PAL_CALL_RETURN
-EFIAPI
-AsmPalCall (
- IN UINT64 PalEntryPoint,
- IN UINT64 Index,
- IN UINT64 Arg2,
- IN UINT64 Arg3,
- IN UINT64 Arg4
- );
#endif
#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
@@ -6459,21 +4977,21 @@
///
typedef union {
struct {
- UINT32 CF:1; ///< Carry Flag.
- UINT32 Reserved_0:1; ///< Reserved.
- UINT32 PF:1; ///< Parity Flag.
- UINT32 Reserved_1:1; ///< Reserved.
- UINT32 AF:1; ///< Auxiliary Carry Flag.
- UINT32 Reserved_2:1; ///< Reserved.
- UINT32 ZF:1; ///< Zero Flag.
- UINT32 SF:1; ///< Sign Flag.
- UINT32 TF:1; ///< Trap Flag.
- UINT32 IF:1; ///< Interrupt Enable Flag.
- UINT32 DF:1; ///< Direction Flag.
- UINT32 OF:1; ///< Overflow Flag.
- UINT32 IOPL:2; ///< I/O Privilege Level.
- UINT32 NT:1; ///< Nested Task.
- UINT32 Reserved_3:1; ///< Reserved.
+ UINT32 CF : 1; ///< Carry Flag.
+ UINT32 Reserved_0 : 1; ///< Reserved.
+ UINT32 PF : 1; ///< Parity Flag.
+ UINT32 Reserved_1 : 1; ///< Reserved.
+ UINT32 AF : 1; ///< Auxiliary Carry Flag.
+ UINT32 Reserved_2 : 1; ///< Reserved.
+ UINT32 ZF : 1; ///< Zero Flag.
+ UINT32 SF : 1; ///< Sign Flag.
+ UINT32 TF : 1; ///< Trap Flag.
+ UINT32 IF : 1; ///< Interrupt Enable Flag.
+ UINT32 DF : 1; ///< Direction Flag.
+ UINT32 OF : 1; ///< Overflow Flag.
+ UINT32 IOPL : 2; ///< I/O Privilege Level.
+ UINT32 NT : 1; ///< Nested Task.
+ UINT32 Reserved_3 : 1; ///< Reserved.
} Bits;
UINT16 Uint16;
} IA32_FLAGS16;
@@ -6485,30 +5003,30 @@
///
typedef union {
struct {
- UINT32 CF:1; ///< Carry Flag.
- UINT32 Reserved_0:1; ///< Reserved.
- UINT32 PF:1; ///< Parity Flag.
- UINT32 Reserved_1:1; ///< Reserved.
- UINT32 AF:1; ///< Auxiliary Carry Flag.
- UINT32 Reserved_2:1; ///< Reserved.
- UINT32 ZF:1; ///< Zero Flag.
- UINT32 SF:1; ///< Sign Flag.
- UINT32 TF:1; ///< Trap Flag.
- UINT32 IF:1; ///< Interrupt Enable Flag.
- UINT32 DF:1; ///< Direction Flag.
- UINT32 OF:1; ///< Overflow Flag.
- UINT32 IOPL:2; ///< I/O Privilege Level.
- UINT32 NT:1; ///< Nested Task.
- UINT32 Reserved_3:1; ///< Reserved.
- UINT32 RF:1; ///< Resume Flag.
- UINT32 VM:1; ///< Virtual 8086 Mode.
- UINT32 AC:1; ///< Alignment Check.
- UINT32 VIF:1; ///< Virtual Interrupt Flag.
- UINT32 VIP:1; ///< Virtual Interrupt Pending.
- UINT32 ID:1; ///< ID Flag.
- UINT32 Reserved_4:10; ///< Reserved.
+ UINT32 CF : 1; ///< Carry Flag.
+ UINT32 Reserved_0 : 1; ///< Reserved.
+ UINT32 PF : 1; ///< Parity Flag.
+ UINT32 Reserved_1 : 1; ///< Reserved.
+ UINT32 AF : 1; ///< Auxiliary Carry Flag.
+ UINT32 Reserved_2 : 1; ///< Reserved.
+ UINT32 ZF : 1; ///< Zero Flag.
+ UINT32 SF : 1; ///< Sign Flag.
+ UINT32 TF : 1; ///< Trap Flag.
+ UINT32 IF : 1; ///< Interrupt Enable Flag.
+ UINT32 DF : 1; ///< Direction Flag.
+ UINT32 OF : 1; ///< Overflow Flag.
+ UINT32 IOPL : 2; ///< I/O Privilege Level.
+ UINT32 NT : 1; ///< Nested Task.
+ UINT32 Reserved_3 : 1; ///< Reserved.
+ UINT32 RF : 1; ///< Resume Flag.
+ UINT32 VM : 1; ///< Virtual 8086 Mode.
+ UINT32 AC : 1; ///< Alignment Check.
+ UINT32 VIF : 1; ///< Virtual Interrupt Flag.
+ UINT32 VIP : 1; ///< Virtual Interrupt Pending.
+ UINT32 ID : 1; ///< ID Flag.
+ UINT32 Reserved_4 : 10; ///< Reserved.
} Bits;
- UINTN UintN;
+ UINTN UintN;
} IA32_EFLAGS32;
///
@@ -6518,22 +5036,22 @@
///
typedef union {
struct {
- UINT32 PE:1; ///< Protection Enable.
- UINT32 MP:1; ///< Monitor Coprocessor.
- UINT32 EM:1; ///< Emulation.
- UINT32 TS:1; ///< Task Switched.
- UINT32 ET:1; ///< Extension Type.
- UINT32 NE:1; ///< Numeric Error.
- UINT32 Reserved_0:10; ///< Reserved.
- UINT32 WP:1; ///< Write Protect.
- UINT32 Reserved_1:1; ///< Reserved.
- UINT32 AM:1; ///< Alignment Mask.
- UINT32 Reserved_2:10; ///< Reserved.
- UINT32 NW:1; ///< Mot Write-through.
- UINT32 CD:1; ///< Cache Disable.
- UINT32 PG:1; ///< Paging.
+ UINT32 PE : 1; ///< Protection Enable.
+ UINT32 MP : 1; ///< Monitor Coprocessor.
+ UINT32 EM : 1; ///< Emulation.
+ UINT32 TS : 1; ///< Task Switched.
+ UINT32 ET : 1; ///< Extension Type.
+ UINT32 NE : 1; ///< Numeric Error.
+ UINT32 Reserved_0 : 10; ///< Reserved.
+ UINT32 WP : 1; ///< Write Protect.
+ UINT32 Reserved_1 : 1; ///< Reserved.
+ UINT32 AM : 1; ///< Alignment Mask.
+ UINT32 Reserved_2 : 10; ///< Reserved.
+ UINT32 NW : 1; ///< Mot Write-through.
+ UINT32 CD : 1; ///< Cache Disable.
+ UINT32 PG : 1; ///< Paging.
} Bits;
- UINTN UintN;
+ UINTN UintN;
} IA32_CR0;
///
@@ -6543,26 +5061,36 @@
///
typedef union {
struct {
- UINT32 VME:1; ///< Virtual-8086 Mode Extensions.
- UINT32 PVI:1; ///< Protected-Mode Virtual Interrupts.
- UINT32 TSD:1; ///< Time Stamp Disable.
- UINT32 DE:1; ///< Debugging Extensions.
- UINT32 PSE:1; ///< Page Size Extensions.
- UINT32 PAE:1; ///< Physical Address Extension.
- UINT32 MCE:1; ///< Machine Check Enable.
- UINT32 PGE:1; ///< Page Global Enable.
- UINT32 PCE:1; ///< Performance Monitoring Counter
- ///< Enable.
- UINT32 OSFXSR:1; ///< Operating System Support for
- ///< FXSAVE and FXRSTOR instructions
- UINT32 OSXMMEXCPT:1; ///< Operating System Support for
- ///< Unmasked SIMD Floating Point
- ///< Exceptions.
- UINT32 Reserved_0:2; ///< Reserved.
- UINT32 VMXE:1; ///< VMX Enable
- UINT32 Reserved_1:18; ///< Reserved.
+ UINT32 VME : 1; ///< Virtual-8086 Mode Extensions.
+ UINT32 PVI : 1; ///< Protected-Mode Virtual Interrupts.
+ UINT32 TSD : 1; ///< Time Stamp Disable.
+ UINT32 DE : 1; ///< Debugging Extensions.
+ UINT32 PSE : 1; ///< Page Size Extensions.
+ UINT32 PAE : 1; ///< Physical Address Extension.
+ UINT32 MCE : 1; ///< Machine Check Enable.
+ UINT32 PGE : 1; ///< Page Global Enable.
+ UINT32 PCE : 1; ///< Performance Monitoring Counter
+ ///< Enable.
+ UINT32 OSFXSR : 1; ///< Operating System Support for
+ ///< FXSAVE and FXRSTOR instructions
+ UINT32 OSXMMEXCPT : 1; ///< Operating System Support for
+ ///< Unmasked SIMD Floating Point
+ ///< Exceptions.
+ UINT32 UMIP : 1; ///< User-Mode Instruction Prevention.
+ UINT32 LA57 : 1; ///< Linear Address 57bit.
+ UINT32 VMXE : 1; ///< VMX Enable.
+ UINT32 SMXE : 1; ///< SMX Enable.
+ UINT32 Reserved_3 : 1; ///< Reserved.
+ UINT32 FSGSBASE : 1; ///< FSGSBASE Enable.
+ UINT32 PCIDE : 1; ///< PCID Enable.
+ UINT32 OSXSAVE : 1; ///< XSAVE and Processor Extended States Enable.
+ UINT32 Reserved_4 : 1; ///< Reserved.
+ UINT32 SMEP : 1; ///< SMEP Enable.
+ UINT32 SMAP : 1; ///< SMAP Enable.
+ UINT32 PKE : 1; ///< Protection-Key Enable.
+ UINT32 Reserved_5 : 9; ///< Reserved.
} Bits;
- UINTN UintN;
+ UINTN UintN;
} IA32_CR4;
///
@@ -6570,32 +5098,32 @@
///
typedef union {
struct {
- UINT32 LimitLow:16;
- UINT32 BaseLow:16;
- UINT32 BaseMid:8;
- UINT32 Type:4;
- UINT32 S:1;
- UINT32 DPL:2;
- UINT32 P:1;
- UINT32 LimitHigh:4;
- UINT32 AVL:1;
- UINT32 L:1;
- UINT32 DB:1;
- UINT32 G:1;
- UINT32 BaseHigh:8;
+ UINT32 LimitLow : 16;
+ UINT32 BaseLow : 16;
+ UINT32 BaseMid : 8;
+ UINT32 Type : 4;
+ UINT32 S : 1;
+ UINT32 DPL : 2;
+ UINT32 P : 1;
+ UINT32 LimitHigh : 4;
+ UINT32 AVL : 1;
+ UINT32 L : 1;
+ UINT32 DB : 1;
+ UINT32 G : 1;
+ UINT32 BaseHigh : 8;
} Bits;
- UINT64 Uint64;
+ UINT64 Uint64;
} IA32_SEGMENT_DESCRIPTOR;
///
/// Byte packed structure for an IDTR, GDTR, LDTR descriptor.
///
-#pragma pack (1)
+ #pragma pack (1)
typedef struct {
- UINT16 Limit;
- UINTN Base;
+ UINT16 Limit;
+ UINTN Base;
} IA32_DESCRIPTOR;
-#pragma pack ()
+ #pragma pack ()
#define IA32_IDT_GATE_TYPE_TASK 0x85
#define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86
@@ -6603,132 +5131,254 @@
#define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E
#define IA32_IDT_GATE_TYPE_TRAP_32 0x8F
+#define IA32_GDT_TYPE_TSS 0x9
+#define IA32_GDT_ALIGNMENT 8
-#if defined (MDE_CPU_IA32)
+ #if defined (MDE_CPU_IA32)
///
/// Byte packed structure for an IA-32 Interrupt Gate Descriptor.
///
typedef union {
struct {
- UINT32 OffsetLow:16; ///< Offset bits 15..0.
- UINT32 Selector:16; ///< Selector.
- UINT32 Reserved_0:8; ///< Reserved.
- UINT32 GateType:8; ///< Gate Type. See #defines above.
- UINT32 OffsetHigh:16; ///< Offset bits 31..16.
+ UINT32 OffsetLow : 16; ///< Offset bits 15..0.
+ UINT32 Selector : 16; ///< Selector.
+ UINT32 Reserved_0 : 8; ///< Reserved.
+ UINT32 GateType : 8; ///< Gate Type. See #defines above.
+ UINT32 OffsetHigh : 16; ///< Offset bits 31..16.
} Bits;
- UINT64 Uint64;
+ UINT64 Uint64;
} IA32_IDT_GATE_DESCRIPTOR;
-#endif
+ #pragma pack (1)
+//
+// IA32 Task-State Segment Definition
+//
+typedef struct {
+ UINT16 PreviousTaskLink;
+ UINT16 Reserved_2;
+ UINT32 ESP0;
+ UINT16 SS0;
+ UINT16 Reserved_10;
+ UINT32 ESP1;
+ UINT16 SS1;
+ UINT16 Reserved_18;
+ UINT32 ESP2;
+ UINT16 SS2;
+ UINT16 Reserved_26;
+ UINT32 CR3;
+ UINT32 EIP;
+ UINT32 EFLAGS;
+ UINT32 EAX;
+ UINT32 ECX;
+ UINT32 EDX;
+ UINT32 EBX;
+ UINT32 ESP;
+ UINT32 EBP;
+ UINT32 ESI;
+ UINT32 EDI;
+ UINT16 ES;
+ UINT16 Reserved_74;
+ UINT16 CS;
+ UINT16 Reserved_78;
+ UINT16 SS;
+ UINT16 Reserved_82;
+ UINT16 DS;
+ UINT16 Reserved_86;
+ UINT16 FS;
+ UINT16 Reserved_90;
+ UINT16 GS;
+ UINT16 Reserved_94;
+ UINT16 LDTSegmentSelector;
+ UINT16 Reserved_98;
+ UINT16 T;
+ UINT16 IOMapBaseAddress;
+} IA32_TASK_STATE_SEGMENT;
-#if defined (MDE_CPU_X64)
+typedef union {
+ struct {
+ UINT32 LimitLow : 16; ///< Segment Limit 15..00
+ UINT32 BaseLow : 16; ///< Base Address 15..00
+ UINT32 BaseMid : 8; ///< Base Address 23..16
+ UINT32 Type : 4; ///< Type (1 0 B 1)
+ UINT32 Reserved_43 : 1; ///< 0
+ UINT32 DPL : 2; ///< Descriptor Privilege Level
+ UINT32 P : 1; ///< Segment Present
+ UINT32 LimitHigh : 4; ///< Segment Limit 19..16
+ UINT32 AVL : 1; ///< Available for use by system software
+ UINT32 Reserved_52 : 2; ///< 0 0
+ UINT32 G : 1; ///< Granularity
+ UINT32 BaseHigh : 8; ///< Base Address 31..24
+ } Bits;
+ UINT64 Uint64;
+} IA32_TSS_DESCRIPTOR;
+ #pragma pack ()
+
+ #endif // defined (MDE_CPU_IA32)
+
+ #if defined (MDE_CPU_X64)
///
/// Byte packed structure for an x64 Interrupt Gate Descriptor.
///
typedef union {
struct {
- UINT32 OffsetLow:16; ///< Offset bits 15..0.
- UINT32 Selector:16; ///< Selector.
- UINT32 Reserved_0:8; ///< Reserved.
- UINT32 GateType:8; ///< Gate Type. See #defines above.
- UINT32 OffsetHigh:16; ///< Offset bits 31..16.
- UINT32 OffsetUpper:32; ///< Offset bits 63..32.
- UINT32 Reserved_1:32; ///< Reserved.
+ UINT32 OffsetLow : 16; ///< Offset bits 15..0.
+ UINT32 Selector : 16; ///< Selector.
+ UINT32 Reserved_0 : 8; ///< Reserved.
+ UINT32 GateType : 8; ///< Gate Type. See #defines above.
+ UINT32 OffsetHigh : 16; ///< Offset bits 31..16.
+ UINT32 OffsetUpper : 32; ///< Offset bits 63..32.
+ UINT32 Reserved_1 : 32; ///< Reserved.
} Bits;
struct {
- UINT64 Uint64;
- UINT64 Uint64_1;
+ UINT64 Uint64;
+ UINT64 Uint64_1;
} Uint128;
} IA32_IDT_GATE_DESCRIPTOR;
-#endif
+ #pragma pack (1)
+//
+// IA32 Task-State Segment Definition
+//
+typedef struct {
+ UINT32 Reserved_0;
+ UINT64 RSP0;
+ UINT64 RSP1;
+ UINT64 RSP2;
+ UINT64 Reserved_28;
+ UINT64 IST[7];
+ UINT64 Reserved_92;
+ UINT16 Reserved_100;
+ UINT16 IOMapBaseAddress;
+} IA32_TASK_STATE_SEGMENT;
+
+typedef union {
+ struct {
+ UINT32 LimitLow : 16; ///< Segment Limit 15..00
+ UINT32 BaseLow : 16; ///< Base Address 15..00
+ UINT32 BaseMidl : 8; ///< Base Address 23..16
+ UINT32 Type : 4; ///< Type (1 0 B 1)
+ UINT32 Reserved_43 : 1; ///< 0
+ UINT32 DPL : 2; ///< Descriptor Privilege Level
+ UINT32 P : 1; ///< Segment Present
+ UINT32 LimitHigh : 4; ///< Segment Limit 19..16
+ UINT32 AVL : 1; ///< Available for use by system software
+ UINT32 Reserved_52 : 2; ///< 0 0
+ UINT32 G : 1; ///< Granularity
+ UINT32 BaseMidh : 8; ///< Base Address 31..24
+ UINT32 BaseHigh : 32; ///< Base Address 63..32
+ UINT32 Reserved_96 : 32; ///< Reserved
+ } Bits;
+ struct {
+ UINT64 Uint64;
+ UINT64 Uint64_1;
+ } Uint128;
+} IA32_TSS_DESCRIPTOR;
+ #pragma pack ()
+
+ #endif // defined (MDE_CPU_X64)
///
/// Byte packed structure for an FP/SSE/SSE2 context.
///
typedef struct {
- UINT8 Buffer[512];
+ UINT8 Buffer[512];
} IA32_FX_BUFFER;
///
/// Structures for the 16-bit real mode thunks.
///
typedef struct {
- UINT32 Reserved1;
- UINT32 Reserved2;
- UINT32 Reserved3;
- UINT32 Reserved4;
- UINT8 BL;
- UINT8 BH;
- UINT16 Reserved5;
- UINT8 DL;
- UINT8 DH;
- UINT16 Reserved6;
- UINT8 CL;
- UINT8 CH;
- UINT16 Reserved7;
- UINT8 AL;
- UINT8 AH;
- UINT16 Reserved8;
+ UINT32 Reserved1;
+ UINT32 Reserved2;
+ UINT32 Reserved3;
+ UINT32 Reserved4;
+ UINT8 BL;
+ UINT8 BH;
+ UINT16 Reserved5;
+ UINT8 DL;
+ UINT8 DH;
+ UINT16 Reserved6;
+ UINT8 CL;
+ UINT8 CH;
+ UINT16 Reserved7;
+ UINT8 AL;
+ UINT8 AH;
+ UINT16 Reserved8;
} IA32_BYTE_REGS;
typedef struct {
- UINT16 DI;
- UINT16 Reserved1;
- UINT16 SI;
- UINT16 Reserved2;
- UINT16 BP;
- UINT16 Reserved3;
- UINT16 SP;
- UINT16 Reserved4;
- UINT16 BX;
- UINT16 Reserved5;
- UINT16 DX;
- UINT16 Reserved6;
- UINT16 CX;
- UINT16 Reserved7;
- UINT16 AX;
- UINT16 Reserved8;
+ UINT16 DI;
+ UINT16 Reserved1;
+ UINT16 SI;
+ UINT16 Reserved2;
+ UINT16 BP;
+ UINT16 Reserved3;
+ UINT16 SP;
+ UINT16 Reserved4;
+ UINT16 BX;
+ UINT16 Reserved5;
+ UINT16 DX;
+ UINT16 Reserved6;
+ UINT16 CX;
+ UINT16 Reserved7;
+ UINT16 AX;
+ UINT16 Reserved8;
} IA32_WORD_REGS;
typedef struct {
- UINT32 EDI;
- UINT32 ESI;
- UINT32 EBP;
- UINT32 ESP;
- UINT32 EBX;
- UINT32 EDX;
- UINT32 ECX;
- UINT32 EAX;
- UINT16 DS;
- UINT16 ES;
- UINT16 FS;
- UINT16 GS;
- IA32_EFLAGS32 EFLAGS;
- UINT32 Eip;
- UINT16 CS;
- UINT16 SS;
+ UINT32 EDI;
+ UINT32 ESI;
+ UINT32 EBP;
+ UINT32 ESP;
+ UINT32 EBX;
+ UINT32 EDX;
+ UINT32 ECX;
+ UINT32 EAX;
+ UINT16 DS;
+ UINT16 ES;
+ UINT16 FS;
+ UINT16 GS;
+ IA32_EFLAGS32 EFLAGS;
+ UINT32 Eip;
+ UINT16 CS;
+ UINT16 SS;
} IA32_DWORD_REGS;
typedef union {
- IA32_DWORD_REGS E;
- IA32_WORD_REGS X;
- IA32_BYTE_REGS H;
+ IA32_DWORD_REGS E;
+ IA32_WORD_REGS X;
+ IA32_BYTE_REGS H;
} IA32_REGISTER_SET;
///
/// Byte packed structure for an 16-bit real mode thunks.
///
typedef struct {
- IA32_REGISTER_SET *RealModeState;
- VOID *RealModeBuffer;
- UINT32 RealModeBufferSize;
- UINT32 ThunkAttributes;
+ IA32_REGISTER_SET *RealModeState;
+ VOID *RealModeBuffer;
+ UINT32 RealModeBufferSize;
+ UINT32 ThunkAttributes;
} THUNK_CONTEXT;
-#define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001
-#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002
-#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004
+#define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001
+#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002
+#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004
+
+///
+/// Type definition for representing labels in NASM source code that allow for
+/// the patching of immediate operands of IA32 and X64 instructions.
+///
+/// While the type is technically defined as a function type (note: not a
+/// pointer-to-function type), such labels in NASM source code never stand for
+/// actual functions, and identifiers declared with this function type should
+/// never be called. This is also why the EFIAPI calling convention specifier
+/// is missing from the typedef, and why the typedef does not follow the usual
+/// edk2 coding style for function (or pointer-to-function) typedefs. The VOID
+/// return type and the VOID argument list are merely artifacts.
+///
+typedef VOID (X86_ASSEMBLY_PATCH_LABEL) (
+ VOID
+ );
/**
Retrieves CPUID information.
@@ -6758,14 +5408,13 @@
UINT32
EFIAPI
AsmCpuid (
- IN UINT32 Index,
- OUT UINT32 *Eax, OPTIONAL
- OUT UINT32 *Ebx, OPTIONAL
- OUT UINT32 *Ecx, OPTIONAL
- OUT UINT32 *Edx OPTIONAL
+ IN UINT32 Index,
+ OUT UINT32 *Eax OPTIONAL,
+ OUT UINT32 *Ebx OPTIONAL,
+ OUT UINT32 *Ecx OPTIONAL,
+ OUT UINT32 *Edx OPTIONAL
);
-
/**
Retrieves CPUID information using an extended leaf identifier.
@@ -6801,15 +5450,14 @@
UINT32
EFIAPI
AsmCpuidEx (
- IN UINT32 Index,
- IN UINT32 SubIndex,
- OUT UINT32 *Eax, OPTIONAL
- OUT UINT32 *Ebx, OPTIONAL
- OUT UINT32 *Ecx, OPTIONAL
- OUT UINT32 *Edx OPTIONAL
+ IN UINT32 Index,
+ IN UINT32 SubIndex,
+ OUT UINT32 *Eax OPTIONAL,
+ OUT UINT32 *Ebx OPTIONAL,
+ OUT UINT32 *Ecx OPTIONAL,
+ OUT UINT32 *Edx OPTIONAL
);
-
/**
Set CD bit and clear NW bit of CR0 followed by a WBINVD.
@@ -6823,7 +5471,6 @@
VOID
);
-
/**
Perform a WBINVD and clear both the CD and NW bits of CR0.
@@ -6837,7 +5484,6 @@
VOID
);
-
/**
Returns the lower 32-bits of a Machine Specific Register(MSR).
@@ -6855,10 +5501,9 @@
UINT32
EFIAPI
AsmReadMsr32 (
- IN UINT32 Index
+ IN UINT32 Index
);
-
/**
Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.
The upper 32-bits of the MSR are set to zero.
@@ -6879,11 +5524,10 @@
UINT32
EFIAPI
AsmWriteMsr32 (
- IN UINT32 Index,
- IN UINT32 Value
+ IN UINT32 Index,
+ IN UINT32 Value
);
-
/**
Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and
writes the result back to the 64-bit MSR.
@@ -6906,11 +5550,10 @@
UINT32
EFIAPI
AsmMsrOr32 (
- IN UINT32 Index,
- IN UINT32 OrData
+ IN UINT32 Index,
+ IN UINT32 OrData
);
-
/**
Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes
the result back to the 64-bit MSR.
@@ -6933,11 +5576,10 @@
UINT32
EFIAPI
AsmMsrAnd32 (
- IN UINT32 Index,
- IN UINT32 AndData
+ IN UINT32 Index,
+ IN UINT32 AndData
);
-
/**
Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR
on the lower 32-bits, and writes the result back to the 64-bit MSR.
@@ -6963,12 +5605,11 @@
UINT32
EFIAPI
AsmMsrAndThenOr32 (
- IN UINT32 Index,
- IN UINT32 AndData,
- IN UINT32 OrData
+ IN UINT32 Index,
+ IN UINT32 AndData,
+ IN UINT32 OrData
);
-
/**
Reads a bit field of an MSR.
@@ -6994,12 +5635,11 @@
UINT32
EFIAPI
AsmMsrBitFieldRead32 (
- IN UINT32 Index,
- IN UINTN StartBit,
- IN UINTN EndBit
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit
);
-
/**
Writes a bit field to an MSR.
@@ -7028,13 +5668,12 @@
UINT32
EFIAPI
AsmMsrBitFieldWrite32 (
- IN UINT32 Index,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 Value
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
);
-
/**
Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the
result back to the bit field in the 64-bit MSR.
@@ -7065,13 +5704,12 @@
UINT32
EFIAPI
AsmMsrBitFieldOr32 (
- IN UINT32 Index,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 OrData
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
);
-
/**
Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
result back to the bit field in the 64-bit MSR.
@@ -7102,13 +5740,12 @@
UINT32
EFIAPI
AsmMsrBitFieldAnd32 (
- IN UINT32 Index,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 AndData
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
);
-
/**
Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
bitwise OR, and writes the result back to the bit field in the
@@ -7143,14 +5780,13 @@
UINT32
EFIAPI
AsmMsrBitFieldAndThenOr32 (
- IN UINT32 Index,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 AndData,
- IN UINT32 OrData
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
);
-
/**
Returns a 64-bit Machine Specific Register(MSR).
@@ -7168,10 +5804,9 @@
UINT64
EFIAPI
AsmReadMsr64 (
- IN UINT32 Index
+ IN UINT32 Index
);
-
/**
Writes a 64-bit value to a Machine Specific Register(MSR), and returns the
value.
@@ -7192,11 +5827,10 @@
UINT64
EFIAPI
AsmWriteMsr64 (
- IN UINT32 Index,
- IN UINT64 Value
+ IN UINT32 Index,
+ IN UINT64 Value
);
-
/**
Reads a 64-bit MSR, performs a bitwise OR, and writes the result
back to the 64-bit MSR.
@@ -7218,11 +5852,10 @@
UINT64
EFIAPI
AsmMsrOr64 (
- IN UINT32 Index,
- IN UINT64 OrData
+ IN UINT32 Index,
+ IN UINT64 OrData
);
-
/**
Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the
64-bit MSR.
@@ -7244,11 +5877,10 @@
UINT64
EFIAPI
AsmMsrAnd64 (
- IN UINT32 Index,
- IN UINT64 AndData
+ IN UINT32 Index,
+ IN UINT64 AndData
);
-
/**
Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise
OR, and writes the result back to the 64-bit MSR.
@@ -7273,12 +5905,11 @@
UINT64
EFIAPI
AsmMsrAndThenOr64 (
- IN UINT32 Index,
- IN UINT64 AndData,
- IN UINT64 OrData
+ IN UINT32 Index,
+ IN UINT64 AndData,
+ IN UINT64 OrData
);
-
/**
Reads a bit field of an MSR.
@@ -7304,12 +5935,11 @@
UINT64
EFIAPI
AsmMsrBitFieldRead64 (
- IN UINT32 Index,
- IN UINTN StartBit,
- IN UINTN EndBit
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit
);
-
/**
Writes a bit field to an MSR.
@@ -7337,13 +5967,12 @@
UINT64
EFIAPI
AsmMsrBitFieldWrite64 (
- IN UINT32 Index,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT64 Value
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
);
-
/**
Reads a bit field in a 64-bit MSR, performs a bitwise OR, and
writes the result back to the bit field in the 64-bit MSR.
@@ -7374,13 +6003,12 @@
UINT64
EFIAPI
AsmMsrBitFieldOr64 (
- IN UINT32 Index,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT64 OrData
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
);
-
/**
Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
result back to the bit field in the 64-bit MSR.
@@ -7411,13 +6039,12 @@
UINT64
EFIAPI
AsmMsrBitFieldAnd64 (
- IN UINT32 Index,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT64 AndData
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
);
-
/**
Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
bitwise OR, and writes the result back to the bit field in the
@@ -7451,14 +6078,13 @@
UINT64
EFIAPI
AsmMsrBitFieldAndThenOr64 (
- IN UINT32 Index,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT64 AndData,
- IN UINT64 OrData
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
);
-
/**
Reads the current value of the EFLAGS register.
@@ -7475,7 +6101,6 @@
VOID
);
-
/**
Reads the current value of the Control Register 0 (CR0).
@@ -7492,7 +6117,6 @@
VOID
);
-
/**
Reads the current value of the Control Register 2 (CR2).
@@ -7509,7 +6133,6 @@
VOID
);
-
/**
Reads the current value of the Control Register 3 (CR3).
@@ -7526,7 +6149,6 @@
VOID
);
-
/**
Reads the current value of the Control Register 4 (CR4).
@@ -7543,7 +6165,6 @@
VOID
);
-
/**
Writes a value to Control Register 0 (CR0).
@@ -7561,7 +6182,6 @@
UINTN Cr0
);
-
/**
Writes a value to Control Register 2 (CR2).
@@ -7579,7 +6199,6 @@
UINTN Cr2
);
-
/**
Writes a value to Control Register 3 (CR3).
@@ -7597,7 +6216,6 @@
UINTN Cr3
);
-
/**
Writes a value to Control Register 4 (CR4).
@@ -7615,7 +6233,6 @@
UINTN Cr4
);
-
/**
Reads the current value of Debug Register 0 (DR0).
@@ -7632,7 +6249,6 @@
VOID
);
-
/**
Reads the current value of Debug Register 1 (DR1).
@@ -7649,7 +6265,6 @@
VOID
);
-
/**
Reads the current value of Debug Register 2 (DR2).
@@ -7666,7 +6281,6 @@
VOID
);
-
/**
Reads the current value of Debug Register 3 (DR3).
@@ -7683,7 +6297,6 @@
VOID
);
-
/**
Reads the current value of Debug Register 4 (DR4).
@@ -7700,7 +6313,6 @@
VOID
);
-
/**
Reads the current value of Debug Register 5 (DR5).
@@ -7717,7 +6329,6 @@
VOID
);
-
/**
Reads the current value of Debug Register 6 (DR6).
@@ -7734,7 +6345,6 @@
VOID
);
-
/**
Reads the current value of Debug Register 7 (DR7).
@@ -7751,7 +6361,6 @@
VOID
);
-
/**
Writes a value to Debug Register 0 (DR0).
@@ -7769,7 +6378,6 @@
UINTN Dr0
);
-
/**
Writes a value to Debug Register 1 (DR1).
@@ -7787,7 +6395,6 @@
UINTN Dr1
);
-
/**
Writes a value to Debug Register 2 (DR2).
@@ -7805,7 +6412,6 @@
UINTN Dr2
);
-
/**
Writes a value to Debug Register 3 (DR3).
@@ -7823,7 +6429,6 @@
UINTN Dr3
);
-
/**
Writes a value to Debug Register 4 (DR4).
@@ -7841,7 +6446,6 @@
UINTN Dr4
);
-
/**
Writes a value to Debug Register 5 (DR5).
@@ -7859,7 +6463,6 @@
UINTN Dr5
);
-
/**
Writes a value to Debug Register 6 (DR6).
@@ -7877,7 +6480,6 @@
UINTN Dr6
);
-
/**
Writes a value to Debug Register 7 (DR7).
@@ -7895,7 +6497,6 @@
UINTN Dr7
);
-
/**
Reads the current value of Code Segment Register (CS).
@@ -7911,7 +6512,6 @@
VOID
);
-
/**
Reads the current value of Data Segment Register (DS).
@@ -7927,7 +6527,6 @@
VOID
);
-
/**
Reads the current value of Extra Segment Register (ES).
@@ -7943,7 +6542,6 @@
VOID
);
-
/**
Reads the current value of FS Data Segment Register (FS).
@@ -7959,7 +6557,6 @@
VOID
);
-
/**
Reads the current value of GS Data Segment Register (GS).
@@ -7975,7 +6572,6 @@
VOID
);
-
/**
Reads the current value of Stack Segment Register (SS).
@@ -7991,7 +6587,6 @@
VOID
);
-
/**
Reads the current value of Task Register (TR).
@@ -8007,7 +6602,6 @@
VOID
);
-
/**
Reads the current Global Descriptor Table Register(GDTR) descriptor.
@@ -8022,10 +6616,9 @@
VOID
EFIAPI
AsmReadGdtr (
- OUT IA32_DESCRIPTOR *Gdtr
+ OUT IA32_DESCRIPTOR *Gdtr
);
-
/**
Writes the current Global Descriptor Table Register (GDTR) descriptor.
@@ -8040,10 +6633,9 @@
VOID
EFIAPI
AsmWriteGdtr (
- IN CONST IA32_DESCRIPTOR *Gdtr
+ IN CONST IA32_DESCRIPTOR *Gdtr
);
-
/**
Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.
@@ -8058,10 +6650,9 @@
VOID
EFIAPI
AsmReadIdtr (
- OUT IA32_DESCRIPTOR *Idtr
+ OUT IA32_DESCRIPTOR *Idtr
);
-
/**
Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.
@@ -8076,10 +6667,9 @@
VOID
EFIAPI
AsmWriteIdtr (
- IN CONST IA32_DESCRIPTOR *Idtr
+ IN CONST IA32_DESCRIPTOR *Idtr
);
-
/**
Reads the current Local Descriptor Table Register(LDTR) selector.
@@ -8095,7 +6685,6 @@
VOID
);
-
/**
Writes the current Local Descriptor Table Register (LDTR) selector.
@@ -8108,10 +6697,9 @@
VOID
EFIAPI
AsmWriteLdtr (
- IN UINT16 Ldtr
+ IN UINT16 Ldtr
);
-
/**
Save the current floating point/SSE/SSE2 context to a buffer.
@@ -8128,10 +6716,9 @@
VOID
EFIAPI
AsmFxSave (
- OUT IA32_FX_BUFFER *Buffer
+ OUT IA32_FX_BUFFER *Buffer
);
-
/**
Restores the current floating point/SSE/SSE2 context from a buffer.
@@ -8149,10 +6736,9 @@
VOID
EFIAPI
AsmFxRestore (
- IN CONST IA32_FX_BUFFER *Buffer
+ IN CONST IA32_FX_BUFFER *Buffer
);
-
/**
Reads the current value of 64-bit MMX Register #0 (MM0).
@@ -8168,7 +6754,6 @@
VOID
);
-
/**
Reads the current value of 64-bit MMX Register #1 (MM1).
@@ -8184,7 +6769,6 @@
VOID
);
-
/**
Reads the current value of 64-bit MMX Register #2 (MM2).
@@ -8200,7 +6784,6 @@
VOID
);
-
/**
Reads the current value of 64-bit MMX Register #3 (MM3).
@@ -8216,7 +6799,6 @@
VOID
);
-
/**
Reads the current value of 64-bit MMX Register #4 (MM4).
@@ -8232,7 +6814,6 @@
VOID
);
-
/**
Reads the current value of 64-bit MMX Register #5 (MM5).
@@ -8248,7 +6829,6 @@
VOID
);
-
/**
Reads the current value of 64-bit MMX Register #6 (MM6).
@@ -8264,7 +6844,6 @@
VOID
);
-
/**
Reads the current value of 64-bit MMX Register #7 (MM7).
@@ -8280,7 +6859,6 @@
VOID
);
-
/**
Writes the current value of 64-bit MMX Register #0 (MM0).
@@ -8293,10 +6871,9 @@
VOID
EFIAPI
AsmWriteMm0 (
- IN UINT64 Value
+ IN UINT64 Value
);
-
/**
Writes the current value of 64-bit MMX Register #1 (MM1).
@@ -8309,10 +6886,9 @@
VOID
EFIAPI
AsmWriteMm1 (
- IN UINT64 Value
+ IN UINT64 Value
);
-
/**
Writes the current value of 64-bit MMX Register #2 (MM2).
@@ -8325,10 +6901,9 @@
VOID
EFIAPI
AsmWriteMm2 (
- IN UINT64 Value
+ IN UINT64 Value
);
-
/**
Writes the current value of 64-bit MMX Register #3 (MM3).
@@ -8341,10 +6916,9 @@
VOID
EFIAPI
AsmWriteMm3 (
- IN UINT64 Value
+ IN UINT64 Value
);
-
/**
Writes the current value of 64-bit MMX Register #4 (MM4).
@@ -8357,10 +6931,9 @@
VOID
EFIAPI
AsmWriteMm4 (
- IN UINT64 Value
+ IN UINT64 Value
);
-
/**
Writes the current value of 64-bit MMX Register #5 (MM5).
@@ -8373,10 +6946,9 @@
VOID
EFIAPI
AsmWriteMm5 (
- IN UINT64 Value
+ IN UINT64 Value
);
-
/**
Writes the current value of 64-bit MMX Register #6 (MM6).
@@ -8389,10 +6961,9 @@
VOID
EFIAPI
AsmWriteMm6 (
- IN UINT64 Value
+ IN UINT64 Value
);
-
/**
Writes the current value of 64-bit MMX Register #7 (MM7).
@@ -8405,10 +6976,9 @@
VOID
EFIAPI
AsmWriteMm7 (
- IN UINT64 Value
+ IN UINT64 Value
);
-
/**
Reads the current value of Time Stamp Counter (TSC).
@@ -8424,7 +6994,6 @@
VOID
);
-
/**
Reads the current value of a Performance Counter (PMC).
@@ -8439,10 +7008,9 @@
UINT64
EFIAPI
AsmReadPmc (
- IN UINT32 Index
+ IN UINT32 Index
);
-
/**
Sets up a monitor buffer that is used by AsmMwait().
@@ -8462,12 +7030,11 @@
UINTN
EFIAPI
AsmMonitor (
- IN UINTN Eax,
- IN UINTN Ecx,
- IN UINTN Edx
+ IN UINTN Eax,
+ IN UINTN Ecx,
+ IN UINTN Edx
);
-
/**
Executes an MWAIT instruction.
@@ -8485,11 +7052,10 @@
UINTN
EFIAPI
AsmMwait (
- IN UINTN Eax,
- IN UINTN Ecx
+ IN UINTN Eax,
+ IN UINTN Ecx
);
-
/**
Executes a WBINVD instruction.
@@ -8503,7 +7069,6 @@
VOID
);
-
/**
Executes a INVD instruction.
@@ -8517,7 +7082,6 @@
VOID
);
-
/**
Flushes a cache line from all the instruction and data caches within the
coherency domain of the CPU.
@@ -8536,10 +7100,9 @@
VOID *
EFIAPI
AsmFlushCacheLine (
- IN VOID *LinearAddress
+ IN VOID *LinearAddress
);
-
/**
Enables the 32-bit paging mode on the CPU.
@@ -8581,12 +7144,11 @@
EFIAPI
AsmEnablePaging32 (
IN SWITCH_STACK_ENTRY_POINT EntryPoint,
- IN VOID *Context1, OPTIONAL
- IN VOID *Context2, OPTIONAL
+ IN VOID *Context1 OPTIONAL,
+ IN VOID *Context2 OPTIONAL,
IN VOID *NewStack
);
-
/**
Disables the 32-bit paging mode on the CPU.
@@ -8625,12 +7187,11 @@
EFIAPI
AsmDisablePaging32 (
IN SWITCH_STACK_ENTRY_POINT EntryPoint,
- IN VOID *Context1, OPTIONAL
- IN VOID *Context2, OPTIONAL
+ IN VOID *Context1 OPTIONAL,
+ IN VOID *Context2 OPTIONAL,
IN VOID *NewStack
);
-
/**
Enables the 64-bit paging mode on the CPU.
@@ -8666,14 +7227,13 @@
VOID
EFIAPI
AsmEnablePaging64 (
- IN UINT16 Cs,
- IN UINT64 EntryPoint,
- IN UINT64 Context1, OPTIONAL
- IN UINT64 Context2, OPTIONAL
- IN UINT64 NewStack
+ IN UINT16 Cs,
+ IN UINT64 EntryPoint,
+ IN UINT64 Context1 OPTIONAL,
+ IN UINT64 Context2 OPTIONAL,
+ IN UINT64 NewStack
);
-
/**
Disables the 64-bit paging mode on the CPU.
@@ -8707,14 +7267,13 @@
VOID
EFIAPI
AsmDisablePaging64 (
- IN UINT16 Cs,
- IN UINT32 EntryPoint,
- IN UINT32 Context1, OPTIONAL
- IN UINT32 Context2, OPTIONAL
- IN UINT32 NewStack
+ IN UINT16 Cs,
+ IN UINT32 EntryPoint,
+ IN UINT32 Context1 OPTIONAL,
+ IN UINT32 Context2 OPTIONAL,
+ IN UINT32 NewStack
);
-
//
// 16-bit thunking services
//
@@ -8743,11 +7302,10 @@
VOID
EFIAPI
AsmGetThunk16Properties (
- OUT UINT32 *RealModeBufferSize,
- OUT UINT32 *ExtraStackSize
+ OUT UINT32 *RealModeBufferSize,
+ OUT UINT32 *ExtraStackSize
);
-
/**
Prepares all structures a code required to use AsmThunk16().
@@ -8765,10 +7323,9 @@
VOID
EFIAPI
AsmPrepareThunk16 (
- IN OUT THUNK_CONTEXT *ThunkContext
+ IN OUT THUNK_CONTEXT *ThunkContext
);
-
/**
Transfers control to a 16-bit real mode entry point and returns the results.
@@ -8825,10 +7382,9 @@
VOID
EFIAPI
AsmThunk16 (
- IN OUT THUNK_CONTEXT *ThunkContext
+ IN OUT THUNK_CONTEXT *ThunkContext
);
-
/**
Prepares all structures and code for a 16-bit real mode thunk, transfers
control to a 16-bit real mode entry point, and returns the results.
@@ -8852,7 +7408,7 @@
VOID
EFIAPI
AsmPrepareAndThunk16 (
- IN OUT THUNK_CONTEXT *ThunkContext
+ IN OUT THUNK_CONTEXT *ThunkContext
);
/**
@@ -8869,7 +7425,7 @@
BOOLEAN
EFIAPI
AsmRdRand16 (
- OUT UINT16 *Rand
+ OUT UINT16 *Rand
);
/**
@@ -8886,7 +7442,7 @@
BOOLEAN
EFIAPI
AsmRdRand32 (
- OUT UINT32 *Rand
+ OUT UINT32 *Rand
);
/**
@@ -8903,10 +7459,127 @@
BOOLEAN
EFIAPI
AsmRdRand64 (
- OUT UINT64 *Rand
+ OUT UINT64 *Rand
);
-#endif
-#endif
+/**
+ Load given selector into TR register.
+ @param[in] Selector Task segment selector
+**/
+VOID
+EFIAPI
+AsmWriteTr (
+ IN UINT16 Selector
+ );
+/**
+ Performs a serializing operation on all load-from-memory instructions that
+ were issued prior the AsmLfence function.
+
+ Executes a LFENCE instruction. This function is only available on IA-32 and x64.
+
+**/
+VOID
+EFIAPI
+AsmLfence (
+ VOID
+ );
+
+/**
+ Executes a XGETBV instruction
+
+ Executes a XGETBV instruction. This function is only available on IA-32 and
+ x64.
+
+ @param[in] Index Extended control register index
+
+ @return The current value of the extended control register
+**/
+UINT64
+EFIAPI
+AsmXGetBv (
+ IN UINT32 Index
+ );
+
+/**
+ Executes a XSETBV instruction to write a 64-bit value to a Extended Control
+ Register(XCR), and returns the value.
+
+ Writes the 64-bit value specified by Value to the XCR specified by Index. The
+ 64-bit value written to the XCR is returned. No parameter checking is
+ performed on Index or Value, and some of these may cause CPU exceptions. The
+ caller must either guarantee that Index and Value are valid, or the caller
+ must establish proper exception handlers. This function is only available on
+ IA-32 and x64.
+
+ @param Index The 32-bit XCR index to write.
+ @param Value The 64-bit value to write to the XCR.
+
+ @return Value
+
+**/
+UINT64
+EFIAPI
+AsmXSetBv (
+ IN UINT32 Index,
+ IN UINT64 Value
+ );
+
+/**
+ Executes a VMGEXIT instruction (VMMCALL with a REP prefix)
+
+ Executes a VMGEXIT instruction. This function is only available on IA-32 and
+ x64.
+
+**/
+VOID
+EFIAPI
+AsmVmgExit (
+ VOID
+ );
+
+/**
+ Patch the immediate operand of an IA32 or X64 instruction such that the byte,
+ word, dword or qword operand is encoded at the end of the instruction's
+ binary representation.
+
+ This function should be used to update object code that was compiled with
+ NASM from assembly source code. Example:
+
+ NASM source code:
+
+ mov eax, strict dword 0 ; the imm32 zero operand will be patched
+ ASM_PFX(gPatchCr3):
+ mov cr3, eax
+
+ C source code:
+
+ X86_ASSEMBLY_PATCH_LABEL gPatchCr3;
+ PatchInstructionX86 (gPatchCr3, AsmReadCr3 (), 4);
+
+ @param[out] InstructionEnd Pointer right past the instruction to patch. The
+ immediate operand to patch is expected to
+ comprise the trailing bytes of the instruction.
+ If InstructionEnd is closer to address 0 than
+ ValueSize permits, then ASSERT().
+
+ @param[in] PatchValue The constant to write to the immediate operand.
+ The caller is responsible for ensuring that
+ PatchValue can be represented in the byte, word,
+ dword or qword operand (as indicated through
+ ValueSize); otherwise ASSERT().
+
+ @param[in] ValueSize The size of the operand in bytes; must be 1, 2,
+ 4, or 8. ASSERT() otherwise.
+**/
+VOID
+EFIAPI
+PatchInstructionX86 (
+ OUT X86_ASSEMBLY_PATCH_LABEL *InstructionEnd,
+ IN UINT64 PatchValue,
+ IN UINTN ValueSize
+ );
+
+#endif // defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
+#endif // !defined (__BASE_LIB__)
diff --git a/src/include/ipxe/efi/Pi/PiBootMode.h b/src/include/ipxe/efi/Pi/PiBootMode.h
index f462f7a..1d8a8a9 100644
--- a/src/include/ipxe/efi/Pi/PiBootMode.h
+++ b/src/include/ipxe/efi/Pi/PiBootMode.h
@@ -2,13 +2,7 @@
Present the boot mode values in PI.
Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
PI Version 1.2.1A
@@ -18,27 +12,27 @@
#ifndef __PI_BOOT_MODE_H__
#define __PI_BOOT_MODE_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
///
/// EFI boot mode
///
-typedef UINT32 EFI_BOOT_MODE;
+typedef UINT32 EFI_BOOT_MODE;
//
// 0x21 - 0xf..f are reserved.
//
-#define BOOT_WITH_FULL_CONFIGURATION 0x00
-#define BOOT_WITH_MINIMAL_CONFIGURATION 0x01
-#define BOOT_ASSUMING_NO_CONFIGURATION_CHANGES 0x02
-#define BOOT_WITH_FULL_CONFIGURATION_PLUS_DIAGNOSTICS 0x03
-#define BOOT_WITH_DEFAULT_SETTINGS 0x04
-#define BOOT_ON_S4_RESUME 0x05
-#define BOOT_ON_S5_RESUME 0x06
-#define BOOT_WITH_MFG_MODE_SETTINGS 0x07
-#define BOOT_ON_S2_RESUME 0x10
-#define BOOT_ON_S3_RESUME 0x11
-#define BOOT_ON_FLASH_UPDATE 0x12
-#define BOOT_IN_RECOVERY_MODE 0x20
+#define BOOT_WITH_FULL_CONFIGURATION 0x00
+#define BOOT_WITH_MINIMAL_CONFIGURATION 0x01
+#define BOOT_ASSUMING_NO_CONFIGURATION_CHANGES 0x02
+#define BOOT_WITH_FULL_CONFIGURATION_PLUS_DIAGNOSTICS 0x03
+#define BOOT_WITH_DEFAULT_SETTINGS 0x04
+#define BOOT_ON_S4_RESUME 0x05
+#define BOOT_ON_S5_RESUME 0x06
+#define BOOT_WITH_MFG_MODE_SETTINGS 0x07
+#define BOOT_ON_S2_RESUME 0x10
+#define BOOT_ON_S3_RESUME 0x11
+#define BOOT_ON_FLASH_UPDATE 0x12
+#define BOOT_IN_RECOVERY_MODE 0x20
#endif
diff --git a/src/include/ipxe/efi/Pi/PiDependency.h b/src/include/ipxe/efi/Pi/PiDependency.h
index b1fa399..bfe30c4 100644
--- a/src/include/ipxe/efi/Pi/PiDependency.h
+++ b/src/include/ipxe/efi/Pi/PiDependency.h
@@ -1,49 +1,43 @@
/** @file
Present the dependency expression values in PI.
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
PI Version 1.0
**/
+
#ifndef __PI_DEPENDENCY_H__
#define __PI_DEPENDENCY_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
///
/// If present, this must be the first and only opcode,
/// EFI_DEP_BEFORE may be used by DXE and SMM drivers.
///
-#define EFI_DEP_BEFORE 0x00
+#define EFI_DEP_BEFORE 0x00
///
/// If present, this must be the first and only opcode,
/// EFI_DEP_AFTER may be used by DXE and SMM drivers.
///
-#define EFI_DEP_AFTER 0x01
+#define EFI_DEP_AFTER 0x01
-#define EFI_DEP_PUSH 0x02
-#define EFI_DEP_AND 0x03
-#define EFI_DEP_OR 0x04
-#define EFI_DEP_NOT 0x05
-#define EFI_DEP_TRUE 0x06
-#define EFI_DEP_FALSE 0x07
-#define EFI_DEP_END 0x08
-
+#define EFI_DEP_PUSH 0x02
+#define EFI_DEP_AND 0x03
+#define EFI_DEP_OR 0x04
+#define EFI_DEP_NOT 0x05
+#define EFI_DEP_TRUE 0x06
+#define EFI_DEP_FALSE 0x07
+#define EFI_DEP_END 0x08
///
/// If present, this must be the first opcode,
/// EFI_DEP_SOR is only used by DXE driver.
///
-#define EFI_DEP_SOR 0x09
+#define EFI_DEP_SOR 0x09
#endif
diff --git a/src/include/ipxe/efi/Pi/PiDxeCis.h b/src/include/ipxe/efi/Pi/PiDxeCis.h
index 047c077..506abfd 100644
--- a/src/include/ipxe/efi/Pi/PiDxeCis.h
+++ b/src/include/ipxe/efi/Pi/PiDxeCis.h
@@ -1,24 +1,18 @@
/** @file
Include file matches things in PI.
-Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
- PI Version 1.4
+ PI Version 1.7
**/
#ifndef __PI_DXECIS_H__
#define __PI_DXECIS_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/Uefi/UefiMultiPhase.h>
#include <ipxe/efi/Pi/PiMultiPhase.h>
@@ -54,13 +48,25 @@
/// A memory region that is visible to the boot processor.
/// This memory supports byte-addressable non-volatility.
///
- EfiGcdMemoryTypePersistentMemory,
+ EfiGcdMemoryTypePersistent,
+ //
+ // Keep original one for the compatibility.
+ //
+ EfiGcdMemoryTypePersistentMemory = EfiGcdMemoryTypePersistent,
///
/// A memory region that provides higher reliability relative to other memory in the
/// system. If all memory has the same reliability, then this bit is not used.
///
EfiGcdMemoryTypeMoreReliable,
- EfiGcdMemoryTypeMaximum
+ // ///
+ // /// A memory region that describes system memory that has not been accepted
+ // /// by a corresponding call to the underlying isolation architecture.
+ // ///
+ // /// Please be noted:
+ // /// EfiGcdMemoryTypeUnaccepted is defined in PrePiDxeCis.h because it has not been
+ // /// defined in PI spec.
+ // EfiGcdMemoryTypeUnaccepted,
+ EfiGcdMemoryTypeMaximum = 8
} EFI_GCD_MEMORY_TYPE;
///
@@ -126,29 +132,29 @@
/// EFI_PHYSICAL_ADDRESS is defined in the AllocatePages() function
/// description in the UEFI 2.0 specification.
///
- EFI_PHYSICAL_ADDRESS BaseAddress;
+ EFI_PHYSICAL_ADDRESS BaseAddress;
///
/// The number of bytes in the memory region.
///
- UINT64 Length;
+ UINT64 Length;
///
/// The bit mask of attributes that the memory region is capable of supporting. The bit
/// mask of available attributes is defined in the GetMemoryMap() function description
/// in the UEFI 2.0 specification.
///
- UINT64 Capabilities;
+ UINT64 Capabilities;
///
/// The bit mask of attributes that the memory region is currently using. The bit mask of
/// available attributes is defined in GetMemoryMap().
///
- UINT64 Attributes;
+ UINT64 Attributes;
///
/// Type of the memory region. Type EFI_GCD_MEMORY_TYPE is defined in the
/// AddMemorySpace() function description.
///
- EFI_GCD_MEMORY_TYPE GcdMemoryType;
+ EFI_GCD_MEMORY_TYPE GcdMemoryType;
///
/// The image handle of the agent that allocated the memory resource described by
@@ -156,7 +162,7 @@
/// resource is not currently allocated. Type EFI_HANDLE is defined in
/// InstallProtocolInterface() in the UEFI 2.0 specification.
///
- EFI_HANDLE ImageHandle;
+ EFI_HANDLE ImageHandle;
///
/// The device handle for which the memory resource has been allocated. If
@@ -165,7 +171,7 @@
/// described by a device handle. Type EFI_HANDLE is defined in
/// InstallProtocolInterface() in the UEFI 2.0 specification.
///
- EFI_HANDLE DeviceHandle;
+ EFI_HANDLE DeviceHandle;
} EFI_GCD_MEMORY_SPACE_DESCRIPTOR;
///
@@ -177,18 +183,18 @@
/// EFI_PHYSICAL_ADDRESS is defined in the AllocatePages() function
/// description in the UEFI 2.0 specification.
///
- EFI_PHYSICAL_ADDRESS BaseAddress;
+ EFI_PHYSICAL_ADDRESS BaseAddress;
///
/// Number of bytes in the I/O region.
///
- UINT64 Length;
+ UINT64 Length;
///
/// Type of the I/O region. Type EFI_GCD_IO_TYPE is defined in the
/// AddIoSpace() function description.
///
- EFI_GCD_IO_TYPE GcdIoType;
+ EFI_GCD_IO_TYPE GcdIoType;
///
/// The image handle of the agent that allocated the I/O resource described by
@@ -196,7 +202,7 @@
/// resource is not currently allocated. Type EFI_HANDLE is defined in
/// InstallProtocolInterface() in the UEFI 2.0 specification.
///
- EFI_HANDLE ImageHandle;
+ EFI_HANDLE ImageHandle;
///
/// The device handle for which the I/O resource has been allocated. If ImageHandle
@@ -205,10 +211,9 @@
/// Type EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI
/// 2.0 specification.
///
- EFI_HANDLE DeviceHandle;
+ EFI_HANDLE DeviceHandle;
} EFI_GCD_IO_SPACE_DESCRIPTOR;
-
/**
Adds reserved memory, system memory, or memory-mapped I/O resources to the
global coherency domain of the processor.
@@ -411,7 +416,7 @@
**/
typedef
EFI_STATUS
-(EFIAPI *EFI_SET_MEMORY_SPACE_CAPABILITIES) (
+(EFIAPI *EFI_SET_MEMORY_SPACE_CAPABILITIES)(
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT64 Capabilities
@@ -603,8 +608,6 @@
OUT EFI_GCD_IO_SPACE_DESCRIPTOR **IoSpaceMap
);
-
-
/**
Loads and executed DXE drivers from firmware volumes.
@@ -694,7 +697,7 @@
//
#define DXE_SERVICES_SIGNATURE 0x565245535f455844ULL
#define DXE_SPECIFICATION_MAJOR_REVISION 1
-#define DXE_SPECIFICATION_MINOR_REVISION 40
+#define DXE_SPECIFICATION_MINOR_REVISION 70
#define DXE_SERVICES_REVISION ((DXE_SPECIFICATION_MAJOR_REVISION<<16) | (DXE_SPECIFICATION_MINOR_REVISION))
typedef struct {
@@ -702,39 +705,39 @@
/// The table header for the DXE Services Table.
/// This header contains the DXE_SERVICES_SIGNATURE and DXE_SERVICES_REVISION values.
///
- EFI_TABLE_HEADER Hdr;
+ EFI_TABLE_HEADER Hdr;
//
// Global Coherency Domain Services
//
- EFI_ADD_MEMORY_SPACE AddMemorySpace;
- EFI_ALLOCATE_MEMORY_SPACE AllocateMemorySpace;
- EFI_FREE_MEMORY_SPACE FreeMemorySpace;
- EFI_REMOVE_MEMORY_SPACE RemoveMemorySpace;
- EFI_GET_MEMORY_SPACE_DESCRIPTOR GetMemorySpaceDescriptor;
- EFI_SET_MEMORY_SPACE_ATTRIBUTES SetMemorySpaceAttributes;
- EFI_GET_MEMORY_SPACE_MAP GetMemorySpaceMap;
- EFI_ADD_IO_SPACE AddIoSpace;
- EFI_ALLOCATE_IO_SPACE AllocateIoSpace;
- EFI_FREE_IO_SPACE FreeIoSpace;
- EFI_REMOVE_IO_SPACE RemoveIoSpace;
- EFI_GET_IO_SPACE_DESCRIPTOR GetIoSpaceDescriptor;
- EFI_GET_IO_SPACE_MAP GetIoSpaceMap;
+ EFI_ADD_MEMORY_SPACE AddMemorySpace;
+ EFI_ALLOCATE_MEMORY_SPACE AllocateMemorySpace;
+ EFI_FREE_MEMORY_SPACE FreeMemorySpace;
+ EFI_REMOVE_MEMORY_SPACE RemoveMemorySpace;
+ EFI_GET_MEMORY_SPACE_DESCRIPTOR GetMemorySpaceDescriptor;
+ EFI_SET_MEMORY_SPACE_ATTRIBUTES SetMemorySpaceAttributes;
+ EFI_GET_MEMORY_SPACE_MAP GetMemorySpaceMap;
+ EFI_ADD_IO_SPACE AddIoSpace;
+ EFI_ALLOCATE_IO_SPACE AllocateIoSpace;
+ EFI_FREE_IO_SPACE FreeIoSpace;
+ EFI_REMOVE_IO_SPACE RemoveIoSpace;
+ EFI_GET_IO_SPACE_DESCRIPTOR GetIoSpaceDescriptor;
+ EFI_GET_IO_SPACE_MAP GetIoSpaceMap;
//
// Dispatcher Services
//
- EFI_DISPATCH Dispatch;
- EFI_SCHEDULE Schedule;
- EFI_TRUST Trust;
+ EFI_DISPATCH Dispatch;
+ EFI_SCHEDULE Schedule;
+ EFI_TRUST Trust;
//
// Service to process a single firmware volume found in a capsule
//
- EFI_PROCESS_FIRMWARE_VOLUME ProcessFirmwareVolume;
+ EFI_PROCESS_FIRMWARE_VOLUME ProcessFirmwareVolume;
//
// Extensions to Global Coherency Domain Services
//
- EFI_SET_MEMORY_SPACE_CAPABILITIES SetMemorySpaceCapabilities;
+ EFI_SET_MEMORY_SPACE_CAPABILITIES SetMemorySpaceCapabilities;
} DXE_SERVICES;
typedef DXE_SERVICES EFI_DXE_SERVICES;
diff --git a/src/include/ipxe/efi/Pi/PiFirmwareFile.h b/src/include/ipxe/efi/Pi/PiFirmwareFile.h
index 9bd22a5..daf66f8 100644
--- a/src/include/ipxe/efi/Pi/PiFirmwareFile.h
+++ b/src/include/ipxe/efi/Pi/PiFirmwareFile.h
@@ -1,25 +1,18 @@
/** @file
The firmware file related definitions in PI.
-Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
- PI Version 1.4.
+ PI Version 1.6.
**/
-
#ifndef __PI_FIRMWARE_FILE_H__
#define __PI_FIRMWARE_FILE_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#pragma pack(1)
///
@@ -32,7 +25,7 @@
/// header. The State and IntegrityCheck.Checksum.File fields are assumed
/// to be zero and the checksum is calculated such that the entire header sums to zero.
///
- UINT8 Header;
+ UINT8 Header;
///
/// If the FFS_ATTRIB_CHECKSUM (see definition below) bit of the Attributes
/// field is set to one, the IntegrityCheck.Checksum.File field is an 8-bit
@@ -42,7 +35,7 @@
/// 0xAA. The IntegrityCheck.Checksum.File field is valid any time the
/// EFI_FILE_DATA_VALID bit is set in the State field.
///
- UINT8 File;
+ UINT8 File;
} Checksum;
///
/// This is the full 16 bits of the IntegrityCheck field.
@@ -56,41 +49,47 @@
///
#define FFS_FIXED_CHECKSUM 0xAA
-typedef UINT8 EFI_FV_FILETYPE;
-typedef UINT8 EFI_FFS_FILE_ATTRIBUTES;
-typedef UINT8 EFI_FFS_FILE_STATE;
+typedef UINT8 EFI_FV_FILETYPE;
+typedef UINT8 EFI_FFS_FILE_ATTRIBUTES;
+typedef UINT8 EFI_FFS_FILE_STATE;
///
/// File Types Definitions
///
-#define EFI_FV_FILETYPE_ALL 0x00
-#define EFI_FV_FILETYPE_RAW 0x01
-#define EFI_FV_FILETYPE_FREEFORM 0x02
-#define EFI_FV_FILETYPE_SECURITY_CORE 0x03
-#define EFI_FV_FILETYPE_PEI_CORE 0x04
-#define EFI_FV_FILETYPE_DXE_CORE 0x05
-#define EFI_FV_FILETYPE_PEIM 0x06
-#define EFI_FV_FILETYPE_DRIVER 0x07
-#define EFI_FV_FILETYPE_COMBINED_PEIM_DRIVER 0x08
-#define EFI_FV_FILETYPE_APPLICATION 0x09
-#define EFI_FV_FILETYPE_SMM 0x0A
-#define EFI_FV_FILETYPE_FIRMWARE_VOLUME_IMAGE 0x0B
-#define EFI_FV_FILETYPE_COMBINED_SMM_DXE 0x0C
-#define EFI_FV_FILETYPE_SMM_CORE 0x0D
-#define EFI_FV_FILETYPE_OEM_MIN 0xc0
-#define EFI_FV_FILETYPE_OEM_MAX 0xdf
-#define EFI_FV_FILETYPE_DEBUG_MIN 0xe0
-#define EFI_FV_FILETYPE_DEBUG_MAX 0xef
-#define EFI_FV_FILETYPE_FFS_MIN 0xf0
-#define EFI_FV_FILETYPE_FFS_MAX 0xff
-#define EFI_FV_FILETYPE_FFS_PAD 0xf0
+#define EFI_FV_FILETYPE_ALL 0x00
+#define EFI_FV_FILETYPE_RAW 0x01
+#define EFI_FV_FILETYPE_FREEFORM 0x02
+#define EFI_FV_FILETYPE_SECURITY_CORE 0x03
+#define EFI_FV_FILETYPE_PEI_CORE 0x04
+#define EFI_FV_FILETYPE_DXE_CORE 0x05
+#define EFI_FV_FILETYPE_PEIM 0x06
+#define EFI_FV_FILETYPE_DRIVER 0x07
+#define EFI_FV_FILETYPE_COMBINED_PEIM_DRIVER 0x08
+#define EFI_FV_FILETYPE_APPLICATION 0x09
+#define EFI_FV_FILETYPE_MM 0x0A
+#define EFI_FV_FILETYPE_SMM EFI_FV_FILETYPE_MM
+#define EFI_FV_FILETYPE_FIRMWARE_VOLUME_IMAGE 0x0B
+#define EFI_FV_FILETYPE_COMBINED_MM_DXE 0x0C
+#define EFI_FV_FILETYPE_COMBINED_SMM_DXE EFI_FV_FILETYPE_COMBINED_MM_DXE
+#define EFI_FV_FILETYPE_MM_CORE 0x0D
+#define EFI_FV_FILETYPE_SMM_CORE EFI_FV_FILETYPE_MM_CORE
+#define EFI_FV_FILETYPE_MM_STANDALONE 0x0E
+#define EFI_FV_FILETYPE_MM_CORE_STANDALONE 0x0F
+#define EFI_FV_FILETYPE_OEM_MIN 0xc0
+#define EFI_FV_FILETYPE_OEM_MAX 0xdf
+#define EFI_FV_FILETYPE_DEBUG_MIN 0xe0
+#define EFI_FV_FILETYPE_DEBUG_MAX 0xef
+#define EFI_FV_FILETYPE_FFS_MIN 0xf0
+#define EFI_FV_FILETYPE_FFS_MAX 0xff
+#define EFI_FV_FILETYPE_FFS_PAD 0xf0
///
/// FFS File Attributes.
///
-#define FFS_ATTRIB_LARGE_FILE 0x01
-#define FFS_ATTRIB_FIXED 0x04
-#define FFS_ATTRIB_DATA_ALIGNMENT 0x38
-#define FFS_ATTRIB_CHECKSUM 0x40
+#define FFS_ATTRIB_LARGE_FILE 0x01
+#define FFS_ATTRIB_DATA_ALIGNMENT_2 0x02
+#define FFS_ATTRIB_FIXED 0x04
+#define FFS_ATTRIB_DATA_ALIGNMENT 0x38
+#define FFS_ATTRIB_CHECKSUM 0x40
///
/// FFS File State Bits.
@@ -102,7 +101,6 @@
#define EFI_FILE_DELETED 0x10
#define EFI_FILE_HEADER_INVALID 0x20
-
///
/// Each file begins with the header that describe the
/// contents and state of the files.
@@ -111,27 +109,27 @@
///
/// This GUID is the file name. It is used to uniquely identify the file.
///
- EFI_GUID Name;
+ EFI_GUID Name;
///
/// Used to verify the integrity of the file.
///
- EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
+ EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
///
/// Identifies the type of file.
///
- EFI_FV_FILETYPE Type;
+ EFI_FV_FILETYPE Type;
///
/// Declares various file attribute bits.
///
- EFI_FFS_FILE_ATTRIBUTES Attributes;
+ EFI_FFS_FILE_ATTRIBUTES Attributes;
///
/// The length of the file in bytes, including the FFS header.
///
- UINT8 Size[3];
+ UINT8 Size[3];
///
/// Used to track the state of the file throughout the life of the file from creation to deletion.
///
- EFI_FFS_FILE_STATE State;
+ EFI_FFS_FILE_STATE State;
} EFI_FFS_FILE_HEADER;
typedef struct {
@@ -140,22 +138,22 @@
/// one instance of a file with the file name GUID of Name in any given firmware
/// volume, except if the file type is EFI_FV_FILETYPE_FFS_PAD.
///
- EFI_GUID Name;
+ EFI_GUID Name;
///
/// Used to verify the integrity of the file.
///
- EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
+ EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
///
/// Identifies the type of file.
///
- EFI_FV_FILETYPE Type;
+ EFI_FV_FILETYPE Type;
///
/// Declares various file attribute bits.
///
- EFI_FFS_FILE_ATTRIBUTES Attributes;
+ EFI_FFS_FILE_ATTRIBUTES Attributes;
///
/// The length of the file in bytes, including the FFS header.
@@ -164,25 +162,32 @@
/// Size is not required to be a multiple of 8 bytes. Given a file F, the next file header is
/// located at the next 8-byte aligned firmware volume offset following the last byte of the file F.
///
- UINT8 Size[3];
+ UINT8 Size[3];
///
/// Used to track the state of the file throughout the life of the file from creation to deletion.
///
- EFI_FFS_FILE_STATE State;
+ EFI_FFS_FILE_STATE State;
///
/// If FFS_ATTRIB_LARGE_FILE is set in Attributes, then ExtendedSize exists and Size must be set to zero.
/// If FFS_ATTRIB_LARGE_FILE is not set then EFI_FFS_FILE_HEADER is used.
///
- UINT64 ExtendedSize;
+ UINT64 ExtendedSize;
} EFI_FFS_FILE_HEADER2;
#define IS_FFS_FILE2(FfsFileHeaderPtr) \
(((((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Attributes) & FFS_ATTRIB_LARGE_FILE) == FFS_ATTRIB_LARGE_FILE)
-#define FFS_FILE_SIZE(FfsFileHeaderPtr) \
- ((UINT32) (*((UINT32 *) ((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Size) & 0x00ffffff))
+///
+/// The argument passed as the FfsFileHeaderPtr parameter to the
+/// FFS_FILE_SIZE() function-like macro below must not have side effects:
+/// FfsFileHeaderPtr is evaluated multiple times.
+///
+#define FFS_FILE_SIZE(FfsFileHeaderPtr) ((UINT32) (\
+ (((EFI_FFS_FILE_HEADER *) (UINTN) (FfsFileHeaderPtr))->Size[0] ) | \
+ (((EFI_FFS_FILE_HEADER *) (UINTN) (FfsFileHeaderPtr))->Size[1] << 8) | \
+ (((EFI_FFS_FILE_HEADER *) (UINTN) (FfsFileHeaderPtr))->Size[2] << 16)))
#define FFS_FILE2_SIZE(FfsFileHeaderPtr) \
((UINT32) (((EFI_FFS_FILE_HEADER2 *) (UINTN) FfsFileHeaderPtr)->ExtendedSize))
@@ -193,32 +198,33 @@
/// Pseudo type. It is used as a wild card when retrieving sections.
/// The section type EFI_SECTION_ALL matches all section types.
///
-#define EFI_SECTION_ALL 0x00
+#define EFI_SECTION_ALL 0x00
///
/// Encapsulation section Type values.
///
-#define EFI_SECTION_COMPRESSION 0x01
+#define EFI_SECTION_COMPRESSION 0x01
-#define EFI_SECTION_GUID_DEFINED 0x02
+#define EFI_SECTION_GUID_DEFINED 0x02
-#define EFI_SECTION_DISPOSABLE 0x03
+#define EFI_SECTION_DISPOSABLE 0x03
///
/// Leaf section Type values.
///
-#define EFI_SECTION_PE32 0x10
-#define EFI_SECTION_PIC 0x11
-#define EFI_SECTION_TE 0x12
-#define EFI_SECTION_DXE_DEPEX 0x13
-#define EFI_SECTION_VERSION 0x14
-#define EFI_SECTION_USER_INTERFACE 0x15
-#define EFI_SECTION_COMPATIBILITY16 0x16
-#define EFI_SECTION_FIRMWARE_VOLUME_IMAGE 0x17
-#define EFI_SECTION_FREEFORM_SUBTYPE_GUID 0x18
-#define EFI_SECTION_RAW 0x19
-#define EFI_SECTION_PEI_DEPEX 0x1B
-#define EFI_SECTION_SMM_DEPEX 0x1C
+#define EFI_SECTION_PE32 0x10
+#define EFI_SECTION_PIC 0x11
+#define EFI_SECTION_TE 0x12
+#define EFI_SECTION_DXE_DEPEX 0x13
+#define EFI_SECTION_VERSION 0x14
+#define EFI_SECTION_USER_INTERFACE 0x15
+#define EFI_SECTION_COMPATIBILITY16 0x16
+#define EFI_SECTION_FIRMWARE_VOLUME_IMAGE 0x17
+#define EFI_SECTION_FREEFORM_SUBTYPE_GUID 0x18
+#define EFI_SECTION_RAW 0x19
+#define EFI_SECTION_PEI_DEPEX 0x1B
+#define EFI_SECTION_MM_DEPEX 0x1C
+#define EFI_SECTION_SMM_DEPEX EFI_SECTION_MM_DEPEX
///
/// Common section header.
@@ -228,8 +234,8 @@
/// A 24-bit unsigned integer that contains the total size of the section in bytes,
/// including the EFI_COMMON_SECTION_HEADER.
///
- UINT8 Size[3];
- EFI_SECTION_TYPE Type;
+ UINT8 Size[3];
+ EFI_SECTION_TYPE Type;
///
/// Declares the section type.
///
@@ -240,15 +246,15 @@
/// A 24-bit unsigned integer that contains the total size of the section in bytes,
/// including the EFI_COMMON_SECTION_HEADER.
///
- UINT8 Size[3];
+ UINT8 Size[3];
- EFI_SECTION_TYPE Type;
+ EFI_SECTION_TYPE Type;
///
/// If Size is 0xFFFFFF, then ExtendedSize contains the size of the section. If
/// Size is not equal to 0xFFFFFF, then this field does not exist.
///
- UINT32 ExtendedSize;
+ UINT32 ExtendedSize;
} EFI_COMMON_SECTION_HEADER2;
///
@@ -271,15 +277,15 @@
///
/// Usual common section header. CommonHeader.Type = EFI_SECTION_COMPRESSION.
///
- EFI_COMMON_SECTION_HEADER CommonHeader;
+ EFI_COMMON_SECTION_HEADER CommonHeader;
///
/// The UINT32 that indicates the size of the section data after decompression.
///
- UINT32 UncompressedLength;
+ UINT32 UncompressedLength;
///
/// Indicates which compression algorithm is used.
///
- UINT8 CompressionType;
+ UINT8 CompressionType;
} EFI_COMPRESSION_SECTION;
typedef struct {
@@ -306,20 +312,20 @@
/// order to conserve space. The contents of this section are implementation specific, but might contain
/// debug data or detailed integration instructions.
///
-typedef EFI_COMMON_SECTION_HEADER EFI_DISPOSABLE_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_DISPOSABLE_SECTION2;
+typedef EFI_COMMON_SECTION_HEADER EFI_DISPOSABLE_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_DISPOSABLE_SECTION2;
///
/// The leaf section which could be used to determine the dispatch order of DXEs.
///
-typedef EFI_COMMON_SECTION_HEADER EFI_DXE_DEPEX_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_DXE_DEPEX_SECTION2;
+typedef EFI_COMMON_SECTION_HEADER EFI_DXE_DEPEX_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_DXE_DEPEX_SECTION2;
///
/// The leaf section which contains a PI FV.
///
-typedef EFI_COMMON_SECTION_HEADER EFI_FIRMWARE_VOLUME_IMAGE_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_FIRMWARE_VOLUME_IMAGE_SECTION2;
+typedef EFI_COMMON_SECTION_HEADER EFI_FIRMWARE_VOLUME_IMAGE_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_FIRMWARE_VOLUME_IMAGE_SECTION2;
///
/// The leaf section which contains a single GUID.
@@ -328,11 +334,11 @@
///
/// Common section header. CommonHeader.Type = EFI_SECTION_FREEFORM_SUBTYPE_GUID.
///
- EFI_COMMON_SECTION_HEADER CommonHeader;
+ EFI_COMMON_SECTION_HEADER CommonHeader;
///
/// This GUID is defined by the creator of the file. It is a vendor-defined file type.
///
- EFI_GUID SubTypeGuid;
+ EFI_GUID SubTypeGuid;
} EFI_FREEFORM_SUBTYPE_GUID_SECTION;
typedef struct {
@@ -358,19 +364,19 @@
///
/// The common section header. CommonHeader.Type = EFI_SECTION_GUID_DEFINED.
///
- EFI_COMMON_SECTION_HEADER CommonHeader;
+ EFI_COMMON_SECTION_HEADER CommonHeader;
///
/// The GUID that defines the format of the data that follows. It is a vendor-defined section type.
///
- EFI_GUID SectionDefinitionGuid;
+ EFI_GUID SectionDefinitionGuid;
///
/// Contains the offset in bytes from the beginning of the common header to the first byte of the data.
///
- UINT16 DataOffset;
+ UINT16 DataOffset;
///
/// The bit field that declares some specific characteristics of the section contents.
///
- UINT16 Attributes;
+ UINT16 Attributes;
} EFI_GUID_DEFINED_SECTION;
typedef struct {
@@ -395,14 +401,14 @@
///
/// The leaf section which contains PE32+ image.
///
-typedef EFI_COMMON_SECTION_HEADER EFI_PE32_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_PE32_SECTION2;
+typedef EFI_COMMON_SECTION_HEADER EFI_PE32_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_PE32_SECTION2;
///
/// The leaf section used to determine the dispatch order of PEIMs.
///
-typedef EFI_COMMON_SECTION_HEADER EFI_PEI_DEPEX_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_PEI_DEPEX_SECTION2;
+typedef EFI_COMMON_SECTION_HEADER EFI_PEI_DEPEX_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_PEI_DEPEX_SECTION2;
///
/// A leaf section type that contains a position-independent-code (PIC) image.
@@ -413,20 +419,20 @@
/// execute correctly without performing any relocation or other fix-ups. EFI_PIC_SECTION2 must
/// be used if the section is 16MB or larger.
///
-typedef EFI_COMMON_SECTION_HEADER EFI_PIC_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_PIC_SECTION2;
+typedef EFI_COMMON_SECTION_HEADER EFI_PIC_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_PIC_SECTION2;
///
/// The leaf section which constains the position-independent-code image.
///
-typedef EFI_COMMON_SECTION_HEADER EFI_TE_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_TE_SECTION2;
+typedef EFI_COMMON_SECTION_HEADER EFI_TE_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_TE_SECTION2;
///
/// The leaf section which contains an array of zero or more bytes.
///
-typedef EFI_COMMON_SECTION_HEADER EFI_RAW_SECTION;
-typedef EFI_COMMON_SECTION_HEADER2 EFI_RAW_SECTION2;
+typedef EFI_COMMON_SECTION_HEADER EFI_RAW_SECTION;
+typedef EFI_COMMON_SECTION_HEADER2 EFI_RAW_SECTION2;
///
/// The SMM dependency expression section is a leaf section that contains a dependency expression that
@@ -436,7 +442,7 @@
/// The dependency expression may refer to protocols installed in either the UEFI or the SMM protocol
/// database. EFI_SMM_DEPEX_SECTION2 must be used if the section is 16MB or larger.
///
-typedef EFI_COMMON_SECTION_HEADER EFI_SMM_DEPEX_SECTION;
+typedef EFI_COMMON_SECTION_HEADER EFI_SMM_DEPEX_SECTION;
typedef EFI_COMMON_SECTION_HEADER2 EFI_SMM_DEPEX_SECTION2;
///
@@ -444,12 +450,12 @@
/// is human readable file name.
///
typedef struct {
- EFI_COMMON_SECTION_HEADER CommonHeader;
+ EFI_COMMON_SECTION_HEADER CommonHeader;
///
/// Array of unicode string.
///
- CHAR16 FileNameString[1];
+ CHAR16 FileNameString[1];
} EFI_USER_INTERFACE_SECTION;
typedef struct {
@@ -462,13 +468,13 @@
/// an optional unicode string that represents the file revision.
///
typedef struct {
- EFI_COMMON_SECTION_HEADER CommonHeader;
- UINT16 BuildNumber;
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ UINT16 BuildNumber;
///
/// Array of unicode string.
///
- CHAR16 VersionString[1];
+ CHAR16 VersionString[1];
} EFI_VERSION_SECTION;
typedef struct {
@@ -481,11 +487,18 @@
CHAR16 VersionString[1];
} EFI_VERSION_SECTION2;
-#define IS_SECTION2(SectionHeaderPtr) \
- ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff) == 0x00ffffff)
+///
+/// The argument passed as the SectionHeaderPtr parameter to the SECTION_SIZE()
+/// and IS_SECTION2() function-like macros below must not have side effects:
+/// SectionHeaderPtr is evaluated multiple times.
+///
+#define SECTION_SIZE(SectionHeaderPtr) ((UINT32) (\
+ (((EFI_COMMON_SECTION_HEADER *) (UINTN) (SectionHeaderPtr))->Size[0] ) | \
+ (((EFI_COMMON_SECTION_HEADER *) (UINTN) (SectionHeaderPtr))->Size[1] << 8) | \
+ (((EFI_COMMON_SECTION_HEADER *) (UINTN) (SectionHeaderPtr))->Size[2] << 16)))
-#define SECTION_SIZE(SectionHeaderPtr) \
- ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff))
+#define IS_SECTION2(SectionHeaderPtr) \
+ (SECTION_SIZE (SectionHeaderPtr) == 0x00ffffff)
#define SECTION2_SIZE(SectionHeaderPtr) \
(((EFI_COMMON_SECTION_HEADER2 *) (UINTN) SectionHeaderPtr)->ExtendedSize)
@@ -493,4 +506,3 @@
#pragma pack()
#endif
-
diff --git a/src/include/ipxe/efi/Pi/PiFirmwareVolume.h b/src/include/ipxe/efi/Pi/PiFirmwareVolume.h
index e818861..f46134f 100644
--- a/src/include/ipxe/efi/Pi/PiFirmwareVolume.h
+++ b/src/include/ipxe/efi/Pi/PiFirmwareVolume.h
@@ -1,29 +1,23 @@
/** @file
The firmware volume related definitions in PI.
- Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
- PI Version 1.3
+ PI Version 1.6
**/
#ifndef __PI_FIRMWAREVOLUME_H__
#define __PI_FIRMWAREVOLUME_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
///
/// EFI_FV_FILE_ATTRIBUTES
///
-typedef UINT32 EFI_FV_FILE_ATTRIBUTES;
+typedef UINT32 EFI_FV_FILE_ATTRIBUTES;
//
// Value of EFI_FV_FILE_ATTRIBUTES.
@@ -35,70 +29,70 @@
///
/// type of EFI FVB attribute
///
-typedef UINT32 EFI_FVB_ATTRIBUTES_2;
+typedef UINT32 EFI_FVB_ATTRIBUTES_2;
//
// Attributes bit definitions
//
-#define EFI_FVB2_READ_DISABLED_CAP 0x00000001
-#define EFI_FVB2_READ_ENABLED_CAP 0x00000002
-#define EFI_FVB2_READ_STATUS 0x00000004
-#define EFI_FVB2_WRITE_DISABLED_CAP 0x00000008
-#define EFI_FVB2_WRITE_ENABLED_CAP 0x00000010
-#define EFI_FVB2_WRITE_STATUS 0x00000020
-#define EFI_FVB2_LOCK_CAP 0x00000040
-#define EFI_FVB2_LOCK_STATUS 0x00000080
-#define EFI_FVB2_STICKY_WRITE 0x00000200
-#define EFI_FVB2_MEMORY_MAPPED 0x00000400
-#define EFI_FVB2_ERASE_POLARITY 0x00000800
-#define EFI_FVB2_READ_LOCK_CAP 0x00001000
-#define EFI_FVB2_READ_LOCK_STATUS 0x00002000
-#define EFI_FVB2_WRITE_LOCK_CAP 0x00004000
-#define EFI_FVB2_WRITE_LOCK_STATUS 0x00008000
-#define EFI_FVB2_ALIGNMENT 0x001F0000
-#define EFI_FVB2_ALIGNMENT_1 0x00000000
-#define EFI_FVB2_ALIGNMENT_2 0x00010000
-#define EFI_FVB2_ALIGNMENT_4 0x00020000
-#define EFI_FVB2_ALIGNMENT_8 0x00030000
-#define EFI_FVB2_ALIGNMENT_16 0x00040000
-#define EFI_FVB2_ALIGNMENT_32 0x00050000
-#define EFI_FVB2_ALIGNMENT_64 0x00060000
-#define EFI_FVB2_ALIGNMENT_128 0x00070000
-#define EFI_FVB2_ALIGNMENT_256 0x00080000
-#define EFI_FVB2_ALIGNMENT_512 0x00090000
-#define EFI_FVB2_ALIGNMENT_1K 0x000A0000
-#define EFI_FVB2_ALIGNMENT_2K 0x000B0000
-#define EFI_FVB2_ALIGNMENT_4K 0x000C0000
-#define EFI_FVB2_ALIGNMENT_8K 0x000D0000
-#define EFI_FVB2_ALIGNMENT_16K 0x000E0000
-#define EFI_FVB2_ALIGNMENT_32K 0x000F0000
-#define EFI_FVB2_ALIGNMENT_64K 0x00100000
-#define EFI_FVB2_ALIGNMENT_128K 0x00110000
-#define EFI_FVB2_ALIGNMENT_256K 0x00120000
-#define EFI_FVB2_ALIGNMENT_512K 0x00130000
-#define EFI_FVB2_ALIGNMENT_1M 0x00140000
-#define EFI_FVB2_ALIGNMENT_2M 0x00150000
-#define EFI_FVB2_ALIGNMENT_4M 0x00160000
-#define EFI_FVB2_ALIGNMENT_8M 0x00170000
-#define EFI_FVB2_ALIGNMENT_16M 0x00180000
-#define EFI_FVB2_ALIGNMENT_32M 0x00190000
-#define EFI_FVB2_ALIGNMENT_64M 0x001A0000
-#define EFI_FVB2_ALIGNMENT_128M 0x001B0000
-#define EFI_FVB2_ALIGNMENT_256M 0x001C0000
-#define EFI_FVB2_ALIGNMENT_512M 0x001D0000
-#define EFI_FVB2_ALIGNMENT_1G 0x001E0000
-#define EFI_FVB2_ALIGNMENT_2G 0x001F0000
-#define EFI_FVB2_WEAK_ALIGNMENT 0x80000000
+#define EFI_FVB2_READ_DISABLED_CAP 0x00000001
+#define EFI_FVB2_READ_ENABLED_CAP 0x00000002
+#define EFI_FVB2_READ_STATUS 0x00000004
+#define EFI_FVB2_WRITE_DISABLED_CAP 0x00000008
+#define EFI_FVB2_WRITE_ENABLED_CAP 0x00000010
+#define EFI_FVB2_WRITE_STATUS 0x00000020
+#define EFI_FVB2_LOCK_CAP 0x00000040
+#define EFI_FVB2_LOCK_STATUS 0x00000080
+#define EFI_FVB2_STICKY_WRITE 0x00000200
+#define EFI_FVB2_MEMORY_MAPPED 0x00000400
+#define EFI_FVB2_ERASE_POLARITY 0x00000800
+#define EFI_FVB2_READ_LOCK_CAP 0x00001000
+#define EFI_FVB2_READ_LOCK_STATUS 0x00002000
+#define EFI_FVB2_WRITE_LOCK_CAP 0x00004000
+#define EFI_FVB2_WRITE_LOCK_STATUS 0x00008000
+#define EFI_FVB2_ALIGNMENT 0x001F0000
+#define EFI_FVB2_ALIGNMENT_1 0x00000000
+#define EFI_FVB2_ALIGNMENT_2 0x00010000
+#define EFI_FVB2_ALIGNMENT_4 0x00020000
+#define EFI_FVB2_ALIGNMENT_8 0x00030000
+#define EFI_FVB2_ALIGNMENT_16 0x00040000
+#define EFI_FVB2_ALIGNMENT_32 0x00050000
+#define EFI_FVB2_ALIGNMENT_64 0x00060000
+#define EFI_FVB2_ALIGNMENT_128 0x00070000
+#define EFI_FVB2_ALIGNMENT_256 0x00080000
+#define EFI_FVB2_ALIGNMENT_512 0x00090000
+#define EFI_FVB2_ALIGNMENT_1K 0x000A0000
+#define EFI_FVB2_ALIGNMENT_2K 0x000B0000
+#define EFI_FVB2_ALIGNMENT_4K 0x000C0000
+#define EFI_FVB2_ALIGNMENT_8K 0x000D0000
+#define EFI_FVB2_ALIGNMENT_16K 0x000E0000
+#define EFI_FVB2_ALIGNMENT_32K 0x000F0000
+#define EFI_FVB2_ALIGNMENT_64K 0x00100000
+#define EFI_FVB2_ALIGNMENT_128K 0x00110000
+#define EFI_FVB2_ALIGNMENT_256K 0x00120000
+#define EFI_FVB2_ALIGNMENT_512K 0x00130000
+#define EFI_FVB2_ALIGNMENT_1M 0x00140000
+#define EFI_FVB2_ALIGNMENT_2M 0x00150000
+#define EFI_FVB2_ALIGNMENT_4M 0x00160000
+#define EFI_FVB2_ALIGNMENT_8M 0x00170000
+#define EFI_FVB2_ALIGNMENT_16M 0x00180000
+#define EFI_FVB2_ALIGNMENT_32M 0x00190000
+#define EFI_FVB2_ALIGNMENT_64M 0x001A0000
+#define EFI_FVB2_ALIGNMENT_128M 0x001B0000
+#define EFI_FVB2_ALIGNMENT_256M 0x001C0000
+#define EFI_FVB2_ALIGNMENT_512M 0x001D0000
+#define EFI_FVB2_ALIGNMENT_1G 0x001E0000
+#define EFI_FVB2_ALIGNMENT_2G 0x001F0000
+#define EFI_FVB2_WEAK_ALIGNMENT 0x80000000
typedef struct {
///
/// The number of sequential blocks which are of the same size.
///
- UINT32 NumBlocks;
+ UINT32 NumBlocks;
///
/// The size of the blocks.
///
- UINT32 Length;
+ UINT32 Length;
} EFI_FV_BLOCK_MAP_ENTRY;
///
@@ -155,7 +149,7 @@
EFI_FV_BLOCK_MAP_ENTRY BlockMap[1];
} EFI_FIRMWARE_VOLUME_HEADER;
-#define EFI_FVH_SIGNATURE SIGNATURE_32 ('_', 'F', 'V', 'H')
+#define EFI_FVH_SIGNATURE SIGNATURE_32 ('_', 'F', 'V', 'H')
///
/// Firmware Volume Header Revision definition
@@ -169,11 +163,11 @@
///
/// Firmware volume name.
///
- EFI_GUID FvName;
+ EFI_GUID FvName;
///
/// Size of the rest of the extension header, including this structure.
///
- UINT32 ExtHeaderSize;
+ UINT32 ExtHeaderSize;
} EFI_FIRMWARE_VOLUME_EXT_HEADER;
///
@@ -198,12 +192,12 @@
///
/// Standard extension entry, with the type EFI_FV_EXT_TYPE_OEM_TYPE.
///
- EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
+ EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
///
/// A bit mask, one bit for each file type between 0xC0 (bit 0) and 0xDF (bit 31). If a bit
/// is '1', then the GUID entry exists in Types. If a bit is '0' then no GUID entry exists in Types.
///
- UINT32 TypeMask;
+ UINT32 TypeMask;
///
/// An array of GUIDs, each GUID representing an OEM file type.
///
@@ -211,7 +205,7 @@
///
} EFI_FIRMWARE_VOLUME_EXT_ENTRY_OEM_TYPE;
-#define EFI_FV_EXT_TYPE_GUID_TYPE 0x0002
+#define EFI_FV_EXT_TYPE_GUID_TYPE 0x0002
///
/// This extension header EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE provides a vendor specific
@@ -221,11 +215,11 @@
///
/// Standard extension entry, with the type EFI_FV_EXT_TYPE_OEM_TYPE.
///
- EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
+ EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
///
/// Vendor-specific GUID.
///
- EFI_GUID FormatType;
+ EFI_GUID FormatType;
///
/// An arry of bytes of length Length.
///
@@ -233,4 +227,23 @@
///
} EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE;
+#define EFI_FV_EXT_TYPE_USED_SIZE_TYPE 0x03
+
+///
+/// The EFI_FIRMWARE_VOLUME_EXT_ENTRY_USED_SIZE_TYPE can be used to find
+/// out how many EFI_FVB2_ERASE_POLARITY bytes are at the end of the FV.
+///
+typedef struct {
+ ///
+ /// Standard extension entry, with the type EFI_FV_EXT_TYPE_USED_SIZE_TYPE.
+ ///
+ EFI_FIRMWARE_VOLUME_EXT_ENTRY Hdr;
+ ///
+ /// The number of bytes of the FV that are in uses. The remaining
+ /// EFI_FIRMWARE_VOLUME_HEADER FvLength minus UsedSize bytes in
+ /// the FV must contain the value implied by EFI_FVB2_ERASE_POLARITY.
+ ///
+ UINT32 UsedSize;
+} EFI_FIRMWARE_VOLUME_EXT_ENTRY_USED_SIZE_TYPE;
+
#endif
diff --git a/src/include/ipxe/efi/Pi/PiHob.h b/src/include/ipxe/efi/Pi/PiHob.h
index 2663b05..5ecdf32 100644
--- a/src/include/ipxe/efi/Pi/PiHob.h
+++ b/src/include/ipxe/efi/Pi/PiHob.h
@@ -1,24 +1,18 @@
/** @file
HOB related definitions in PI.
-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
- PI Version 1.4a
+ PI Version 1.6
**/
#ifndef __PI_HOB_H__
#define __PI_HOB_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
//
// HobType of EFI_HOB_GENERIC_HEADER.
@@ -33,6 +27,7 @@
#define EFI_HOB_TYPE_FV2 0x0009
#define EFI_HOB_TYPE_LOAD_PEIM_UNUSED 0x000A
#define EFI_HOB_TYPE_UEFI_CAPSULE 0x000B
+#define EFI_HOB_TYPE_FV3 0x000C
#define EFI_HOB_TYPE_UNUSED 0xFFFE
#define EFI_HOB_TYPE_END_OF_HOB_LIST 0xFFFF
@@ -55,11 +50,10 @@
UINT32 Reserved;
} EFI_HOB_GENERIC_HEADER;
-
///
/// Value of version in EFI_HOB_HANDOFF_INFO_TABLE.
///
-#define EFI_HOB_HANDOFF_TABLE_VERSION 0x0009
+#define EFI_HOB_HANDOFF_TABLE_VERSION 0x0009
///
/// Contains general state information used by the HOB producer phase.
@@ -69,39 +63,39 @@
///
/// The HOB generic header. Header.HobType = EFI_HOB_TYPE_HANDOFF.
///
- EFI_HOB_GENERIC_HEADER Header;
+ EFI_HOB_GENERIC_HEADER Header;
///
/// The version number pertaining to the PHIT HOB definition.
/// This value is four bytes in length to provide an 8-byte aligned entry
/// when it is combined with the 4-byte BootMode.
///
- UINT32 Version;
+ UINT32 Version;
///
/// The system boot mode as determined during the HOB producer phase.
///
- EFI_BOOT_MODE BootMode;
+ EFI_BOOT_MODE BootMode;
///
/// The highest address location of memory that is allocated for use by the HOB producer
/// phase. This address must be 4-KB aligned to meet page restrictions of UEFI.
///
- EFI_PHYSICAL_ADDRESS EfiMemoryTop;
+ EFI_PHYSICAL_ADDRESS EfiMemoryTop;
///
/// The lowest address location of memory that is allocated for use by the HOB producer phase.
///
- EFI_PHYSICAL_ADDRESS EfiMemoryBottom;
+ EFI_PHYSICAL_ADDRESS EfiMemoryBottom;
///
/// The highest address location of free memory that is currently available
/// for use by the HOB producer phase.
///
- EFI_PHYSICAL_ADDRESS EfiFreeMemoryTop;
+ EFI_PHYSICAL_ADDRESS EfiFreeMemoryTop;
///
/// The lowest address location of free memory that is available for use by the HOB producer phase.
///
- EFI_PHYSICAL_ADDRESS EfiFreeMemoryBottom;
+ EFI_PHYSICAL_ADDRESS EfiFreeMemoryBottom;
///
/// The end of the HOB list.
///
- EFI_PHYSICAL_ADDRESS EfiEndOfHobList;
+ EFI_PHYSICAL_ADDRESS EfiEndOfHobList;
} EFI_HOB_HANDOFF_INFO_TABLE;
///
@@ -117,31 +111,31 @@
/// Type EFI_GUID is defined in InstallProtocolInterface() in the UEFI 2.0
/// specification.
///
- EFI_GUID Name;
+ EFI_GUID Name;
///
/// The base address of memory allocated by this HOB. Type
/// EFI_PHYSICAL_ADDRESS is defined in AllocatePages() in the UEFI 2.0
/// specification.
///
- EFI_PHYSICAL_ADDRESS MemoryBaseAddress;
+ EFI_PHYSICAL_ADDRESS MemoryBaseAddress;
///
/// The length in bytes of memory allocated by this HOB.
///
- UINT64 MemoryLength;
+ UINT64 MemoryLength;
///
/// Defines the type of memory allocated by this HOB. The memory type definition
/// follows the EFI_MEMORY_TYPE definition. Type EFI_MEMORY_TYPE is defined
/// in AllocatePages() in the UEFI 2.0 specification.
///
- EFI_MEMORY_TYPE MemoryType;
+ EFI_MEMORY_TYPE MemoryType;
///
/// Padding for Itanium processor family
///
- UINT8 Reserved[4];
+ UINT8 Reserved[4];
} EFI_HOB_MEMORY_ALLOCATION_HEADER;
///
@@ -153,19 +147,18 @@
///
/// The HOB generic header. Header.HobType = EFI_HOB_TYPE_MEMORY_ALLOCATION.
///
- EFI_HOB_GENERIC_HEADER Header;
+ EFI_HOB_GENERIC_HEADER Header;
///
/// An instance of the EFI_HOB_MEMORY_ALLOCATION_HEADER that describes the
/// various attributes of the logical memory allocation.
///
- EFI_HOB_MEMORY_ALLOCATION_HEADER AllocDescriptor;
+ EFI_HOB_MEMORY_ALLOCATION_HEADER AllocDescriptor;
//
// Additional data pertaining to the "Name" Guid memory
// may go here.
//
} EFI_HOB_MEMORY_ALLOCATION;
-
///
/// Describes the memory stack that is produced by the HOB producer
/// phase and upon which all post-memory-installed executable
@@ -175,12 +168,12 @@
///
/// The HOB generic header. Header.HobType = EFI_HOB_TYPE_MEMORY_ALLOCATION.
///
- EFI_HOB_GENERIC_HEADER Header;
+ EFI_HOB_GENERIC_HEADER Header;
///
/// An instance of the EFI_HOB_MEMORY_ALLOCATION_HEADER that describes the
/// various attributes of the logical memory allocation.
///
- EFI_HOB_MEMORY_ALLOCATION_HEADER AllocDescriptor;
+ EFI_HOB_MEMORY_ALLOCATION_HEADER AllocDescriptor;
} EFI_HOB_MEMORY_ALLOCATION_STACK;
///
@@ -193,12 +186,12 @@
///
/// The HOB generic header. Header.HobType = EFI_HOB_TYPE_MEMORY_ALLOCATION.
///
- EFI_HOB_GENERIC_HEADER Header;
+ EFI_HOB_GENERIC_HEADER Header;
///
/// An instance of the EFI_HOB_MEMORY_ALLOCATION_HEADER that describes the
/// various attributes of the logical memory allocation.
///
- EFI_HOB_MEMORY_ALLOCATION_HEADER AllocDescriptor;
+ EFI_HOB_MEMORY_ALLOCATION_HEADER AllocDescriptor;
} EFI_HOB_MEMORY_ALLOCATION_BSP_STORE;
///
@@ -208,22 +201,22 @@
///
/// The HOB generic header. Header.HobType = EFI_HOB_TYPE_MEMORY_ALLOCATION.
///
- EFI_HOB_GENERIC_HEADER Header;
+ EFI_HOB_GENERIC_HEADER Header;
///
/// An instance of the EFI_HOB_MEMORY_ALLOCATION_HEADER that describes the
/// various attributes of the logical memory allocation.
///
- EFI_HOB_MEMORY_ALLOCATION_HEADER MemoryAllocationHeader;
+ EFI_HOB_MEMORY_ALLOCATION_HEADER MemoryAllocationHeader;
///
/// The GUID specifying the values of the firmware file system name
/// that contains the HOB consumer phase component.
///
- EFI_GUID ModuleName;
+ EFI_GUID ModuleName;
///
/// The address of the memory-mapped firmware volume
/// that contains the HOB consumer phase firmware file.
///
- EFI_PHYSICAL_ADDRESS EntryPoint;
+ EFI_PHYSICAL_ADDRESS EntryPoint;
} EFI_HOB_MEMORY_ALLOCATION_MODULE;
///
@@ -241,7 +234,16 @@
#define EFI_RESOURCE_MEMORY_MAPPED_IO_PORT 0x00000004
#define EFI_RESOURCE_MEMORY_RESERVED 0x00000005
#define EFI_RESOURCE_IO_RESERVED 0x00000006
-#define EFI_RESOURCE_MAX_MEMORY_TYPE 0x00000007
+//
+// BZ3937_EFI_RESOURCE_MEMORY_UNACCEPTED is defined for unaccepted memory.
+// But this defitinion has not been officially in the PI spec. Base
+// on the code-first we define BZ3937_EFI_RESOURCE_MEMORY_UNACCEPTED at
+// MdeModulePkg/Include/Pi/PrePiHob.h and update EFI_RESOURCE_MAX_MEMORY_TYPE
+// to 8. After BZ3937_EFI_RESOURCE_MEMORY_UNACCEPTED is officially published
+// in PI spec, we will re-visit here.
+//
+// #define BZ3937_EFI_RESOURCE_MEMORY_UNACCEPTED 0x00000007
+#define EFI_RESOURCE_MAX_MEMORY_TYPE 0x00000008
///
/// A type of recount attribute type.
@@ -253,10 +255,10 @@
//
// The following attributes are used to describe settings
//
-#define EFI_RESOURCE_ATTRIBUTE_PRESENT 0x00000001
-#define EFI_RESOURCE_ATTRIBUTE_INITIALIZED 0x00000002
-#define EFI_RESOURCE_ATTRIBUTE_TESTED 0x00000004
-#define EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED 0x00000080
+#define EFI_RESOURCE_ATTRIBUTE_PRESENT 0x00000001
+#define EFI_RESOURCE_ATTRIBUTE_INITIALIZED 0x00000002
+#define EFI_RESOURCE_ATTRIBUTE_TESTED 0x00000004
+#define EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED 0x00000080
//
// This is typically used as memory cacheability attribute today.
// NOTE: Since PI spec 1.4, please use EFI_RESOURCE_ATTRIBUTE_READ_ONLY_PROTECTED
@@ -264,9 +266,9 @@
// means Memory cacheability attribute: The memory supports being programmed with
// a writeprotected cacheable attribute.
//
-#define EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED 0x00000100
-#define EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED 0x00000200
-#define EFI_RESOURCE_ATTRIBUTE_PERSISTENT 0x00800000
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED 0x00000100
+#define EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED 0x00000200
+#define EFI_RESOURCE_ATTRIBUTE_PERSISTENT 0x00800000
//
// The rest of the attributes are used to describe capabilities
//
@@ -290,12 +292,12 @@
// writes, and EFI_RESOURCE_ATTRIBUTE_WRITE_PROTEC TABLE means Memory cacheability attribute:
// The memory supports being programmed with a writeprotected cacheable attribute.
//
-#define EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTABLE 0x00200000
-#define EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTABLE 0x00400000
-#define EFI_RESOURCE_ATTRIBUTE_PERSISTABLE 0x01000000
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTABLE 0x00200000
+#define EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTABLE 0x00400000
+#define EFI_RESOURCE_ATTRIBUTE_PERSISTABLE 0x01000000
-#define EFI_RESOURCE_ATTRIBUTE_READ_ONLY_PROTECTED 0x00040000
-#define EFI_RESOURCE_ATTRIBUTE_READ_ONLY_PROTECTABLE 0x00080000
+#define EFI_RESOURCE_ATTRIBUTE_READ_ONLY_PROTECTED 0x00040000
+#define EFI_RESOURCE_ATTRIBUTE_READ_ONLY_PROTECTABLE 0x00080000
//
// Physical memory relative reliability attribute. This
@@ -303,7 +305,7 @@
// memory in the system. If all memory has the same
// reliability, then this bit is not used.
//
-#define EFI_RESOURCE_ATTRIBUTE_MORE_RELIABLE 0x02000000
+#define EFI_RESOURCE_ATTRIBUTE_MORE_RELIABLE 0x02000000
///
/// Describes the resource properties of all fixed,
@@ -314,28 +316,28 @@
///
/// The HOB generic header. Header.HobType = EFI_HOB_TYPE_RESOURCE_DESCRIPTOR.
///
- EFI_HOB_GENERIC_HEADER Header;
+ EFI_HOB_GENERIC_HEADER Header;
///
/// A GUID representing the owner of the resource. This GUID is used by HOB
/// consumer phase components to correlate device ownership of a resource.
///
- EFI_GUID Owner;
+ EFI_GUID Owner;
///
/// The resource type enumeration as defined by EFI_RESOURCE_TYPE.
///
- EFI_RESOURCE_TYPE ResourceType;
+ EFI_RESOURCE_TYPE ResourceType;
///
/// Resource attributes as defined by EFI_RESOURCE_ATTRIBUTE_TYPE.
///
- EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute;
+ EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute;
///
/// The physical start address of the resource region.
///
- EFI_PHYSICAL_ADDRESS PhysicalStart;
+ EFI_PHYSICAL_ADDRESS PhysicalStart;
///
/// The number of bytes of the resource region.
///
- UINT64 ResourceLength;
+ UINT64 ResourceLength;
} EFI_HOB_RESOURCE_DESCRIPTOR;
///
@@ -346,11 +348,11 @@
///
/// The HOB generic header. Header.HobType = EFI_HOB_TYPE_GUID_EXTENSION.
///
- EFI_HOB_GENERIC_HEADER Header;
+ EFI_HOB_GENERIC_HEADER Header;
///
/// A GUID that defines the contents of this HOB.
///
- EFI_GUID Name;
+ EFI_GUID Name;
//
// Guid specific data goes here
//
@@ -363,15 +365,15 @@
///
/// The HOB generic header. Header.HobType = EFI_HOB_TYPE_FV.
///
- EFI_HOB_GENERIC_HEADER Header;
+ EFI_HOB_GENERIC_HEADER Header;
///
/// The physical memory-mapped base address of the firmware volume.
///
- EFI_PHYSICAL_ADDRESS BaseAddress;
+ EFI_PHYSICAL_ADDRESS BaseAddress;
///
/// The length in bytes of the firmware volume.
///
- UINT64 Length;
+ UINT64 Length;
} EFI_HOB_FIRMWARE_VOLUME;
///
@@ -382,25 +384,62 @@
///
/// The HOB generic header. Header.HobType = EFI_HOB_TYPE_FV2.
///
- EFI_HOB_GENERIC_HEADER Header;
+ EFI_HOB_GENERIC_HEADER Header;
///
/// The physical memory-mapped base address of the firmware volume.
///
- EFI_PHYSICAL_ADDRESS BaseAddress;
+ EFI_PHYSICAL_ADDRESS BaseAddress;
///
/// The length in bytes of the firmware volume.
///
- UINT64 Length;
+ UINT64 Length;
///
/// The name of the firmware volume.
///
- EFI_GUID FvName;
+ EFI_GUID FvName;
///
/// The name of the firmware file that contained this firmware volume.
///
- EFI_GUID FileName;
+ EFI_GUID FileName;
} EFI_HOB_FIRMWARE_VOLUME2;
+///
+/// Details the location of a firmware volume that was extracted
+/// from a file within another firmware volume.
+///
+typedef struct {
+ ///
+ /// The HOB generic header. Header.HobType = EFI_HOB_TYPE_FV3.
+ ///
+ EFI_HOB_GENERIC_HEADER Header;
+ ///
+ /// The physical memory-mapped base address of the firmware volume.
+ ///
+ EFI_PHYSICAL_ADDRESS BaseAddress;
+ ///
+ /// The length in bytes of the firmware volume.
+ ///
+ UINT64 Length;
+ ///
+ /// The authentication status.
+ ///
+ UINT32 AuthenticationStatus;
+ ///
+ /// TRUE if the FV was extracted as a file within another firmware volume.
+ /// FALSE otherwise.
+ ///
+ BOOLEAN ExtractedFv;
+ ///
+ /// The name of the firmware volume.
+ /// Valid only if IsExtractedFv is TRUE.
+ ///
+ EFI_GUID FvName;
+ ///
+ /// The name of the firmware file that contained this firmware volume.
+ /// Valid only if IsExtractedFv is TRUE.
+ ///
+ EFI_GUID FileName;
+} EFI_HOB_FIRMWARE_VOLUME3;
///
/// Describes processor information, such as address space and I/O space capabilities.
@@ -409,22 +448,21 @@
///
/// The HOB generic header. Header.HobType = EFI_HOB_TYPE_CPU.
///
- EFI_HOB_GENERIC_HEADER Header;
+ EFI_HOB_GENERIC_HEADER Header;
///
/// Identifies the maximum physical memory addressability of the processor.
///
- UINT8 SizeOfMemorySpace;
+ UINT8 SizeOfMemorySpace;
///
/// Identifies the maximum physical I/O addressability of the processor.
///
- UINT8 SizeOfIoSpace;
+ UINT8 SizeOfIoSpace;
///
/// This field will always be set to zero.
///
- UINT8 Reserved[6];
+ UINT8 Reserved[6];
} EFI_HOB_CPU;
-
///
/// Describes pool memory allocations.
///
@@ -432,7 +470,7 @@
///
/// The HOB generic header. Header.HobType = EFI_HOB_TYPE_MEMORY_POOL.
///
- EFI_HOB_GENERIC_HEADER Header;
+ EFI_HOB_GENERIC_HEADER Header;
} EFI_HOB_MEMORY_POOL;
///
@@ -446,36 +484,36 @@
///
/// The HOB generic header where Header.HobType = EFI_HOB_TYPE_UEFI_CAPSULE.
///
- EFI_HOB_GENERIC_HEADER Header;
+ EFI_HOB_GENERIC_HEADER Header;
///
/// The physical memory-mapped base address of an UEFI capsule. This value is set to
/// point to the base of the contiguous memory of the UEFI capsule.
/// The length of the contiguous memory in bytes.
///
- EFI_PHYSICAL_ADDRESS BaseAddress;
- UINT64 Length;
+ EFI_PHYSICAL_ADDRESS BaseAddress;
+ UINT64 Length;
} EFI_HOB_UEFI_CAPSULE;
///
/// Union of all the possible HOB Types.
///
typedef union {
- EFI_HOB_GENERIC_HEADER *Header;
- EFI_HOB_HANDOFF_INFO_TABLE *HandoffInformationTable;
- EFI_HOB_MEMORY_ALLOCATION *MemoryAllocation;
- EFI_HOB_MEMORY_ALLOCATION_BSP_STORE *MemoryAllocationBspStore;
- EFI_HOB_MEMORY_ALLOCATION_STACK *MemoryAllocationStack;
- EFI_HOB_MEMORY_ALLOCATION_MODULE *MemoryAllocationModule;
- EFI_HOB_RESOURCE_DESCRIPTOR *ResourceDescriptor;
- EFI_HOB_GUID_TYPE *Guid;
- EFI_HOB_FIRMWARE_VOLUME *FirmwareVolume;
- EFI_HOB_FIRMWARE_VOLUME2 *FirmwareVolume2;
- EFI_HOB_CPU *Cpu;
- EFI_HOB_MEMORY_POOL *Pool;
- EFI_HOB_UEFI_CAPSULE *Capsule;
- UINT8 *Raw;
+ EFI_HOB_GENERIC_HEADER *Header;
+ EFI_HOB_HANDOFF_INFO_TABLE *HandoffInformationTable;
+ EFI_HOB_MEMORY_ALLOCATION *MemoryAllocation;
+ EFI_HOB_MEMORY_ALLOCATION_BSP_STORE *MemoryAllocationBspStore;
+ EFI_HOB_MEMORY_ALLOCATION_STACK *MemoryAllocationStack;
+ EFI_HOB_MEMORY_ALLOCATION_MODULE *MemoryAllocationModule;
+ EFI_HOB_RESOURCE_DESCRIPTOR *ResourceDescriptor;
+ EFI_HOB_GUID_TYPE *Guid;
+ EFI_HOB_FIRMWARE_VOLUME *FirmwareVolume;
+ EFI_HOB_FIRMWARE_VOLUME2 *FirmwareVolume2;
+ EFI_HOB_FIRMWARE_VOLUME3 *FirmwareVolume3;
+ EFI_HOB_CPU *Cpu;
+ EFI_HOB_MEMORY_POOL *Pool;
+ EFI_HOB_UEFI_CAPSULE *Capsule;
+ UINT8 *Raw;
} EFI_PEI_HOB_POINTERS;
-
#endif
diff --git a/src/include/ipxe/efi/Pi/PiMultiPhase.h b/src/include/ipxe/efi/Pi/PiMultiPhase.h
index f35bb14..e631821 100644
--- a/src/include/ipxe/efi/Pi/PiMultiPhase.h
+++ b/src/include/ipxe/efi/Pi/PiMultiPhase.h
@@ -1,14 +1,8 @@
/** @file
Include file matches things in PI for multiple module types.
-Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
These elements are defined in UEFI Platform Initialization Specification 1.2.
@@ -18,7 +12,7 @@
#ifndef __PI_MULTIPHASE_H__
#define __PI_MULTIPHASE_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/Pi/PiFirmwareVolume.h>
#include <ipxe/efi/Pi/PiFirmwareFile.h>
@@ -52,26 +46,26 @@
/// If this value is returned by an API, it means the capability is not yet
/// installed/available/ready to use.
///
-#define EFI_NOT_AVAILABLE_YET DXE_ERROR (2)
+#define EFI_NOT_AVAILABLE_YET DXE_ERROR (2)
///
/// Success and warning codes reserved for use by PI.
/// Supported 32-bit range is 0x20000000-0x3fffffff.
/// Supported 64-bit range is 0x2000000000000000-0x3fffffffffffffff.
///
-#define PI_ENCODE_WARNING(a) ((MAX_BIT >> 2) | (a))
+#define PI_ENCODE_WARNING(a) ((MAX_BIT >> 2) | (a))
///
/// Error codes reserved for use by PI.
/// Supported 32-bit range is 0xa0000000-0xbfffffff.
/// Supported 64-bit range is 0xa000000000000000-0xbfffffffffffffff.
///
-#define PI_ENCODE_ERROR(a) (MAX_BIT | (MAX_BIT >> 2) | (a))
+#define PI_ENCODE_ERROR(a) (MAX_BIT | (MAX_BIT >> 2) | (a))
///
/// Return status codes defined in SMM CIS.
///
-#define EFI_INTERRUPT_PENDING PI_ENCODE_ERROR (0)
+#define EFI_INTERRUPT_PENDING PI_ENCODE_ERROR (0)
#define EFI_WARN_INTERRUPT_SOURCE_PENDING PI_ENCODE_WARNING (0)
#define EFI_WARN_INTERRUPT_SOURCE_QUIESCED PI_ENCODE_WARNING (1)
@@ -89,51 +83,73 @@
/// 1010 Image was signed, the signature was tested, and the signature failed the authentication test.
///
///@{
-#define EFI_AUTH_STATUS_PLATFORM_OVERRIDE 0x01
-#define EFI_AUTH_STATUS_IMAGE_SIGNED 0x02
-#define EFI_AUTH_STATUS_NOT_TESTED 0x04
-#define EFI_AUTH_STATUS_TEST_FAILED 0x08
-#define EFI_AUTH_STATUS_ALL 0x0f
+#define EFI_AUTH_STATUS_PLATFORM_OVERRIDE 0x01
+#define EFI_AUTH_STATUS_IMAGE_SIGNED 0x02
+#define EFI_AUTH_STATUS_NOT_TESTED 0x04
+#define EFI_AUTH_STATUS_TEST_FAILED 0x08
+#define EFI_AUTH_STATUS_ALL 0x0f
///@}
///
-/// SMRAM states and capabilities
+/// MMRAM states and capabilities
///
-#define EFI_SMRAM_OPEN 0x00000001
-#define EFI_SMRAM_CLOSED 0x00000002
-#define EFI_SMRAM_LOCKED 0x00000004
-#define EFI_CACHEABLE 0x00000008
-#define EFI_ALLOCATED 0x00000010
-#define EFI_NEEDS_TESTING 0x00000020
-#define EFI_NEEDS_ECC_INITIALIZATION 0x00000040
+#define EFI_MMRAM_OPEN 0x00000001
+#define EFI_MMRAM_CLOSED 0x00000002
+#define EFI_MMRAM_LOCKED 0x00000004
+#define EFI_CACHEABLE 0x00000008
+#define EFI_ALLOCATED 0x00000010
+#define EFI_NEEDS_TESTING 0x00000020
+#define EFI_NEEDS_ECC_INITIALIZATION 0x00000040
+
+#define EFI_SMRAM_OPEN EFI_MMRAM_OPEN
+#define EFI_SMRAM_CLOSED EFI_MMRAM_CLOSED
+#define EFI_SMRAM_LOCKED EFI_MMRAM_LOCKED
///
-/// Structure describing a SMRAM region and its accessibility attributes.
+/// Structure describing a MMRAM region and its accessibility attributes.
///
typedef struct {
///
- /// Designates the physical address of the SMRAM in memory. This view of memory is
+ /// Designates the physical address of the MMRAM in memory. This view of memory is
/// the same as seen by I/O-based agents, for example, but it may not be the address seen
/// by the processors.
///
- EFI_PHYSICAL_ADDRESS PhysicalStart;
+ EFI_PHYSICAL_ADDRESS PhysicalStart;
///
- /// Designates the address of the SMRAM, as seen by software executing on the
+ /// Designates the address of the MMRAM, as seen by software executing on the
/// processors. This address may or may not match PhysicalStart.
///
- EFI_PHYSICAL_ADDRESS CpuStart;
+ EFI_PHYSICAL_ADDRESS CpuStart;
///
- /// Describes the number of bytes in the SMRAM region.
+ /// Describes the number of bytes in the MMRAM region.
///
- UINT64 PhysicalSize;
+ UINT64 PhysicalSize;
///
- /// Describes the accessibility attributes of the SMRAM. These attributes include the
+ /// Describes the accessibility attributes of the MMRAM. These attributes include the
/// hardware state (e.g., Open/Closed/Locked), capability (e.g., cacheable), logical
/// allocation (e.g., allocated), and pre-use initialization (e.g., needs testing/ECC
/// initialization).
///
- UINT64 RegionState;
-} EFI_SMRAM_DESCRIPTOR;
+ UINT64 RegionState;
+} EFI_MMRAM_DESCRIPTOR;
+
+typedef EFI_MMRAM_DESCRIPTOR EFI_SMRAM_DESCRIPTOR;
+
+///
+/// Structure describing a MMRAM region which cannot be used for the MMRAM heap.
+///
+typedef struct _EFI_MM_RESERVED_MMRAM_REGION {
+ ///
+ /// Starting address of the reserved MMRAM area, as it appears while MMRAM is open.
+ /// Ignored if MmramReservedSize is 0.
+ ///
+ EFI_PHYSICAL_ADDRESS MmramReservedStart;
+ ///
+ /// Number of bytes occupied by the reserved MMRAM area. A size of zero indicates the
+ /// last MMRAM area.
+ ///
+ UINT64 MmramReservedSize;
+} EFI_MM_RESERVED_MMRAM_REGION;
typedef enum {
EFI_PCD_TYPE_8,
@@ -149,19 +165,19 @@
/// The returned information associated with the requested TokenNumber. If
/// TokenNumber is 0, then PcdType is set to EFI_PCD_TYPE_8.
///
- EFI_PCD_TYPE PcdType;
+ EFI_PCD_TYPE PcdType;
///
/// The size of the data in bytes associated with the TokenNumber specified. If
/// TokenNumber is 0, then PcdSize is set 0.
///
- UINTN PcdSize;
+ UINTN PcdSize;
///
/// The null-terminated ASCII string associated with a given token. If the
/// TokenNumber specified was 0, then this field corresponds to the null-terminated
/// ASCII string associated with the token's namespace Guid. If NULL, there is no
/// name associated with this request.
///
- CHAR8 *PcdName;
+ CHAR8 *PcdName;
} EFI_PCD_INFO;
/**
@@ -178,4 +194,20 @@
IN OUT VOID *Buffer
);
+/**
+ The function prototype for invoking a function on an Application Processor.
+
+ This definition is used by the UEFI MM MP Serices Protocol.
+
+ @param[in] ProcedureArgument The pointer to private data buffer.
+
+ @retval EFI_SUCCESS Excutive the procedure successfully
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_AP_PROCEDURE2)(
+ IN VOID *ProcedureArgument
+ );
+
#endif
diff --git a/src/include/ipxe/efi/Pi/PiS3BootScript.h b/src/include/ipxe/efi/Pi/PiS3BootScript.h
index 01cae15..f016e12 100644
--- a/src/include/ipxe/efi/Pi/PiS3BootScript.h
+++ b/src/include/ipxe/efi/Pi/PiS3BootScript.h
@@ -2,46 +2,40 @@
This file contains the boot script defintions that are shared between the
Boot Script Executor PPI and the Boot Script Save Protocol.
- Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _PI_S3_BOOT_SCRIPT_H_
#define _PI_S3_BOOT_SCRIPT_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
-//*******************************************
+// *******************************************
// EFI Boot Script Opcode definitions
-//*******************************************
-#define EFI_BOOT_SCRIPT_IO_WRITE_OPCODE 0x00
-#define EFI_BOOT_SCRIPT_IO_READ_WRITE_OPCODE 0x01
-#define EFI_BOOT_SCRIPT_MEM_WRITE_OPCODE 0x02
-#define EFI_BOOT_SCRIPT_MEM_READ_WRITE_OPCODE 0x03
-#define EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE_OPCODE 0x04
-#define EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE_OPCODE 0x05
-#define EFI_BOOT_SCRIPT_SMBUS_EXECUTE_OPCODE 0x06
-#define EFI_BOOT_SCRIPT_STALL_OPCODE 0x07
-#define EFI_BOOT_SCRIPT_DISPATCH_OPCODE 0x08
-#define EFI_BOOT_SCRIPT_DISPATCH_2_OPCODE 0x09
-#define EFI_BOOT_SCRIPT_INFORMATION_OPCODE 0x0A
-#define EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE_OPCODE 0x0B
-#define EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE 0x0C
-#define EFI_BOOT_SCRIPT_IO_POLL_OPCODE 0x0D
-#define EFI_BOOT_SCRIPT_MEM_POLL_OPCODE 0x0E
-#define EFI_BOOT_SCRIPT_PCI_CONFIG_POLL_OPCODE 0x0F
-#define EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL_OPCODE 0x10
+// *******************************************
+#define EFI_BOOT_SCRIPT_IO_WRITE_OPCODE 0x00
+#define EFI_BOOT_SCRIPT_IO_READ_WRITE_OPCODE 0x01
+#define EFI_BOOT_SCRIPT_MEM_WRITE_OPCODE 0x02
+#define EFI_BOOT_SCRIPT_MEM_READ_WRITE_OPCODE 0x03
+#define EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE_OPCODE 0x04
+#define EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE_OPCODE 0x05
+#define EFI_BOOT_SCRIPT_SMBUS_EXECUTE_OPCODE 0x06
+#define EFI_BOOT_SCRIPT_STALL_OPCODE 0x07
+#define EFI_BOOT_SCRIPT_DISPATCH_OPCODE 0x08
+#define EFI_BOOT_SCRIPT_DISPATCH_2_OPCODE 0x09
+#define EFI_BOOT_SCRIPT_INFORMATION_OPCODE 0x0A
+#define EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE_OPCODE 0x0B
+#define EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE 0x0C
+#define EFI_BOOT_SCRIPT_IO_POLL_OPCODE 0x0D
+#define EFI_BOOT_SCRIPT_MEM_POLL_OPCODE 0x0E
+#define EFI_BOOT_SCRIPT_PCI_CONFIG_POLL_OPCODE 0x0F
+#define EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL_OPCODE 0x10
-//*******************************************
+// *******************************************
// EFI_BOOT_SCRIPT_WIDTH
-//*******************************************
+// *******************************************
typedef enum {
EfiBootScriptWidthUint8,
EfiBootScriptWidthUint16,
diff --git a/src/include/ipxe/efi/Pi/PiStatusCode.h b/src/include/ipxe/efi/Pi/PiStatusCode.h
index 5bef98f..4375f70 100644
--- a/src/include/ipxe/efi/Pi/PiStatusCode.h
+++ b/src/include/ipxe/efi/Pi/PiStatusCode.h
@@ -1,14 +1,8 @@
/** @file
StatusCode related definitions in PI.
-Copyright (c) 2009 - 2013, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
These status codes are defined in UEFI Platform Initialization Specification 1.2,
@@ -19,7 +13,7 @@
#ifndef __PI_STATUS_CODE_H__
#define __PI_STATUS_CODE_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
//
// Required for IA32, X64, IPF, ARM and EBC defines for CPU exception types
@@ -29,7 +23,7 @@
///
/// Status Code Type Definition.
///
-typedef UINT32 EFI_STATUS_CODE_TYPE;
+typedef UINT32 EFI_STATUS_CODE_TYPE;
///
/// A Status Code Type is made up of the code type and severity.
@@ -37,9 +31,9 @@
/// reserved for use by this specification.
///
///@{
-#define EFI_STATUS_CODE_TYPE_MASK 0x000000FF
-#define EFI_STATUS_CODE_SEVERITY_MASK 0xFF000000
-#define EFI_STATUS_CODE_RESERVED_MASK 0x00FFFF00
+#define EFI_STATUS_CODE_TYPE_MASK 0x000000FF
+#define EFI_STATUS_CODE_SEVERITY_MASK 0xFF000000
+#define EFI_STATUS_CODE_RESERVED_MASK 0x00FFFF00
///@}
///
@@ -48,9 +42,9 @@
/// this specification.
///
///@{
-#define EFI_PROGRESS_CODE 0x00000001
-#define EFI_ERROR_CODE 0x00000002
-#define EFI_DEBUG_CODE 0x00000003
+#define EFI_PROGRESS_CODE 0x00000001
+#define EFI_ERROR_CODE 0x00000002
+#define EFI_DEBUG_CODE 0x00000003
///@}
///
@@ -63,10 +57,10 @@
/// the bad data could be consumed by other drivers.
///
///@{
-#define EFI_ERROR_MINOR 0x40000000
-#define EFI_ERROR_MAJOR 0x80000000
-#define EFI_ERROR_UNRECOVERED 0x90000000
-#define EFI_ERROR_UNCONTAINED 0xa0000000
+#define EFI_ERROR_MINOR 0x40000000
+#define EFI_ERROR_MAJOR 0x80000000
+#define EFI_ERROR_UNRECOVERED 0x90000000
+#define EFI_ERROR_UNCONTAINED 0xa0000000
///@}
///
@@ -93,15 +87,15 @@
///
/// The size of the structure. This is specified to enable future expansion.
///
- UINT16 HeaderSize;
+ UINT16 HeaderSize;
///
/// The size of the data in bytes. This does not include the size of the header structure.
///
- UINT16 Size;
+ UINT16 Size;
///
/// The GUID defining the type of the data.
///
- EFI_GUID Type;
+ EFI_GUID Type;
} EFI_STATUS_CODE_DATA;
///
@@ -110,8 +104,8 @@
/// - 0x1000-0x7FFF Subclass Specific.
/// - 0x8000-0xFFFF OEM specific.
///@{
-#define EFI_SUBCLASS_SPECIFIC 0x1000
-#define EFI_OEM_SPECIFIC 0x8000
+#define EFI_SUBCLASS_SPECIFIC 0x1000
+#define EFI_OEM_SPECIFIC 0x8000
///@}
///
@@ -141,13 +135,13 @@
/// Values of 128-255 are reserved for OEM use.
///
///@{
-#define EFI_COMPUTING_UNIT_UNSPECIFIED (EFI_COMPUTING_UNIT | 0x00000000)
-#define EFI_COMPUTING_UNIT_HOST_PROCESSOR (EFI_COMPUTING_UNIT | 0x00010000)
-#define EFI_COMPUTING_UNIT_FIRMWARE_PROCESSOR (EFI_COMPUTING_UNIT | 0x00020000)
-#define EFI_COMPUTING_UNIT_IO_PROCESSOR (EFI_COMPUTING_UNIT | 0x00030000)
-#define EFI_COMPUTING_UNIT_CACHE (EFI_COMPUTING_UNIT | 0x00040000)
-#define EFI_COMPUTING_UNIT_MEMORY (EFI_COMPUTING_UNIT | 0x00050000)
-#define EFI_COMPUTING_UNIT_CHIPSET (EFI_COMPUTING_UNIT | 0x00060000)
+#define EFI_COMPUTING_UNIT_UNSPECIFIED (EFI_COMPUTING_UNIT | 0x00000000)
+#define EFI_COMPUTING_UNIT_HOST_PROCESSOR (EFI_COMPUTING_UNIT | 0x00010000)
+#define EFI_COMPUTING_UNIT_FIRMWARE_PROCESSOR (EFI_COMPUTING_UNIT | 0x00020000)
+#define EFI_COMPUTING_UNIT_IO_PROCESSOR (EFI_COMPUTING_UNIT | 0x00030000)
+#define EFI_COMPUTING_UNIT_CACHE (EFI_COMPUTING_UNIT | 0x00040000)
+#define EFI_COMPUTING_UNIT_MEMORY (EFI_COMPUTING_UNIT | 0x00050000)
+#define EFI_COMPUTING_UNIT_CHIPSET (EFI_COMPUTING_UNIT | 0x00060000)
///@}
///
@@ -166,15 +160,15 @@
///
/// Computing Unit Host Processor Subclass Progress Code definitions.
///@{
-#define EFI_CU_HP_PC_POWER_ON_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
-#define EFI_CU_HP_PC_CACHE_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
-#define EFI_CU_HP_PC_RAM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000002)
-#define EFI_CU_HP_PC_MEMORY_CONTROLLER_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000003)
-#define EFI_CU_HP_PC_IO_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000004)
-#define EFI_CU_HP_PC_BSP_SELECT (EFI_SUBCLASS_SPECIFIC | 0x00000005)
-#define EFI_CU_HP_PC_BSP_RESELECT (EFI_SUBCLASS_SPECIFIC | 0x00000006)
-#define EFI_CU_HP_PC_AP_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000007)
-#define EFI_CU_HP_PC_SMM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+#define EFI_CU_HP_PC_POWER_ON_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_HP_PC_CACHE_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_HP_PC_RAM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_CU_HP_PC_MEMORY_CONTROLLER_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_CU_HP_PC_IO_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_CU_HP_PC_BSP_SELECT (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_CU_HP_PC_BSP_RESELECT (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_CU_HP_PC_AP_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_CU_HP_PC_SMM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000008)
///@}
//
@@ -189,8 +183,8 @@
/// Computing Unit Cache Subclass Progress Code definitions.
///
///@{
-#define EFI_CU_CACHE_PC_PRESENCE_DETECT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
-#define EFI_CU_CACHE_PC_CONFIGURATION (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_CACHE_PC_PRESENCE_DETECT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_CACHE_PC_CONFIGURATION (EFI_SUBCLASS_SPECIFIC | 0x00000001)
///@}
///
@@ -213,52 +207,52 @@
///
/// South Bridge initialization prior to memory detection.
///
-#define EFI_CHIPSET_PC_PEI_CAR_SB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000000)
+#define EFI_CHIPSET_PC_PEI_CAR_SB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000000)
///
/// North Bridge initialization prior to memory detection.
///
-#define EFI_CHIPSET_PC_PEI_CAR_NB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000001)
+#define EFI_CHIPSET_PC_PEI_CAR_NB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000001)
///
/// South Bridge initialization after memory detection.
///
-#define EFI_CHIPSET_PC_PEI_MEM_SB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000002)
+#define EFI_CHIPSET_PC_PEI_MEM_SB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000002)
///
/// North Bridge initialization after memory detection.
///
-#define EFI_CHIPSET_PC_PEI_MEM_NB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000003)
+#define EFI_CHIPSET_PC_PEI_MEM_NB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000003)
///
/// PCI Host Bridge DXE initialization.
///
-#define EFI_CHIPSET_PC_DXE_HB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000004)
+#define EFI_CHIPSET_PC_DXE_HB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000004)
///
/// North Bridge DXE initialization.
///
-#define EFI_CHIPSET_PC_DXE_NB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000005)
+#define EFI_CHIPSET_PC_DXE_NB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000005)
///
/// North Bridge specific SMM initialization in DXE.
///
-#define EFI_CHIPSET_PC_DXE_NB_SMM_INIT (EFI_SUBCLASS_SPECIFIC|0x00000006)
+#define EFI_CHIPSET_PC_DXE_NB_SMM_INIT (EFI_SUBCLASS_SPECIFIC|0x00000006)
///
/// Initialization of the South Bridge specific UEFI Runtime Services.
///
-#define EFI_CHIPSET_PC_DXE_SB_RT_INIT (EFI_SUBCLASS_SPECIFIC|0x00000007)
+#define EFI_CHIPSET_PC_DXE_SB_RT_INIT (EFI_SUBCLASS_SPECIFIC|0x00000007)
///
/// South Bridge DXE initialization
///
-#define EFI_CHIPSET_PC_DXE_SB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000008)
+#define EFI_CHIPSET_PC_DXE_SB_INIT (EFI_SUBCLASS_SPECIFIC|0x00000008)
///
/// South Bridge specific SMM initialization in DXE.
///
-#define EFI_CHIPSET_PC_DXE_SB_SMM_INIT (EFI_SUBCLASS_SPECIFIC|0x00000009)
+#define EFI_CHIPSET_PC_DXE_SB_SMM_INIT (EFI_SUBCLASS_SPECIFIC|0x00000009)
///
/// Initialization of the South Bridge devices.
@@ -305,9 +299,9 @@
/// Computing Unit Firmware Processor Subclass Error Code definitions.
///
///@{
-#define EFI_CU_FP_EC_HARD_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000000)
-#define EFI_CU_FP_EC_SOFT_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000001)
-#define EFI_CU_FP_EC_COMM_ERROR (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_CU_FP_EC_HARD_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_FP_EC_SOFT_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_FP_EC_COMM_ERROR (EFI_SUBCLASS_SPECIFIC | 0x00000002)
///@}
//
@@ -318,27 +312,27 @@
/// Computing Unit Cache Subclass Error Code definitions.
///
///@{
-#define EFI_CU_CACHE_EC_INVALID_TYPE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
-#define EFI_CU_CACHE_EC_INVALID_SPEED (EFI_SUBCLASS_SPECIFIC | 0x00000001)
-#define EFI_CU_CACHE_EC_INVALID_SIZE (EFI_SUBCLASS_SPECIFIC | 0x00000002)
-#define EFI_CU_CACHE_EC_MISMATCH (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_CU_CACHE_EC_INVALID_TYPE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_CACHE_EC_INVALID_SPEED (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_CACHE_EC_INVALID_SIZE (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_CU_CACHE_EC_MISMATCH (EFI_SUBCLASS_SPECIFIC | 0x00000003)
///@}
///
/// Computing Unit Memory Subclass Error Code definitions.
///
///@{
-#define EFI_CU_MEMORY_EC_INVALID_TYPE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
-#define EFI_CU_MEMORY_EC_INVALID_SPEED (EFI_SUBCLASS_SPECIFIC | 0x00000001)
-#define EFI_CU_MEMORY_EC_CORRECTABLE (EFI_SUBCLASS_SPECIFIC | 0x00000002)
-#define EFI_CU_MEMORY_EC_UNCORRECTABLE (EFI_SUBCLASS_SPECIFIC | 0x00000003)
-#define EFI_CU_MEMORY_EC_SPD_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000004)
-#define EFI_CU_MEMORY_EC_INVALID_SIZE (EFI_SUBCLASS_SPECIFIC | 0x00000005)
-#define EFI_CU_MEMORY_EC_MISMATCH (EFI_SUBCLASS_SPECIFIC | 0x00000006)
-#define EFI_CU_MEMORY_EC_S3_RESUME_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000007)
-#define EFI_CU_MEMORY_EC_UPDATE_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000008)
-#define EFI_CU_MEMORY_EC_NONE_DETECTED (EFI_SUBCLASS_SPECIFIC | 0x00000009)
-#define EFI_CU_MEMORY_EC_NONE_USEFUL (EFI_SUBCLASS_SPECIFIC | 0x0000000A)
+#define EFI_CU_MEMORY_EC_INVALID_TYPE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_MEMORY_EC_INVALID_SPEED (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_MEMORY_EC_CORRECTABLE (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_CU_MEMORY_EC_UNCORRECTABLE (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_CU_MEMORY_EC_SPD_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_CU_MEMORY_EC_INVALID_SIZE (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_CU_MEMORY_EC_MISMATCH (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_CU_MEMORY_EC_S3_RESUME_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_CU_MEMORY_EC_UPDATE_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+#define EFI_CU_MEMORY_EC_NONE_DETECTED (EFI_SUBCLASS_SPECIFIC | 0x00000009)
+#define EFI_CU_MEMORY_EC_NONE_USEFUL (EFI_SUBCLASS_SPECIFIC | 0x0000000A)
///@}
///
@@ -348,6 +342,7 @@
#define EFI_CHIPSET_EC_BAD_BATTERY (EFI_SUBCLASS_SPECIFIC | 0x00000000)
#define EFI_CHIPSET_EC_DXE_NB_ERROR (EFI_SUBCLASS_SPECIFIC | 0x00000001)
#define EFI_CHIPSET_EC_DXE_SB_ERROR (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_CHIPSET_EC_INTRUDER_DETECT (EFI_SUBCLASS_SPECIFIC | 0x00000003)
///@}
///
@@ -369,6 +364,7 @@
#define EFI_PERIPHERAL_AUDIO_OUTPUT (EFI_PERIPHERAL | 0x000A0000)
#define EFI_PERIPHERAL_LCD_DEVICE (EFI_PERIPHERAL | 0x000B0000)
#define EFI_PERIPHERAL_NETWORK (EFI_PERIPHERAL | 0x000C0000)
+#define EFI_PERIPHERAL_DOCKING (EFI_PERIPHERAL | 0x000D0000)
///@}
///
@@ -383,6 +379,7 @@
#define EFI_P_PC_ENABLE 0x00000004
#define EFI_P_PC_RECONFIG 0x00000005
#define EFI_P_PC_DETECTED 0x00000006
+#define EFI_P_PC_REMOVED 0x00000007
///@}
//
@@ -416,7 +413,7 @@
/// Peripheral Class Serial Port Subclass Progress Code definitions.
///
///@{
-#define EFI_P_SERIAL_PORT_PC_CLEAR_BUFFER (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_P_SERIAL_PORT_PC_CLEAR_BUFFER (EFI_SUBCLASS_SPECIFIC | 0x00000000)
///@}
//
@@ -472,15 +469,16 @@
/// Peripheral Class Keyboard Subclass Error Code definitions.
///
///@{
-#define EFI_P_KEYBOARD_EC_LOCKED (EFI_SUBCLASS_SPECIFIC | 0x00000000)
-#define EFI_P_KEYBOARD_EC_STUCK_KEY (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_P_KEYBOARD_EC_LOCKED (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_P_KEYBOARD_EC_STUCK_KEY (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_P_KEYBOARD_EC_BUFFER_FULL (EFI_SUBCLASS_SPECIFIC | 0x00000002)
///@}
///
/// Peripheral Class Mouse Subclass Error Code definitions.
///
///@{
-#define EFI_P_MOUSE_EC_LOCKED (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_P_MOUSE_EC_LOCKED (EFI_SUBCLASS_SPECIFIC | 0x00000000)
///@}
//
@@ -549,13 +547,13 @@
/// These are shared by all subclasses.
///
///@{
-#define EFI_IOB_PC_INIT 0x00000000
-#define EFI_IOB_PC_RESET 0x00000001
-#define EFI_IOB_PC_DISABLE 0x00000002
-#define EFI_IOB_PC_DETECT 0x00000003
-#define EFI_IOB_PC_ENABLE 0x00000004
-#define EFI_IOB_PC_RECONFIG 0x00000005
-#define EFI_IOB_PC_HOTPLUG 0x00000006
+#define EFI_IOB_PC_INIT 0x00000000
+#define EFI_IOB_PC_RESET 0x00000001
+#define EFI_IOB_PC_DISABLE 0x00000002
+#define EFI_IOB_PC_DETECT 0x00000003
+#define EFI_IOB_PC_ENABLE 0x00000004
+#define EFI_IOB_PC_RECONFIG 0x00000005
+#define EFI_IOB_PC_HOTPLUG 0x00000006
///@}
//
@@ -643,8 +641,8 @@
/// IO Bus Class PCI Subclass Error Code definitions.
///
///@{
-#define EFI_IOB_PCI_EC_PERR (EFI_SUBCLASS_SPECIFIC | 0x00000000)
-#define EFI_IOB_PCI_EC_SERR (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_IOB_PCI_EC_PERR (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_IOB_PCI_EC_SERR (EFI_SUBCLASS_SPECIFIC | 0x00000001)
///@}
//
@@ -746,8 +744,8 @@
/// Software Class SEC Subclass Progress Code definitions.
///
///@{
-#define EFI_SW_SEC_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
-#define EFI_SW_SEC_PC_HANDOFF_TO_NEXT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_SEC_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_SEC_PC_HANDOFF_TO_NEXT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
///@}
///
@@ -770,6 +768,7 @@
#define EFI_SW_PEI_PC_RECOVERY_AUTO (EFI_SUBCLASS_SPECIFIC | 0x00000004)
#define EFI_SW_PEI_PC_S3_BOOT_SCRIPT (EFI_SUBCLASS_SPECIFIC | 0x00000005)
#define EFI_SW_PEI_PC_OS_WAKE (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_SW_PEI_PC_S3_STARTED (EFI_SUBCLASS_SPECIFIC | 0x00000007)
///@}
///
@@ -787,11 +786,16 @@
/// Software Class DXE BS Driver Subclass Progress Code definitions.
///
///@{
-#define EFI_SW_DXE_BS_PC_LEGACY_OPROM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
-#define EFI_SW_DXE_BS_PC_READY_TO_BOOT_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
-#define EFI_SW_DXE_BS_PC_LEGACY_BOOT_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000002)
-#define EFI_SW_DXE_BS_PC_EXIT_BOOT_SERVICES_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000003)
-#define EFI_SW_DXE_BS_PC_VIRTUAL_ADDRESS_CHANGE_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_SW_DXE_BS_PC_LEGACY_OPROM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_DXE_BS_PC_READY_TO_BOOT_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_DXE_BS_PC_LEGACY_BOOT_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_DXE_BS_PC_EXIT_BOOT_SERVICES_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_DXE_BS_PC_VIRTUAL_ADDRESS_CHANGE_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_SW_DXE_BS_PC_VARIABLE_SERVICES_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_SW_DXE_BS_PC_VARIABLE_RECLAIM (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_SW_DXE_BS_PC_ATTEMPT_BOOT_ORDER_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_SW_DXE_BS_PC_CONFIG_RESET (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+#define EFI_SW_DXE_BS_PC_CSM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000009)
///@}
//
@@ -981,6 +985,8 @@
#define EFI_SW_EC_PWD_CLR_REQUEST 0x0000000F
#define EFI_SW_EC_PWD_CLEARED 0x00000010
#define EFI_SW_EC_EVENT_LOG_FULL 0x00000011
+#define EFI_SW_EC_WRITE_PROTECTED 0x00000012
+#define EFI_SW_EC_FV_CORRUPTED 0x00000013
///@}
//
@@ -1004,24 +1010,25 @@
/// Software Class PEI Module Subclass Error Code definitions.
///
///@{
-#define EFI_SW_PEI_EC_NO_RECOVERY_CAPSULE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
-#define EFI_SW_PEI_EC_INVALID_CAPSULE_DESCRIPTOR (EFI_SUBCLASS_SPECIFIC | 0x00000001)
-#define EFI_SW_PEI_EC_S3_RESUME_PPI_NOT_FOUND (EFI_SUBCLASS_SPECIFIC | 0x00000002)
-#define EFI_SW_PEI_EC_S3_BOOT_SCRIPT_ERROR (EFI_SUBCLASS_SPECIFIC | 0x00000003)
-#define EFI_SW_PEI_EC_S3_OS_WAKE_ERROR (EFI_SUBCLASS_SPECIFIC | 0x00000004)
-#define EFI_SW_PEI_EC_S3_RESUME_FAILED (EFI_SUBCLASS_SPECIFIC | 0x00000005)
-#define EFI_SW_PEI_EC_RECOVERY_PPI_NOT_FOUND (EFI_SUBCLASS_SPECIFIC | 0x00000006)
-#define EFI_SW_PEI_EC_RECOVERY_FAILED (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_SW_PEI_EC_NO_RECOVERY_CAPSULE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_PEI_EC_INVALID_CAPSULE_DESCRIPTOR (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_PEI_EC_S3_RESUME_PPI_NOT_FOUND (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_PEI_EC_S3_BOOT_SCRIPT_ERROR (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_PEI_EC_S3_OS_WAKE_ERROR (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_SW_PEI_EC_S3_RESUME_FAILED (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_SW_PEI_EC_RECOVERY_PPI_NOT_FOUND (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_SW_PEI_EC_RECOVERY_FAILED (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_SW_PEI_EC_S3_RESUME_ERROR (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+#define EFI_SW_PEI_EC_INVALID_CAPSULE (EFI_SUBCLASS_SPECIFIC | 0x00000009)
///@}
///
/// Software Class DXE Foundation Subclass Error Code definitions.
///
///@{
-#define EFI_SW_DXE_CORE_EC_NO_ARCH (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_DXE_CORE_EC_NO_ARCH (EFI_SUBCLASS_SPECIFIC | 0x00000000)
///@}
-
///
/// Software Class DXE Boot Service Driver Subclass Error Code definitions.
///
@@ -1141,20 +1148,20 @@
/// Software Class EFI DXE Service Subclass Error Code definitions.
///
///@{
-#define EFI_SW_DXE_BS_PC_BEGIN_CONNECTING_DRIVERS (EFI_SUBCLASS_SPECIFIC | 0x00000005)
-#define EFI_SW_DXE_BS_PC_VERIFYING_PASSWORD (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_SW_DXE_BS_PC_BEGIN_CONNECTING_DRIVERS (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_SW_DXE_BS_PC_VERIFYING_PASSWORD (EFI_SUBCLASS_SPECIFIC | 0x00000006)
///@}
///
/// Software Class DXE RT Driver Subclass Progress Code definitions.
///
///@{
-#define EFI_SW_DXE_RT_PC_S0 (EFI_SUBCLASS_SPECIFIC | 0x00000000)
-#define EFI_SW_DXE_RT_PC_S1 (EFI_SUBCLASS_SPECIFIC | 0x00000001)
-#define EFI_SW_DXE_RT_PC_S2 (EFI_SUBCLASS_SPECIFIC | 0x00000002)
-#define EFI_SW_DXE_RT_PC_S3 (EFI_SUBCLASS_SPECIFIC | 0x00000003)
-#define EFI_SW_DXE_RT_PC_S4 (EFI_SUBCLASS_SPECIFIC | 0x00000004)
-#define EFI_SW_DXE_RT_PC_S5 (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_SW_DXE_RT_PC_S0 (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_DXE_RT_PC_S1 (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_DXE_RT_PC_S2 (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_DXE_RT_PC_S3 (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_DXE_RT_PC_S4 (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_SW_DXE_RT_PC_S5 (EFI_SUBCLASS_SPECIFIC | 0x00000005)
///@}
///
@@ -1163,23 +1170,23 @@
/// definitions in the EFI specification.
///
///@{
-#define EFI_SW_EC_X64_DIVIDE_ERROR EXCEPT_X64_DIVIDE_ERROR
-#define EFI_SW_EC_X64_DEBUG EXCEPT_X64_DEBUG
-#define EFI_SW_EC_X64_NMI EXCEPT_X64_NMI
-#define EFI_SW_EC_X64_BREAKPOINT EXCEPT_X64_BREAKPOINT
-#define EFI_SW_EC_X64_OVERFLOW EXCEPT_X64_OVERFLOW
-#define EFI_SW_EC_X64_BOUND EXCEPT_X64_BOUND
-#define EFI_SW_EC_X64_INVALID_OPCODE EXCEPT_X64_INVALID_OPCODE
-#define EFI_SW_EC_X64_DOUBLE_FAULT EXCEPT_X64_DOUBLE_FAULT
-#define EFI_SW_EC_X64_INVALID_TSS EXCEPT_X64_INVALID_TSS
-#define EFI_SW_EC_X64_SEG_NOT_PRESENT EXCEPT_X64_SEG_NOT_PRESENT
-#define EFI_SW_EC_X64_STACK_FAULT EXCEPT_X64_STACK_FAULT
-#define EFI_SW_EC_X64_GP_FAULT EXCEPT_X64_GP_FAULT
-#define EFI_SW_EC_X64_PAGE_FAULT EXCEPT_X64_PAGE_FAULT
-#define EFI_SW_EC_X64_FP_ERROR EXCEPT_X64_FP_ERROR
-#define EFI_SW_EC_X64_ALIGNMENT_CHECK EXCEPT_X64_ALIGNMENT_CHECK
-#define EFI_SW_EC_X64_MACHINE_CHECK EXCEPT_X64_MACHINE_CHECK
-#define EFI_SW_EC_X64_SIMD EXCEPT_X64_SIMD
+#define EFI_SW_EC_X64_DIVIDE_ERROR EXCEPT_X64_DIVIDE_ERROR
+#define EFI_SW_EC_X64_DEBUG EXCEPT_X64_DEBUG
+#define EFI_SW_EC_X64_NMI EXCEPT_X64_NMI
+#define EFI_SW_EC_X64_BREAKPOINT EXCEPT_X64_BREAKPOINT
+#define EFI_SW_EC_X64_OVERFLOW EXCEPT_X64_OVERFLOW
+#define EFI_SW_EC_X64_BOUND EXCEPT_X64_BOUND
+#define EFI_SW_EC_X64_INVALID_OPCODE EXCEPT_X64_INVALID_OPCODE
+#define EFI_SW_EC_X64_DOUBLE_FAULT EXCEPT_X64_DOUBLE_FAULT
+#define EFI_SW_EC_X64_INVALID_TSS EXCEPT_X64_INVALID_TSS
+#define EFI_SW_EC_X64_SEG_NOT_PRESENT EXCEPT_X64_SEG_NOT_PRESENT
+#define EFI_SW_EC_X64_STACK_FAULT EXCEPT_X64_STACK_FAULT
+#define EFI_SW_EC_X64_GP_FAULT EXCEPT_X64_GP_FAULT
+#define EFI_SW_EC_X64_PAGE_FAULT EXCEPT_X64_PAGE_FAULT
+#define EFI_SW_EC_X64_FP_ERROR EXCEPT_X64_FP_ERROR
+#define EFI_SW_EC_X64_ALIGNMENT_CHECK EXCEPT_X64_ALIGNMENT_CHECK
+#define EFI_SW_EC_X64_MACHINE_CHECK EXCEPT_X64_MACHINE_CHECK
+#define EFI_SW_EC_X64_SIMD EXCEPT_X64_SIMD
///@}
///
@@ -1188,14 +1195,14 @@
/// definitions in the EFI specification.
///
///@{
-#define EFI_SW_EC_ARM_RESET EXCEPT_ARM_RESET
-#define EFI_SW_EC_ARM_UNDEFINED_INSTRUCTION EXCEPT_ARM_UNDEFINED_INSTRUCTION
-#define EFI_SW_EC_ARM_SOFTWARE_INTERRUPT EXCEPT_ARM_SOFTWARE_INTERRUPT
-#define EFI_SW_EC_ARM_PREFETCH_ABORT EXCEPT_ARM_PREFETCH_ABORT
-#define EFI_SW_EC_ARM_DATA_ABORT EXCEPT_ARM_DATA_ABORT
-#define EFI_SW_EC_ARM_RESERVED EXCEPT_ARM_RESERVED
-#define EFI_SW_EC_ARM_IRQ EXCEPT_ARM_IRQ
-#define EFI_SW_EC_ARM_FIQ EXCEPT_ARM_FIQ
+#define EFI_SW_EC_ARM_RESET EXCEPT_ARM_RESET
+#define EFI_SW_EC_ARM_UNDEFINED_INSTRUCTION EXCEPT_ARM_UNDEFINED_INSTRUCTION
+#define EFI_SW_EC_ARM_SOFTWARE_INTERRUPT EXCEPT_ARM_SOFTWARE_INTERRUPT
+#define EFI_SW_EC_ARM_PREFETCH_ABORT EXCEPT_ARM_PREFETCH_ABORT
+#define EFI_SW_EC_ARM_DATA_ABORT EXCEPT_ARM_DATA_ABORT
+#define EFI_SW_EC_ARM_RESERVED EXCEPT_ARM_RESERVED
+#define EFI_SW_EC_ARM_IRQ EXCEPT_ARM_IRQ
+#define EFI_SW_EC_ARM_FIQ EXCEPT_ARM_FIQ
///@}
#endif
diff --git a/src/include/ipxe/efi/PiDxe.h b/src/include/ipxe/efi/PiDxe.h
index 9443368..698c139 100644
--- a/src/include/ipxe/efi/PiDxe.h
+++ b/src/include/ipxe/efi/PiDxe.h
@@ -2,21 +2,15 @@
Root include file for Mde Package DXE_CORE, DXE, RUNTIME, SMM, SAL type modules.
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __PI_DXE_H__
#define __PI_DXE_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/Uefi/UefiBaseType.h>
#include <ipxe/efi/Uefi/UefiSpec.h>
@@ -24,4 +18,3 @@
#include <ipxe/efi/Pi/PiDxeCis.h>
#endif
-
diff --git a/src/include/ipxe/efi/Protocol/AbsolutePointer.h b/src/include/ipxe/efi/Protocol/AbsolutePointer.h
index b20ca05..48810f9 100644
--- a/src/include/ipxe/efi/Protocol/AbsolutePointer.h
+++ b/src/include/ipxe/efi/Protocol/AbsolutePointer.h
@@ -2,34 +2,27 @@
The file provides services that allow information about an
absolute pointer device to be retrieved.
- Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ @par Revision Reference:
+ This Protocol was introduced in UEFI Specification 2.3.
**/
#ifndef __ABSOLUTE_POINTER_H__
#define __ABSOLUTE_POINTER_H__
-FILE_LICENCE ( BSD3 );
-
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_ABSOLUTE_POINTER_PROTOCOL_GUID \
{ 0x8D59D32B, 0xC655, 0x4AE9, { 0x9B, 0x15, 0xF2, 0x59, 0x04, 0x99, 0x2A, 0x43 } }
-
typedef struct _EFI_ABSOLUTE_POINTER_PROTOCOL EFI_ABSOLUTE_POINTER_PROTOCOL;
-
-//*******************************************************
+// *******************************************************
// EFI_ABSOLUTE_POINTER_MODE
-//*******************************************************
-
+// *******************************************************
/**
The following data values in the EFI_ABSOLUTE_POINTER_MODE
@@ -37,31 +30,30 @@
interface functions.
**/
typedef struct {
- UINT64 AbsoluteMinX; ///< The Absolute Minimum of the device on the x-axis
- UINT64 AbsoluteMinY; ///< The Absolute Minimum of the device on the y axis.
- UINT64 AbsoluteMinZ; ///< The Absolute Minimum of the device on the z-axis
- UINT64 AbsoluteMaxX; ///< The Absolute Maximum of the device on the x-axis. If 0, and the
- ///< AbsoluteMinX is 0, then the pointer device does not support a xaxis
- UINT64 AbsoluteMaxY; ///< The Absolute Maximum of the device on the y -axis. If 0, and the
- ///< AbsoluteMinX is 0, then the pointer device does not support a yaxis.
- UINT64 AbsoluteMaxZ; ///< The Absolute Maximum of the device on the z-axis. If 0 , and the
- ///< AbsoluteMinX is 0, then the pointer device does not support a zaxis
- UINT32 Attributes; ///< The following bits are set as needed (or'd together) to indicate the
- ///< capabilities of the device supported. The remaining bits are undefined
- ///< and should be 0
+ UINT64 AbsoluteMinX; ///< The Absolute Minimum of the device on the x-axis
+ UINT64 AbsoluteMinY; ///< The Absolute Minimum of the device on the y axis.
+ UINT64 AbsoluteMinZ; ///< The Absolute Minimum of the device on the z-axis
+ UINT64 AbsoluteMaxX; ///< The Absolute Maximum of the device on the x-axis. If 0, and the
+ ///< AbsoluteMinX is 0, then the pointer device does not support a xaxis
+ UINT64 AbsoluteMaxY; ///< The Absolute Maximum of the device on the y -axis. If 0, and the
+ ///< AbsoluteMinX is 0, then the pointer device does not support a yaxis.
+ UINT64 AbsoluteMaxZ; ///< The Absolute Maximum of the device on the z-axis. If 0 , and the
+ ///< AbsoluteMinX is 0, then the pointer device does not support a zaxis
+ UINT32 Attributes; ///< The following bits are set as needed (or'd together) to indicate the
+ ///< capabilities of the device supported. The remaining bits are undefined
+ ///< and should be 0
} EFI_ABSOLUTE_POINTER_MODE;
///
/// If set, indicates this device supports an alternate button input.
///
-#define EFI_ABSP_SupportsAltActive 0x00000001
+#define EFI_ABSP_SupportsAltActive 0x00000001
///
/// If set, indicates this device returns pressure data in parameter CurrentZ.
///
#define EFI_ABSP_SupportsPressureAsZ 0x00000002
-
/**
This function resets the pointer device hardware. As part of
initialization process, the firmware/device will make a quick
@@ -92,7 +84,7 @@
(EFIAPI *EFI_ABSOLUTE_POINTER_RESET)(
IN EFI_ABSOLUTE_POINTER_PROTOCOL *This,
IN BOOLEAN ExtendedVerification
-);
+ );
///
/// This bit is set if the touch sensor is active.
@@ -102,8 +94,7 @@
///
/// This bit is set if the alt sensor, such as pen-side button, is active
///
-#define EFI_ABS_AltActive 0x00000002
-
+#define EFI_ABS_AltActive 0x00000002
/**
Definition of EFI_ABSOLUTE_POINTER_STATE.
@@ -115,7 +106,7 @@
/// both 0, then this pointer device does not support an x-axis, and this field
/// must be ignored.
///
- UINT64 CurrentX;
+ UINT64 CurrentX;
///
/// The unsigned position of the activation on the y axis. If the AboluteMinY
@@ -123,7 +114,7 @@
/// both 0, then this pointer device does not support an y-axis, and this field
/// must be ignored.
///
- UINT64 CurrentY;
+ UINT64 CurrentY;
///
/// The unsigned position of the activation on the z axis, or the pressure
@@ -131,13 +122,13 @@
/// EFI_ABSOLUTE_POINTER_MODE structure are both 0, then this pointer device
/// does not support an z-axis, and this field must be ignored.
///
- UINT64 CurrentZ;
+ UINT64 CurrentZ;
///
/// Bits are set to 1 in this structure item to indicate that device buttons are
/// active.
///
- UINT32 ActiveButtons;
+ UINT32 ActiveButtons;
} EFI_ABSOLUTE_POINTER_STATE;
/**
@@ -174,9 +165,8 @@
EFI_STATUS
(EFIAPI *EFI_ABSOLUTE_POINTER_GET_STATE)(
IN EFI_ABSOLUTE_POINTER_PROTOCOL *This,
- IN OUT EFI_ABSOLUTE_POINTER_STATE *State
-);
-
+ OUT EFI_ABSOLUTE_POINTER_STATE *State
+ );
///
/// The EFI_ABSOLUTE_POINTER_PROTOCOL provides a set of services
@@ -187,21 +177,18 @@
/// device. The service also provides certain data items describing the device.
///
struct _EFI_ABSOLUTE_POINTER_PROTOCOL {
- EFI_ABSOLUTE_POINTER_RESET Reset;
- EFI_ABSOLUTE_POINTER_GET_STATE GetState;
+ EFI_ABSOLUTE_POINTER_RESET Reset;
+ EFI_ABSOLUTE_POINTER_GET_STATE GetState;
///
/// Event to use with WaitForEvent() to wait for input from the pointer device.
///
- EFI_EVENT WaitForInput;
+ EFI_EVENT WaitForInput;
///
/// Pointer to EFI_ABSOLUTE_POINTER_MODE data.
///
- EFI_ABSOLUTE_POINTER_MODE *Mode;
+ EFI_ABSOLUTE_POINTER_MODE *Mode;
};
-
-extern EFI_GUID gEfiAbsolutePointerProtocolGuid;
-
+extern EFI_GUID gEfiAbsolutePointerProtocolGuid;
#endif
-
diff --git a/src/include/ipxe/efi/Protocol/AcpiTable.h b/src/include/ipxe/efi/Protocol/AcpiTable.h
index 798b13d..27a9873 100644
--- a/src/include/ipxe/efi/Protocol/AcpiTable.h
+++ b/src/include/ipxe/efi/Protocol/AcpiTable.h
@@ -2,26 +2,22 @@
The file provides the protocol to install or remove an ACPI
table from a platform.
- Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ @par Revision Reference:
+ This Protocol was introduced in UEFI Specification 2.3.
**/
#ifndef __ACPI_TABLE_H___
#define __ACPI_TABLE_H___
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_ACPI_TABLE_PROTOCOL_GUID \
{ 0xffe06bdd, 0x6107, 0x46a6, { 0x7b, 0xb2, 0x5a, 0x9c, 0x7e, 0xc5, 0x27, 0x5c }}
-
typedef struct _EFI_ACPI_TABLE_PROTOCOL EFI_ACPI_TABLE_PROTOCOL;
/**
@@ -80,8 +76,7 @@
IN VOID *AcpiTableBuffer,
IN UINTN AcpiTableBufferSize,
OUT UINTN *TableKey
-);
-
+ );
/**
@@ -112,18 +107,17 @@
(EFIAPI *EFI_ACPI_TABLE_UNINSTALL_ACPI_TABLE)(
IN EFI_ACPI_TABLE_PROTOCOL *This,
IN UINTN TableKey
-);
+ );
///
/// The EFI_ACPI_TABLE_PROTOCOL provides the ability for a component
/// to install and uninstall ACPI tables from a platform.
///
struct _EFI_ACPI_TABLE_PROTOCOL {
- EFI_ACPI_TABLE_INSTALL_ACPI_TABLE InstallAcpiTable;
- EFI_ACPI_TABLE_UNINSTALL_ACPI_TABLE UninstallAcpiTable;
+ EFI_ACPI_TABLE_INSTALL_ACPI_TABLE InstallAcpiTable;
+ EFI_ACPI_TABLE_UNINSTALL_ACPI_TABLE UninstallAcpiTable;
};
-extern EFI_GUID gEfiAcpiTableProtocolGuid;
+extern EFI_GUID gEfiAcpiTableProtocolGuid;
#endif
-
diff --git a/src/include/ipxe/efi/Protocol/Arp.h b/src/include/ipxe/efi/Protocol/Arp.h
index 80921f9..0f60e3c 100644
--- a/src/include/ipxe/efi/Protocol/Arp.h
+++ b/src/include/ipxe/efi/Protocol/Arp.h
@@ -7,14 +7,8 @@
The EFI ARP Protocol provides services to map IP network
address to hardware address used by a data link protocol.
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
This Protocol was introduced in UEFI Specification 2.0.
@@ -24,7 +18,7 @@
#ifndef __EFI_ARP_PROTOCOL_H__
#define __EFI_ARP_PROTOCOL_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_ARP_SERVICE_BINDING_PROTOCOL_GUID \
{ \
@@ -42,51 +36,51 @@
///
/// Length in bytes of this entry.
///
- UINT32 Size;
+ UINT32 Size;
///
/// Set to TRUE if this entry is a "deny" entry.
/// Set to FALSE if this entry is a "normal" entry.
///
- BOOLEAN DenyFlag;
+ BOOLEAN DenyFlag;
///
/// Set to TRUE if this entry will not time out.
/// Set to FALSE if this entry will time out.
///
- BOOLEAN StaticFlag;
+ BOOLEAN StaticFlag;
///
/// 16-bit ARP hardware identifier number.
///
- UINT16 HwAddressType;
+ UINT16 HwAddressType;
///
/// 16-bit protocol type number.
///
- UINT16 SwAddressType;
+ UINT16 SwAddressType;
///
/// The length of the hardware address.
///
- UINT8 HwAddressLength;
+ UINT8 HwAddressLength;
///
/// The length of the protocol address.
///
- UINT8 SwAddressLength;
+ UINT8 SwAddressLength;
} EFI_ARP_FIND_DATA;
typedef struct {
///
/// 16-bit protocol type number in host byte order.
///
- UINT16 SwAddressType;
+ UINT16 SwAddressType;
///
/// The length in bytes of the station's protocol address to register.
///
- UINT8 SwAddressLength;
+ UINT8 SwAddressLength;
///
/// The pointer to the first byte of the protocol address to register. For
@@ -94,30 +88,29 @@
/// StationAddress points to the first byte of this station's IP
/// address stored in network byte order.
///
- VOID *StationAddress;
+ VOID *StationAddress;
///
/// The timeout value in 100-ns units that is associated with each
/// new dynamic ARP cache entry. If it is set to zero, the value is
/// implementation-specific.
///
- UINT32 EntryTimeOut;
+ UINT32 EntryTimeOut;
///
/// The number of retries before a MAC address is resolved. If it is
/// set to zero, the value is implementation-specific.
///
- UINT32 RetryCount;
+ UINT32 RetryCount;
///
/// The timeout value in 100-ns units that is used to wait for the ARP
/// reply packet or the timeout value between two retries. Set to zero
/// to use implementation-specific value.
///
- UINT32 RetryTimeOut;
+ UINT32 RetryTimeOut;
} EFI_ARP_CONFIG_DATA;
-
/**
This function is used to assign a station address to the ARP cache for this instance
of the ARP driver.
@@ -255,7 +248,6 @@
IN BOOLEAN Refresh
);
-
/**
This function removes specified ARP cache entries.
@@ -371,17 +363,16 @@
/// network hardware addresses.
///
struct _EFI_ARP_PROTOCOL {
- EFI_ARP_CONFIGURE Configure;
- EFI_ARP_ADD Add;
- EFI_ARP_FIND Find;
- EFI_ARP_DELETE Delete;
- EFI_ARP_FLUSH Flush;
- EFI_ARP_REQUEST Request;
- EFI_ARP_CANCEL Cancel;
+ EFI_ARP_CONFIGURE Configure;
+ EFI_ARP_ADD Add;
+ EFI_ARP_FIND Find;
+ EFI_ARP_DELETE Delete;
+ EFI_ARP_FLUSH Flush;
+ EFI_ARP_REQUEST Request;
+ EFI_ARP_CANCEL Cancel;
};
-
-extern EFI_GUID gEfiArpServiceBindingProtocolGuid;
-extern EFI_GUID gEfiArpProtocolGuid;
+extern EFI_GUID gEfiArpServiceBindingProtocolGuid;
+extern EFI_GUID gEfiArpProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/BlockIo.h b/src/include/ipxe/efi/Protocol/BlockIo.h
index f45154b..5efaf6e 100644
--- a/src/include/ipxe/efi/Protocol/BlockIo.h
+++ b/src/include/ipxe/efi/Protocol/BlockIo.h
@@ -4,38 +4,32 @@
The Block IO protocol is used to abstract block devices like hard drives,
DVD-ROMs and floppy drives.
- Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __BLOCK_IO_H__
#define __BLOCK_IO_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_BLOCK_IO_PROTOCOL_GUID \
{ \
0x964e5b21, 0x6459, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \
}
-typedef struct _EFI_BLOCK_IO_PROTOCOL EFI_BLOCK_IO_PROTOCOL;
+typedef struct _EFI_BLOCK_IO_PROTOCOL EFI_BLOCK_IO_PROTOCOL;
///
/// Protocol GUID name defined in EFI1.1.
///
-#define BLOCK_IO_PROTOCOL EFI_BLOCK_IO_PROTOCOL_GUID
+#define BLOCK_IO_PROTOCOL EFI_BLOCK_IO_PROTOCOL_GUID
///
/// Protocol defined in EFI1.1.
///
-typedef EFI_BLOCK_IO_PROTOCOL EFI_BLOCK_IO;
+typedef EFI_BLOCK_IO_PROTOCOL EFI_BLOCK_IO;
/**
Reset the Block Device.
@@ -137,84 +131,84 @@
///
/// The curent media Id. If the media changes, this value is changed.
///
- UINT32 MediaId;
+ UINT32 MediaId;
///
/// TRUE if the media is removable; otherwise, FALSE.
///
- BOOLEAN RemovableMedia;
+ BOOLEAN RemovableMedia;
///
/// TRUE if there is a media currently present in the device;
/// othersise, FALSE. THis field shows the media present status
/// as of the most recent ReadBlocks() or WriteBlocks() call.
///
- BOOLEAN MediaPresent;
+ BOOLEAN MediaPresent;
///
/// TRUE if LBA 0 is the first block of a partition; otherwise
/// FALSE. For media with only one partition this would be TRUE.
///
- BOOLEAN LogicalPartition;
+ BOOLEAN LogicalPartition;
///
/// TRUE if the media is marked read-only otherwise, FALSE.
/// This field shows the read-only status as of the most recent WriteBlocks () call.
///
- BOOLEAN ReadOnly;
+ BOOLEAN ReadOnly;
///
/// TRUE if the WriteBlock () function caches write data.
///
- BOOLEAN WriteCaching;
+ BOOLEAN WriteCaching;
///
/// The intrinsic block size of the device. If the media changes, then
/// this field is updated.
///
- UINT32 BlockSize;
+ UINT32 BlockSize;
///
/// Supplies the alignment requirement for any buffer to read or write block(s).
///
- UINT32 IoAlign;
+ UINT32 IoAlign;
///
/// The last logical block address on the device.
/// If the media changes, then this field is updated.
///
- EFI_LBA LastBlock;
+ EFI_LBA LastBlock;
///
/// Only present if EFI_BLOCK_IO_PROTOCOL.Revision is greater than or equal to
/// EFI_BLOCK_IO_PROTOCOL_REVISION2. Returns the first LBA is aligned to
/// a physical block boundary.
///
- EFI_LBA LowestAlignedLba;
+ EFI_LBA LowestAlignedLba;
///
/// Only present if EFI_BLOCK_IO_PROTOCOL.Revision is greater than or equal to
/// EFI_BLOCK_IO_PROTOCOL_REVISION2. Returns the number of logical blocks
/// per physical block.
///
- UINT32 LogicalBlocksPerPhysicalBlock;
+ UINT32 LogicalBlocksPerPhysicalBlock;
///
/// Only present if EFI_BLOCK_IO_PROTOCOL.Revision is greater than or equal to
/// EFI_BLOCK_IO_PROTOCOL_REVISION3. Returns the optimal transfer length
/// granularity as a number of logical blocks.
///
- UINT32 OptimalTransferLengthGranularity;
+ UINT32 OptimalTransferLengthGranularity;
} EFI_BLOCK_IO_MEDIA;
-#define EFI_BLOCK_IO_PROTOCOL_REVISION 0x00010000
-#define EFI_BLOCK_IO_PROTOCOL_REVISION2 0x00020001
-#define EFI_BLOCK_IO_PROTOCOL_REVISION3 0x00020031
+#define EFI_BLOCK_IO_PROTOCOL_REVISION 0x00010000
+#define EFI_BLOCK_IO_PROTOCOL_REVISION2 0x00020001
+#define EFI_BLOCK_IO_PROTOCOL_REVISION3 0x0002001F
///
/// Revision defined in EFI1.1.
///
-#define EFI_BLOCK_IO_INTERFACE_REVISION EFI_BLOCK_IO_PROTOCOL_REVISION
+#define EFI_BLOCK_IO_INTERFACE_REVISION EFI_BLOCK_IO_PROTOCOL_REVISION
///
/// This protocol provides control over block devices.
@@ -225,19 +219,18 @@
/// revisions must be backwards compatible. If a future version is not
/// back wards compatible, it is not the same GUID.
///
- UINT64 Revision;
+ UINT64 Revision;
///
/// Pointer to the EFI_BLOCK_IO_MEDIA data for this device.
///
- EFI_BLOCK_IO_MEDIA *Media;
+ EFI_BLOCK_IO_MEDIA *Media;
- EFI_BLOCK_RESET Reset;
- EFI_BLOCK_READ ReadBlocks;
- EFI_BLOCK_WRITE WriteBlocks;
- EFI_BLOCK_FLUSH FlushBlocks;
-
+ EFI_BLOCK_RESET Reset;
+ EFI_BLOCK_READ ReadBlocks;
+ EFI_BLOCK_WRITE WriteBlocks;
+ EFI_BLOCK_FLUSH FlushBlocks;
};
-extern EFI_GUID gEfiBlockIoProtocolGuid;
+extern EFI_GUID gEfiBlockIoProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/BlockIo2.h b/src/include/ipxe/efi/Protocol/BlockIo2.h
index 0b9cf8e..abc2f8a 100644
--- a/src/include/ipxe/efi/Protocol/BlockIo2.h
+++ b/src/include/ipxe/efi/Protocol/BlockIo2.h
@@ -5,21 +5,15 @@
enables the ability to read and write data at a block level in a non-blocking
manner.
- Copyright (c) 2011, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __BLOCK_IO2_H__
#define __BLOCK_IO2_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/Protocol/BlockIo.h>
@@ -28,27 +22,25 @@
0xa77b2472, 0xe282, 0x4e9f, {0xa2, 0x45, 0xc2, 0xc0, 0xe2, 0x7b, 0xbc, 0xc1} \
}
-typedef struct _EFI_BLOCK_IO2_PROTOCOL EFI_BLOCK_IO2_PROTOCOL;
+typedef struct _EFI_BLOCK_IO2_PROTOCOL EFI_BLOCK_IO2_PROTOCOL;
/**
The struct of Block IO2 Token.
**/
typedef struct {
-
///
/// If Event is NULL, then blocking I/O is performed.If Event is not NULL and
/// non-blocking I/O is supported, then non-blocking I/O is performed, and
/// Event will be signaled when the read request is completed.
///
- EFI_EVENT Event;
+ EFI_EVENT Event;
///
/// Defines whether or not the signaled event encountered an error.
///
- EFI_STATUS TransactionStatus;
+ EFI_STATUS TransactionStatus;
} EFI_BLOCK_IO2_TOKEN;
-
/**
Reset the block device hardware.
@@ -64,7 +56,7 @@
**/
typedef
EFI_STATUS
-(EFIAPI *EFI_BLOCK_RESET_EX) (
+(EFIAPI *EFI_BLOCK_RESET_EX)(
IN EFI_BLOCK_IO2_PROTOCOL *This,
IN BOOLEAN ExtendedVerification
);
@@ -82,7 +74,7 @@
@param[in] MediaId Id of the media, changes every time the media is
replaced.
@param[in] Lba The starting Logical Block Address to read from.
- @param[in, out] Token A pointer to the token associated with the transaction.
+ @param[in, out] Token A pointer to the token associated with the transaction.
@param[in] BufferSize Size of Buffer, must be a multiple of device block size.
@param[out] Buffer A pointer to the destination buffer for the data. The
caller is responsible for either having implicit or
@@ -104,13 +96,13 @@
**/
typedef
EFI_STATUS
-(EFIAPI *EFI_BLOCK_READ_EX) (
+(EFIAPI *EFI_BLOCK_READ_EX)(
IN EFI_BLOCK_IO2_PROTOCOL *This,
IN UINT32 MediaId,
IN EFI_LBA LBA,
IN OUT EFI_BLOCK_IO2_TOKEN *Token,
IN UINTN BufferSize,
- OUT VOID *Buffer
+ OUT VOID *Buffer
);
/**
@@ -146,7 +138,7 @@
**/
typedef
EFI_STATUS
-(EFIAPI *EFI_BLOCK_WRITE_EX) (
+(EFIAPI *EFI_BLOCK_WRITE_EX)(
IN EFI_BLOCK_IO2_PROTOCOL *This,
IN UINT32 MediaId,
IN EFI_LBA LBA,
@@ -179,7 +171,7 @@
**/
typedef
EFI_STATUS
-(EFIAPI *EFI_BLOCK_FLUSH_EX) (
+(EFIAPI *EFI_BLOCK_FLUSH_EX)(
IN EFI_BLOCK_IO2_PROTOCOL *This,
IN OUT EFI_BLOCK_IO2_TOKEN *Token
);
@@ -194,15 +186,14 @@
/// A pointer to the EFI_BLOCK_IO_MEDIA data for this device.
/// Type EFI_BLOCK_IO_MEDIA is defined in BlockIo.h.
///
- EFI_BLOCK_IO_MEDIA *Media;
+ EFI_BLOCK_IO_MEDIA *Media;
- EFI_BLOCK_RESET_EX Reset;
- EFI_BLOCK_READ_EX ReadBlocksEx;
- EFI_BLOCK_WRITE_EX WriteBlocksEx;
- EFI_BLOCK_FLUSH_EX FlushBlocksEx;
+ EFI_BLOCK_RESET_EX Reset;
+ EFI_BLOCK_READ_EX ReadBlocksEx;
+ EFI_BLOCK_WRITE_EX WriteBlocksEx;
+ EFI_BLOCK_FLUSH_EX FlushBlocksEx;
};
-extern EFI_GUID gEfiBlockIo2ProtocolGuid;
+extern EFI_GUID gEfiBlockIo2ProtocolGuid;
#endif
-
diff --git a/src/include/ipxe/efi/Protocol/BusSpecificDriverOverride.h b/src/include/ipxe/efi/Protocol/BusSpecificDriverOverride.h
index be92323..69d9b1d 100644
--- a/src/include/ipxe/efi/Protocol/BusSpecificDriverOverride.h
+++ b/src/include/ipxe/efi/Protocol/BusSpecificDriverOverride.h
@@ -6,21 +6,15 @@
instance of this protocol for every PCI controller that has a PCI option ROM that contains one or
more UEFI drivers. The protocol instance is attached to the handle of the PCI controller.
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL_H_
#define _EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
///
/// Global ID for the Bus Specific Driver Override Protocol
@@ -30,7 +24,7 @@
0x3bc1b285, 0x8a15, 0x4a82, {0xaa, 0xbf, 0x4d, 0x7d, 0x13, 0xfb, 0x32, 0x65 } \
}
-typedef struct _EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL;
+typedef struct _EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL;
//
// Prototypes for the Bus Specific Driver Override Protocol
@@ -66,9 +60,9 @@
/// drivers to controllers.
///
struct _EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL {
- EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_GET_DRIVER GetDriver;
+ EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_GET_DRIVER GetDriver;
};
-extern EFI_GUID gEfiBusSpecificDriverOverrideProtocolGuid;
+extern EFI_GUID gEfiBusSpecificDriverOverrideProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/ComponentName.h b/src/include/ipxe/efi/Protocol/ComponentName.h
index 87b6d61..cd7f4d0 100644
--- a/src/include/ipxe/efi/Protocol/ComponentName.h
+++ b/src/include/ipxe/efi/Protocol/ComponentName.h
@@ -3,21 +3,15 @@
This protocol is used to retrieve user readable names of EFI Drivers
and controllers managed by EFI Drivers.
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __EFI_COMPONENT_NAME_H__
#define __EFI_COMPONENT_NAME_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
///
/// The global ID for the Component Name Protocol.
@@ -27,8 +21,7 @@
0x107a772c, 0xd5e1, 0x11d4, {0x9a, 0x46, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
}
-typedef struct _EFI_COMPONENT_NAME_PROTOCOL EFI_COMPONENT_NAME_PROTOCOL;
-
+typedef struct _EFI_COMPONENT_NAME_PROTOCOL EFI_COMPONENT_NAME_PROTOCOL;
/**
Retrieves a Unicode string that is the user-readable name of the EFI Driver.
@@ -60,7 +53,6 @@
OUT CHAR16 **DriverName
);
-
/**
Retrieves a Unicode string that is the user readable name of the controller
that is being managed by an EFI Driver.
@@ -116,16 +108,16 @@
/// and controllers managed by UEFI Drivers.
///
struct _EFI_COMPONENT_NAME_PROTOCOL {
- EFI_COMPONENT_NAME_GET_DRIVER_NAME GetDriverName;
- EFI_COMPONENT_NAME_GET_CONTROLLER_NAME GetControllerName;
+ EFI_COMPONENT_NAME_GET_DRIVER_NAME GetDriverName;
+ EFI_COMPONENT_NAME_GET_CONTROLLER_NAME GetControllerName;
///
/// A Null-terminated ASCII string that contains one or more
/// ISO 639-2 language codes. This is the list of language codes
/// that this protocol supports.
///
- CHAR8 *SupportedLanguages;
+ CHAR8 *SupportedLanguages;
};
-extern EFI_GUID gEfiComponentNameProtocolGuid;
+extern EFI_GUID gEfiComponentNameProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/ComponentName2.h b/src/include/ipxe/efi/Protocol/ComponentName2.h
index 82d8b25..886c9eb 100644
--- a/src/include/ipxe/efi/Protocol/ComponentName2.h
+++ b/src/include/ipxe/efi/Protocol/ComponentName2.h
@@ -3,21 +3,15 @@
This protocol is used to retrieve user readable names of drivers
and controllers managed by UEFI Drivers.
- Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __EFI_COMPONENT_NAME2_H__
#define __EFI_COMPONENT_NAME2_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
///
/// Global ID for the Component Name Protocol
@@ -25,8 +19,7 @@
#define EFI_COMPONENT_NAME2_PROTOCOL_GUID \
{0x6a7a5cff, 0xe8d9, 0x4f70, { 0xba, 0xda, 0x75, 0xab, 0x30, 0x25, 0xce, 0x14 } }
-typedef struct _EFI_COMPONENT_NAME2_PROTOCOL EFI_COMPONENT_NAME2_PROTOCOL;
-
+typedef struct _EFI_COMPONENT_NAME2_PROTOCOL EFI_COMPONENT_NAME2_PROTOCOL;
/**
Retrieves a string that is the user readable name of
@@ -72,7 +65,6 @@
OUT CHAR16 **DriverName
);
-
/**
Retrieves a string that is the user readable name of
the controller that is being managed by an EFI Driver.
@@ -156,8 +148,8 @@
/// and controllers managed by UEFI Drivers.
///
struct _EFI_COMPONENT_NAME2_PROTOCOL {
- EFI_COMPONENT_NAME2_GET_DRIVER_NAME GetDriverName;
- EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME GetControllerName;
+ EFI_COMPONENT_NAME2_GET_DRIVER_NAME GetDriverName;
+ EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME GetControllerName;
///
/// A Null-terminated ASCII string array that contains one or more
@@ -166,9 +158,9 @@
/// driver is up to the driver writer. SupportedLanguages is
/// specified in RFC 4646 format.
///
- CHAR8 *SupportedLanguages;
+ CHAR8 *SupportedLanguages;
};
-extern EFI_GUID gEfiComponentName2ProtocolGuid;
+extern EFI_GUID gEfiComponentName2ProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/DebugSupport.h b/src/include/ipxe/efi/Protocol/DebugSupport.h
index e2b4b20..1b28b0e 100644
--- a/src/include/ipxe/efi/Protocol/DebugSupport.h
+++ b/src/include/ipxe/efi/Protocol/DebugSupport.h
@@ -5,23 +5,18 @@
The DebugSupport protocol is used by source level debuggers to abstract the
processor and handle context save and restore operations.
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __DEBUG_SUPPORT_H__
#define __DEBUG_SUPPORT_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/IndustryStandard/PeImage.h>
@@ -39,221 +34,221 @@
/// Processor exception to be hooked.
/// All exception types for IA32, X64, Itanium and EBC processors are defined.
///
-typedef INTN EFI_EXCEPTION_TYPE;
+typedef INTN EFI_EXCEPTION_TYPE;
///
/// IA-32 processor exception types.
///
-#define EXCEPT_IA32_DIVIDE_ERROR 0
-#define EXCEPT_IA32_DEBUG 1
-#define EXCEPT_IA32_NMI 2
-#define EXCEPT_IA32_BREAKPOINT 3
-#define EXCEPT_IA32_OVERFLOW 4
-#define EXCEPT_IA32_BOUND 5
-#define EXCEPT_IA32_INVALID_OPCODE 6
-#define EXCEPT_IA32_DOUBLE_FAULT 8
-#define EXCEPT_IA32_INVALID_TSS 10
-#define EXCEPT_IA32_SEG_NOT_PRESENT 11
-#define EXCEPT_IA32_STACK_FAULT 12
-#define EXCEPT_IA32_GP_FAULT 13
-#define EXCEPT_IA32_PAGE_FAULT 14
-#define EXCEPT_IA32_FP_ERROR 16
-#define EXCEPT_IA32_ALIGNMENT_CHECK 17
-#define EXCEPT_IA32_MACHINE_CHECK 18
-#define EXCEPT_IA32_SIMD 19
+#define EXCEPT_IA32_DIVIDE_ERROR 0
+#define EXCEPT_IA32_DEBUG 1
+#define EXCEPT_IA32_NMI 2
+#define EXCEPT_IA32_BREAKPOINT 3
+#define EXCEPT_IA32_OVERFLOW 4
+#define EXCEPT_IA32_BOUND 5
+#define EXCEPT_IA32_INVALID_OPCODE 6
+#define EXCEPT_IA32_DOUBLE_FAULT 8
+#define EXCEPT_IA32_INVALID_TSS 10
+#define EXCEPT_IA32_SEG_NOT_PRESENT 11
+#define EXCEPT_IA32_STACK_FAULT 12
+#define EXCEPT_IA32_GP_FAULT 13
+#define EXCEPT_IA32_PAGE_FAULT 14
+#define EXCEPT_IA32_FP_ERROR 16
+#define EXCEPT_IA32_ALIGNMENT_CHECK 17
+#define EXCEPT_IA32_MACHINE_CHECK 18
+#define EXCEPT_IA32_SIMD 19
///
/// FXSAVE_STATE.
/// FP / MMX / XMM registers (see fxrstor instruction definition).
///
typedef struct {
- UINT16 Fcw;
- UINT16 Fsw;
- UINT16 Ftw;
- UINT16 Opcode;
- UINT32 Eip;
- UINT16 Cs;
- UINT16 Reserved1;
- UINT32 DataOffset;
- UINT16 Ds;
- UINT8 Reserved2[10];
- UINT8 St0Mm0[10], Reserved3[6];
- UINT8 St1Mm1[10], Reserved4[6];
- UINT8 St2Mm2[10], Reserved5[6];
- UINT8 St3Mm3[10], Reserved6[6];
- UINT8 St4Mm4[10], Reserved7[6];
- UINT8 St5Mm5[10], Reserved8[6];
- UINT8 St6Mm6[10], Reserved9[6];
- UINT8 St7Mm7[10], Reserved10[6];
- UINT8 Xmm0[16];
- UINT8 Xmm1[16];
- UINT8 Xmm2[16];
- UINT8 Xmm3[16];
- UINT8 Xmm4[16];
- UINT8 Xmm5[16];
- UINT8 Xmm6[16];
- UINT8 Xmm7[16];
- UINT8 Reserved11[14 * 16];
+ UINT16 Fcw;
+ UINT16 Fsw;
+ UINT16 Ftw;
+ UINT16 Opcode;
+ UINT32 Eip;
+ UINT16 Cs;
+ UINT16 Reserved1;
+ UINT32 DataOffset;
+ UINT16 Ds;
+ UINT8 Reserved2[10];
+ UINT8 St0Mm0[10], Reserved3[6];
+ UINT8 St1Mm1[10], Reserved4[6];
+ UINT8 St2Mm2[10], Reserved5[6];
+ UINT8 St3Mm3[10], Reserved6[6];
+ UINT8 St4Mm4[10], Reserved7[6];
+ UINT8 St5Mm5[10], Reserved8[6];
+ UINT8 St6Mm6[10], Reserved9[6];
+ UINT8 St7Mm7[10], Reserved10[6];
+ UINT8 Xmm0[16];
+ UINT8 Xmm1[16];
+ UINT8 Xmm2[16];
+ UINT8 Xmm3[16];
+ UINT8 Xmm4[16];
+ UINT8 Xmm5[16];
+ UINT8 Xmm6[16];
+ UINT8 Xmm7[16];
+ UINT8 Reserved11[14 * 16];
} EFI_FX_SAVE_STATE_IA32;
///
/// IA-32 processor context definition.
///
typedef struct {
- UINT32 ExceptionData;
- EFI_FX_SAVE_STATE_IA32 FxSaveState;
- UINT32 Dr0;
- UINT32 Dr1;
- UINT32 Dr2;
- UINT32 Dr3;
- UINT32 Dr6;
- UINT32 Dr7;
- UINT32 Cr0;
- UINT32 Cr1; /* Reserved */
- UINT32 Cr2;
- UINT32 Cr3;
- UINT32 Cr4;
- UINT32 Eflags;
- UINT32 Ldtr;
- UINT32 Tr;
- UINT32 Gdtr[2];
- UINT32 Idtr[2];
- UINT32 Eip;
- UINT32 Gs;
- UINT32 Fs;
- UINT32 Es;
- UINT32 Ds;
- UINT32 Cs;
- UINT32 Ss;
- UINT32 Edi;
- UINT32 Esi;
- UINT32 Ebp;
- UINT32 Esp;
- UINT32 Ebx;
- UINT32 Edx;
- UINT32 Ecx;
- UINT32 Eax;
+ UINT32 ExceptionData;
+ EFI_FX_SAVE_STATE_IA32 FxSaveState;
+ UINT32 Dr0;
+ UINT32 Dr1;
+ UINT32 Dr2;
+ UINT32 Dr3;
+ UINT32 Dr6;
+ UINT32 Dr7;
+ UINT32 Cr0;
+ UINT32 Cr1; /* Reserved */
+ UINT32 Cr2;
+ UINT32 Cr3;
+ UINT32 Cr4;
+ UINT32 Eflags;
+ UINT32 Ldtr;
+ UINT32 Tr;
+ UINT32 Gdtr[2];
+ UINT32 Idtr[2];
+ UINT32 Eip;
+ UINT32 Gs;
+ UINT32 Fs;
+ UINT32 Es;
+ UINT32 Ds;
+ UINT32 Cs;
+ UINT32 Ss;
+ UINT32 Edi;
+ UINT32 Esi;
+ UINT32 Ebp;
+ UINT32 Esp;
+ UINT32 Ebx;
+ UINT32 Edx;
+ UINT32 Ecx;
+ UINT32 Eax;
} EFI_SYSTEM_CONTEXT_IA32;
///
/// x64 processor exception types.
///
-#define EXCEPT_X64_DIVIDE_ERROR 0
-#define EXCEPT_X64_DEBUG 1
-#define EXCEPT_X64_NMI 2
-#define EXCEPT_X64_BREAKPOINT 3
-#define EXCEPT_X64_OVERFLOW 4
-#define EXCEPT_X64_BOUND 5
-#define EXCEPT_X64_INVALID_OPCODE 6
-#define EXCEPT_X64_DOUBLE_FAULT 8
-#define EXCEPT_X64_INVALID_TSS 10
-#define EXCEPT_X64_SEG_NOT_PRESENT 11
-#define EXCEPT_X64_STACK_FAULT 12
-#define EXCEPT_X64_GP_FAULT 13
-#define EXCEPT_X64_PAGE_FAULT 14
-#define EXCEPT_X64_FP_ERROR 16
-#define EXCEPT_X64_ALIGNMENT_CHECK 17
-#define EXCEPT_X64_MACHINE_CHECK 18
-#define EXCEPT_X64_SIMD 19
+#define EXCEPT_X64_DIVIDE_ERROR 0
+#define EXCEPT_X64_DEBUG 1
+#define EXCEPT_X64_NMI 2
+#define EXCEPT_X64_BREAKPOINT 3
+#define EXCEPT_X64_OVERFLOW 4
+#define EXCEPT_X64_BOUND 5
+#define EXCEPT_X64_INVALID_OPCODE 6
+#define EXCEPT_X64_DOUBLE_FAULT 8
+#define EXCEPT_X64_INVALID_TSS 10
+#define EXCEPT_X64_SEG_NOT_PRESENT 11
+#define EXCEPT_X64_STACK_FAULT 12
+#define EXCEPT_X64_GP_FAULT 13
+#define EXCEPT_X64_PAGE_FAULT 14
+#define EXCEPT_X64_FP_ERROR 16
+#define EXCEPT_X64_ALIGNMENT_CHECK 17
+#define EXCEPT_X64_MACHINE_CHECK 18
+#define EXCEPT_X64_SIMD 19
///
/// FXSAVE_STATE.
/// FP / MMX / XMM registers (see fxrstor instruction definition).
///
typedef struct {
- UINT16 Fcw;
- UINT16 Fsw;
- UINT16 Ftw;
- UINT16 Opcode;
- UINT64 Rip;
- UINT64 DataOffset;
- UINT8 Reserved1[8];
- UINT8 St0Mm0[10], Reserved2[6];
- UINT8 St1Mm1[10], Reserved3[6];
- UINT8 St2Mm2[10], Reserved4[6];
- UINT8 St3Mm3[10], Reserved5[6];
- UINT8 St4Mm4[10], Reserved6[6];
- UINT8 St5Mm5[10], Reserved7[6];
- UINT8 St6Mm6[10], Reserved8[6];
- UINT8 St7Mm7[10], Reserved9[6];
- UINT8 Xmm0[16];
- UINT8 Xmm1[16];
- UINT8 Xmm2[16];
- UINT8 Xmm3[16];
- UINT8 Xmm4[16];
- UINT8 Xmm5[16];
- UINT8 Xmm6[16];
- UINT8 Xmm7[16];
+ UINT16 Fcw;
+ UINT16 Fsw;
+ UINT16 Ftw;
+ UINT16 Opcode;
+ UINT64 Rip;
+ UINT64 DataOffset;
+ UINT8 Reserved1[8];
+ UINT8 St0Mm0[10], Reserved2[6];
+ UINT8 St1Mm1[10], Reserved3[6];
+ UINT8 St2Mm2[10], Reserved4[6];
+ UINT8 St3Mm3[10], Reserved5[6];
+ UINT8 St4Mm4[10], Reserved6[6];
+ UINT8 St5Mm5[10], Reserved7[6];
+ UINT8 St6Mm6[10], Reserved8[6];
+ UINT8 St7Mm7[10], Reserved9[6];
+ UINT8 Xmm0[16];
+ UINT8 Xmm1[16];
+ UINT8 Xmm2[16];
+ UINT8 Xmm3[16];
+ UINT8 Xmm4[16];
+ UINT8 Xmm5[16];
+ UINT8 Xmm6[16];
+ UINT8 Xmm7[16];
//
// NOTE: UEFI 2.0 spec definition as follows.
//
- UINT8 Reserved11[14 * 16];
+ UINT8 Reserved11[14 * 16];
} EFI_FX_SAVE_STATE_X64;
///
/// x64 processor context definition.
///
typedef struct {
- UINT64 ExceptionData;
- EFI_FX_SAVE_STATE_X64 FxSaveState;
- UINT64 Dr0;
- UINT64 Dr1;
- UINT64 Dr2;
- UINT64 Dr3;
- UINT64 Dr6;
- UINT64 Dr7;
- UINT64 Cr0;
- UINT64 Cr1; /* Reserved */
- UINT64 Cr2;
- UINT64 Cr3;
- UINT64 Cr4;
- UINT64 Cr8;
- UINT64 Rflags;
- UINT64 Ldtr;
- UINT64 Tr;
- UINT64 Gdtr[2];
- UINT64 Idtr[2];
- UINT64 Rip;
- UINT64 Gs;
- UINT64 Fs;
- UINT64 Es;
- UINT64 Ds;
- UINT64 Cs;
- UINT64 Ss;
- UINT64 Rdi;
- UINT64 Rsi;
- UINT64 Rbp;
- UINT64 Rsp;
- UINT64 Rbx;
- UINT64 Rdx;
- UINT64 Rcx;
- UINT64 Rax;
- UINT64 R8;
- UINT64 R9;
- UINT64 R10;
- UINT64 R11;
- UINT64 R12;
- UINT64 R13;
- UINT64 R14;
- UINT64 R15;
+ UINT64 ExceptionData;
+ EFI_FX_SAVE_STATE_X64 FxSaveState;
+ UINT64 Dr0;
+ UINT64 Dr1;
+ UINT64 Dr2;
+ UINT64 Dr3;
+ UINT64 Dr6;
+ UINT64 Dr7;
+ UINT64 Cr0;
+ UINT64 Cr1; /* Reserved */
+ UINT64 Cr2;
+ UINT64 Cr3;
+ UINT64 Cr4;
+ UINT64 Cr8;
+ UINT64 Rflags;
+ UINT64 Ldtr;
+ UINT64 Tr;
+ UINT64 Gdtr[2];
+ UINT64 Idtr[2];
+ UINT64 Rip;
+ UINT64 Gs;
+ UINT64 Fs;
+ UINT64 Es;
+ UINT64 Ds;
+ UINT64 Cs;
+ UINT64 Ss;
+ UINT64 Rdi;
+ UINT64 Rsi;
+ UINT64 Rbp;
+ UINT64 Rsp;
+ UINT64 Rbx;
+ UINT64 Rdx;
+ UINT64 Rcx;
+ UINT64 Rax;
+ UINT64 R8;
+ UINT64 R9;
+ UINT64 R10;
+ UINT64 R11;
+ UINT64 R12;
+ UINT64 R13;
+ UINT64 R14;
+ UINT64 R15;
} EFI_SYSTEM_CONTEXT_X64;
///
/// Itanium Processor Family Exception types.
///
-#define EXCEPT_IPF_VHTP_TRANSLATION 0
-#define EXCEPT_IPF_INSTRUCTION_TLB 1
-#define EXCEPT_IPF_DATA_TLB 2
-#define EXCEPT_IPF_ALT_INSTRUCTION_TLB 3
-#define EXCEPT_IPF_ALT_DATA_TLB 4
-#define EXCEPT_IPF_DATA_NESTED_TLB 5
-#define EXCEPT_IPF_INSTRUCTION_KEY_MISSED 6
-#define EXCEPT_IPF_DATA_KEY_MISSED 7
-#define EXCEPT_IPF_DIRTY_BIT 8
-#define EXCEPT_IPF_INSTRUCTION_ACCESS_BIT 9
-#define EXCEPT_IPF_DATA_ACCESS_BIT 10
-#define EXCEPT_IPF_BREAKPOINT 11
-#define EXCEPT_IPF_EXTERNAL_INTERRUPT 12
+#define EXCEPT_IPF_VHTP_TRANSLATION 0
+#define EXCEPT_IPF_INSTRUCTION_TLB 1
+#define EXCEPT_IPF_DATA_TLB 2
+#define EXCEPT_IPF_ALT_INSTRUCTION_TLB 3
+#define EXCEPT_IPF_ALT_DATA_TLB 4
+#define EXCEPT_IPF_DATA_NESTED_TLB 5
+#define EXCEPT_IPF_INSTRUCTION_KEY_MISSED 6
+#define EXCEPT_IPF_DATA_KEY_MISSED 7
+#define EXCEPT_IPF_DIRTY_BIT 8
+#define EXCEPT_IPF_INSTRUCTION_ACCESS_BIT 9
+#define EXCEPT_IPF_DATA_ACCESS_BIT 10
+#define EXCEPT_IPF_BREAKPOINT 11
+#define EXCEPT_IPF_EXTERNAL_INTERRUPT 12
//
// 13 - 19 reserved
//
@@ -279,9 +274,9 @@
//
// 37 - 44 reserved
//
-#define EXCEPT_IPF_IA32_EXCEPTION 45
-#define EXCEPT_IPF_IA32_INTERCEPT 46
-#define EXCEPT_IPF_IA32_INTERRUPT 47
+#define EXCEPT_IPF_IA32_EXCEPTION 45
+#define EXCEPT_IPF_IA32_INTERCEPT 46
+#define EXCEPT_IPF_IA32_INTERRUPT 47
///
/// IPF processor context definition.
@@ -291,337 +286,480 @@
// The first reserved field is necessary to preserve alignment for the correct
// bits in UNAT and to insure F2 is 16 byte aligned.
//
- UINT64 Reserved;
- UINT64 R1;
- UINT64 R2;
- UINT64 R3;
- UINT64 R4;
- UINT64 R5;
- UINT64 R6;
- UINT64 R7;
- UINT64 R8;
- UINT64 R9;
- UINT64 R10;
- UINT64 R11;
- UINT64 R12;
- UINT64 R13;
- UINT64 R14;
- UINT64 R15;
- UINT64 R16;
- UINT64 R17;
- UINT64 R18;
- UINT64 R19;
- UINT64 R20;
- UINT64 R21;
- UINT64 R22;
- UINT64 R23;
- UINT64 R24;
- UINT64 R25;
- UINT64 R26;
- UINT64 R27;
- UINT64 R28;
- UINT64 R29;
- UINT64 R30;
- UINT64 R31;
+ UINT64 Reserved;
+ UINT64 R1;
+ UINT64 R2;
+ UINT64 R3;
+ UINT64 R4;
+ UINT64 R5;
+ UINT64 R6;
+ UINT64 R7;
+ UINT64 R8;
+ UINT64 R9;
+ UINT64 R10;
+ UINT64 R11;
+ UINT64 R12;
+ UINT64 R13;
+ UINT64 R14;
+ UINT64 R15;
+ UINT64 R16;
+ UINT64 R17;
+ UINT64 R18;
+ UINT64 R19;
+ UINT64 R20;
+ UINT64 R21;
+ UINT64 R22;
+ UINT64 R23;
+ UINT64 R24;
+ UINT64 R25;
+ UINT64 R26;
+ UINT64 R27;
+ UINT64 R28;
+ UINT64 R29;
+ UINT64 R30;
+ UINT64 R31;
- UINT64 F2[2];
- UINT64 F3[2];
- UINT64 F4[2];
- UINT64 F5[2];
- UINT64 F6[2];
- UINT64 F7[2];
- UINT64 F8[2];
- UINT64 F9[2];
- UINT64 F10[2];
- UINT64 F11[2];
- UINT64 F12[2];
- UINT64 F13[2];
- UINT64 F14[2];
- UINT64 F15[2];
- UINT64 F16[2];
- UINT64 F17[2];
- UINT64 F18[2];
- UINT64 F19[2];
- UINT64 F20[2];
- UINT64 F21[2];
- UINT64 F22[2];
- UINT64 F23[2];
- UINT64 F24[2];
- UINT64 F25[2];
- UINT64 F26[2];
- UINT64 F27[2];
- UINT64 F28[2];
- UINT64 F29[2];
- UINT64 F30[2];
- UINT64 F31[2];
+ UINT64 F2[2];
+ UINT64 F3[2];
+ UINT64 F4[2];
+ UINT64 F5[2];
+ UINT64 F6[2];
+ UINT64 F7[2];
+ UINT64 F8[2];
+ UINT64 F9[2];
+ UINT64 F10[2];
+ UINT64 F11[2];
+ UINT64 F12[2];
+ UINT64 F13[2];
+ UINT64 F14[2];
+ UINT64 F15[2];
+ UINT64 F16[2];
+ UINT64 F17[2];
+ UINT64 F18[2];
+ UINT64 F19[2];
+ UINT64 F20[2];
+ UINT64 F21[2];
+ UINT64 F22[2];
+ UINT64 F23[2];
+ UINT64 F24[2];
+ UINT64 F25[2];
+ UINT64 F26[2];
+ UINT64 F27[2];
+ UINT64 F28[2];
+ UINT64 F29[2];
+ UINT64 F30[2];
+ UINT64 F31[2];
- UINT64 Pr;
+ UINT64 Pr;
- UINT64 B0;
- UINT64 B1;
- UINT64 B2;
- UINT64 B3;
- UINT64 B4;
- UINT64 B5;
- UINT64 B6;
- UINT64 B7;
+ UINT64 B0;
+ UINT64 B1;
+ UINT64 B2;
+ UINT64 B3;
+ UINT64 B4;
+ UINT64 B5;
+ UINT64 B6;
+ UINT64 B7;
//
// application registers
//
- UINT64 ArRsc;
- UINT64 ArBsp;
- UINT64 ArBspstore;
- UINT64 ArRnat;
+ UINT64 ArRsc;
+ UINT64 ArBsp;
+ UINT64 ArBspstore;
+ UINT64 ArRnat;
- UINT64 ArFcr;
+ UINT64 ArFcr;
- UINT64 ArEflag;
- UINT64 ArCsd;
- UINT64 ArSsd;
- UINT64 ArCflg;
- UINT64 ArFsr;
- UINT64 ArFir;
- UINT64 ArFdr;
+ UINT64 ArEflag;
+ UINT64 ArCsd;
+ UINT64 ArSsd;
+ UINT64 ArCflg;
+ UINT64 ArFsr;
+ UINT64 ArFir;
+ UINT64 ArFdr;
- UINT64 ArCcv;
+ UINT64 ArCcv;
- UINT64 ArUnat;
+ UINT64 ArUnat;
- UINT64 ArFpsr;
+ UINT64 ArFpsr;
- UINT64 ArPfs;
- UINT64 ArLc;
- UINT64 ArEc;
+ UINT64 ArPfs;
+ UINT64 ArLc;
+ UINT64 ArEc;
//
// control registers
//
- UINT64 CrDcr;
- UINT64 CrItm;
- UINT64 CrIva;
- UINT64 CrPta;
- UINT64 CrIpsr;
- UINT64 CrIsr;
- UINT64 CrIip;
- UINT64 CrIfa;
- UINT64 CrItir;
- UINT64 CrIipa;
- UINT64 CrIfs;
- UINT64 CrIim;
- UINT64 CrIha;
+ UINT64 CrDcr;
+ UINT64 CrItm;
+ UINT64 CrIva;
+ UINT64 CrPta;
+ UINT64 CrIpsr;
+ UINT64 CrIsr;
+ UINT64 CrIip;
+ UINT64 CrIfa;
+ UINT64 CrItir;
+ UINT64 CrIipa;
+ UINT64 CrIfs;
+ UINT64 CrIim;
+ UINT64 CrIha;
//
// debug registers
//
- UINT64 Dbr0;
- UINT64 Dbr1;
- UINT64 Dbr2;
- UINT64 Dbr3;
- UINT64 Dbr4;
- UINT64 Dbr5;
- UINT64 Dbr6;
- UINT64 Dbr7;
+ UINT64 Dbr0;
+ UINT64 Dbr1;
+ UINT64 Dbr2;
+ UINT64 Dbr3;
+ UINT64 Dbr4;
+ UINT64 Dbr5;
+ UINT64 Dbr6;
+ UINT64 Dbr7;
- UINT64 Ibr0;
- UINT64 Ibr1;
- UINT64 Ibr2;
- UINT64 Ibr3;
- UINT64 Ibr4;
- UINT64 Ibr5;
- UINT64 Ibr6;
- UINT64 Ibr7;
+ UINT64 Ibr0;
+ UINT64 Ibr1;
+ UINT64 Ibr2;
+ UINT64 Ibr3;
+ UINT64 Ibr4;
+ UINT64 Ibr5;
+ UINT64 Ibr6;
+ UINT64 Ibr7;
//
// virtual registers - nat bits for R1-R31
//
- UINT64 IntNat;
-
+ UINT64 IntNat;
} EFI_SYSTEM_CONTEXT_IPF;
///
/// EBC processor exception types.
///
-#define EXCEPT_EBC_UNDEFINED 0
-#define EXCEPT_EBC_DIVIDE_ERROR 1
-#define EXCEPT_EBC_DEBUG 2
-#define EXCEPT_EBC_BREAKPOINT 3
-#define EXCEPT_EBC_OVERFLOW 4
-#define EXCEPT_EBC_INVALID_OPCODE 5 ///< Opcode out of range.
-#define EXCEPT_EBC_STACK_FAULT 6
-#define EXCEPT_EBC_ALIGNMENT_CHECK 7
-#define EXCEPT_EBC_INSTRUCTION_ENCODING 8 ///< Malformed instruction.
-#define EXCEPT_EBC_BAD_BREAK 9 ///< BREAK 0 or undefined BREAK.
-#define EXCEPT_EBC_STEP 10 ///< To support debug stepping.
+#define EXCEPT_EBC_UNDEFINED 0
+#define EXCEPT_EBC_DIVIDE_ERROR 1
+#define EXCEPT_EBC_DEBUG 2
+#define EXCEPT_EBC_BREAKPOINT 3
+#define EXCEPT_EBC_OVERFLOW 4
+#define EXCEPT_EBC_INVALID_OPCODE 5 ///< Opcode out of range.
+#define EXCEPT_EBC_STACK_FAULT 6
+#define EXCEPT_EBC_ALIGNMENT_CHECK 7
+#define EXCEPT_EBC_INSTRUCTION_ENCODING 8 ///< Malformed instruction.
+#define EXCEPT_EBC_BAD_BREAK 9 ///< BREAK 0 or undefined BREAK.
+#define EXCEPT_EBC_STEP 10 ///< To support debug stepping.
///
/// For coding convenience, define the maximum valid EBC exception.
///
-#define MAX_EBC_EXCEPTION EXCEPT_EBC_STEP
+#define MAX_EBC_EXCEPTION EXCEPT_EBC_STEP
///
/// EBC processor context definition.
///
typedef struct {
- UINT64 R0;
- UINT64 R1;
- UINT64 R2;
- UINT64 R3;
- UINT64 R4;
- UINT64 R5;
- UINT64 R6;
- UINT64 R7;
- UINT64 Flags;
- UINT64 ControlFlags;
- UINT64 Ip;
+ UINT64 R0;
+ UINT64 R1;
+ UINT64 R2;
+ UINT64 R3;
+ UINT64 R4;
+ UINT64 R5;
+ UINT64 R6;
+ UINT64 R7;
+ UINT64 Flags;
+ UINT64 ControlFlags;
+ UINT64 Ip;
} EFI_SYSTEM_CONTEXT_EBC;
-
-
///
/// ARM processor exception types.
///
-#define EXCEPT_ARM_RESET 0
-#define EXCEPT_ARM_UNDEFINED_INSTRUCTION 1
-#define EXCEPT_ARM_SOFTWARE_INTERRUPT 2
-#define EXCEPT_ARM_PREFETCH_ABORT 3
-#define EXCEPT_ARM_DATA_ABORT 4
-#define EXCEPT_ARM_RESERVED 5
-#define EXCEPT_ARM_IRQ 6
-#define EXCEPT_ARM_FIQ 7
+#define EXCEPT_ARM_RESET 0
+#define EXCEPT_ARM_UNDEFINED_INSTRUCTION 1
+#define EXCEPT_ARM_SOFTWARE_INTERRUPT 2
+#define EXCEPT_ARM_PREFETCH_ABORT 3
+#define EXCEPT_ARM_DATA_ABORT 4
+#define EXCEPT_ARM_RESERVED 5
+#define EXCEPT_ARM_IRQ 6
+#define EXCEPT_ARM_FIQ 7
///
/// For coding convenience, define the maximum valid ARM exception.
///
-#define MAX_ARM_EXCEPTION EXCEPT_ARM_FIQ
+#define MAX_ARM_EXCEPTION EXCEPT_ARM_FIQ
///
/// ARM processor context definition.
///
typedef struct {
- UINT32 R0;
- UINT32 R1;
- UINT32 R2;
- UINT32 R3;
- UINT32 R4;
- UINT32 R5;
- UINT32 R6;
- UINT32 R7;
- UINT32 R8;
- UINT32 R9;
- UINT32 R10;
- UINT32 R11;
- UINT32 R12;
- UINT32 SP;
- UINT32 LR;
- UINT32 PC;
- UINT32 CPSR;
- UINT32 DFSR;
- UINT32 DFAR;
- UINT32 IFSR;
- UINT32 IFAR;
+ UINT32 R0;
+ UINT32 R1;
+ UINT32 R2;
+ UINT32 R3;
+ UINT32 R4;
+ UINT32 R5;
+ UINT32 R6;
+ UINT32 R7;
+ UINT32 R8;
+ UINT32 R9;
+ UINT32 R10;
+ UINT32 R11;
+ UINT32 R12;
+ UINT32 SP;
+ UINT32 LR;
+ UINT32 PC;
+ UINT32 CPSR;
+ UINT32 DFSR;
+ UINT32 DFAR;
+ UINT32 IFSR;
+ UINT32 IFAR;
} EFI_SYSTEM_CONTEXT_ARM;
-
///
/// AARCH64 processor exception types.
///
-#define EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS 0
-#define EXCEPT_AARCH64_IRQ 1
-#define EXCEPT_AARCH64_FIQ 2
-#define EXCEPT_AARCH64_SERROR 3
+#define EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS 0
+#define EXCEPT_AARCH64_IRQ 1
+#define EXCEPT_AARCH64_FIQ 2
+#define EXCEPT_AARCH64_SERROR 3
///
/// For coding convenience, define the maximum valid ARM exception.
///
-#define MAX_AARCH64_EXCEPTION EXCEPT_AARCH64_SERROR
+#define MAX_AARCH64_EXCEPTION EXCEPT_AARCH64_SERROR
typedef struct {
// General Purpose Registers
- UINT64 X0;
- UINT64 X1;
- UINT64 X2;
- UINT64 X3;
- UINT64 X4;
- UINT64 X5;
- UINT64 X6;
- UINT64 X7;
- UINT64 X8;
- UINT64 X9;
- UINT64 X10;
- UINT64 X11;
- UINT64 X12;
- UINT64 X13;
- UINT64 X14;
- UINT64 X15;
- UINT64 X16;
- UINT64 X17;
- UINT64 X18;
- UINT64 X19;
- UINT64 X20;
- UINT64 X21;
- UINT64 X22;
- UINT64 X23;
- UINT64 X24;
- UINT64 X25;
- UINT64 X26;
- UINT64 X27;
- UINT64 X28;
- UINT64 FP; // x29 - Frame pointer
- UINT64 LR; // x30 - Link Register
- UINT64 SP; // x31 - Stack pointer
+ UINT64 X0;
+ UINT64 X1;
+ UINT64 X2;
+ UINT64 X3;
+ UINT64 X4;
+ UINT64 X5;
+ UINT64 X6;
+ UINT64 X7;
+ UINT64 X8;
+ UINT64 X9;
+ UINT64 X10;
+ UINT64 X11;
+ UINT64 X12;
+ UINT64 X13;
+ UINT64 X14;
+ UINT64 X15;
+ UINT64 X16;
+ UINT64 X17;
+ UINT64 X18;
+ UINT64 X19;
+ UINT64 X20;
+ UINT64 X21;
+ UINT64 X22;
+ UINT64 X23;
+ UINT64 X24;
+ UINT64 X25;
+ UINT64 X26;
+ UINT64 X27;
+ UINT64 X28;
+ UINT64 FP; // x29 - Frame pointer
+ UINT64 LR; // x30 - Link Register
+ UINT64 SP; // x31 - Stack pointer
// FP/SIMD Registers
- UINT64 V0[2];
- UINT64 V1[2];
- UINT64 V2[2];
- UINT64 V3[2];
- UINT64 V4[2];
- UINT64 V5[2];
- UINT64 V6[2];
- UINT64 V7[2];
- UINT64 V8[2];
- UINT64 V9[2];
- UINT64 V10[2];
- UINT64 V11[2];
- UINT64 V12[2];
- UINT64 V13[2];
- UINT64 V14[2];
- UINT64 V15[2];
- UINT64 V16[2];
- UINT64 V17[2];
- UINT64 V18[2];
- UINT64 V19[2];
- UINT64 V20[2];
- UINT64 V21[2];
- UINT64 V22[2];
- UINT64 V23[2];
- UINT64 V24[2];
- UINT64 V25[2];
- UINT64 V26[2];
- UINT64 V27[2];
- UINT64 V28[2];
- UINT64 V29[2];
- UINT64 V30[2];
- UINT64 V31[2];
+ UINT64 V0[2];
+ UINT64 V1[2];
+ UINT64 V2[2];
+ UINT64 V3[2];
+ UINT64 V4[2];
+ UINT64 V5[2];
+ UINT64 V6[2];
+ UINT64 V7[2];
+ UINT64 V8[2];
+ UINT64 V9[2];
+ UINT64 V10[2];
+ UINT64 V11[2];
+ UINT64 V12[2];
+ UINT64 V13[2];
+ UINT64 V14[2];
+ UINT64 V15[2];
+ UINT64 V16[2];
+ UINT64 V17[2];
+ UINT64 V18[2];
+ UINT64 V19[2];
+ UINT64 V20[2];
+ UINT64 V21[2];
+ UINT64 V22[2];
+ UINT64 V23[2];
+ UINT64 V24[2];
+ UINT64 V25[2];
+ UINT64 V26[2];
+ UINT64 V27[2];
+ UINT64 V28[2];
+ UINT64 V29[2];
+ UINT64 V30[2];
+ UINT64 V31[2];
- UINT64 ELR; // Exception Link Register
- UINT64 SPSR; // Saved Processor Status Register
- UINT64 FPSR; // Floating Point Status Register
- UINT64 ESR; // Exception syndrome register
- UINT64 FAR; // Fault Address Register
+ UINT64 ELR; // Exception Link Register
+ UINT64 SPSR; // Saved Processor Status Register
+ UINT64 FPSR; // Floating Point Status Register
+ UINT64 ESR; // Exception syndrome register
+ UINT64 FAR; // Fault Address Register
} EFI_SYSTEM_CONTEXT_AARCH64;
+///
+/// RISC-V processor exception types.
+///
+#define EXCEPT_RISCV_INST_MISALIGNED 0
+#define EXCEPT_RISCV_INST_ACCESS_FAULT 1
+#define EXCEPT_RISCV_ILLEGAL_INST 2
+#define EXCEPT_RISCV_BREAKPOINT 3
+#define EXCEPT_RISCV_LOAD_ADDRESS_MISALIGNED 4
+#define EXCEPT_RISCV_LOAD_ACCESS_FAULT 5
+#define EXCEPT_RISCV_STORE_AMO_ADDRESS_MISALIGNED 6
+#define EXCEPT_RISCV_STORE_AMO_ACCESS_FAULT 7
+#define EXCEPT_RISCV_ENV_CALL_FROM_UMODE 8
+#define EXCEPT_RISCV_ENV_CALL_FROM_SMODE 9
+#define EXCEPT_RISCV_ENV_CALL_FROM_HMODE 10
+#define EXCEPT_RISCV_ENV_CALL_FROM_MMODE 11
+
+#define EXCEPT_RISCV_SOFTWARE_INT 0x0
+#define EXCEPT_RISCV_TIMER_INT 0x1
+
+typedef struct {
+ UINT64 X0;
+ UINT64 X1;
+ UINT64 X2;
+ UINT64 X3;
+ UINT64 X4;
+ UINT64 X5;
+ UINT64 X6;
+ UINT64 X7;
+ UINT64 X8;
+ UINT64 X9;
+ UINT64 X10;
+ UINT64 X11;
+ UINT64 X12;
+ UINT64 X13;
+ UINT64 X14;
+ UINT64 X15;
+ UINT64 X16;
+ UINT64 X17;
+ UINT64 X18;
+ UINT64 X19;
+ UINT64 X20;
+ UINT64 X21;
+ UINT64 X22;
+ UINT64 X23;
+ UINT64 X24;
+ UINT64 X25;
+ UINT64 X26;
+ UINT64 X27;
+ UINT64 X28;
+ UINT64 X29;
+ UINT64 X30;
+ UINT64 X31;
+} EFI_SYSTEM_CONTEXT_RISCV64;
+
+//
+// LoongArch processor exception types.
+//
+#define EXCEPT_LOONGARCH_INT 0
+#define EXCEPT_LOONGARCH_PIL 1
+#define EXCEPT_LOONGARCH_PIS 2
+#define EXCEPT_LOONGARCH_PIF 3
+#define EXCEPT_LOONGARCH_PME 4
+#define EXCEPT_LOONGARCH_PNR 5
+#define EXCEPT_LOONGARCH_PNX 6
+#define EXCEPT_LOONGARCH_PPI 7
+#define EXCEPT_LOONGARCH_ADE 8
+#define EXCEPT_LOONGARCH_ALE 9
+#define EXCEPT_LOONGARCH_BCE 10
+#define EXCEPT_LOONGARCH_SYS 11
+#define EXCEPT_LOONGARCH_BRK 12
+#define EXCEPT_LOONGARCH_INE 13
+#define EXCEPT_LOONGARCH_IPE 14
+#define EXCEPT_LOONGARCH_FPD 15
+#define EXCEPT_LOONGARCH_SXD 16
+#define EXCEPT_LOONGARCH_ASXD 17
+#define EXCEPT_LOONGARCH_FPE 18
+#define EXCEPT_LOONGARCH_TBR 64 // For code only, there is no such type in the ISA spec, the TLB refill is defined for an independent exception.
+
+//
+// LoongArch processor Interrupt types.
+//
+#define EXCEPT_LOONGARCH_INT_SIP0 0
+#define EXCEPT_LOONGARCH_INT_SIP1 1
+#define EXCEPT_LOONGARCH_INT_IP0 2
+#define EXCEPT_LOONGARCH_INT_IP1 3
+#define EXCEPT_LOONGARCH_INT_IP2 4
+#define EXCEPT_LOONGARCH_INT_IP3 5
+#define EXCEPT_LOONGARCH_INT_IP4 6
+#define EXCEPT_LOONGARCH_INT_IP5 7
+#define EXCEPT_LOONGARCH_INT_IP6 8
+#define EXCEPT_LOONGARCH_INT_IP7 9
+#define EXCEPT_LOONGARCH_INT_PMC 10
+#define EXCEPT_LOONGARCH_INT_TIMER 11
+#define EXCEPT_LOONGARCH_INT_IPI 12
+
+//
+// For coding convenience, define the maximum valid
+// LoongArch interrupt.
+//
+#define MAX_LOONGARCH_INTERRUPT 14
+
+typedef struct {
+ UINT64 R0;
+ UINT64 R1;
+ UINT64 R2;
+ UINT64 R3;
+ UINT64 R4;
+ UINT64 R5;
+ UINT64 R6;
+ UINT64 R7;
+ UINT64 R8;
+ UINT64 R9;
+ UINT64 R10;
+ UINT64 R11;
+ UINT64 R12;
+ UINT64 R13;
+ UINT64 R14;
+ UINT64 R15;
+ UINT64 R16;
+ UINT64 R17;
+ UINT64 R18;
+ UINT64 R19;
+ UINT64 R20;
+ UINT64 R21;
+ UINT64 R22;
+ UINT64 R23;
+ UINT64 R24;
+ UINT64 R25;
+ UINT64 R26;
+ UINT64 R27;
+ UINT64 R28;
+ UINT64 R29;
+ UINT64 R30;
+ UINT64 R31;
+
+ UINT64 CRMD; // CuRrent MoDe information
+ UINT64 PRMD; // PRe-exception MoDe information
+ UINT64 EUEN; // Extended component Unit ENable
+ UINT64 MISC; // MISCellaneous controller
+ UINT64 ECFG; // Exception ConFiGuration
+ UINT64 ESTAT; // Exception STATus
+ UINT64 ERA; // Exception Return Address
+ UINT64 BADV; // BAD Virtual address
+ UINT64 BADI; // BAD Instruction
+} EFI_SYSTEM_CONTEXT_LOONGARCH64;
///
/// Universal EFI_SYSTEM_CONTEXT definition.
///
typedef union {
- EFI_SYSTEM_CONTEXT_EBC *SystemContextEbc;
- EFI_SYSTEM_CONTEXT_IA32 *SystemContextIa32;
- EFI_SYSTEM_CONTEXT_X64 *SystemContextX64;
- EFI_SYSTEM_CONTEXT_IPF *SystemContextIpf;
- EFI_SYSTEM_CONTEXT_ARM *SystemContextArm;
- EFI_SYSTEM_CONTEXT_AARCH64 *SystemContextAArch64;
+ EFI_SYSTEM_CONTEXT_EBC *SystemContextEbc;
+ EFI_SYSTEM_CONTEXT_IA32 *SystemContextIa32;
+ EFI_SYSTEM_CONTEXT_X64 *SystemContextX64;
+ EFI_SYSTEM_CONTEXT_IPF *SystemContextIpf;
+ EFI_SYSTEM_CONTEXT_ARM *SystemContextArm;
+ EFI_SYSTEM_CONTEXT_AARCH64 *SystemContextAArch64;
+ EFI_SYSTEM_CONTEXT_RISCV64 *SystemContextRiscV64;
+ EFI_SYSTEM_CONTEXT_LOONGARCH64 *SystemContextLoongArch64;
} EFI_SYSTEM_CONTEXT;
//
@@ -658,15 +796,14 @@
/// Machine type definition
///
typedef enum {
- IsaIa32 = IMAGE_FILE_MACHINE_I386, ///< 0x014C
- IsaX64 = IMAGE_FILE_MACHINE_X64, ///< 0x8664
- IsaIpf = IMAGE_FILE_MACHINE_IA64, ///< 0x0200
- IsaEbc = IMAGE_FILE_MACHINE_EBC, ///< 0x0EBC
- IsaArm = IMAGE_FILE_MACHINE_ARMTHUMB_MIXED, ///< 0x01c2
- IsaAArch64 = IMAGE_FILE_MACHINE_ARM64 ///< 0xAA64
+ IsaIa32 = IMAGE_FILE_MACHINE_I386, ///< 0x014C
+ IsaX64 = IMAGE_FILE_MACHINE_X64, ///< 0x8664
+ IsaIpf = IMAGE_FILE_MACHINE_IA64, ///< 0x0200
+ IsaEbc = IMAGE_FILE_MACHINE_EBC, ///< 0x0EBC
+ IsaArm = IMAGE_FILE_MACHINE_ARMTHUMB_MIXED, ///< 0x01c2
+ IsaAArch64 = IMAGE_FILE_MACHINE_ARM64 ///< 0xAA64
} EFI_INSTRUCTION_SET_ARCHITECTURE;
-
//
// DebugSupport member function definitions
//
@@ -768,13 +905,13 @@
///
/// Declares the processor architecture for this instance of the EFI Debug Support protocol.
///
- EFI_INSTRUCTION_SET_ARCHITECTURE Isa;
- EFI_GET_MAXIMUM_PROCESSOR_INDEX GetMaximumProcessorIndex;
- EFI_REGISTER_PERIODIC_CALLBACK RegisterPeriodicCallback;
- EFI_REGISTER_EXCEPTION_CALLBACK RegisterExceptionCallback;
- EFI_INVALIDATE_INSTRUCTION_CACHE InvalidateInstructionCache;
+ EFI_INSTRUCTION_SET_ARCHITECTURE Isa;
+ EFI_GET_MAXIMUM_PROCESSOR_INDEX GetMaximumProcessorIndex;
+ EFI_REGISTER_PERIODIC_CALLBACK RegisterPeriodicCallback;
+ EFI_REGISTER_EXCEPTION_CALLBACK RegisterExceptionCallback;
+ EFI_INVALIDATE_INSTRUCTION_CACHE InvalidateInstructionCache;
};
-extern EFI_GUID gEfiDebugSupportProtocolGuid;
+extern EFI_GUID gEfiDebugSupportProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/DevicePath.h b/src/include/ipxe/efi/Protocol/DevicePath.h
index d406b28..3256d55 100644
--- a/src/include/ipxe/efi/Protocol/DevicePath.h
+++ b/src/include/ipxe/efi/Protocol/DevicePath.h
@@ -5,21 +5,15 @@
from a software point of view. The path must persist from boot to boot, so
it can not contain things like PCI bus numbers that change from boot to boot.
-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __EFI_DEVICE_PATH_PROTOCOL_H__
#define __EFI_DEVICE_PATH_PROTOCOL_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/Guid/PcAnsi.h>
#include <ipxe/efi/IndustryStandard/Bluetooth.h>
@@ -49,97 +43,96 @@
that make up the Device Path.
**/
typedef struct {
- UINT8 Type; ///< 0x01 Hardware Device Path.
+ UINT8 Type; ///< 0x01 Hardware Device Path.
///< 0x02 ACPI Device Path.
///< 0x03 Messaging Device Path.
///< 0x04 Media Device Path.
///< 0x05 BIOS Boot Specification Device Path.
///< 0x7F End of Hardware Device Path.
- UINT8 SubType; ///< Varies by Type
+ UINT8 SubType; ///< Varies by Type
///< 0xFF End Entire Device Path, or
///< 0x01 End This Instance of a Device Path and start a new
///< Device Path.
- UINT8 Length[2]; ///< Specific Device Path data. Type and Sub-Type define
- ///< type of data. Size of data is included in Length.
-
+ UINT8 Length[2]; ///< Specific Device Path data. Type and Sub-Type define
+ ///< type of data. Size of data is included in Length.
} EFI_DEVICE_PATH_PROTOCOL;
///
/// Device Path protocol definition for backward-compatible with EFI1.1.
///
-typedef EFI_DEVICE_PATH_PROTOCOL EFI_DEVICE_PATH;
+typedef EFI_DEVICE_PATH_PROTOCOL EFI_DEVICE_PATH;
///
/// Hardware Device Paths.
///
-#define HARDWARE_DEVICE_PATH 0x01
+#define HARDWARE_DEVICE_PATH 0x01
///
/// PCI Device Path SubType.
///
-#define HW_PCI_DP 0x01
+#define HW_PCI_DP 0x01
///
/// PCI Device Path.
///
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// PCI Function Number.
///
- UINT8 Function;
+ UINT8 Function;
///
/// PCI Device Number.
///
- UINT8 Device;
+ UINT8 Device;
} PCI_DEVICE_PATH;
///
/// PCCARD Device Path SubType.
///
-#define HW_PCCARD_DP 0x02
+#define HW_PCCARD_DP 0x02
///
/// PCCARD Device Path.
///
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Function Number (0 = First Function).
///
- UINT8 FunctionNumber;
+ UINT8 FunctionNumber;
} PCCARD_DEVICE_PATH;
///
/// Memory Mapped Device Path SubType.
///
-#define HW_MEMMAP_DP 0x03
+#define HW_MEMMAP_DP 0x03
///
/// Memory Mapped Device Path.
///
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// EFI_MEMORY_TYPE
///
- UINT32 MemoryType;
+ UINT32 MemoryType;
///
/// Starting Memory Address.
///
- EFI_PHYSICAL_ADDRESS StartingAddress;
+ EFI_PHYSICAL_ADDRESS StartingAddress;
///
/// Ending Memory Address.
///
- EFI_PHYSICAL_ADDRESS EndingAddress;
+ EFI_PHYSICAL_ADDRESS EndingAddress;
} MEMMAP_DEVICE_PATH;
///
/// Hardware Vendor Device Path SubType.
///
-#define HW_VENDOR_DP 0x04
+#define HW_VENDOR_DP 0x04
///
/// The Vendor Device Path allows the creation of vendor-defined Device Paths. A vendor must
@@ -147,11 +140,11 @@
/// contents on the n bytes that follow in the Vendor Device Path node.
///
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Vendor-assigned GUID that defines the data that follows.
///
- EFI_GUID Guid;
+ EFI_GUID Guid;
///
/// Vendor-defined variable size data.
///
@@ -160,56 +153,56 @@
///
/// Controller Device Path SubType.
///
-#define HW_CONTROLLER_DP 0x05
+#define HW_CONTROLLER_DP 0x05
///
/// Controller Device Path.
///
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Controller number.
///
- UINT32 ControllerNumber;
+ UINT32 ControllerNumber;
} CONTROLLER_DEVICE_PATH;
///
/// BMC Device Path SubType.
///
-#define HW_BMC_DP 0x06
+#define HW_BMC_DP 0x06
///
/// BMC Device Path.
///
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Interface Type.
///
- UINT8 InterfaceType;
+ UINT8 InterfaceType;
///
/// Base Address.
///
- UINT8 BaseAddress[8];
+ UINT8 BaseAddress[8];
} BMC_DEVICE_PATH;
///
/// ACPI Device Paths.
///
-#define ACPI_DEVICE_PATH 0x02
+#define ACPI_DEVICE_PATH 0x02
///
/// ACPI Device Path SubType.
///
-#define ACPI_DP 0x01
+#define ACPI_DP 0x01
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Device's PnP hardware ID stored in a numeric 32-bit
/// compressed EISA-type ID. This value must match the
/// corresponding _HID in the ACPI name space.
///
- UINT32 HID;
+ UINT32 HID;
///
/// Unique ID that is required by ACPI if two devices have the
/// same _HID. This value must also match the corresponding
@@ -217,34 +210,34 @@
/// numeric value type of _UID is supported. Thus, strings must
/// not be used for the _UID in the ACPI name space.
///
- UINT32 UID;
+ UINT32 UID;
} ACPI_HID_DEVICE_PATH;
///
/// Expanded ACPI Device Path SubType.
///
-#define ACPI_EXTENDED_DP 0x02
+#define ACPI_EXTENDED_DP 0x02
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Device's PnP hardware ID stored in a numeric 32-bit
/// compressed EISA-type ID. This value must match the
/// corresponding _HID in the ACPI name space.
///
- UINT32 HID;
+ UINT32 HID;
///
/// Unique ID that is required by ACPI if two devices have the
/// same _HID. This value must also match the corresponding
/// _UID/_HID pair in the ACPI name space.
///
- UINT32 UID;
+ UINT32 UID;
///
/// Device's compatible PnP hardware ID stored in a numeric
/// 32-bit compressed EISA-type ID. This value must match at
/// least one of the compatible device IDs returned by the
/// corresponding _CID in the ACPI name space.
///
- UINT32 CID;
+ UINT32 CID;
///
/// Optional variable length _HIDSTR.
/// Optional variable length _UIDSTR.
@@ -259,18 +252,18 @@
// bits[31:16] - binary number
// Compressed ASCII is 5 bits per character 0b00001 = 'A' 0b11010 = 'Z'
//
-#define PNP_EISA_ID_CONST 0x41d0
-#define EISA_ID(_Name, _Num) ((UINT32)((_Name) | (_Num) << 16))
-#define EISA_PNP_ID(_PNPId) (EISA_ID(PNP_EISA_ID_CONST, (_PNPId)))
-#define EFI_PNP_ID(_PNPId) (EISA_ID(PNP_EISA_ID_CONST, (_PNPId)))
+#define PNP_EISA_ID_CONST 0x41d0
+#define EISA_ID(_Name, _Num) ((UINT32)((_Name) | (_Num) << 16))
+#define EISA_PNP_ID(_PNPId) (EISA_ID(PNP_EISA_ID_CONST, (_PNPId)))
+#define EFI_PNP_ID(_PNPId) (EISA_ID(PNP_EISA_ID_CONST, (_PNPId)))
-#define PNP_EISA_ID_MASK 0xffff
-#define EISA_ID_TO_NUM(_Id) ((_Id) >> 16)
+#define PNP_EISA_ID_MASK 0xffff
+#define EISA_ID_TO_NUM(_Id) ((_Id) >> 16)
///
/// ACPI _ADR Device Path SubType.
///
-#define ACPI_ADR_DP 0x03
+#define ACPI_ADR_DP 0x03
///
/// The _ADR device path is used to contain video output device attributes to support the Graphics
@@ -278,18 +271,33 @@
/// devices are displaying the same output.
///
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// _ADR value. For video output devices the value of this
/// field comes from Table B-2 of the ACPI 3.0 specification. At
/// least one _ADR value is required.
///
- UINT32 ADR;
+ UINT32 ADR;
//
// This device path may optionally contain more than one _ADR entry.
//
} ACPI_ADR_DEVICE_PATH;
+///
+/// ACPI NVDIMM Device Path SubType.
+///
+#define ACPI_NVDIMM_DP 0x04
+///
+///
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ ///
+ /// NFIT Device Handle, the _ADR of the NVDIMM device.
+ /// The value of this field comes from Section 9.20.3 of the ACPI 6.2A specification.
+ ///
+ UINT32 NFITDeviceHandle;
+} ACPI_NVDIMM_DEVICE_PATH;
+
#define ACPI_ADR_DISPLAY_TYPE_OTHER 0
#define ACPI_ADR_DISPLAY_TYPE_VGA 1
#define ACPI_ADR_DISPLAY_TYPE_TV 2
@@ -312,171 +320,171 @@
/// system. This Device Path can describe physical messaging information like SCSI ID, or abstract
/// information like networking protocol IP addresses.
///
-#define MESSAGING_DEVICE_PATH 0x03
+#define MESSAGING_DEVICE_PATH 0x03
///
/// ATAPI Device Path SubType
///
-#define MSG_ATAPI_DP 0x01
+#define MSG_ATAPI_DP 0x01
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Set to zero for primary, or one for secondary.
///
- UINT8 PrimarySecondary;
+ UINT8 PrimarySecondary;
///
/// Set to zero for master, or one for slave mode.
///
- UINT8 SlaveMaster;
+ UINT8 SlaveMaster;
///
/// Logical Unit Number.
///
- UINT16 Lun;
+ UINT16 Lun;
} ATAPI_DEVICE_PATH;
///
/// SCSI Device Path SubType.
///
-#define MSG_SCSI_DP 0x02
+#define MSG_SCSI_DP 0x02
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Target ID on the SCSI bus (PUN).
///
- UINT16 Pun;
+ UINT16 Pun;
///
/// Logical Unit Number (LUN).
///
- UINT16 Lun;
+ UINT16 Lun;
} SCSI_DEVICE_PATH;
///
/// Fibre Channel SubType.
///
-#define MSG_FIBRECHANNEL_DP 0x03
+#define MSG_FIBRECHANNEL_DP 0x03
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Reserved for the future.
///
- UINT32 Reserved;
+ UINT32 Reserved;
///
/// Fibre Channel World Wide Number.
///
- UINT64 WWN;
+ UINT64 WWN;
///
/// Fibre Channel Logical Unit Number.
///
- UINT64 Lun;
+ UINT64 Lun;
} FIBRECHANNEL_DEVICE_PATH;
///
/// Fibre Channel Ex SubType.
///
-#define MSG_FIBRECHANNELEX_DP 0x15
+#define MSG_FIBRECHANNELEX_DP 0x15
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Reserved for the future.
///
- UINT32 Reserved;
+ UINT32 Reserved;
///
/// 8 byte array containing Fibre Channel End Device Port Name.
///
- UINT8 WWN[8];
+ UINT8 WWN[8];
///
/// 8 byte array containing Fibre Channel Logical Unit Number.
///
- UINT8 Lun[8];
+ UINT8 Lun[8];
} FIBRECHANNELEX_DEVICE_PATH;
///
/// 1394 Device Path SubType
///
-#define MSG_1394_DP 0x04
+#define MSG_1394_DP 0x04
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Reserved for the future.
///
- UINT32 Reserved;
+ UINT32 Reserved;
///
/// 1394 Global Unique ID (GUID).
///
- UINT64 Guid;
+ UINT64 Guid;
} F1394_DEVICE_PATH;
///
/// USB Device Path SubType.
///
-#define MSG_USB_DP 0x05
+#define MSG_USB_DP 0x05
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// USB Parent Port Number.
///
- UINT8 ParentPortNumber;
+ UINT8 ParentPortNumber;
///
/// USB Interface Number.
///
- UINT8 InterfaceNumber;
+ UINT8 InterfaceNumber;
} USB_DEVICE_PATH;
///
/// USB Class Device Path SubType.
///
-#define MSG_USB_CLASS_DP 0x0f
+#define MSG_USB_CLASS_DP 0x0f
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Vendor ID assigned by USB-IF. A value of 0xFFFF will
/// match any Vendor ID.
///
- UINT16 VendorId;
+ UINT16 VendorId;
///
/// Product ID assigned by USB-IF. A value of 0xFFFF will
/// match any Product ID.
///
- UINT16 ProductId;
+ UINT16 ProductId;
///
/// The class code assigned by the USB-IF. A value of 0xFF
/// will match any class code.
///
- UINT8 DeviceClass;
+ UINT8 DeviceClass;
///
/// The subclass code assigned by the USB-IF. A value of
/// 0xFF will match any subclass code.
///
- UINT8 DeviceSubClass;
+ UINT8 DeviceSubClass;
///
/// The protocol code assigned by the USB-IF. A value of
/// 0xFF will match any protocol code.
///
- UINT8 DeviceProtocol;
+ UINT8 DeviceProtocol;
} USB_CLASS_DEVICE_PATH;
///
/// USB WWID Device Path SubType.
///
-#define MSG_USB_WWID_DP 0x10
+#define MSG_USB_WWID_DP 0x10
///
/// This device path describes a USB device using its serial number.
///
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// USB interface number.
///
- UINT16 InterfaceNumber;
+ UINT16 InterfaceNumber;
///
/// USB vendor id of the device.
///
- UINT16 VendorId;
+ UINT16 VendorId;
///
/// USB product id of the device.
///
- UINT16 ProductId;
+ UINT16 ProductId;
///
/// Last 64-or-fewer UTF-16 characters of the USB
/// serial number. The length of the string is
@@ -491,136 +499,136 @@
///
#define MSG_DEVICE_LOGICAL_UNIT_DP 0x11
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Logical Unit Number for the interface.
///
- UINT8 Lun;
+ UINT8 Lun;
} DEVICE_LOGICAL_UNIT_DEVICE_PATH;
///
/// SATA Device Path SubType.
///
-#define MSG_SATA_DP 0x12
+#define MSG_SATA_DP 0x12
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// The HBA port number that facilitates the connection to the
/// device or a port multiplier. The value 0xFFFF is reserved.
///
- UINT16 HBAPortNumber;
+ UINT16 HBAPortNumber;
///
/// The Port multiplier port number that facilitates the connection
/// to the device. Must be set to 0xFFFF if the device is directly
/// connected to the HBA.
///
- UINT16 PortMultiplierPortNumber;
+ UINT16 PortMultiplierPortNumber;
///
/// Logical Unit Number.
///
- UINT16 Lun;
+ UINT16 Lun;
} SATA_DEVICE_PATH;
///
/// Flag for if the device is directly connected to the HBA.
///
-#define SATA_HBA_DIRECT_CONNECT_FLAG 0x8000
+#define SATA_HBA_DIRECT_CONNECT_FLAG 0x8000
///
/// I2O Device Path SubType.
///
-#define MSG_I2O_DP 0x06
+#define MSG_I2O_DP 0x06
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Target ID (TID) for a device.
///
- UINT32 Tid;
+ UINT32 Tid;
} I2O_DEVICE_PATH;
///
/// MAC Address Device Path SubType.
///
-#define MSG_MAC_ADDR_DP 0x0b
+#define MSG_MAC_ADDR_DP 0x0b
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// The MAC address for a network interface padded with 0s.
///
- EFI_MAC_ADDRESS MacAddress;
+ EFI_MAC_ADDRESS MacAddress;
///
/// Network interface type(i.e. 802.3, FDDI).
///
- UINT8 IfType;
+ UINT8 IfType;
} MAC_ADDR_DEVICE_PATH;
///
/// IPv4 Device Path SubType
///
-#define MSG_IPv4_DP 0x0c
+#define MSG_IPv4_DP 0x0c
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// The local IPv4 address.
///
- EFI_IPv4_ADDRESS LocalIpAddress;
+ EFI_IPv4_ADDRESS LocalIpAddress;
///
/// The remote IPv4 address.
///
- EFI_IPv4_ADDRESS RemoteIpAddress;
+ EFI_IPv4_ADDRESS RemoteIpAddress;
///
/// The local port number.
///
- UINT16 LocalPort;
+ UINT16 LocalPort;
///
/// The remote port number.
///
- UINT16 RemotePort;
+ UINT16 RemotePort;
///
/// The network protocol(i.e. UDP, TCP).
///
- UINT16 Protocol;
+ UINT16 Protocol;
///
/// 0x00 - The Source IP Address was assigned though DHCP.
/// 0x01 - The Source IP Address is statically bound.
///
- BOOLEAN StaticIpAddress;
+ BOOLEAN StaticIpAddress;
///
/// The gateway IP address
///
- EFI_IPv4_ADDRESS GatewayIpAddress;
+ EFI_IPv4_ADDRESS GatewayIpAddress;
///
/// The subnet mask
///
- EFI_IPv4_ADDRESS SubnetMask;
+ EFI_IPv4_ADDRESS SubnetMask;
} IPv4_DEVICE_PATH;
///
/// IPv6 Device Path SubType.
///
-#define MSG_IPv6_DP 0x0d
+#define MSG_IPv6_DP 0x0d
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// The local IPv6 address.
///
- EFI_IPv6_ADDRESS LocalIpAddress;
+ EFI_IPv6_ADDRESS LocalIpAddress;
///
/// The remote IPv6 address.
///
- EFI_IPv6_ADDRESS RemoteIpAddress;
+ EFI_IPv6_ADDRESS RemoteIpAddress;
///
/// The local port number.
///
- UINT16 LocalPort;
+ UINT16 LocalPort;
///
/// The remote port number.
///
- UINT16 RemotePort;
+ UINT16 RemotePort;
///
/// The network protocol(i.e. UDP, TCP).
///
- UINT16 Protocol;
+ UINT16 Protocol;
///
/// 0x00 - The Local IP Address was manually configured.
/// 0x01 - The Local IP Address is assigned through IPv6
@@ -628,23 +636,23 @@
/// 0x02 - The Local IP Address is assigned through IPv6
/// stateful configuration.
///
- UINT8 IpAddressOrigin;
+ UINT8 IpAddressOrigin;
///
/// The prefix length
///
- UINT8 PrefixLength;
+ UINT8 PrefixLength;
///
/// The gateway IP address
///
- EFI_IPv6_ADDRESS GatewayIpAddress;
+ EFI_IPv6_ADDRESS GatewayIpAddress;
} IPv6_DEVICE_PATH;
///
/// InfiniBand Device Path SubType.
///
-#define MSG_INFINIBAND_DP 0x09
+#define MSG_INFINIBAND_DP 0x09
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Flags to help identify/manage InfiniBand device path elements:
/// Bit 0 - IOC/Service (0b = IOC, 1b = Service).
@@ -654,24 +662,24 @@
/// Bit 4 - Network Protocol.
/// All other bits are reserved.
///
- UINT32 ResourceFlags;
+ UINT32 ResourceFlags;
///
/// 128-bit Global Identifier for remote fabric port.
///
- UINT8 PortGid[16];
+ UINT8 PortGid[16];
///
/// 64-bit unique identifier to remote IOC or server process.
/// Interpretation of field specified by Resource Flags (bit 0).
///
- UINT64 ServiceId;
+ UINT64 ServiceId;
///
/// 64-bit persistent ID of remote IOC port.
///
- UINT64 TargetPortId;
+ UINT64 TargetPortId;
///
/// 64-bit persistent ID of remote device.
///
- UINT64 DeviceId;
+ UINT64 DeviceId;
} INFINIBAND_DEVICE_PATH;
#define INFINIBAND_RESOURCE_FLAG_IOC_SERVICE 0x01
@@ -683,23 +691,23 @@
///
/// UART Device Path SubType.
///
-#define MSG_UART_DP 0x0e
+#define MSG_UART_DP 0x0e
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Reserved.
///
- UINT32 Reserved;
+ UINT32 Reserved;
///
/// The baud rate setting for the UART style device. A value of 0
/// means that the device's default baud rate will be used.
///
- UINT64 BaudRate;
+ UINT64 BaudRate;
///
/// The number of data bits for the UART style device. A value
/// of 0 means that the device's default number of data bits will be used.
///
- UINT8 DataBits;
+ UINT8 DataBits;
///
/// The parity setting for the UART style device.
/// Parity 0x00 - Default Parity.
@@ -709,7 +717,7 @@
/// Parity 0x04 - Mark Parity.
/// Parity 0x05 - Space Parity.
///
- UINT8 Parity;
+ UINT8 Parity;
///
/// The number of stop bits for the UART style device.
/// Stop Bits 0x00 - Default Stop Bits.
@@ -717,177 +725,205 @@
/// Stop Bits 0x02 - 1.5 Stop Bits.
/// Stop Bits 0x03 - 2 Stop Bits.
///
- UINT8 StopBits;
+ UINT8 StopBits;
} UART_DEVICE_PATH;
+///
+/// NVDIMM Namespace Device Path SubType.
+///
+#define NVDIMM_NAMESPACE_DP 0x20
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ ///
+ /// Namespace unique label identifier UUID.
+ ///
+ EFI_GUID Uuid;
+} NVDIMM_NAMESPACE_DEVICE_PATH;
+
//
// Use VENDOR_DEVICE_PATH struct
//
-#define MSG_VENDOR_DP 0x0a
-typedef VENDOR_DEVICE_PATH VENDOR_DEFINED_DEVICE_PATH;
+#define MSG_VENDOR_DP 0x0a
+typedef VENDOR_DEVICE_PATH VENDOR_DEFINED_DEVICE_PATH;
-#define DEVICE_PATH_MESSAGING_PC_ANSI EFI_PC_ANSI_GUID
-#define DEVICE_PATH_MESSAGING_VT_100 EFI_VT_100_GUID
-#define DEVICE_PATH_MESSAGING_VT_100_PLUS EFI_VT_100_PLUS_GUID
-#define DEVICE_PATH_MESSAGING_VT_UTF8 EFI_VT_UTF8_GUID
+#define DEVICE_PATH_MESSAGING_PC_ANSI EFI_PC_ANSI_GUID
+#define DEVICE_PATH_MESSAGING_VT_100 EFI_VT_100_GUID
+#define DEVICE_PATH_MESSAGING_VT_100_PLUS EFI_VT_100_PLUS_GUID
+#define DEVICE_PATH_MESSAGING_VT_UTF8 EFI_VT_UTF8_GUID
///
/// A new device path node is defined to declare flow control characteristics.
/// UART Flow Control Messaging Device Path
///
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// DEVICE_PATH_MESSAGING_UART_FLOW_CONTROL GUID.
///
- EFI_GUID Guid;
+ EFI_GUID Guid;
///
/// Bitmap of supported flow control types.
/// Bit 0 set indicates hardware flow control.
/// Bit 1 set indicates Xon/Xoff flow control.
/// All other bits are reserved and are clear.
///
- UINT32 FlowControlMap;
+ UINT32 FlowControlMap;
} UART_FLOW_CONTROL_DEVICE_PATH;
-#define UART_FLOW_CONTROL_HARDWARE 0x00000001
-#define UART_FLOW_CONTROL_XON_XOFF 0x00000010
+#define UART_FLOW_CONTROL_HARDWARE 0x00000001
+#define UART_FLOW_CONTROL_XON_XOFF 0x00000010
-#define DEVICE_PATH_MESSAGING_SAS EFI_SAS_DEVICE_PATH_GUID
+#define DEVICE_PATH_MESSAGING_SAS EFI_SAS_DEVICE_PATH_GUID
///
/// Serial Attached SCSI (SAS) Device Path.
///
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// DEVICE_PATH_MESSAGING_SAS GUID.
///
- EFI_GUID Guid;
+ EFI_GUID Guid;
///
/// Reserved for future use.
///
- UINT32 Reserved;
+ UINT32 Reserved;
///
/// SAS Address for Serial Attached SCSI Target.
///
- UINT64 SasAddress;
+ UINT64 SasAddress;
///
/// SAS Logical Unit Number.
///
- UINT64 Lun;
+ UINT64 Lun;
///
/// More Information about the device and its interconnect.
///
- UINT16 DeviceTopology;
+ UINT16 DeviceTopology;
///
/// Relative Target Port (RTP).
///
- UINT16 RelativeTargetPort;
+ UINT16 RelativeTargetPort;
} SAS_DEVICE_PATH;
///
/// Serial Attached SCSI (SAS) Ex Device Path SubType
///
-#define MSG_SASEX_DP 0x16
+#define MSG_SASEX_DP 0x16
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// 8-byte array of the SAS Address for Serial Attached SCSI Target Port.
///
- UINT8 SasAddress[8];
+ UINT8 SasAddress[8];
///
/// 8-byte array of the SAS Logical Unit Number.
///
- UINT8 Lun[8];
+ UINT8 Lun[8];
///
/// More Information about the device and its interconnect.
///
- UINT16 DeviceTopology;
+ UINT16 DeviceTopology;
///
/// Relative Target Port (RTP).
///
- UINT16 RelativeTargetPort;
+ UINT16 RelativeTargetPort;
} SASEX_DEVICE_PATH;
///
/// NvmExpress Namespace Device Path SubType.
///
-#define MSG_NVME_NAMESPACE_DP 0x17
+#define MSG_NVME_NAMESPACE_DP 0x17
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
- UINT32 NamespaceId;
- UINT64 NamespaceUuid;
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT32 NamespaceId;
+ UINT64 NamespaceUuid;
} NVME_NAMESPACE_DEVICE_PATH;
///
+/// DNS Device Path SubType
+///
+#define MSG_DNS_DP 0x1F
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ ///
+ /// Indicates the DNS server address is IPv4 or IPv6 address.
+ ///
+ UINT8 IsIPv6;
+ ///
+ /// Instance of the DNS server address.
+ ///
+ EFI_IP_ADDRESS DnsServerIp[];
+} DNS_DEVICE_PATH;
+
+///
/// Uniform Resource Identifiers (URI) Device Path SubType
///
-#define MSG_URI_DP 0x18
+#define MSG_URI_DP 0x18
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Instance of the URI pursuant to RFC 3986.
///
- CHAR8 Uri[];
+ CHAR8 Uri[];
} URI_DEVICE_PATH;
///
/// Universal Flash Storage (UFS) Device Path SubType.
///
-#define MSG_UFS_DP 0x19
+#define MSG_UFS_DP 0x19
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Target ID on the UFS bus (PUN).
///
- UINT8 Pun;
+ UINT8 Pun;
///
/// Logical Unit Number (LUN).
///
- UINT8 Lun;
+ UINT8 Lun;
} UFS_DEVICE_PATH;
///
/// SD (Secure Digital) Device Path SubType.
///
-#define MSG_SD_DP 0x1A
+#define MSG_SD_DP 0x1A
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
- UINT8 SlotNumber;
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT8 SlotNumber;
} SD_DEVICE_PATH;
///
/// EMMC (Embedded MMC) Device Path SubType.
///
-#define MSG_EMMC_DP 0x1D
+#define MSG_EMMC_DP 0x1D
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
- UINT8 SlotNumber;
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT8 SlotNumber;
} EMMC_DEVICE_PATH;
///
/// iSCSI Device Path SubType
///
-#define MSG_ISCSI_DP 0x13
+#define MSG_ISCSI_DP 0x13
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Network Protocol (0 = TCP, 1+ = reserved).
///
- UINT16 NetworkProtocol;
+ UINT16 NetworkProtocol;
///
/// iSCSI Login Options.
///
- UINT16 LoginOption;
+ UINT16 LoginOption;
///
/// iSCSI Logical Unit Number.
///
- UINT64 Lun;
+ UINT64 Lun;
///
/// iSCSI Target Portal group tag the initiator intends
/// to establish a session with.
///
- UINT16 TargetPortalGroupTag;
+ UINT16 TargetPortalGroupTag;
///
/// iSCSI NodeTarget Name. The length of the name
/// is determined by subtracting the offset of this field from Length.
@@ -895,81 +931,90 @@
/// CHAR8 iSCSI Target Name.
} ISCSI_DEVICE_PATH;
-#define ISCSI_LOGIN_OPTION_NO_HEADER_DIGEST 0x0000
-#define ISCSI_LOGIN_OPTION_HEADER_DIGEST_USING_CRC32C 0x0002
-#define ISCSI_LOGIN_OPTION_NO_DATA_DIGEST 0x0000
-#define ISCSI_LOGIN_OPTION_DATA_DIGEST_USING_CRC32C 0x0008
-#define ISCSI_LOGIN_OPTION_AUTHMETHOD_CHAP 0x0000
-#define ISCSI_LOGIN_OPTION_AUTHMETHOD_NON 0x1000
-#define ISCSI_LOGIN_OPTION_CHAP_BI 0x0000
-#define ISCSI_LOGIN_OPTION_CHAP_UNI 0x2000
+#define ISCSI_LOGIN_OPTION_NO_HEADER_DIGEST 0x0000
+#define ISCSI_LOGIN_OPTION_HEADER_DIGEST_USING_CRC32C 0x0002
+#define ISCSI_LOGIN_OPTION_NO_DATA_DIGEST 0x0000
+#define ISCSI_LOGIN_OPTION_DATA_DIGEST_USING_CRC32C 0x0008
+#define ISCSI_LOGIN_OPTION_AUTHMETHOD_CHAP 0x0000
+#define ISCSI_LOGIN_OPTION_AUTHMETHOD_NON 0x1000
+#define ISCSI_LOGIN_OPTION_CHAP_BI 0x0000
+#define ISCSI_LOGIN_OPTION_CHAP_UNI 0x2000
///
/// VLAN Device Path SubType.
///
-#define MSG_VLAN_DP 0x14
+#define MSG_VLAN_DP 0x14
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// VLAN identifier (0-4094).
///
- UINT16 VlanId;
+ UINT16 VlanId;
} VLAN_DEVICE_PATH;
///
/// Bluetooth Device Path SubType.
///
-#define MSG_BLUETOOTH_DP 0x1b
+#define MSG_BLUETOOTH_DP 0x1b
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// 48bit Bluetooth device address.
///
- BLUETOOTH_ADDRESS BD_ADDR;
+ BLUETOOTH_ADDRESS BD_ADDR;
} BLUETOOTH_DEVICE_PATH;
///
/// Wi-Fi Device Path SubType.
///
-#define MSG_WIFI_DP 0x1C
+#define MSG_WIFI_DP 0x1C
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Service set identifier. A 32-byte octets string.
///
- UINT8 SSId[32];
+ UINT8 SSId[32];
} WIFI_DEVICE_PATH;
+///
+/// Bluetooth LE Device Path SubType.
+///
+#define MSG_BLUETOOTH_LE_DP 0x1E
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ BLUETOOTH_LE_ADDRESS Address;
+} BLUETOOTH_LE_DEVICE_PATH;
+
//
// Media Device Path
//
-#define MEDIA_DEVICE_PATH 0x04
+#define MEDIA_DEVICE_PATH 0x04
///
/// Hard Drive Media Device Path SubType.
///
-#define MEDIA_HARDDRIVE_DP 0x01
+#define MEDIA_HARDDRIVE_DP 0x01
///
/// The Hard Drive Media Device Path is used to represent a partition on a hard drive.
///
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Describes the entry in a partition table, starting with entry 1.
/// Partition number zero represents the entire device. Valid
/// partition numbers for a MBR partition are [1, 4]. Valid
/// partition numbers for a GPT partition are [1, NumberOfPartitionEntries].
///
- UINT32 PartitionNumber;
+ UINT32 PartitionNumber;
///
/// Starting LBA of the partition on the hard drive.
///
- UINT64 PartitionStart;
+ UINT64 PartitionStart;
///
/// Size of the partition in units of Logical Blocks.
///
- UINT64 PartitionSize;
+ UINT64 PartitionSize;
///
/// Signature unique to this partition:
/// If SignatureType is 0, this field has to be initialized with 16 zeros.
@@ -977,68 +1022,68 @@
/// The other 12 bytes are initialized with zeros.
/// If SignatureType is 2, this field contains a 16 byte signature.
///
- UINT8 Signature[16];
+ UINT8 Signature[16];
///
/// Partition Format: (Unused values reserved).
/// 0x01 - PC-AT compatible legacy MBR.
/// 0x02 - GUID Partition Table.
///
- UINT8 MBRType;
+ UINT8 MBRType;
///
/// Type of Disk Signature: (Unused values reserved).
/// 0x00 - No Disk Signature.
/// 0x01 - 32-bit signature from address 0x1b8 of the type 0x01 MBR.
/// 0x02 - GUID signature.
///
- UINT8 SignatureType;
+ UINT8 SignatureType;
} HARDDRIVE_DEVICE_PATH;
-#define MBR_TYPE_PCAT 0x01
-#define MBR_TYPE_EFI_PARTITION_TABLE_HEADER 0x02
+#define MBR_TYPE_PCAT 0x01
+#define MBR_TYPE_EFI_PARTITION_TABLE_HEADER 0x02
-#define NO_DISK_SIGNATURE 0x00
-#define SIGNATURE_TYPE_MBR 0x01
-#define SIGNATURE_TYPE_GUID 0x02
+#define NO_DISK_SIGNATURE 0x00
+#define SIGNATURE_TYPE_MBR 0x01
+#define SIGNATURE_TYPE_GUID 0x02
///
/// CD-ROM Media Device Path SubType.
///
-#define MEDIA_CDROM_DP 0x02
+#define MEDIA_CDROM_DP 0x02
///
/// The CD-ROM Media Device Path is used to define a system partition that exists on a CD-ROM.
///
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Boot Entry number from the Boot Catalog. The Initial/Default entry is defined as zero.
///
- UINT32 BootEntry;
+ UINT32 BootEntry;
///
/// Starting RBA of the partition on the medium. CD-ROMs use Relative logical Block Addressing.
///
- UINT64 PartitionStart;
+ UINT64 PartitionStart;
///
/// Size of the partition in units of Blocks, also called Sectors.
///
- UINT64 PartitionSize;
+ UINT64 PartitionSize;
} CDROM_DEVICE_PATH;
//
// Use VENDOR_DEVICE_PATH struct
//
-#define MEDIA_VENDOR_DP 0x03 ///< Media vendor device path subtype.
+#define MEDIA_VENDOR_DP 0x03 ///< Media vendor device path subtype.
///
/// File Path Media Device Path SubType
///
-#define MEDIA_FILEPATH_DP 0x04
+#define MEDIA_FILEPATH_DP 0x04
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// A NULL-terminated Path string including directory and file names.
///
- CHAR16 PathName[1];
+ CHAR16 PathName[1];
} FILEPATH_DEVICE_PATH;
#define SIZE_OF_FILEPATH_DEVICE_PATH OFFSET_OF(FILEPATH_DEVICE_PATH,PathName)
@@ -1046,7 +1091,7 @@
///
/// Media Protocol Device Path SubType.
///
-#define MEDIA_PROTOCOL_DP 0x05
+#define MEDIA_PROTOCOL_DP 0x05
///
/// The Media Protocol Device Path is used to denote the protocol that is being
@@ -1054,157 +1099,156 @@
/// Many protocols are inherent to the style of device path.
///
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// The ID of the protocol.
///
- EFI_GUID Protocol;
+ EFI_GUID Protocol;
} MEDIA_PROTOCOL_DEVICE_PATH;
///
/// PIWG Firmware File SubType.
///
-#define MEDIA_PIWG_FW_FILE_DP 0x06
+#define MEDIA_PIWG_FW_FILE_DP 0x06
///
/// This device path is used by systems implementing the UEFI PI Specification 1.0 to describe a firmware file.
///
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Firmware file name
///
- EFI_GUID FvFileName;
+ EFI_GUID FvFileName;
} MEDIA_FW_VOL_FILEPATH_DEVICE_PATH;
///
/// PIWG Firmware Volume Device Path SubType.
///
-#define MEDIA_PIWG_FW_VOL_DP 0x07
+#define MEDIA_PIWG_FW_VOL_DP 0x07
///
/// This device path is used by systems implementing the UEFI PI Specification 1.0 to describe a firmware volume.
///
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Firmware volume name.
///
- EFI_GUID FvName;
+ EFI_GUID FvName;
} MEDIA_FW_VOL_DEVICE_PATH;
///
/// Media relative offset range device path.
///
-#define MEDIA_RELATIVE_OFFSET_RANGE_DP 0x08
+#define MEDIA_RELATIVE_OFFSET_RANGE_DP 0x08
///
/// Used to describe the offset range of media relative.
///
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
- UINT32 Reserved;
- UINT64 StartingOffset;
- UINT64 EndingOffset;
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT32 Reserved;
+ UINT64 StartingOffset;
+ UINT64 EndingOffset;
} MEDIA_RELATIVE_OFFSET_RANGE_DEVICE_PATH;
///
/// This GUID defines a RAM Disk supporting a raw disk format in volatile memory.
///
-#define EFI_VIRTUAL_DISK_GUID EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE
+#define EFI_VIRTUAL_DISK_GUID EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE
-extern EFI_GUID gEfiVirtualDiskGuid;
+extern EFI_GUID gEfiVirtualDiskGuid;
///
/// This GUID defines a RAM Disk supporting an ISO image in volatile memory.
///
-#define EFI_VIRTUAL_CD_GUID EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE
+#define EFI_VIRTUAL_CD_GUID EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE
-extern EFI_GUID gEfiVirtualCdGuid;
+extern EFI_GUID gEfiVirtualCdGuid;
///
/// This GUID defines a RAM Disk supporting a raw disk format in persistent memory.
///
-#define EFI_PERSISTENT_VIRTUAL_DISK_GUID EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT
+#define EFI_PERSISTENT_VIRTUAL_DISK_GUID EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT
-extern EFI_GUID gEfiPersistentVirtualDiskGuid;
+extern EFI_GUID gEfiPersistentVirtualDiskGuid;
///
/// This GUID defines a RAM Disk supporting an ISO image in persistent memory.
///
-#define EFI_PERSISTENT_VIRTUAL_CD_GUID EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT
+#define EFI_PERSISTENT_VIRTUAL_CD_GUID EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT
-extern EFI_GUID gEfiPersistentVirtualCdGuid;
+extern EFI_GUID gEfiPersistentVirtualCdGuid;
///
/// Media ram disk device path.
///
-#define MEDIA_RAM_DISK_DP 0x09
+#define MEDIA_RAM_DISK_DP 0x09
///
/// Used to describe the ram disk device path.
///
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Starting Memory Address.
///
- UINT32 StartingAddr[2];
+ UINT32 StartingAddr[2];
///
/// Ending Memory Address.
///
- UINT32 EndingAddr[2];
+ UINT32 EndingAddr[2];
///
/// GUID that defines the type of the RAM Disk.
///
- EFI_GUID TypeGuid;
+ EFI_GUID TypeGuid;
///
/// RAM Diskinstance number, if supported. The default value is zero.
///
- UINT16 Instance;
+ UINT16 Instance;
} MEDIA_RAM_DISK_DEVICE_PATH;
///
/// BIOS Boot Specification Device Path.
///
-#define BBS_DEVICE_PATH 0x05
+#define BBS_DEVICE_PATH 0x05
///
/// BIOS Boot Specification Device Path SubType.
///
-#define BBS_BBS_DP 0x01
+#define BBS_BBS_DP 0x01
///
/// This Device Path is used to describe the booting of non-EFI-aware operating systems.
///
typedef struct {
- EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_DEVICE_PATH_PROTOCOL Header;
///
/// Device Type as defined by the BIOS Boot Specification.
///
- UINT16 DeviceType;
+ UINT16 DeviceType;
///
/// Status Flags as defined by the BIOS Boot Specification.
///
- UINT16 StatusFlag;
+ UINT16 StatusFlag;
///
/// Null-terminated ASCII string that describes the boot device to a user.
///
- CHAR8 String[1];
+ CHAR8 String[1];
} BBS_BBS_DEVICE_PATH;
//
// DeviceType definitions - from BBS specification
//
-#define BBS_TYPE_FLOPPY 0x01
-#define BBS_TYPE_HARDDRIVE 0x02
-#define BBS_TYPE_CDROM 0x03
-#define BBS_TYPE_PCMCIA 0x04
-#define BBS_TYPE_USB 0x05
-#define BBS_TYPE_EMBEDDED_NETWORK 0x06
-#define BBS_TYPE_BEV 0x80
-#define BBS_TYPE_UNKNOWN 0xFF
-
+#define BBS_TYPE_FLOPPY 0x01
+#define BBS_TYPE_HARDDRIVE 0x02
+#define BBS_TYPE_CDROM 0x03
+#define BBS_TYPE_PCMCIA 0x04
+#define BBS_TYPE_USB 0x05
+#define BBS_TYPE_EMBEDDED_NETWORK 0x06
+#define BBS_TYPE_BEV 0x80
+#define BBS_TYPE_UNKNOWN 0xFF
///
/// Union of all possible Device Paths and pointers to Device Paths.
@@ -1245,6 +1289,7 @@
SAS_DEVICE_PATH Sas;
SASEX_DEVICE_PATH SasEx;
NVME_NAMESPACE_DEVICE_PATH NvmeNamespace;
+ DNS_DEVICE_PATH Dns;
URI_DEVICE_PATH Uri;
BLUETOOTH_DEVICE_PATH Bluetooth;
WIFI_DEVICE_PATH WiFi;
@@ -1264,8 +1309,6 @@
BBS_BBS_DEVICE_PATH Bbs;
} EFI_DEV_PATH;
-
-
typedef union {
EFI_DEVICE_PATH_PROTOCOL *DevPath;
PCI_DEVICE_PATH *Pci;
@@ -1302,6 +1345,7 @@
SAS_DEVICE_PATH *Sas;
SASEX_DEVICE_PATH *SasEx;
NVME_NAMESPACE_DEVICE_PATH *NvmeNamespace;
+ DNS_DEVICE_PATH *Dns;
URI_DEVICE_PATH *Uri;
BLUETOOTH_DEVICE_PATH *Bluetooth;
WIFI_DEVICE_PATH *WiFi;
@@ -1324,10 +1368,10 @@
#pragma pack()
-#define END_DEVICE_PATH_TYPE 0x7f
-#define END_ENTIRE_DEVICE_PATH_SUBTYPE 0xFF
-#define END_INSTANCE_DEVICE_PATH_SUBTYPE 0x01
+#define END_DEVICE_PATH_TYPE 0x7f
+#define END_ENTIRE_DEVICE_PATH_SUBTYPE 0xFF
+#define END_INSTANCE_DEVICE_PATH_SUBTYPE 0x01
-extern EFI_GUID gEfiDevicePathProtocolGuid;
+extern EFI_GUID gEfiDevicePathProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/DevicePathToText.h b/src/include/ipxe/efi/Protocol/DevicePathToText.h
index edca965..2f591b9 100644
--- a/src/include/ipxe/efi/Protocol/DevicePathToText.h
+++ b/src/include/ipxe/efi/Protocol/DevicePathToText.h
@@ -2,21 +2,15 @@
EFI_DEVICE_PATH_TO_TEXT_PROTOCOL as defined in UEFI 2.0.
This protocol provides service to convert device nodes and paths to text.
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __DEVICE_PATH_TO_TEXT_PROTOCOL_H__
#define __DEVICE_PATH_TO_TEXT_PROTOCOL_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
///
/// Device Path To Text protocol
@@ -42,7 +36,7 @@
**/
typedef
-CHAR16*
+CHAR16 *
(EFIAPI *EFI_DEVICE_PATH_TO_TEXT_NODE)(
IN CONST EFI_DEVICE_PATH_PROTOCOL *DeviceNode,
IN BOOLEAN DisplayOnly,
@@ -65,7 +59,7 @@
**/
typedef
-CHAR16*
+CHAR16 *
(EFIAPI *EFI_DEVICE_PATH_TO_TEXT_PATH)(
IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath,
IN BOOLEAN DisplayOnly,
@@ -76,12 +70,10 @@
/// This protocol converts device paths and device nodes to text.
///
typedef struct {
- EFI_DEVICE_PATH_TO_TEXT_NODE ConvertDeviceNodeToText;
- EFI_DEVICE_PATH_TO_TEXT_PATH ConvertDevicePathToText;
+ EFI_DEVICE_PATH_TO_TEXT_NODE ConvertDeviceNodeToText;
+ EFI_DEVICE_PATH_TO_TEXT_PATH ConvertDevicePathToText;
} EFI_DEVICE_PATH_TO_TEXT_PROTOCOL;
-extern EFI_GUID gEfiDevicePathToTextProtocolGuid;
+extern EFI_GUID gEfiDevicePathToTextProtocolGuid;
#endif
-
-
diff --git a/src/include/ipxe/efi/Protocol/Dhcp4.h b/src/include/ipxe/efi/Protocol/Dhcp4.h
index 560ee32..1e7e27b 100644
--- a/src/include/ipxe/efi/Protocol/Dhcp4.h
+++ b/src/include/ipxe/efi/Protocol/Dhcp4.h
@@ -4,14 +4,8 @@
These protocols are used to collect configuration information for the EFI IPv4 Protocol
drivers and to provide DHCPv4 server and PXE boot server discovery services.
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
This Protocol was introduced in UEFI Specification 2.0.
@@ -21,7 +15,7 @@
#ifndef __EFI_DHCP4_PROTOCOL_H__
#define __EFI_DHCP4_PROTOCOL_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_DHCP4_PROTOCOL_GUID \
{ \
@@ -35,151 +29,146 @@
typedef struct _EFI_DHCP4_PROTOCOL EFI_DHCP4_PROTOCOL;
-
#pragma pack(1)
typedef struct {
///
/// DHCP option code.
///
- UINT8 OpCode;
+ UINT8 OpCode;
///
/// Length of the DHCP option data. Not present if OpCode is 0 or 255.
///
- UINT8 Length;
+ UINT8 Length;
///
/// Start of the DHCP option data. Not present if OpCode is 0 or 255 or if Length is zero.
///
- UINT8 Data[1];
+ UINT8 Data[1];
} EFI_DHCP4_PACKET_OPTION;
#pragma pack()
-
#pragma pack(1)
///
/// EFI_DHCP4_PACKET defines the format of DHCPv4 packets. See RFC 2131 for more information.
///
typedef struct {
- UINT8 OpCode;
- UINT8 HwType;
- UINT8 HwAddrLen;
- UINT8 Hops;
- UINT32 Xid;
- UINT16 Seconds;
- UINT16 Reserved;
- EFI_IPv4_ADDRESS ClientAddr; ///< Client IP address from client.
- EFI_IPv4_ADDRESS YourAddr; ///< Client IP address from server.
- EFI_IPv4_ADDRESS ServerAddr; ///< IP address of next server in bootstrap.
- EFI_IPv4_ADDRESS GatewayAddr; ///< Relay agent IP address.
- UINT8 ClientHwAddr[16]; ///< Client hardware address.
- CHAR8 ServerName[64];
- CHAR8 BootFileName[128];
-}EFI_DHCP4_HEADER;
+ UINT8 OpCode;
+ UINT8 HwType;
+ UINT8 HwAddrLen;
+ UINT8 Hops;
+ UINT32 Xid;
+ UINT16 Seconds;
+ UINT16 Reserved;
+ EFI_IPv4_ADDRESS ClientAddr; ///< Client IP address from client.
+ EFI_IPv4_ADDRESS YourAddr; ///< Client IP address from server.
+ EFI_IPv4_ADDRESS ServerAddr; ///< IP address of next server in bootstrap.
+ EFI_IPv4_ADDRESS GatewayAddr; ///< Relay agent IP address.
+ UINT8 ClientHwAddr[16]; ///< Client hardware address.
+ CHAR8 ServerName[64];
+ CHAR8 BootFileName[128];
+} EFI_DHCP4_HEADER;
#pragma pack()
-
#pragma pack(1)
typedef struct {
///
/// Size of the EFI_DHCP4_PACKET buffer.
///
- UINT32 Size;
+ UINT32 Size;
///
/// Length of the EFI_DHCP4_PACKET from the first byte of the Header field
/// to the last byte of the Option[] field.
///
- UINT32 Length;
+ UINT32 Length;
struct {
///
/// DHCP packet header.
///
- EFI_DHCP4_HEADER Header;
+ EFI_DHCP4_HEADER Header;
///
/// DHCP magik cookie in network byte order.
///
- UINT32 Magik;
+ UINT32 Magik;
///
/// Start of the DHCP packed option data.
///
- UINT8 Option[1];
+ UINT8 Option[1];
} Dhcp4;
} EFI_DHCP4_PACKET;
#pragma pack()
-
typedef enum {
///
/// The EFI DHCPv4 Protocol driver is stopped.
///
- Dhcp4Stopped = 0x0,
+ Dhcp4Stopped = 0x0,
///
/// The EFI DHCPv4 Protocol driver is inactive.
///
- Dhcp4Init = 0x1,
+ Dhcp4Init = 0x1,
///
/// The EFI DHCPv4 Protocol driver is collecting DHCP offer packets from DHCP servers.
///
- Dhcp4Selecting = 0x2,
+ Dhcp4Selecting = 0x2,
///
/// The EFI DHCPv4 Protocol driver has sent the request to the DHCP server and is waiting for a response.
///
- Dhcp4Requesting = 0x3,
+ Dhcp4Requesting = 0x3,
///
/// The DHCP configuration has completed.
///
- Dhcp4Bound = 0x4,
+ Dhcp4Bound = 0x4,
///
/// The DHCP configuration is being renewed and another request has
/// been sent out, but it has not received a response from the server yet.
///
- Dhcp4Renewing = 0x5,
+ Dhcp4Renewing = 0x5,
///
/// The DHCP configuration has timed out and the EFI DHCPv4
/// Protocol driver is trying to extend the lease time.
///
- Dhcp4Rebinding = 0x6,
+ Dhcp4Rebinding = 0x6,
///
/// The EFI DHCPv4 Protocol driver was initialized with a previously
/// allocated or known IP address.
///
- Dhcp4InitReboot = 0x7,
+ Dhcp4InitReboot = 0x7,
///
/// The EFI DHCPv4 Protocol driver is seeking to reuse the previously
/// allocated IP address by sending a request to the DHCP server.
///
- Dhcp4Rebooting = 0x8
+ Dhcp4Rebooting = 0x8
} EFI_DHCP4_STATE;
-
-typedef enum{
+typedef enum {
///
/// The packet to start the configuration sequence is about to be sent.
///
- Dhcp4SendDiscover = 0x01,
+ Dhcp4SendDiscover = 0x01,
///
/// A reply packet was just received.
///
- Dhcp4RcvdOffer = 0x02,
+ Dhcp4RcvdOffer = 0x02,
///
/// It is time for Dhcp4Callback to select an offer.
///
- Dhcp4SelectOffer = 0x03,
+ Dhcp4SelectOffer = 0x03,
///
/// A request packet is about to be sent.
///
- Dhcp4SendRequest = 0x04,
+ Dhcp4SendRequest = 0x04,
///
/// A DHCPACK packet was received and will be passed to Dhcp4Callback.
///
- Dhcp4RcvdAck = 0x05,
+ Dhcp4RcvdAck = 0x05,
///
/// A DHCPNAK packet was received and will be passed to Dhcp4Callback.
///
- Dhcp4RcvdNak = 0x06,
+ Dhcp4RcvdNak = 0x06,
///
/// A decline packet is about to be sent.
///
- Dhcp4SendDecline = 0x07,
+ Dhcp4SendDecline = 0x07,
///
/// The DHCP configuration process has completed. No packet is associated with this event.
///
@@ -188,7 +177,7 @@
/// It is time to enter the Dhcp4Renewing state and to contact the server
/// that originally issued the network address. No packet is associated with this event.
///
- Dhcp4EnterRenewing = 0x09,
+ Dhcp4EnterRenewing = 0x09,
///
/// It is time to enter the Dhcp4Rebinding state and to contact any server.
/// No packet is associated with this event.
@@ -199,13 +188,13 @@
/// the user released the configuration, or a DHCPNAK packet was received in
/// the Dhcp4Renewing or Dhcp4Rebinding state. No packet is associated with this event.
///
- Dhcp4AddressLost = 0x0b,
+ Dhcp4AddressLost = 0x0b,
///
/// The DHCP process failed because a DHCPNAK packet was received or the user
/// aborted the DHCP process at a time when the configuration was not available yet.
/// No packet is associated with this event.
///
- Dhcp4Fail = 0x0c
+ Dhcp4Fail = 0x0c
} EFI_DHCP4_EVENT;
/**
@@ -257,25 +246,25 @@
/// event and waiting for a response during the Dhcp4RcvdOffer event.
/// Set to zero to use the default try counts and timeout values.
///
- UINT32 DiscoverTryCount;
+ UINT32 DiscoverTryCount;
///
/// The maximum amount of time (in seconds) to wait for returned packets in each
/// of the retries. Timeout values of zero will default to a timeout value
/// of one second. Set to NULL to use default timeout values.
///
- UINT32 *DiscoverTimeout;
+ UINT32 *DiscoverTimeout;
///
/// The number of times to try sending a packet during the Dhcp4SendRequest event
/// and waiting for a response during the Dhcp4RcvdAck event before accepting
/// failure. Set to zero to use the default try counts and timeout values.
///
- UINT32 RequestTryCount;
+ UINT32 RequestTryCount;
///
/// The maximum amount of time (in seconds) to wait for return packets in each of the retries.
/// Timeout values of zero will default to a timeout value of one second.
/// Set to NULL to use default timeout values.
///
- UINT32 *RequestTimeout;
+ UINT32 *RequestTimeout;
///
/// For a DHCPDISCOVER, setting this parameter to the previously allocated IP
/// address will cause the EFI DHCPv4 Protocol driver to enter the Dhcp4InitReboot state.
@@ -283,20 +272,20 @@
/// For a DHCPINFORM this parameter should be set to the client network address
/// which was assigned to the client during a DHCPDISCOVER.
///
- EFI_IPv4_ADDRESS ClientAddress;
+ EFI_IPv4_ADDRESS ClientAddress;
///
/// The callback function to intercept various events that occurred in
/// the DHCP configuration process. Set to NULL to ignore all those events.
///
- EFI_DHCP4_CALLBACK Dhcp4Callback;
+ EFI_DHCP4_CALLBACK Dhcp4Callback;
///
/// The pointer to the context that will be passed to Dhcp4Callback when it is called.
///
- VOID *CallbackContext;
+ VOID *CallbackContext;
///
/// Number of DHCP options in the OptionList.
///
- UINT32 OptionCount;
+ UINT32 OptionCount;
///
/// List of DHCP options to be included in every packet that is sent during the
/// Dhcp4SendDiscover event. Pad options are appended automatically by DHCP driver
@@ -304,122 +293,118 @@
/// ignored by the driver. OptionList can be freed after EFI_DHCP4_PROTOCOL.Configure()
/// returns. Ignored if OptionCount is zero.
///
- EFI_DHCP4_PACKET_OPTION **OptionList;
+ EFI_DHCP4_PACKET_OPTION **OptionList;
} EFI_DHCP4_CONFIG_DATA;
-
typedef struct {
///
/// The EFI DHCPv4 Protocol driver operating state.
///
- EFI_DHCP4_STATE State;
+ EFI_DHCP4_STATE State;
///
/// The configuration data of the current EFI DHCPv4 Protocol driver instance.
///
- EFI_DHCP4_CONFIG_DATA ConfigData;
+ EFI_DHCP4_CONFIG_DATA ConfigData;
///
/// The client IP address that was acquired from the DHCP server. If it is zero,
/// the DHCP acquisition has not completed yet and the following fields in this structure are undefined.
///
- EFI_IPv4_ADDRESS ClientAddress;
+ EFI_IPv4_ADDRESS ClientAddress;
///
/// The local hardware address.
///
- EFI_MAC_ADDRESS ClientMacAddress;
+ EFI_MAC_ADDRESS ClientMacAddress;
///
/// The server IP address that is providing the DHCP service to this client.
///
- EFI_IPv4_ADDRESS ServerAddress;
+ EFI_IPv4_ADDRESS ServerAddress;
///
/// The router IP address that was acquired from the DHCP server.
/// May be zero if the server does not offer this address.
///
- EFI_IPv4_ADDRESS RouterAddress;
+ EFI_IPv4_ADDRESS RouterAddress;
///
/// The subnet mask of the connected network that was acquired from the DHCP server.
///
- EFI_IPv4_ADDRESS SubnetMask;
+ EFI_IPv4_ADDRESS SubnetMask;
///
/// The lease time (in 1-second units) of the configured IP address.
/// The value 0xFFFFFFFF means that the lease time is infinite.
/// A default lease of 7 days is used if the DHCP server does not provide a value.
///
- UINT32 LeaseTime;
+ UINT32 LeaseTime;
///
/// The cached latest DHCPACK or DHCPNAK or BOOTP REPLY packet. May be NULL if no packet is cached.
///
- EFI_DHCP4_PACKET *ReplyPacket;
+ EFI_DHCP4_PACKET *ReplyPacket;
} EFI_DHCP4_MODE_DATA;
-
typedef struct {
///
/// Alternate listening address. It can be a unicast, multicast, or broadcast address.
///
- EFI_IPv4_ADDRESS ListenAddress;
+ EFI_IPv4_ADDRESS ListenAddress;
///
/// The subnet mask of above listening unicast/broadcast IP address.
/// Ignored if ListenAddress is a multicast address.
///
- EFI_IPv4_ADDRESS SubnetMask;
+ EFI_IPv4_ADDRESS SubnetMask;
///
/// Alternate station source (or listening) port number.
/// If zero, then the default station port number (68) will be used.
///
- UINT16 ListenPort;
+ UINT16 ListenPort;
} EFI_DHCP4_LISTEN_POINT;
-
typedef struct {
///
/// The completion status of transmitting and receiving.
///
- EFI_STATUS Status;
+ EFI_STATUS Status;
///
/// If not NULL, the event that will be signaled when the collection process
/// completes. If NULL, this function will busy-wait until the collection process competes.
///
- EFI_EVENT CompletionEvent;
+ EFI_EVENT CompletionEvent;
///
/// The pointer to the server IP address. This address may be a unicast, multicast, or broadcast address.
///
- EFI_IPv4_ADDRESS RemoteAddress;
+ EFI_IPv4_ADDRESS RemoteAddress;
///
/// The server listening port number. If zero, the default server listening port number (67) will be used.
///
- UINT16 RemotePort;
+ UINT16 RemotePort;
///
/// The pointer to the gateway address to override the existing setting.
///
- EFI_IPv4_ADDRESS GatewayAddress;
+ EFI_IPv4_ADDRESS GatewayAddress;
///
/// The number of entries in ListenPoints. If zero, the default station address and port number 68 are used.
///
- UINT32 ListenPointCount;
+ UINT32 ListenPointCount;
///
/// An array of station address and port number pairs that are used as receiving filters.
/// The first entry is also used as the source address and source port of the outgoing packet.
///
- EFI_DHCP4_LISTEN_POINT *ListenPoints;
+ EFI_DHCP4_LISTEN_POINT *ListenPoints;
///
/// The number of seconds to collect responses. Zero is invalid.
///
- UINT32 TimeoutValue;
+ UINT32 TimeoutValue;
///
/// The pointer to the packet to be transmitted.
///
- EFI_DHCP4_PACKET *Packet;
+ EFI_DHCP4_PACKET *Packet;
///
/// Number of received packets.
///
- UINT32 ResponseCount;
+ UINT32 ResponseCount;
///
/// The pointer to the allocated list of received packets.
///
- EFI_DHCP4_PACKET *ResponseList;
+ EFI_DHCP4_PACKET *ResponseList;
} EFI_DHCP4_TRANSMIT_RECEIVE_TOKEN;
-
/**
Returns the current operating mode and cached data packet for the EFI DHCPv4 Protocol driver.
@@ -495,7 +480,6 @@
IN EFI_DHCP4_CONFIG_DATA *Dhcp4CfgData OPTIONAL
);
-
/**
Starts the DHCP configuration process.
@@ -685,7 +669,6 @@
OUT EFI_DHCP4_PACKET **NewPacket
);
-
/**
Transmits a DHCP formatted packet and optionally waits for responses.
@@ -718,7 +701,6 @@
IN EFI_DHCP4_TRANSMIT_RECEIVE_TOKEN *Token
);
-
/**
Parses the packed DHCP option data.
@@ -765,18 +747,18 @@
/// and to provide DHCPv4 server and PXE boot server discovery services.
///
struct _EFI_DHCP4_PROTOCOL {
- EFI_DHCP4_GET_MODE_DATA GetModeData;
- EFI_DHCP4_CONFIGURE Configure;
- EFI_DHCP4_START Start;
- EFI_DHCP4_RENEW_REBIND RenewRebind;
- EFI_DHCP4_RELEASE Release;
- EFI_DHCP4_STOP Stop;
- EFI_DHCP4_BUILD Build;
- EFI_DHCP4_TRANSMIT_RECEIVE TransmitReceive;
- EFI_DHCP4_PARSE Parse;
+ EFI_DHCP4_GET_MODE_DATA GetModeData;
+ EFI_DHCP4_CONFIGURE Configure;
+ EFI_DHCP4_START Start;
+ EFI_DHCP4_RENEW_REBIND RenewRebind;
+ EFI_DHCP4_RELEASE Release;
+ EFI_DHCP4_STOP Stop;
+ EFI_DHCP4_BUILD Build;
+ EFI_DHCP4_TRANSMIT_RECEIVE TransmitReceive;
+ EFI_DHCP4_PARSE Parse;
};
-extern EFI_GUID gEfiDhcp4ProtocolGuid;
-extern EFI_GUID gEfiDhcp4ServiceBindingProtocolGuid;
+extern EFI_GUID gEfiDhcp4ProtocolGuid;
+extern EFI_GUID gEfiDhcp4ServiceBindingProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/DiskIo.h b/src/include/ipxe/efi/Protocol/DiskIo.h
index 1b47ce5..c5ce5d3 100644
--- a/src/include/ipxe/efi/Protocol/DiskIo.h
+++ b/src/include/ipxe/efi/Protocol/DiskIo.h
@@ -5,21 +5,15 @@
oriented devices. The Disk IO protocol is intended to layer on top of the
Block IO protocol.
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __DISK_IO_H__
#define __DISK_IO_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_DISK_IO_PROTOCOL_GUID \
{ \
@@ -36,7 +30,7 @@
///
/// Protocol defined in EFI1.1.
///
-typedef EFI_DISK_IO_PROTOCOL EFI_DISK_IO;
+typedef EFI_DISK_IO_PROTOCOL EFI_DISK_IO;
/**
Read BufferSize bytes from Offset into Buffer.
@@ -93,7 +87,7 @@
IN VOID *Buffer
);
-#define EFI_DISK_IO_PROTOCOL_REVISION 0x00010000
+#define EFI_DISK_IO_PROTOCOL_REVISION 0x00010000
///
/// Revision defined in EFI1.1
@@ -109,11 +103,11 @@
/// revisions must be backwards compatible. If a future version is not
/// backwards compatible, it is not the same GUID.
///
- UINT64 Revision;
- EFI_DISK_READ ReadDisk;
- EFI_DISK_WRITE WriteDisk;
+ UINT64 Revision;
+ EFI_DISK_READ ReadDisk;
+ EFI_DISK_WRITE WriteDisk;
};
-extern EFI_GUID gEfiDiskIoProtocolGuid;
+extern EFI_GUID gEfiDiskIoProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/DriverBinding.h b/src/include/ipxe/efi/Protocol/DriverBinding.h
index 1f464a7..3c20275 100644
--- a/src/include/ipxe/efi/Protocol/DriverBinding.h
+++ b/src/include/ipxe/efi/Protocol/DriverBinding.h
@@ -4,21 +4,15 @@
This protocol is produced by every driver that follows the UEFI Driver Model,
and it is the central component that allows drivers and controllers to be managed.
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __EFI_DRIVER_BINDING_H__
#define __EFI_DRIVER_BINDING_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
///
/// The global ID for the ControllerHandle Driver Protocol.
@@ -28,7 +22,7 @@
0x18a031ab, 0xb443, 0x4d1a, {0xa5, 0xc0, 0xc, 0x9, 0x26, 0x1e, 0x9f, 0x71 } \
}
-typedef struct _EFI_DRIVER_BINDING_PROTOCOL EFI_DRIVER_BINDING_PROTOCOL;
+typedef struct _EFI_DRIVER_BINDING_PROTOCOL EFI_DRIVER_BINDING_PROTOCOL;
/**
Tests to see if this driver supports a given controller. If a child device is provided,
@@ -163,9 +157,9 @@
/// If a controller is supported, then it also provides routines to start and stop the controller.
///
struct _EFI_DRIVER_BINDING_PROTOCOL {
- EFI_DRIVER_BINDING_SUPPORTED Supported;
- EFI_DRIVER_BINDING_START Start;
- EFI_DRIVER_BINDING_STOP Stop;
+ EFI_DRIVER_BINDING_SUPPORTED Supported;
+ EFI_DRIVER_BINDING_START Start;
+ EFI_DRIVER_BINDING_STOP Stop;
///
/// The version number of the UEFI driver that produced the
@@ -179,13 +173,13 @@
/// platform/OEM specific drivers. The Version values of 0x10-
/// 0xffffffef are reserved for IHV-developed drivers.
///
- UINT32 Version;
+ UINT32 Version;
///
/// The image handle of the UEFI driver that produced this instance
/// of the EFI_DRIVER_BINDING_PROTOCOL.
///
- EFI_HANDLE ImageHandle;
+ EFI_HANDLE ImageHandle;
///
/// The handle on which this instance of the
@@ -195,9 +189,9 @@
/// EFI_DRIVER_BINDING_PROTOCOL, this value may not be
/// the same as ImageHandle.
///
- EFI_HANDLE DriverBindingHandle;
+ EFI_HANDLE DriverBindingHandle;
};
-extern EFI_GUID gEfiDriverBindingProtocolGuid;
+extern EFI_GUID gEfiDriverBindingProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/FormBrowser2.h b/src/include/ipxe/efi/Protocol/FormBrowser2.h
index 8033a11..b1c0d20 100644
--- a/src/include/ipxe/efi/Protocol/FormBrowser2.h
+++ b/src/include/ipxe/efi/Protocol/FormBrowser2.h
@@ -4,31 +4,22 @@
The EFI_FORM_BROWSER2_PROTOCOL is the interface to call for drivers to
leverage the EFI configuration driver interface.
-Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __EFI_FORM_BROWSER2_H__
#define __EFI_FORM_BROWSER2_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/Guid/HiiPlatformSetupFormset.h>
#define EFI_FORM_BROWSER2_PROTOCOL_GUID \
{0xb9d4c360, 0xbcfb, 0x4f9b, {0x92, 0x98, 0x53, 0xc1, 0x36, 0x98, 0x22, 0x58 }}
-
-typedef struct _EFI_FORM_BROWSER2_PROTOCOL EFI_FORM_BROWSER2_PROTOCOL;
-
-
+typedef struct _EFI_FORM_BROWSER2_PROTOCOL EFI_FORM_BROWSER2_PROTOCOL;
/**
@@ -49,24 +40,23 @@
window will end.
**/
typedef struct {
- UINTN LeftColumn;
- UINTN RightColumn;
- UINTN TopRow;
- UINTN BottomRow;
+ UINTN LeftColumn;
+ UINTN RightColumn;
+ UINTN TopRow;
+ UINTN BottomRow;
} EFI_SCREEN_DESCRIPTOR;
typedef UINTN EFI_BROWSER_ACTION_REQUEST;
-#define EFI_BROWSER_ACTION_REQUEST_NONE 0
-#define EFI_BROWSER_ACTION_REQUEST_RESET 1
-#define EFI_BROWSER_ACTION_REQUEST_SUBMIT 2
-#define EFI_BROWSER_ACTION_REQUEST_EXIT 3
-#define EFI_BROWSER_ACTION_REQUEST_FORM_SUBMIT_EXIT 4
-#define EFI_BROWSER_ACTION_REQUEST_FORM_DISCARD_EXIT 5
-#define EFI_BROWSER_ACTION_REQUEST_FORM_APPLY 6
-#define EFI_BROWSER_ACTION_REQUEST_FORM_DISCARD 7
-#define EFI_BROWSER_ACTION_REQUEST_RECONNECT 8
-
+#define EFI_BROWSER_ACTION_REQUEST_NONE 0
+#define EFI_BROWSER_ACTION_REQUEST_RESET 1
+#define EFI_BROWSER_ACTION_REQUEST_SUBMIT 2
+#define EFI_BROWSER_ACTION_REQUEST_EXIT 3
+#define EFI_BROWSER_ACTION_REQUEST_FORM_SUBMIT_EXIT 4
+#define EFI_BROWSER_ACTION_REQUEST_FORM_DISCARD_EXIT 5
+#define EFI_BROWSER_ACTION_REQUEST_FORM_APPLY 6
+#define EFI_BROWSER_ACTION_REQUEST_FORM_DISCARD 7
+#define EFI_BROWSER_ACTION_REQUEST_RECONNECT 8
/**
Initialize the browser to display the specified configuration forms.
@@ -110,12 +100,11 @@
IN CONST EFI_FORM_BROWSER2_PROTOCOL *This,
IN EFI_HII_HANDLE *Handle,
IN UINTN HandleCount,
- IN EFI_GUID *FormSetGuid, OPTIONAL
- IN EFI_FORM_ID FormId, OPTIONAL
- IN CONST EFI_SCREEN_DESCRIPTOR *ScreenDimensions, OPTIONAL
+ IN EFI_GUID *FormSetGuid OPTIONAL,
+ IN EFI_FORM_ID FormId OPTIONAL,
+ IN CONST EFI_SCREEN_DESCRIPTOR *ScreenDimensions OPTIONAL,
OUT EFI_BROWSER_ACTION_REQUEST *ActionRequest OPTIONAL
-);
-
+ );
/**
This function is called by a callback handler to retrieve uncommitted state data from the browser.
@@ -163,20 +152,19 @@
IN OUT UINTN *ResultsDataSize,
IN OUT EFI_STRING ResultsData,
IN CONST BOOLEAN RetrieveData,
- IN CONST EFI_GUID *VariableGuid, OPTIONAL
+ IN CONST EFI_GUID *VariableGuid OPTIONAL,
IN CONST CHAR16 *VariableName OPTIONAL
-);
+ );
///
/// This interface will allow the caller to direct the configuration
/// driver to use either the HII database or use the passed-in packet of data.
///
struct _EFI_FORM_BROWSER2_PROTOCOL {
- EFI_SEND_FORM2 SendForm;
- EFI_BROWSER_CALLBACK2 BrowserCallback;
-} ;
+ EFI_SEND_FORM2 SendForm;
+ EFI_BROWSER_CALLBACK2 BrowserCallback;
+};
-extern EFI_GUID gEfiFormBrowser2ProtocolGuid;
+extern EFI_GUID gEfiFormBrowser2ProtocolGuid;
#endif
-
diff --git a/src/include/ipxe/efi/Protocol/GraphicsOutput.h b/src/include/ipxe/efi/Protocol/GraphicsOutput.h
index 98ca8c9..b89315c 100644
--- a/src/include/ipxe/efi/Protocol/GraphicsOutput.h
+++ b/src/include/ipxe/efi/Protocol/GraphicsOutput.h
@@ -3,21 +3,15 @@
Abstraction of a very simple graphics device.
- Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __GRAPHICS_OUTPUT_H__
#define __GRAPHICS_OUTPUT_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_GRAPHICS_OUTPUT_PROTOCOL_GUID \
{ \
@@ -27,10 +21,10 @@
typedef struct _EFI_GRAPHICS_OUTPUT_PROTOCOL EFI_GRAPHICS_OUTPUT_PROTOCOL;
typedef struct {
- UINT32 RedMask;
- UINT32 GreenMask;
- UINT32 BlueMask;
- UINT32 ReservedMask;
+ UINT32 RedMask;
+ UINT32 GreenMask;
+ UINT32 BlueMask;
+ UINT32 ReservedMask;
} EFI_PIXEL_BITMASK;
typedef enum {
@@ -69,29 +63,29 @@
/// The version of this data structure. A value of zero represents the
/// EFI_GRAPHICS_OUTPUT_MODE_INFORMATION structure as defined in this specification.
///
- UINT32 Version;
+ UINT32 Version;
///
/// The size of video screen in pixels in the X dimension.
///
- UINT32 HorizontalResolution;
+ UINT32 HorizontalResolution;
///
/// The size of video screen in pixels in the Y dimension.
///
- UINT32 VerticalResolution;
+ UINT32 VerticalResolution;
///
/// Enumeration that defines the physical format of the pixel. A value of PixelBltOnly
/// implies that a linear frame buffer is not available for this mode.
///
- EFI_GRAPHICS_PIXEL_FORMAT PixelFormat;
+ EFI_GRAPHICS_PIXEL_FORMAT PixelFormat;
///
/// This bit-mask is only valid if PixelFormat is set to PixelPixelBitMask.
/// A bit being set defines what bits are used for what purpose such as Red, Green, Blue, or Reserved.
///
- EFI_PIXEL_BITMASK PixelInformation;
+ EFI_PIXEL_BITMASK PixelInformation;
///
/// Defines the number of pixel elements per video memory line.
///
- UINT32 PixelsPerScanLine;
+ UINT32 PixelsPerScanLine;
} EFI_GRAPHICS_OUTPUT_MODE_INFORMATION;
/**
@@ -137,15 +131,15 @@
);
typedef struct {
- UINT8 Blue;
- UINT8 Green;
- UINT8 Red;
- UINT8 Reserved;
+ UINT8 Blue;
+ UINT8 Green;
+ UINT8 Red;
+ UINT8 Reserved;
} EFI_GRAPHICS_OUTPUT_BLT_PIXEL;
typedef union {
- EFI_GRAPHICS_OUTPUT_BLT_PIXEL Pixel;
- UINT32 Raw;
+ EFI_GRAPHICS_OUTPUT_BLT_PIXEL Pixel;
+ UINT32 Raw;
} EFI_GRAPHICS_OUTPUT_BLT_PIXEL_UNION;
///
@@ -218,7 +212,7 @@
EFI_STATUS
(EFIAPI *EFI_GRAPHICS_OUTPUT_PROTOCOL_BLT)(
IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,
- IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer, OPTIONAL
+ IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer OPTIONAL,
IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION BltOperation,
IN UINTN SourceX,
IN UINTN SourceY,
@@ -233,29 +227,29 @@
///
/// The number of modes supported by QueryMode() and SetMode().
///
- UINT32 MaxMode;
+ UINT32 MaxMode;
///
/// Current Mode of the graphics device. Valid mode numbers are 0 to MaxMode -1.
///
- UINT32 Mode;
+ UINT32 Mode;
///
/// Pointer to read-only EFI_GRAPHICS_OUTPUT_MODE_INFORMATION data.
///
- EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *Info;
+ EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *Info;
///
/// Size of Info structure in bytes.
///
- UINTN SizeOfInfo;
+ UINTN SizeOfInfo;
///
/// Base address of graphics linear frame buffer.
/// Offset zero in FrameBufferBase represents the upper left pixel of the display.
///
- EFI_PHYSICAL_ADDRESS FrameBufferBase;
+ EFI_PHYSICAL_ADDRESS FrameBufferBase;
///
/// Amount of frame buffer needed to support the active mode as defined by
/// PixelsPerScanLine xVerticalResolution x PixelElementSize.
///
- UINTN FrameBufferSize;
+ UINTN FrameBufferSize;
} EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE;
///
@@ -264,15 +258,15 @@
/// frame buffer is also exposed so software can write directly to the video hardware.
///
struct _EFI_GRAPHICS_OUTPUT_PROTOCOL {
- EFI_GRAPHICS_OUTPUT_PROTOCOL_QUERY_MODE QueryMode;
- EFI_GRAPHICS_OUTPUT_PROTOCOL_SET_MODE SetMode;
- EFI_GRAPHICS_OUTPUT_PROTOCOL_BLT Blt;
+ EFI_GRAPHICS_OUTPUT_PROTOCOL_QUERY_MODE QueryMode;
+ EFI_GRAPHICS_OUTPUT_PROTOCOL_SET_MODE SetMode;
+ EFI_GRAPHICS_OUTPUT_PROTOCOL_BLT Blt;
///
/// Pointer to EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE data.
///
- EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE *Mode;
+ EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE *Mode;
};
-extern EFI_GUID gEfiGraphicsOutputProtocolGuid;
+extern EFI_GUID gEfiGraphicsOutputProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/HiiConfigAccess.h b/src/include/ipxe/efi/Protocol/HiiConfigAccess.h
index df90805..beae082 100644
--- a/src/include/ipxe/efi/Protocol/HiiConfigAccess.h
+++ b/src/include/ipxe/efi/Protocol/HiiConfigAccess.h
@@ -5,44 +5,40 @@
This protocol is published by drivers providing and requesting
configuration data from HII. It may only be invoked by HII.
-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ @par Revision Reference:
+ This Protocol was introduced in UEFI Specification 2.1.
**/
-
#ifndef __EFI_HII_CONFIG_ACCESS_H__
#define __EFI_HII_CONFIG_ACCESS_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/Protocol/FormBrowser2.h>
#define EFI_HII_CONFIG_ACCESS_PROTOCOL_GUID \
{ 0x330d4706, 0xf2a0, 0x4e4f, { 0xa3, 0x69, 0xb6, 0x6f, 0xa8, 0xd5, 0x43, 0x85 } }
-typedef struct _EFI_HII_CONFIG_ACCESS_PROTOCOL EFI_HII_CONFIG_ACCESS_PROTOCOL;
+typedef struct _EFI_HII_CONFIG_ACCESS_PROTOCOL EFI_HII_CONFIG_ACCESS_PROTOCOL;
typedef UINTN EFI_BROWSER_ACTION;
-#define EFI_BROWSER_ACTION_CHANGING 0
-#define EFI_BROWSER_ACTION_CHANGED 1
-#define EFI_BROWSER_ACTION_RETRIEVE 2
-#define EFI_BROWSER_ACTION_FORM_OPEN 3
-#define EFI_BROWSER_ACTION_FORM_CLOSE 4
-#define EFI_BROWSER_ACTION_SUBMITTED 5
-#define EFI_BROWSER_ACTION_DEFAULT_STANDARD 0x1000
-#define EFI_BROWSER_ACTION_DEFAULT_MANUFACTURING 0x1001
-#define EFI_BROWSER_ACTION_DEFAULT_SAFE 0x1002
-#define EFI_BROWSER_ACTION_DEFAULT_PLATFORM 0x2000
-#define EFI_BROWSER_ACTION_DEFAULT_HARDWARE 0x3000
-#define EFI_BROWSER_ACTION_DEFAULT_FIRMWARE 0x4000
+#define EFI_BROWSER_ACTION_CHANGING 0
+#define EFI_BROWSER_ACTION_CHANGED 1
+#define EFI_BROWSER_ACTION_RETRIEVE 2
+#define EFI_BROWSER_ACTION_FORM_OPEN 3
+#define EFI_BROWSER_ACTION_FORM_CLOSE 4
+#define EFI_BROWSER_ACTION_SUBMITTED 5
+#define EFI_BROWSER_ACTION_DEFAULT_STANDARD 0x1000
+#define EFI_BROWSER_ACTION_DEFAULT_MANUFACTURING 0x1001
+#define EFI_BROWSER_ACTION_DEFAULT_SAFE 0x1002
+#define EFI_BROWSER_ACTION_DEFAULT_PLATFORM 0x2000
+#define EFI_BROWSER_ACTION_DEFAULT_HARDWARE 0x3000
+#define EFI_BROWSER_ACTION_DEFAULT_FIRMWARE 0x4000
/**
@@ -114,13 +110,12 @@
**/
typedef
EFI_STATUS
-(EFIAPI * EFI_HII_ACCESS_EXTRACT_CONFIG)(
+(EFIAPI *EFI_HII_ACCESS_EXTRACT_CONFIG)(
IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This,
IN CONST EFI_STRING Request,
OUT EFI_STRING *Progress,
OUT EFI_STRING *Results
-);
-
+ );
/**
@@ -164,11 +159,11 @@
**/
typedef
EFI_STATUS
-(EFIAPI * EFI_HII_ACCESS_ROUTE_CONFIG)(
+(EFIAPI *EFI_HII_ACCESS_ROUTE_CONFIG)(
IN CONST EFI_HII_CONFIG_ACCESS_PROTOCOL *This,
IN CONST EFI_STRING Configuration,
OUT EFI_STRING *Progress
-);
+ );
/**
@@ -205,7 +200,7 @@
IN OUT EFI_IFR_TYPE_VALUE *Value,
OUT EFI_BROWSER_ACTION_REQUEST *ActionRequest
)
- ;
+;
///
/// This protocol provides a callable interface between the HII and
@@ -213,13 +208,11 @@
/// to publish this protocol.
///
struct _EFI_HII_CONFIG_ACCESS_PROTOCOL {
- EFI_HII_ACCESS_EXTRACT_CONFIG ExtractConfig;
- EFI_HII_ACCESS_ROUTE_CONFIG RouteConfig;
- EFI_HII_ACCESS_FORM_CALLBACK Callback;
-} ;
+ EFI_HII_ACCESS_EXTRACT_CONFIG ExtractConfig;
+ EFI_HII_ACCESS_ROUTE_CONFIG RouteConfig;
+ EFI_HII_ACCESS_FORM_CALLBACK Callback;
+};
-extern EFI_GUID gEfiHiiConfigAccessProtocolGuid;
+extern EFI_GUID gEfiHiiConfigAccessProtocolGuid;
#endif
-
-
diff --git a/src/include/ipxe/efi/Protocol/HiiDatabase.h b/src/include/ipxe/efi/Protocol/HiiDatabase.h
index e070d29..d077b11 100644
--- a/src/include/ipxe/efi/Protocol/HiiDatabase.h
+++ b/src/include/ipxe/efi/Protocol/HiiDatabase.h
@@ -2,38 +2,34 @@
The file provides Database manager for HII-related data
structures.
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ @par Revision Reference:
+ This Protocol was introduced in UEFI Specification 2.1.
**/
#ifndef __HII_DATABASE_H__
#define __HII_DATABASE_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_HII_DATABASE_PROTOCOL_GUID \
{ 0xef9fc172, 0xa1b2, 0x4693, { 0xb3, 0x27, 0x6d, 0x32, 0xfc, 0x41, 0x60, 0x42 } }
-
typedef struct _EFI_HII_DATABASE_PROTOCOL EFI_HII_DATABASE_PROTOCOL;
-
///
/// EFI_HII_DATABASE_NOTIFY_TYPE.
///
-typedef UINTN EFI_HII_DATABASE_NOTIFY_TYPE;
+typedef UINTN EFI_HII_DATABASE_NOTIFY_TYPE;
-#define EFI_HII_DATABASE_NOTIFY_NEW_PACK 0x00000001
-#define EFI_HII_DATABASE_NOTIFY_REMOVE_PACK 0x00000002
-#define EFI_HII_DATABASE_NOTIFY_EXPORT_PACK 0x00000004
-#define EFI_HII_DATABASE_NOTIFY_ADD_PACK 0x00000008
+#define EFI_HII_DATABASE_NOTIFY_NEW_PACK 0x00000001
+#define EFI_HII_DATABASE_NOTIFY_REMOVE_PACK 0x00000002
+#define EFI_HII_DATABASE_NOTIFY_EXPORT_PACK 0x00000004
+#define EFI_HII_DATABASE_NOTIFY_ADD_PACK 0x00000008
+
/**
Functions which are registered to receive notification of
@@ -68,7 +64,7 @@
IN CONST EFI_HII_PACKAGE_HEADER *Package,
IN EFI_HII_HANDLE Handle,
IN EFI_HII_DATABASE_NOTIFY_TYPE NotifyType
-);
+ );
/**
@@ -108,10 +104,9 @@
(EFIAPI *EFI_HII_DATABASE_NEW_PACK)(
IN CONST EFI_HII_DATABASE_PROTOCOL *This,
IN CONST EFI_HII_PACKAGE_LIST_HEADER *PackageList,
- IN EFI_HANDLE DriverHandle, OPTIONAL
+ IN EFI_HANDLE DriverHandle OPTIONAL,
OUT EFI_HII_HANDLE *Handle
-);
-
+ );
/**
@@ -137,8 +132,7 @@
(EFIAPI *EFI_HII_DATABASE_REMOVE_PACK)(
IN CONST EFI_HII_DATABASE_PROTOCOL *This,
IN EFI_HII_HANDLE Handle
-);
-
+ );
/**
@@ -186,8 +180,7 @@
IN CONST EFI_HII_DATABASE_PROTOCOL *This,
IN EFI_HII_HANDLE Handle,
IN CONST EFI_HII_PACKAGE_LIST_HEADER *PackageList
-);
-
+ );
/**
@@ -240,7 +233,7 @@
IN CONST EFI_GUID *PackageGuid,
IN OUT UINTN *HandleBufferLength,
OUT EFI_HII_HANDLE *Handle
-);
+ );
/**
@@ -290,8 +283,7 @@
IN EFI_HII_HANDLE Handle,
IN OUT UINTN *BufferSize,
OUT EFI_HII_PACKAGE_LIST_HEADER *Buffer
-);
-
+ );
/**
@@ -353,8 +345,7 @@
IN EFI_HII_DATABASE_NOTIFY PackageNotifyFn,
IN EFI_HII_DATABASE_NOTIFY_TYPE NotifyType,
OUT EFI_HANDLE *NotifyHandle
-);
-
+ );
/**
@@ -376,8 +367,7 @@
(EFIAPI *EFI_HII_DATABASE_UNREGISTER_NOTIFY)(
IN CONST EFI_HII_DATABASE_PROTOCOL *This,
IN EFI_HANDLE NotificationHandle
-);
-
+ );
/**
@@ -417,8 +407,7 @@
IN CONST EFI_HII_DATABASE_PROTOCOL *This,
IN OUT UINT16 *KeyGuidBufferLength,
OUT EFI_GUID *KeyGuidBuffer
-);
-
+ );
/**
@@ -453,7 +442,7 @@
IN CONST EFI_GUID *KeyGuid,
IN OUT UINT16 *KeyboardLayoutLength,
OUT EFI_HII_KEYBOARD_LAYOUT *KeyboardLayout
-);
+ );
/**
@@ -480,7 +469,7 @@
(EFIAPI *EFI_HII_SET_KEYBOARD_LAYOUT)(
IN CONST EFI_HII_DATABASE_PROTOCOL *This,
IN CONST EFI_GUID *KeyGuid
-);
+ );
/**
@@ -507,27 +496,25 @@
IN CONST EFI_HII_DATABASE_PROTOCOL *This,
IN EFI_HII_HANDLE PackageListHandle,
OUT EFI_HANDLE *DriverHandle
-);
+ );
///
/// Database manager for HII-related data structures.
///
struct _EFI_HII_DATABASE_PROTOCOL {
- EFI_HII_DATABASE_NEW_PACK NewPackageList;
- EFI_HII_DATABASE_REMOVE_PACK RemovePackageList;
- EFI_HII_DATABASE_UPDATE_PACK UpdatePackageList;
- EFI_HII_DATABASE_LIST_PACKS ListPackageLists;
- EFI_HII_DATABASE_EXPORT_PACKS ExportPackageLists;
- EFI_HII_DATABASE_REGISTER_NOTIFY RegisterPackageNotify;
- EFI_HII_DATABASE_UNREGISTER_NOTIFY UnregisterPackageNotify;
- EFI_HII_FIND_KEYBOARD_LAYOUTS FindKeyboardLayouts;
- EFI_HII_GET_KEYBOARD_LAYOUT GetKeyboardLayout;
- EFI_HII_SET_KEYBOARD_LAYOUT SetKeyboardLayout;
- EFI_HII_DATABASE_GET_PACK_HANDLE GetPackageListHandle;
+ EFI_HII_DATABASE_NEW_PACK NewPackageList;
+ EFI_HII_DATABASE_REMOVE_PACK RemovePackageList;
+ EFI_HII_DATABASE_UPDATE_PACK UpdatePackageList;
+ EFI_HII_DATABASE_LIST_PACKS ListPackageLists;
+ EFI_HII_DATABASE_EXPORT_PACKS ExportPackageLists;
+ EFI_HII_DATABASE_REGISTER_NOTIFY RegisterPackageNotify;
+ EFI_HII_DATABASE_UNREGISTER_NOTIFY UnregisterPackageNotify;
+ EFI_HII_FIND_KEYBOARD_LAYOUTS FindKeyboardLayouts;
+ EFI_HII_GET_KEYBOARD_LAYOUT GetKeyboardLayout;
+ EFI_HII_SET_KEYBOARD_LAYOUT SetKeyboardLayout;
+ EFI_HII_DATABASE_GET_PACK_HANDLE GetPackageListHandle;
};
-extern EFI_GUID gEfiHiiDatabaseProtocolGuid;
+extern EFI_GUID gEfiHiiDatabaseProtocolGuid;
#endif
-
-
diff --git a/src/include/ipxe/efi/Protocol/HiiFont.h b/src/include/ipxe/efi/Protocol/HiiFont.h
index f2b72dc..248f13e 100644
--- a/src/include/ipxe/efi/Protocol/HiiFont.h
+++ b/src/include/ipxe/efi/Protocol/HiiFont.h
@@ -1,21 +1,18 @@
/** @file
The file provides services to retrieve font information.
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ @par Revision Reference:
+ This Protocol was introduced in UEFI Specification 2.1.
**/
#ifndef __HII_FONT_H__
#define __HII_FONT_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/Protocol/GraphicsOutput.h>
#include <ipxe/efi/Protocol/HiiImage.h>
@@ -25,21 +22,21 @@
typedef struct _EFI_HII_FONT_PROTOCOL EFI_HII_FONT_PROTOCOL;
-typedef VOID *EFI_FONT_HANDLE;
+typedef VOID *EFI_FONT_HANDLE;
///
/// EFI_HII_OUT_FLAGS.
///
-typedef UINT32 EFI_HII_OUT_FLAGS;
+typedef UINT32 EFI_HII_OUT_FLAGS;
-#define EFI_HII_OUT_FLAG_CLIP 0x00000001
-#define EFI_HII_OUT_FLAG_WRAP 0x00000002
-#define EFI_HII_OUT_FLAG_CLIP_CLEAN_Y 0x00000004
-#define EFI_HII_OUT_FLAG_CLIP_CLEAN_X 0x00000008
-#define EFI_HII_OUT_FLAG_TRANSPARENT 0x00000010
-#define EFI_HII_IGNORE_IF_NO_GLYPH 0x00000020
-#define EFI_HII_IGNORE_LINE_BREAK 0x00000040
-#define EFI_HII_DIRECT_TO_SCREEN 0x00000080
+#define EFI_HII_OUT_FLAG_CLIP 0x00000001
+#define EFI_HII_OUT_FLAG_WRAP 0x00000002
+#define EFI_HII_OUT_FLAG_CLIP_CLEAN_Y 0x00000004
+#define EFI_HII_OUT_FLAG_CLIP_CLEAN_X 0x00000008
+#define EFI_HII_OUT_FLAG_TRANSPARENT 0x00000010
+#define EFI_HII_IGNORE_IF_NO_GLYPH 0x00000020
+#define EFI_HII_IGNORE_LINE_BREAK 0x00000040
+#define EFI_HII_DIRECT_TO_SCREEN 0x00000080
/**
Definition of EFI_HII_ROW_INFO.
@@ -48,26 +45,26 @@
///
/// The index of the first character in the string which is displayed on the line.
///
- UINTN StartIndex;
+ UINTN StartIndex;
///
/// The index of the last character in the string which is displayed on the line.
/// If this is the same as StartIndex, then no characters are displayed.
///
- UINTN EndIndex;
- UINTN LineHeight; ///< The height of the line, in pixels.
- UINTN LineWidth; ///< The width of the text on the line, in pixels.
+ UINTN EndIndex;
+ UINTN LineHeight; ///< The height of the line, in pixels.
+ UINTN LineWidth; ///< The width of the text on the line, in pixels.
///
/// The font baseline offset in pixels from the bottom of the row, or 0 if none.
///
- UINTN BaselineOffset;
+ UINTN BaselineOffset;
} EFI_HII_ROW_INFO;
///
/// Font info flag. All flags (FONT, SIZE, STYLE, and COLOR) are defined.
/// They are defined as EFI_FONT_INFO_***
///
-typedef UINT32 EFI_FONT_INFO_MASK;
+typedef UINT32 EFI_FONT_INFO_MASK;
#define EFI_FONT_INFO_SYS_FONT 0x00000001
#define EFI_FONT_INFO_SYS_SIZE 0x00000002
@@ -84,9 +81,9 @@
// EFI_FONT_INFO
//
typedef struct {
- EFI_HII_FONT_STYLE FontStyle;
- UINT16 FontSize; ///< character cell height in pixels
- CHAR16 FontName[1];
+ EFI_HII_FONT_STYLE FontStyle;
+ UINT16 FontSize; ///< character cell height in pixels
+ CHAR16 FontName[1];
} EFI_FONT_INFO;
/**
@@ -102,10 +99,10 @@
font requested and the font available.
**/
typedef struct _EFI_FONT_DISPLAY_INFO {
- EFI_GRAPHICS_OUTPUT_BLT_PIXEL ForegroundColor;
- EFI_GRAPHICS_OUTPUT_BLT_PIXEL BackgroundColor;
- EFI_FONT_INFO_MASK FontInfoMask;
- EFI_FONT_INFO FontInfo;
+ EFI_GRAPHICS_OUTPUT_BLT_PIXEL ForegroundColor;
+ EFI_GRAPHICS_OUTPUT_BLT_PIXEL BackgroundColor;
+ EFI_FONT_INFO_MASK FontInfoMask;
+ EFI_FONT_INFO FontInfo;
} EFI_FONT_DISPLAY_INFO;
/**
@@ -225,9 +222,7 @@
OUT EFI_HII_ROW_INFO **RowInfoArray OPTIONAL,
OUT UINTN *RowInfoArraySize OPTIONAL,
OUT UINTN *ColumnInfoArray OPTIONAL
-);
-
-
+ );
/**
@@ -363,8 +358,7 @@
OUT EFI_HII_ROW_INFO **RowInfoArray OPTIONAL,
OUT UINTN *RowInfoArraySize OPTIONAL,
OUT UINTN *ColumnInfoArray OPTIONAL
-);
-
+ );
/**
@@ -408,7 +402,7 @@
IN CONST EFI_FONT_DISPLAY_INFO *StringInfo,
OUT EFI_IMAGE_OUTPUT **Blt,
OUT UINTN *Baseline OPTIONAL
-);
+ );
/**
@@ -452,23 +446,21 @@
(EFIAPI *EFI_HII_GET_FONT_INFO)(
IN CONST EFI_HII_FONT_PROTOCOL *This,
IN OUT EFI_FONT_HANDLE *FontHandle,
- IN CONST EFI_FONT_DISPLAY_INFO *StringInfoIn, OPTIONAL
+ IN CONST EFI_FONT_DISPLAY_INFO *StringInfoIn OPTIONAL,
OUT EFI_FONT_DISPLAY_INFO **StringInfoOut,
IN CONST EFI_STRING String OPTIONAL
-);
+ );
///
/// The protocol provides the service to retrieve the font informations.
///
struct _EFI_HII_FONT_PROTOCOL {
- EFI_HII_STRING_TO_IMAGE StringToImage;
- EFI_HII_STRING_ID_TO_IMAGE StringIdToImage;
- EFI_HII_GET_GLYPH GetGlyph;
- EFI_HII_GET_FONT_INFO GetFontInfo;
+ EFI_HII_STRING_TO_IMAGE StringToImage;
+ EFI_HII_STRING_ID_TO_IMAGE StringIdToImage;
+ EFI_HII_GET_GLYPH GetGlyph;
+ EFI_HII_GET_FONT_INFO GetFontInfo;
};
-extern EFI_GUID gEfiHiiFontProtocolGuid;
-
+extern EFI_GUID gEfiHiiFontProtocolGuid;
#endif
-
diff --git a/src/include/ipxe/efi/Protocol/HiiImage.h b/src/include/ipxe/efi/Protocol/HiiImage.h
index ba934a9..20fd725 100644
--- a/src/include/ipxe/efi/Protocol/HiiImage.h
+++ b/src/include/ipxe/efi/Protocol/HiiImage.h
@@ -1,21 +1,18 @@
/** @file
The file provides services to access to images in the images database.
- Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ @par Revision Reference:
+ This Protocol was introduced in UEFI Specification 2.1.
**/
#ifndef __HII_IMAGE_H__
#define __HII_IMAGE_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/Protocol/GraphicsOutput.h>
@@ -24,11 +21,10 @@
typedef struct _EFI_HII_IMAGE_PROTOCOL EFI_HII_IMAGE_PROTOCOL;
-
///
/// Flags in EFI_IMAGE_INPUT
///
-#define EFI_IMAGE_TRANSPARENT 0x00000001
+#define EFI_IMAGE_TRANSPARENT 0x00000001
/**
@@ -49,13 +45,12 @@
**/
typedef struct _EFI_IMAGE_INPUT {
- UINT32 Flags;
- UINT16 Width;
- UINT16 Height;
- EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Bitmap;
+ UINT32 Flags;
+ UINT16 Width;
+ UINT16 Height;
+ EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Bitmap;
} EFI_IMAGE_INPUT;
-
/**
This function adds the image Image to the group of images
@@ -88,7 +83,7 @@
IN EFI_HII_HANDLE PackageList,
OUT EFI_IMAGE_ID *ImageId,
IN CONST EFI_IMAGE_INPUT *Image
-);
+ );
/**
@@ -130,7 +125,7 @@
IN EFI_HII_HANDLE PackageList,
IN EFI_IMAGE_ID ImageId,
OUT EFI_IMAGE_INPUT *Image
-);
+ );
/**
@@ -161,14 +156,13 @@
IN EFI_HII_HANDLE PackageList,
IN EFI_IMAGE_ID ImageId,
IN CONST EFI_IMAGE_INPUT *Image
-);
-
+ );
///
/// EFI_HII_DRAW_FLAGS describes how the image is to be drawn.
/// These flags are defined as EFI_HII_DRAW_FLAG_***
///
-typedef UINT32 EFI_HII_DRAW_FLAGS;
+typedef UINT32 EFI_HII_DRAW_FLAGS;
#define EFI_HII_DRAW_FLAG_CLIP 0x00000001
#define EFI_HII_DRAW_FLAG_TRANSPARENT 0x00000030
@@ -193,15 +187,14 @@
**/
typedef struct _EFI_IMAGE_OUTPUT {
- UINT16 Width;
- UINT16 Height;
+ UINT16 Width;
+ UINT16 Height;
union {
- EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Bitmap;
- EFI_GRAPHICS_OUTPUT_PROTOCOL *Screen;
+ EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Bitmap;
+ EFI_GRAPHICS_OUTPUT_PROTOCOL *Screen;
} Image;
} EFI_IMAGE_OUTPUT;
-
/**
This function renders an image to a bitmap or the screen using
@@ -258,7 +251,7 @@
IN OUT EFI_IMAGE_OUTPUT **Blt,
IN UINTN BltX,
IN UINTN BltY
-);
+ );
/**
@@ -330,29 +323,26 @@
typedef
EFI_STATUS
(EFIAPI *EFI_HII_DRAW_IMAGE_ID)(
-IN CONST EFI_HII_IMAGE_PROTOCOL *This,
-IN EFI_HII_DRAW_FLAGS Flags,
-IN EFI_HII_HANDLE PackageList,
-IN EFI_IMAGE_ID ImageId,
-IN OUT EFI_IMAGE_OUTPUT **Blt,
-IN UINTN BltX,
-IN UINTN BltY
-);
-
+ IN CONST EFI_HII_IMAGE_PROTOCOL *This,
+ IN EFI_HII_DRAW_FLAGS Flags,
+ IN EFI_HII_HANDLE PackageList,
+ IN EFI_IMAGE_ID ImageId,
+ IN OUT EFI_IMAGE_OUTPUT **Blt,
+ IN UINTN BltX,
+ IN UINTN BltY
+ );
///
/// Services to access to images in the images database.
///
struct _EFI_HII_IMAGE_PROTOCOL {
- EFI_HII_NEW_IMAGE NewImage;
- EFI_HII_GET_IMAGE GetImage;
- EFI_HII_SET_IMAGE SetImage;
- EFI_HII_DRAW_IMAGE DrawImage;
- EFI_HII_DRAW_IMAGE_ID DrawImageId;
+ EFI_HII_NEW_IMAGE NewImage;
+ EFI_HII_GET_IMAGE GetImage;
+ EFI_HII_SET_IMAGE SetImage;
+ EFI_HII_DRAW_IMAGE DrawImage;
+ EFI_HII_DRAW_IMAGE_ID DrawImageId;
};
-extern EFI_GUID gEfiHiiImageProtocolGuid;
+extern EFI_GUID gEfiHiiImageProtocolGuid;
#endif
-
-
diff --git a/src/include/ipxe/efi/Protocol/Ip4.h b/src/include/ipxe/efi/Protocol/Ip4.h
index f174c0c..0455c7b 100644
--- a/src/include/ipxe/efi/Protocol/Ip4.h
+++ b/src/include/ipxe/efi/Protocol/Ip4.h
@@ -10,14 +10,8 @@
Protocol (ICMP) and may include support for the Internet Group Management
Protocol (IGMP).
-Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
This Protocol is introduced in UEFI Specification 2.0.
@@ -27,7 +21,7 @@
#ifndef __EFI_IP4_PROTOCOL_H__
#define __EFI_IP4_PROTOCOL_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/Protocol/ManagedNetwork.h>
@@ -48,9 +42,9 @@
/// The definition in here is only present to provide backwards compatability.
///
typedef struct {
- EFI_HANDLE InstanceHandle;
- EFI_IPv4_ADDRESS Ip4Address;
- EFI_IPv4_ADDRESS SubnetMask;
+ EFI_HANDLE InstanceHandle;
+ EFI_IPv4_ADDRESS Ip4Address;
+ EFI_IPv4_ADDRESS SubnetMask;
} EFI_IP4_ADDRESS_PAIR;
///
@@ -68,182 +62,178 @@
/// The default IPv4 protocol packets to send and receive. Ignored
/// when AcceptPromiscuous is TRUE.
///
- UINT8 DefaultProtocol;
+ UINT8 DefaultProtocol;
///
/// Set to TRUE to receive all IPv4 packets that get through the receive filters.
/// Set to FALSE to receive only the DefaultProtocol IPv4
/// packets that get through the receive filters.
///
- BOOLEAN AcceptAnyProtocol;
+ BOOLEAN AcceptAnyProtocol;
///
/// Set to TRUE to receive ICMP error report packets. Ignored when
/// AcceptPromiscuous or AcceptAnyProtocol is TRUE.
///
- BOOLEAN AcceptIcmpErrors;
+ BOOLEAN AcceptIcmpErrors;
///
/// Set to TRUE to receive broadcast IPv4 packets. Ignored when
/// AcceptPromiscuous is TRUE.
/// Set to FALSE to stop receiving broadcast IPv4 packets.
///
- BOOLEAN AcceptBroadcast;
+ BOOLEAN AcceptBroadcast;
///
/// Set to TRUE to receive all IPv4 packets that are sent to any
/// hardware address or any protocol address.
/// Set to FALSE to stop receiving all promiscuous IPv4 packets
///
- BOOLEAN AcceptPromiscuous;
+ BOOLEAN AcceptPromiscuous;
///
/// Set to TRUE to use the default IPv4 address and default routing table.
///
- BOOLEAN UseDefaultAddress;
+ BOOLEAN UseDefaultAddress;
///
/// The station IPv4 address that will be assigned to this EFI IPv4Protocol instance.
///
- EFI_IPv4_ADDRESS StationAddress;
+ EFI_IPv4_ADDRESS StationAddress;
///
/// The subnet address mask that is associated with the station address.
///
- EFI_IPv4_ADDRESS SubnetMask;
+ EFI_IPv4_ADDRESS SubnetMask;
///
/// TypeOfService field in transmitted IPv4 packets.
///
- UINT8 TypeOfService;
+ UINT8 TypeOfService;
///
/// TimeToLive field in transmitted IPv4 packets.
///
- UINT8 TimeToLive;
+ UINT8 TimeToLive;
///
/// State of the DoNotFragment bit in transmitted IPv4 packets.
///
- BOOLEAN DoNotFragment;
+ BOOLEAN DoNotFragment;
///
/// Set to TRUE to send and receive unformatted packets. The other
/// IPv4 receive filters are still applied. Fragmentation is disabled for RawData mode.
///
- BOOLEAN RawData;
+ BOOLEAN RawData;
///
/// The timer timeout value (number of microseconds) for the
/// receive timeout event to be associated with each assembled
/// packet. Zero means do not drop assembled packets.
///
- UINT32 ReceiveTimeout;
+ UINT32 ReceiveTimeout;
///
/// The timer timeout value (number of microseconds) for the
/// transmit timeout event to be associated with each outgoing
/// packet. Zero means do not drop outgoing packets.
///
- UINT32 TransmitTimeout;
+ UINT32 TransmitTimeout;
} EFI_IP4_CONFIG_DATA;
-
typedef struct {
- EFI_IPv4_ADDRESS SubnetAddress;
- EFI_IPv4_ADDRESS SubnetMask;
- EFI_IPv4_ADDRESS GatewayAddress;
+ EFI_IPv4_ADDRESS SubnetAddress;
+ EFI_IPv4_ADDRESS SubnetMask;
+ EFI_IPv4_ADDRESS GatewayAddress;
} EFI_IP4_ROUTE_TABLE;
typedef struct {
- UINT8 Type;
- UINT8 Code;
+ UINT8 Type;
+ UINT8 Code;
} EFI_IP4_ICMP_TYPE;
typedef struct {
///
/// Set to TRUE after this EFI IPv4 Protocol instance has been successfully configured.
///
- BOOLEAN IsStarted;
+ BOOLEAN IsStarted;
///
/// The maximum packet size, in bytes, of the packet which the upper layer driver could feed.
///
- UINT32 MaxPacketSize;
+ UINT32 MaxPacketSize;
///
/// Current configuration settings.
///
- EFI_IP4_CONFIG_DATA ConfigData;
+ EFI_IP4_CONFIG_DATA ConfigData;
///
/// Set to TRUE when the EFI IPv4 Protocol instance has a station address and subnet mask.
///
- BOOLEAN IsConfigured;
+ BOOLEAN IsConfigured;
///
/// Number of joined multicast groups.
///
- UINT32 GroupCount;
+ UINT32 GroupCount;
///
/// List of joined multicast group addresses.
///
- EFI_IPv4_ADDRESS *GroupTable;
+ EFI_IPv4_ADDRESS *GroupTable;
///
/// Number of entries in the routing table.
///
- UINT32 RouteCount;
+ UINT32 RouteCount;
///
/// Routing table entries.
///
- EFI_IP4_ROUTE_TABLE *RouteTable;
+ EFI_IP4_ROUTE_TABLE *RouteTable;
///
/// Number of entries in the supported ICMP types list.
///
- UINT32 IcmpTypeCount;
+ UINT32 IcmpTypeCount;
///
/// Array of ICMP types and codes that are supported by this EFI IPv4 Protocol driver
///
- EFI_IP4_ICMP_TYPE *IcmpTypeList;
+ EFI_IP4_ICMP_TYPE *IcmpTypeList;
} EFI_IP4_MODE_DATA;
#pragma pack(1)
typedef struct {
- UINT8 HeaderLength:4;
- UINT8 Version:4;
- UINT8 TypeOfService;
- UINT16 TotalLength;
- UINT16 Identification;
- UINT16 Fragmentation;
- UINT8 TimeToLive;
- UINT8 Protocol;
- UINT16 Checksum;
- EFI_IPv4_ADDRESS SourceAddress;
- EFI_IPv4_ADDRESS DestinationAddress;
+ UINT8 HeaderLength : 4;
+ UINT8 Version : 4;
+ UINT8 TypeOfService;
+ UINT16 TotalLength;
+ UINT16 Identification;
+ UINT16 Fragmentation;
+ UINT8 TimeToLive;
+ UINT8 Protocol;
+ UINT16 Checksum;
+ EFI_IPv4_ADDRESS SourceAddress;
+ EFI_IPv4_ADDRESS DestinationAddress;
} EFI_IP4_HEADER;
#pragma pack()
-
typedef struct {
- UINT32 FragmentLength;
- VOID *FragmentBuffer;
+ UINT32 FragmentLength;
+ VOID *FragmentBuffer;
} EFI_IP4_FRAGMENT_DATA;
-
typedef struct {
- EFI_TIME TimeStamp;
- EFI_EVENT RecycleSignal;
- UINT32 HeaderLength;
- EFI_IP4_HEADER *Header;
- UINT32 OptionsLength;
- VOID *Options;
- UINT32 DataLength;
- UINT32 FragmentCount;
- EFI_IP4_FRAGMENT_DATA FragmentTable[1];
+ EFI_TIME TimeStamp;
+ EFI_EVENT RecycleSignal;
+ UINT32 HeaderLength;
+ EFI_IP4_HEADER *Header;
+ UINT32 OptionsLength;
+ VOID *Options;
+ UINT32 DataLength;
+ UINT32 FragmentCount;
+ EFI_IP4_FRAGMENT_DATA FragmentTable[1];
} EFI_IP4_RECEIVE_DATA;
-
typedef struct {
- EFI_IPv4_ADDRESS SourceAddress;
- EFI_IPv4_ADDRESS GatewayAddress;
- UINT8 Protocol;
- UINT8 TypeOfService;
- UINT8 TimeToLive;
- BOOLEAN DoNotFragment;
+ EFI_IPv4_ADDRESS SourceAddress;
+ EFI_IPv4_ADDRESS GatewayAddress;
+ UINT8 Protocol;
+ UINT8 TypeOfService;
+ UINT8 TimeToLive;
+ BOOLEAN DoNotFragment;
} EFI_IP4_OVERRIDE_DATA;
typedef struct {
- EFI_IPv4_ADDRESS DestinationAddress;
- EFI_IP4_OVERRIDE_DATA *OverrideData; //OPTIONAL
- UINT32 OptionsLength; //OPTIONAL
- VOID *OptionsBuffer; //OPTIONAL
- UINT32 TotalDataLength;
- UINT32 FragmentCount;
- EFI_IP4_FRAGMENT_DATA FragmentTable[1];
+ EFI_IPv4_ADDRESS DestinationAddress;
+ EFI_IP4_OVERRIDE_DATA *OverrideData; // OPTIONAL
+ UINT32 OptionsLength; // OPTIONAL
+ VOID *OptionsBuffer; // OPTIONAL
+ UINT32 TotalDataLength;
+ UINT32 FragmentCount;
+ EFI_IP4_FRAGMENT_DATA FragmentTable[1];
} EFI_IP4_TRANSMIT_DATA;
typedef struct {
@@ -253,21 +243,21 @@
/// EFI_NOTIFY_SIGNAL. The Task Priority Level (TPL) of
/// Event must be lower than or equal to TPL_CALLBACK.
///
- EFI_EVENT Event;
+ EFI_EVENT Event;
///
/// The status that is returned to the caller at the end of the operation
/// to indicate whether this operation completed successfully.
///
- EFI_STATUS Status;
+ EFI_STATUS Status;
union {
///
/// When this token is used for receiving, RxData is a pointer to the EFI_IP4_RECEIVE_DATA.
///
- EFI_IP4_RECEIVE_DATA *RxData;
+ EFI_IP4_RECEIVE_DATA *RxData;
///
/// When this token is used for transmitting, TxData is a pointer to the EFI_IP4_TRANSMIT_DATA.
///
- EFI_IP4_TRANSMIT_DATA *TxData;
+ EFI_IP4_TRANSMIT_DATA *TxData;
} Packet;
} EFI_IP4_COMPLETION_TOKEN;
@@ -598,17 +588,17 @@
/// used by drivers, daemons, and applications to transmit and receive network packets.
///
struct _EFI_IP4_PROTOCOL {
- EFI_IP4_GET_MODE_DATA GetModeData;
- EFI_IP4_CONFIGURE Configure;
- EFI_IP4_GROUPS Groups;
- EFI_IP4_ROUTES Routes;
- EFI_IP4_TRANSMIT Transmit;
- EFI_IP4_RECEIVE Receive;
- EFI_IP4_CANCEL Cancel;
- EFI_IP4_POLL Poll;
+ EFI_IP4_GET_MODE_DATA GetModeData;
+ EFI_IP4_CONFIGURE Configure;
+ EFI_IP4_GROUPS Groups;
+ EFI_IP4_ROUTES Routes;
+ EFI_IP4_TRANSMIT Transmit;
+ EFI_IP4_RECEIVE Receive;
+ EFI_IP4_CANCEL Cancel;
+ EFI_IP4_POLL Poll;
};
-extern EFI_GUID gEfiIp4ServiceBindingProtocolGuid;
-extern EFI_GUID gEfiIp4ProtocolGuid;
+extern EFI_GUID gEfiIp4ServiceBindingProtocolGuid;
+extern EFI_GUID gEfiIp4ProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/Ip4Config.h b/src/include/ipxe/efi/Protocol/Ip4Config.h
index 227ae03..ff47fd2 100644
--- a/src/include/ipxe/efi/Protocol/Ip4Config.h
+++ b/src/include/ipxe/efi/Protocol/Ip4Config.h
@@ -2,23 +2,18 @@
This file provides a definition of the EFI IPv4 Configuration
Protocol.
-Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
This Protocol is introduced in UEFI Specification 2.0.
**/
+
#ifndef __EFI_IP4CONFIG_PROTOCOL_H__
#define __EFI_IP4CONFIG_PROTOCOL_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/Protocol/Ip4.h>
@@ -44,23 +39,22 @@
///
/// Default station IP address, stored in network byte order.
///
- EFI_IPv4_ADDRESS StationAddress;
+ EFI_IPv4_ADDRESS StationAddress;
///
/// Default subnet mask, stored in network byte order.
///
- EFI_IPv4_ADDRESS SubnetMask;
+ EFI_IPv4_ADDRESS SubnetMask;
///
/// Number of entries in the following RouteTable. May be zero.
///
- UINT32 RouteTableSize;
+ UINT32 RouteTableSize;
///
/// Default routing table data (stored in network byte order).
/// Ignored if RouteTableSize is zero.
///
- EFI_IP4_ROUTE_TABLE *RouteTable;
+ EFI_IP4_ROUTE_TABLE *RouteTable;
} EFI_IP4_IPCONFIG_DATA;
-
/**
Starts running the configuration policy for the EFI IPv4 Protocol driver.
@@ -174,11 +168,11 @@
/// configurations for the EFI IPv4 Protocol driver.
///
struct _EFI_IP4_CONFIG_PROTOCOL {
- EFI_IP4_CONFIG_START Start;
- EFI_IP4_CONFIG_STOP Stop;
- EFI_IP4_CONFIG_GET_DATA GetData;
+ EFI_IP4_CONFIG_START Start;
+ EFI_IP4_CONFIG_STOP Stop;
+ EFI_IP4_CONFIG_GET_DATA GetData;
};
-extern EFI_GUID gEfiIp4ConfigProtocolGuid;
+extern EFI_GUID gEfiIp4ConfigProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/LoadFile.h b/src/include/ipxe/efi/Protocol/LoadFile.h
index ba80fdc..034b22b 100644
--- a/src/include/ipxe/efi/Protocol/LoadFile.h
+++ b/src/include/ipxe/efi/Protocol/LoadFile.h
@@ -7,21 +7,15 @@
UEFI 2.0 can boot from any device that produces a LoadFile protocol.
-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __EFI_LOAD_FILE_PROTOCOL_H__
#define __EFI_LOAD_FILE_PROTOCOL_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_LOAD_FILE_PROTOCOL_GUID \
{ \
@@ -31,14 +25,14 @@
///
/// Protocol Guid defined by EFI1.1.
///
-#define LOAD_FILE_PROTOCOL EFI_LOAD_FILE_PROTOCOL_GUID
+#define LOAD_FILE_PROTOCOL EFI_LOAD_FILE_PROTOCOL_GUID
typedef struct _EFI_LOAD_FILE_PROTOCOL EFI_LOAD_FILE_PROTOCOL;
///
/// Backward-compatible with EFI1.1
///
-typedef EFI_LOAD_FILE_PROTOCOL EFI_LOAD_FILE_INTERFACE;
+typedef EFI_LOAD_FILE_PROTOCOL EFI_LOAD_FILE_INTERFACE;
/**
Causes the driver to load a specified file.
@@ -82,9 +76,9 @@
/// The EFI_LOAD_FILE_PROTOCOL is a simple protocol used to obtain files from arbitrary devices.
///
struct _EFI_LOAD_FILE_PROTOCOL {
- EFI_LOAD_FILE LoadFile;
+ EFI_LOAD_FILE LoadFile;
};
-extern EFI_GUID gEfiLoadFileProtocolGuid;
+extern EFI_GUID gEfiLoadFileProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/LoadFile2.h b/src/include/ipxe/efi/Protocol/LoadFile2.h
index 6cb26ff..2cb155d 100644
--- a/src/include/ipxe/efi/Protocol/LoadFile2.h
+++ b/src/include/ipxe/efi/Protocol/LoadFile2.h
@@ -7,21 +7,15 @@
UEFI 2.0 can boot from any device that produces a LoadFile protocol.
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __EFI_LOAD_FILE2_PROTOCOL_H__
#define __EFI_LOAD_FILE2_PROTOCOL_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_LOAD_FILE2_PROTOCOL_GUID \
{ \
@@ -31,11 +25,10 @@
///
/// Protocol Guid defined by UEFI2.1.
///
-#define LOAD_FILE2_PROTOCOL EFI_LOAD_FILE2_PROTOCOL_GUID
+#define LOAD_FILE2_PROTOCOL EFI_LOAD_FILE2_PROTOCOL_GUID
typedef struct _EFI_LOAD_FILE2_PROTOCOL EFI_LOAD_FILE2_PROTOCOL;
-
/**
Causes the driver to load a specified file.
@@ -79,9 +72,9 @@
/// The EFI_LOAD_FILE_PROTOCOL is a simple protocol used to obtain files from arbitrary devices.
///
struct _EFI_LOAD_FILE2_PROTOCOL {
- EFI_LOAD_FILE2 LoadFile;
+ EFI_LOAD_FILE2 LoadFile;
};
-extern EFI_GUID gEfiLoadFile2ProtocolGuid;
+extern EFI_GUID gEfiLoadFile2ProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/LoadedImage.h b/src/include/ipxe/efi/Protocol/LoadedImage.h
index cbe4103..db331b8 100755
--- a/src/include/ipxe/efi/Protocol/LoadedImage.h
+++ b/src/include/ipxe/efi/Protocol/LoadedImage.h
@@ -4,21 +4,15 @@
Every EFI driver and application is passed an image handle when it is loaded.
This image handle will contain a Loaded Image Protocol.
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __LOADED_IMAGE_PROTOCOL_H__
#define __LOADED_IMAGE_PROTOCOL_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_LOADED_IMAGE_PROTOCOL_GUID \
{ \
@@ -33,7 +27,7 @@
///
/// Protocol GUID defined in EFI1.1.
///
-#define LOADED_IMAGE_PROTOCOL EFI_LOADED_IMAGE_PROTOCOL_GUID
+#define LOADED_IMAGE_PROTOCOL EFI_LOADED_IMAGE_PROTOCOL_GUID
///
/// EFI_SYSTEM_TABLE & EFI_IMAGE_UNLOAD are defined in EfiApi.h
@@ -43,40 +37,40 @@
///
/// Revision defined in EFI1.1.
///
-#define EFI_LOADED_IMAGE_INFORMATION_REVISION EFI_LOADED_IMAGE_PROTOCOL_REVISION
+#define EFI_LOADED_IMAGE_INFORMATION_REVISION EFI_LOADED_IMAGE_PROTOCOL_REVISION
///
/// Can be used on any image handle to obtain information about the loaded image.
///
typedef struct {
- UINT32 Revision; ///< Defines the revision of the EFI_LOADED_IMAGE_PROTOCOL structure.
- ///< All future revisions will be backward compatible to the current revision.
- EFI_HANDLE ParentHandle; ///< Parent image's image handle. NULL if the image is loaded directly from
- ///< the firmware's boot manager.
- EFI_SYSTEM_TABLE *SystemTable; ///< the image's EFI system table pointer.
+ UINT32 Revision; ///< Defines the revision of the EFI_LOADED_IMAGE_PROTOCOL structure.
+ ///< All future revisions will be backward compatible to the current revision.
+ EFI_HANDLE ParentHandle; ///< Parent image's image handle. NULL if the image is loaded directly from
+ ///< the firmware's boot manager.
+ EFI_SYSTEM_TABLE *SystemTable; ///< the image's EFI system table pointer.
//
// Source location of image
//
- EFI_HANDLE DeviceHandle; ///< The device handle that the EFI Image was loaded from.
- EFI_DEVICE_PATH_PROTOCOL *FilePath; ///< A pointer to the file path portion specific to DeviceHandle
- ///< that the EFI Image was loaded from.
- VOID *Reserved; ///< Reserved. DO NOT USE.
+ EFI_HANDLE DeviceHandle; ///< The device handle that the EFI Image was loaded from.
+ EFI_DEVICE_PATH_PROTOCOL *FilePath; ///< A pointer to the file path portion specific to DeviceHandle
+ ///< that the EFI Image was loaded from.
+ VOID *Reserved; ///< Reserved. DO NOT USE.
//
// Images load options
//
- UINT32 LoadOptionsSize;///< The size in bytes of LoadOptions.
- VOID *LoadOptions; ///< A pointer to the image's binary load options.
+ UINT32 LoadOptionsSize; ///< The size in bytes of LoadOptions.
+ VOID *LoadOptions; ///< A pointer to the image's binary load options.
//
// Location of where image was loaded
//
- VOID *ImageBase; ///< The base address at which the image was loaded.
- UINT64 ImageSize; ///< The size in bytes of the loaded image.
- EFI_MEMORY_TYPE ImageCodeType; ///< The memory type that the code sections were loaded as.
- EFI_MEMORY_TYPE ImageDataType; ///< The memory type that the data sections were loaded as.
- EFI_IMAGE_UNLOAD Unload;
+ VOID *ImageBase; ///< The base address at which the image was loaded.
+ UINT64 ImageSize; ///< The size in bytes of the loaded image.
+ EFI_MEMORY_TYPE ImageCodeType; ///< The memory type that the code sections were loaded as.
+ EFI_MEMORY_TYPE ImageDataType; ///< The memory type that the data sections were loaded as.
+ EFI_IMAGE_UNLOAD Unload;
} EFI_LOADED_IMAGE_PROTOCOL;
//
@@ -84,7 +78,7 @@
//
typedef EFI_LOADED_IMAGE_PROTOCOL EFI_LOADED_IMAGE;
-extern EFI_GUID gEfiLoadedImageProtocolGuid;
-extern EFI_GUID gEfiLoadedImageDevicePathProtocolGuid;
+extern EFI_GUID gEfiLoadedImageProtocolGuid;
+extern EFI_GUID gEfiLoadedImageDevicePathProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/ManagedNetwork.h b/src/include/ipxe/efi/Protocol/ManagedNetwork.h
index 2bd0922..44a27ed 100644
--- a/src/include/ipxe/efi/Protocol/ManagedNetwork.h
+++ b/src/include/ipxe/efi/Protocol/ManagedNetwork.h
@@ -2,14 +2,8 @@
EFI_MANAGED_NETWORK_SERVICE_BINDING_PROTOCOL as defined in UEFI 2.0.
EFI_MANAGED_NETWORK_PROTOCOL as defined in UEFI 2.0.
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
This Protocol is introduced in UEFI Specification 2.0
@@ -19,7 +13,7 @@
#ifndef __EFI_MANAGED_NETWORK_PROTOCOL_H__
#define __EFI_MANAGED_NETWORK_PROTOCOL_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/Protocol/SimpleNetwork.h>
@@ -92,38 +86,37 @@
} EFI_MANAGED_NETWORK_CONFIG_DATA;
typedef struct {
- EFI_TIME Timestamp;
- EFI_EVENT RecycleEvent;
- UINT32 PacketLength;
- UINT32 HeaderLength;
- UINT32 AddressLength;
- UINT32 DataLength;
- BOOLEAN BroadcastFlag;
- BOOLEAN MulticastFlag;
- BOOLEAN PromiscuousFlag;
- UINT16 ProtocolType;
- VOID *DestinationAddress;
- VOID *SourceAddress;
- VOID *MediaHeader;
- VOID *PacketData;
+ EFI_TIME Timestamp;
+ EFI_EVENT RecycleEvent;
+ UINT32 PacketLength;
+ UINT32 HeaderLength;
+ UINT32 AddressLength;
+ UINT32 DataLength;
+ BOOLEAN BroadcastFlag;
+ BOOLEAN MulticastFlag;
+ BOOLEAN PromiscuousFlag;
+ UINT16 ProtocolType;
+ VOID *DestinationAddress;
+ VOID *SourceAddress;
+ VOID *MediaHeader;
+ VOID *PacketData;
} EFI_MANAGED_NETWORK_RECEIVE_DATA;
typedef struct {
- UINT32 FragmentLength;
- VOID *FragmentBuffer;
+ UINT32 FragmentLength;
+ VOID *FragmentBuffer;
} EFI_MANAGED_NETWORK_FRAGMENT_DATA;
typedef struct {
- EFI_MAC_ADDRESS *DestinationAddress; //OPTIONAL
- EFI_MAC_ADDRESS *SourceAddress; //OPTIONAL
- UINT16 ProtocolType; //OPTIONAL
- UINT32 DataLength;
- UINT16 HeaderLength; //OPTIONAL
- UINT16 FragmentCount;
- EFI_MANAGED_NETWORK_FRAGMENT_DATA FragmentTable[1];
+ EFI_MAC_ADDRESS *DestinationAddress; // OPTIONAL
+ EFI_MAC_ADDRESS *SourceAddress; // OPTIONAL
+ UINT16 ProtocolType; // OPTIONAL
+ UINT32 DataLength;
+ UINT16 HeaderLength; // OPTIONAL
+ UINT16 FragmentCount;
+ EFI_MANAGED_NETWORK_FRAGMENT_DATA FragmentTable[1];
} EFI_MANAGED_NETWORK_TRANSMIT_DATA;
-
typedef struct {
///
/// This Event will be signaled after the Status field is updated
@@ -131,21 +124,21 @@
/// EFI_NOTIFY_SIGNAL. The Task Priority Level (TPL) of
/// Event must be lower than or equal to TPL_CALLBACK.
///
- EFI_EVENT Event;
+ EFI_EVENT Event;
///
/// The status that is returned to the caller at the end of the operation
/// to indicate whether this operation completed successfully.
///
- EFI_STATUS Status;
+ EFI_STATUS Status;
union {
///
/// When this token is used for receiving, RxData is a pointer to the EFI_MANAGED_NETWORK_RECEIVE_DATA.
///
- EFI_MANAGED_NETWORK_RECEIVE_DATA *RxData;
+ EFI_MANAGED_NETWORK_RECEIVE_DATA *RxData;
///
/// When this token is used for transmitting, TxData is a pointer to the EFI_MANAGED_NETWORK_TRANSMIT_DATA.
///
- EFI_MANAGED_NETWORK_TRANSMIT_DATA *TxData;
+ EFI_MANAGED_NETWORK_TRANSMIT_DATA *TxData;
} Packet;
} EFI_MANAGED_NETWORK_COMPLETION_TOKEN;
@@ -306,7 +299,6 @@
IN EFI_MANAGED_NETWORK_COMPLETION_TOKEN *Token
);
-
/**
Aborts an asynchronous transmit or receive request.
@@ -358,17 +350,17 @@
/// perform raw (unformatted) asynchronous network packet I/O.
///
struct _EFI_MANAGED_NETWORK_PROTOCOL {
- EFI_MANAGED_NETWORK_GET_MODE_DATA GetModeData;
- EFI_MANAGED_NETWORK_CONFIGURE Configure;
- EFI_MANAGED_NETWORK_MCAST_IP_TO_MAC McastIpToMac;
- EFI_MANAGED_NETWORK_GROUPS Groups;
- EFI_MANAGED_NETWORK_TRANSMIT Transmit;
- EFI_MANAGED_NETWORK_RECEIVE Receive;
- EFI_MANAGED_NETWORK_CANCEL Cancel;
- EFI_MANAGED_NETWORK_POLL Poll;
+ EFI_MANAGED_NETWORK_GET_MODE_DATA GetModeData;
+ EFI_MANAGED_NETWORK_CONFIGURE Configure;
+ EFI_MANAGED_NETWORK_MCAST_IP_TO_MAC McastIpToMac;
+ EFI_MANAGED_NETWORK_GROUPS Groups;
+ EFI_MANAGED_NETWORK_TRANSMIT Transmit;
+ EFI_MANAGED_NETWORK_RECEIVE Receive;
+ EFI_MANAGED_NETWORK_CANCEL Cancel;
+ EFI_MANAGED_NETWORK_POLL Poll;
};
-extern EFI_GUID gEfiManagedNetworkServiceBindingProtocolGuid;
-extern EFI_GUID gEfiManagedNetworkProtocolGuid;
+extern EFI_GUID gEfiManagedNetworkServiceBindingProtocolGuid;
+extern EFI_GUID gEfiManagedNetworkProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/Mtftp4.h b/src/include/ipxe/efi/Protocol/Mtftp4.h
index bc0a839..4890c8a 100644
--- a/src/include/ipxe/efi/Protocol/Mtftp4.h
+++ b/src/include/ipxe/efi/Protocol/Mtftp4.h
@@ -1,14 +1,8 @@
/** @file
EFI Multicast Trivial File Transfer Protocol Definition
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
This Protocol is introduced in UEFI Specification 2.0
@@ -18,7 +12,7 @@
#ifndef __EFI_MTFTP4_PROTOCOL_H__
#define __EFI_MTFTP4_PROTOCOL_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_MTFTP4_SERVICE_BINDING_PROTOCOL_GUID \
{ \
@@ -30,21 +24,21 @@
0x78247c57, 0x63db, 0x4708, {0x99, 0xc2, 0xa8, 0xb4, 0xa9, 0xa6, 0x1f, 0x6b } \
}
-typedef struct _EFI_MTFTP4_PROTOCOL EFI_MTFTP4_PROTOCOL;
-typedef struct _EFI_MTFTP4_TOKEN EFI_MTFTP4_TOKEN;
+typedef struct _EFI_MTFTP4_PROTOCOL EFI_MTFTP4_PROTOCOL;
+typedef struct _EFI_MTFTP4_TOKEN EFI_MTFTP4_TOKEN;
//
-//MTFTP4 packet opcode definition
+// MTFTP4 packet opcode definition
//
-#define EFI_MTFTP4_OPCODE_RRQ 1
-#define EFI_MTFTP4_OPCODE_WRQ 2
-#define EFI_MTFTP4_OPCODE_DATA 3
-#define EFI_MTFTP4_OPCODE_ACK 4
-#define EFI_MTFTP4_OPCODE_ERROR 5
-#define EFI_MTFTP4_OPCODE_OACK 6
-#define EFI_MTFTP4_OPCODE_DIR 7
-#define EFI_MTFTP4_OPCODE_DATA8 8
-#define EFI_MTFTP4_OPCODE_ACK8 9
+#define EFI_MTFTP4_OPCODE_RRQ 1
+#define EFI_MTFTP4_OPCODE_WRQ 2
+#define EFI_MTFTP4_OPCODE_DATA 3
+#define EFI_MTFTP4_OPCODE_ACK 4
+#define EFI_MTFTP4_OPCODE_ERROR 5
+#define EFI_MTFTP4_OPCODE_OACK 6
+#define EFI_MTFTP4_OPCODE_DIR 7
+#define EFI_MTFTP4_OPCODE_DATA8 8
+#define EFI_MTFTP4_OPCODE_ACK8 9
//
// MTFTP4 error code definition
@@ -65,80 +59,80 @@
#pragma pack(1)
typedef struct {
- UINT16 OpCode;
- UINT8 Filename[1];
+ UINT16 OpCode;
+ UINT8 Filename[1];
} EFI_MTFTP4_REQ_HEADER;
typedef struct {
- UINT16 OpCode;
- UINT8 Data[1];
+ UINT16 OpCode;
+ UINT8 Data[1];
} EFI_MTFTP4_OACK_HEADER;
typedef struct {
- UINT16 OpCode;
- UINT16 Block;
- UINT8 Data[1];
+ UINT16 OpCode;
+ UINT16 Block;
+ UINT8 Data[1];
} EFI_MTFTP4_DATA_HEADER;
typedef struct {
- UINT16 OpCode;
- UINT16 Block[1];
+ UINT16 OpCode;
+ UINT16 Block[1];
} EFI_MTFTP4_ACK_HEADER;
typedef struct {
- UINT16 OpCode;
- UINT64 Block;
- UINT8 Data[1];
+ UINT16 OpCode;
+ UINT64 Block;
+ UINT8 Data[1];
} EFI_MTFTP4_DATA8_HEADER;
typedef struct {
- UINT16 OpCode;
- UINT64 Block[1];
+ UINT16 OpCode;
+ UINT64 Block[1];
} EFI_MTFTP4_ACK8_HEADER;
typedef struct {
- UINT16 OpCode;
- UINT16 ErrorCode;
- UINT8 ErrorMessage[1];
+ UINT16 OpCode;
+ UINT16 ErrorCode;
+ UINT8 ErrorMessage[1];
} EFI_MTFTP4_ERROR_HEADER;
typedef union {
///
/// Type of packets as defined by the MTFTPv4 packet opcodes.
///
- UINT16 OpCode;
+ UINT16 OpCode;
///
/// Read request packet header.
///
- EFI_MTFTP4_REQ_HEADER Rrq;
+ EFI_MTFTP4_REQ_HEADER Rrq;
///
/// Write request packet header.
///
- EFI_MTFTP4_REQ_HEADER Wrq;
+ EFI_MTFTP4_REQ_HEADER Wrq;
///
/// Option acknowledge packet header.
///
- EFI_MTFTP4_OACK_HEADER Oack;
+ EFI_MTFTP4_OACK_HEADER Oack;
///
/// Data packet header.
///
- EFI_MTFTP4_DATA_HEADER Data;
+ EFI_MTFTP4_DATA_HEADER Data;
///
/// Acknowledgement packet header.
///
- EFI_MTFTP4_ACK_HEADER Ack;
+ EFI_MTFTP4_ACK_HEADER Ack;
///
/// Data packet header with big block number.
///
- EFI_MTFTP4_DATA8_HEADER Data8;
+ EFI_MTFTP4_DATA8_HEADER Data8;
///
/// Acknowledgement header with big block num.
///
- EFI_MTFTP4_ACK8_HEADER Ack8;
+ EFI_MTFTP4_ACK8_HEADER Ack8;
///
/// Error packet header.
///
- EFI_MTFTP4_ERROR_HEADER Error;
+ EFI_MTFTP4_ERROR_HEADER Error;
} EFI_MTFTP4_PACKET;
#pragma pack()
@@ -147,39 +141,36 @@
/// MTFTP4 option definition.
///
typedef struct {
- UINT8 *OptionStr;
- UINT8 *ValueStr;
+ UINT8 *OptionStr;
+ UINT8 *ValueStr;
} EFI_MTFTP4_OPTION;
-
typedef struct {
- BOOLEAN UseDefaultSetting;
- EFI_IPv4_ADDRESS StationIp;
- EFI_IPv4_ADDRESS SubnetMask;
- UINT16 LocalPort;
- EFI_IPv4_ADDRESS GatewayIp;
- EFI_IPv4_ADDRESS ServerIp;
- UINT16 InitialServerPort;
- UINT16 TryCount;
- UINT16 TimeoutValue;
+ BOOLEAN UseDefaultSetting;
+ EFI_IPv4_ADDRESS StationIp;
+ EFI_IPv4_ADDRESS SubnetMask;
+ UINT16 LocalPort;
+ EFI_IPv4_ADDRESS GatewayIp;
+ EFI_IPv4_ADDRESS ServerIp;
+ UINT16 InitialServerPort;
+ UINT16 TryCount;
+ UINT16 TimeoutValue;
} EFI_MTFTP4_CONFIG_DATA;
-
typedef struct {
- EFI_MTFTP4_CONFIG_DATA ConfigData;
- UINT8 SupportedOptionCount;
- UINT8 **SupportedOptoins;
- UINT8 UnsupportedOptionCount;
- UINT8 **UnsupportedOptoins;
+ EFI_MTFTP4_CONFIG_DATA ConfigData;
+ UINT8 SupportedOptionCount;
+ UINT8 **SupportedOptoins;
+ UINT8 UnsupportedOptionCount;
+ UINT8 **UnsupportedOptoins;
} EFI_MTFTP4_MODE_DATA;
-
typedef struct {
- EFI_IPv4_ADDRESS GatewayIp;
- EFI_IPv4_ADDRESS ServerIp;
- UINT16 ServerPort;
- UINT16 TryCount;
- UINT16 TimeoutValue;
+ EFI_IPv4_ADDRESS GatewayIp;
+ EFI_IPv4_ADDRESS ServerIp;
+ UINT16 ServerPort;
+ UINT16 TryCount;
+ UINT16 TimeoutValue;
} EFI_MTFTP4_OVERRIDE_DATA;
//
@@ -258,7 +249,6 @@
OUT VOID **Buffer
);
-
/**
Submits an asynchronous interrupt transfer to an interrupt endpoint of a USB device.
@@ -277,7 +267,6 @@
OUT EFI_MTFTP4_MODE_DATA *ModeData
);
-
/**
Initializes, changes, or resets the default operational setting for this
EFI MTFTPv4 Protocol driver instance.
@@ -307,7 +296,6 @@
IN EFI_MTFTP4_CONFIG_DATA *MtftpConfigData OPTIONAL
);
-
/**
Gets information about a file from an MTFTPv4 server.
@@ -397,7 +385,6 @@
OUT EFI_MTFTP4_OPTION **OptionList OPTIONAL
);
-
/**
Downloads a file from an MTFTPv4 server.
@@ -428,8 +415,6 @@
IN EFI_MTFTP4_TOKEN *Token
);
-
-
/**
Sends a file to an MTFTPv4 server.
@@ -458,7 +443,6 @@
IN EFI_MTFTP4_TOKEN *Token
);
-
/**
Downloads a data file "directory" from an MTFTPv4 server. May be unsupported in some EFI
implementations.
@@ -530,7 +514,7 @@
/// The status that is returned to the caller at the end of the operation
/// to indicate whether this operation completed successfully.
///
- EFI_STATUS Status;
+ EFI_STATUS Status;
///
/// The event that will be signaled when the operation completes. If
/// set to NULL, the corresponding function will wait until the read or
@@ -538,58 +522,57 @@
/// EVT_NOTIFY_SIGNAL. The Task Priority Level (TPL) of
/// Event must be lower than or equal to TPL_CALLBACK.
///
- EFI_EVENT Event;
+ EFI_EVENT Event;
///
/// If not NULL, the data that will be used to override the existing configure data.
///
- EFI_MTFTP4_OVERRIDE_DATA *OverrideData;
+ EFI_MTFTP4_OVERRIDE_DATA *OverrideData;
///
/// The pointer to the null-terminated ASCII file name string.
///
- UINT8 *Filename;
+ UINT8 *Filename;
///
/// The pointer to the null-terminated ASCII mode string. If NULL, "octet" is used.
///
- UINT8 *ModeStr;
+ UINT8 *ModeStr;
///
/// Number of option/value string pairs.
///
- UINT32 OptionCount;
+ UINT32 OptionCount;
///
/// The pointer to an array of option/value string pairs. Ignored if OptionCount is zero.
///
- EFI_MTFTP4_OPTION *OptionList;
+ EFI_MTFTP4_OPTION *OptionList;
///
/// The size of the data buffer.
///
- UINT64 BufferSize;
+ UINT64 BufferSize;
///
/// The pointer to the data buffer. Data that is downloaded from the
/// MTFTPv4 server is stored here. Data that is uploaded to the
/// MTFTPv4 server is read from here. Ignored if BufferSize is zero.
///
- VOID *Buffer;
+ VOID *Buffer;
///
/// The pointer to the context that will be used by CheckPacket,
/// TimeoutCallback and PacketNeeded.
///
- VOID *Context;
+ VOID *Context;
///
/// The pointer to the callback function to check the contents of the received packet.
///
- EFI_MTFTP4_CHECK_PACKET CheckPacket;
+ EFI_MTFTP4_CHECK_PACKET CheckPacket;
///
/// The pointer to the function to be called when a timeout occurs.
///
- EFI_MTFTP4_TIMEOUT_CALLBACK TimeoutCallback;
+ EFI_MTFTP4_TIMEOUT_CALLBACK TimeoutCallback;
///
/// The pointer to the function to provide the needed packet contents.
///
- EFI_MTFTP4_PACKET_NEEDED PacketNeeded;
+ EFI_MTFTP4_PACKET_NEEDED PacketNeeded;
};
-extern EFI_GUID gEfiMtftp4ServiceBindingProtocolGuid;
-extern EFI_GUID gEfiMtftp4ProtocolGuid;
+extern EFI_GUID gEfiMtftp4ServiceBindingProtocolGuid;
+extern EFI_GUID gEfiMtftp4ProtocolGuid;
#endif
-
diff --git a/src/include/ipxe/efi/Protocol/NetworkInterfaceIdentifier.h b/src/include/ipxe/efi/Protocol/NetworkInterfaceIdentifier.h
index 5adedd8..1ce13f2 100644
--- a/src/include/ipxe/efi/Protocol/NetworkInterfaceIdentifier.h
+++ b/src/include/ipxe/efi/Protocol/NetworkInterfaceIdentifier.h
@@ -1,14 +1,8 @@
/** @file
EFI Network Interface Identifier Protocol.
-Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
This Protocol is introduced in EFI Specification 1.10.
@@ -18,7 +12,7 @@
#ifndef __EFI_NETWORK_INTERFACE_IDENTIFER_H__
#define __EFI_NETWORK_INTERFACE_IDENTIFER_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
//
// GUID retired from UEFI Specification 2.1b
@@ -39,53 +33,51 @@
//
// Revision defined in UEFI Specification 2.4
//
-#define EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL_REVISION 0x00020000
-
+#define EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL_REVISION 0x00020000
///
/// Revision defined in EFI1.1.
///
-#define EFI_NETWORK_INTERFACE_IDENTIFIER_INTERFACE_REVISION EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL_REVISION
+#define EFI_NETWORK_INTERFACE_IDENTIFIER_INTERFACE_REVISION EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL_REVISION
///
/// Forward reference for pure ANSI compatability.
///
-typedef struct _EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL;
+typedef struct _EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL;
///
/// Protocol defined in EFI1.1.
///
-typedef EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL EFI_NETWORK_INTERFACE_IDENTIFIER_INTERFACE;
+typedef EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL EFI_NETWORK_INTERFACE_IDENTIFIER_INTERFACE;
///
/// An optional protocol that is used to describe details about the software
/// layer that is used to produce the Simple Network Protocol.
///
struct _EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL {
- UINT64 Revision; ///< The revision of the EFI_NETWORK_INTERFACE_IDENTIFIER protocol.
- UINT64 Id; ///< The address of the first byte of the identifying structure for this network
- ///< interface. This is only valid when the network interface is started
- ///< (see Start()). When the network interface is not started, this field is set to zero.
- UINT64 ImageAddr; ///< The address of the first byte of the identifying structure for this
- ///< network interface. This is set to zero if there is no structure.
- UINT32 ImageSize; ///< The size of unrelocated network interface image.
- CHAR8 StringId[4];///< A four-character ASCII string that is sent in the class identifier field of
- ///< option 60 in DHCP. For a Type of EfiNetworkInterfaceUndi, this field is UNDI.
- UINT8 Type; ///< Network interface type. This will be set to one of the values
- ///< in EFI_NETWORK_INTERFACE_TYPE.
- UINT8 MajorVer; ///< Major version number.
- UINT8 MinorVer; ///< Minor version number.
- BOOLEAN Ipv6Supported; ///< TRUE if the network interface supports IPv6; otherwise FALSE.
- UINT16 IfNum; ///< The network interface number that is being identified by this Network
- ///< Interface Identifier Protocol. This field must be less than or
- ///< equal to the (IFcnt | IFcntExt <<8 ) fields in the !PXE structure.
-
+ UINT64 Revision; ///< The revision of the EFI_NETWORK_INTERFACE_IDENTIFIER protocol.
+ UINT64 Id; ///< The address of the first byte of the identifying structure for this network
+ ///< interface. This is only valid when the network interface is started
+ ///< (see Start()). When the network interface is not started, this field is set to zero.
+ UINT64 ImageAddr; ///< The address of the first byte of the identifying structure for this
+ ///< network interface. This is set to zero if there is no structure.
+ UINT32 ImageSize; ///< The size of unrelocated network interface image.
+ CHAR8 StringId[4]; ///< A four-character ASCII string that is sent in the class identifier field of
+ ///< option 60 in DHCP. For a Type of EfiNetworkInterfaceUndi, this field is UNDI.
+ UINT8 Type; ///< Network interface type. This will be set to one of the values
+ ///< in EFI_NETWORK_INTERFACE_TYPE.
+ UINT8 MajorVer; ///< Major version number.
+ UINT8 MinorVer; ///< Minor version number.
+ BOOLEAN Ipv6Supported; ///< TRUE if the network interface supports IPv6; otherwise FALSE.
+ UINT16 IfNum; ///< The network interface number that is being identified by this Network
+ ///< Interface Identifier Protocol. This field must be less than or
+ ///< equal to the (IFcnt | IFcntExt <<8 ) fields in the !PXE structure.
};
///
-///*******************************************************
+/// *******************************************************
/// EFI_NETWORK_INTERFACE_TYPE
-///*******************************************************
+/// *******************************************************
///
typedef enum {
EfiNetworkInterfaceUndi = 1
@@ -94,27 +86,27 @@
///
/// Forward reference for pure ANSI compatability.
///
-typedef struct undiconfig_table UNDI_CONFIG_TABLE;
+typedef struct undiconfig_table UNDI_CONFIG_TABLE;
///
/// The format of the configuration table for UNDI
///
struct undiconfig_table {
- UINT32 NumberOfInterfaces; ///< The number of NIC devices
+ UINT32 NumberOfInterfaces; ///< The number of NIC devices
///< that this UNDI controls.
- UINT32 reserved;
- UNDI_CONFIG_TABLE *nextlink; ///< A pointer to the next UNDI
+ UINT32 reserved;
+ UNDI_CONFIG_TABLE *nextlink; ///< A pointer to the next UNDI
///< configuration table.
///
/// The length of this array is given in the NumberOfInterfaces field.
///
struct {
- VOID *NII_InterfacePointer; ///< Pointer to the NII interface structure.
- VOID *DevicePathPointer; ///< Pointer to the device path for this NIC.
+ VOID *NII_InterfacePointer; ///< Pointer to the NII interface structure.
+ VOID *DevicePathPointer; ///< Pointer to the device path for this NIC.
} NII_entry[1];
};
-extern EFI_GUID gEfiNetworkInterfaceIdentifierProtocolGuid;
-extern EFI_GUID gEfiNetworkInterfaceIdentifierProtocolGuid_31;
+extern EFI_GUID gEfiNetworkInterfaceIdentifierProtocolGuid;
+extern EFI_GUID gEfiNetworkInterfaceIdentifierProtocolGuid_31;
#endif
diff --git a/src/include/ipxe/efi/Protocol/PciIo.h b/src/include/ipxe/efi/Protocol/PciIo.h
index 97f65e1..c733925 100644
--- a/src/include/ipxe/efi/Protocol/PciIo.h
+++ b/src/include/ipxe/efi/Protocol/PciIo.h
@@ -2,21 +2,15 @@
EFI PCI I/O Protocol provides the basic Memory, I/O, PCI configuration,
and DMA interfaces that a driver uses to access its PCI controller.
- Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __PCI_IO_H__
#define __PCI_IO_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
///
/// Global ID for the PCI I/O Protocol
@@ -26,7 +20,7 @@
0x4cf5b200, 0x68b8, 0x4ca5, {0x9e, 0xec, 0xb2, 0x3e, 0x3f, 0x50, 0x2, 0x9a } \
}
-typedef struct _EFI_PCI_IO_PROTOCOL EFI_PCI_IO_PROTOCOL;
+typedef struct _EFI_PCI_IO_PROTOCOL EFI_PCI_IO_PROTOCOL;
///
/// *******************************************************
@@ -34,7 +28,7 @@
/// *******************************************************
///
typedef enum {
- EfiPciIoWidthUint8 = 0,
+ EfiPciIoWidthUint8 = 0,
EfiPciIoWidthUint16,
EfiPciIoWidthUint32,
EfiPciIoWidthUint64,
@@ -52,30 +46,30 @@
//
// Complete PCI address generater
//
-#define EFI_PCI_IO_PASS_THROUGH_BAR 0xff ///< Special BAR that passes a memory or I/O cycle through unchanged
-#define EFI_PCI_IO_ATTRIBUTE_MASK 0x077f ///< All the following I/O and Memory cycles
-#define EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001 ///< I/O cycles 0x0000-0x00FF (10 bit decode)
-#define EFI_PCI_IO_ATTRIBUTE_ISA_IO 0x0002 ///< I/O cycles 0x0100-0x03FF or greater (10 bit decode)
-#define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO 0x0004 ///< I/O cycles 0x3C6, 0x3C8, 0x3C9 (10 bit decode)
-#define EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY 0x0008 ///< MEM cycles 0xA0000-0xBFFFF (24 bit decode)
-#define EFI_PCI_IO_ATTRIBUTE_VGA_IO 0x0010 ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (10 bit decode)
-#define EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO 0x0020 ///< I/O cycles 0x1F0-0x1F7, 0x3F6, 0x3F7 (10 bit decode)
-#define EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO 0x0040 ///< I/O cycles 0x170-0x177, 0x376, 0x377 (10 bit decode)
-#define EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080 ///< Map a memory range so writes are combined
-#define EFI_PCI_IO_ATTRIBUTE_IO 0x0100 ///< Enable the I/O decode bit in the PCI Config Header
-#define EFI_PCI_IO_ATTRIBUTE_MEMORY 0x0200 ///< Enable the Memory decode bit in the PCI Config Header
-#define EFI_PCI_IO_ATTRIBUTE_BUS_MASTER 0x0400 ///< Enable the DMA bit in the PCI Config Header
-#define EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED 0x0800 ///< Map a memory range so all r/w accesses are cached
-#define EFI_PCI_IO_ATTRIBUTE_MEMORY_DISABLE 0x1000 ///< Disable a memory range
-#define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE 0x2000 ///< Clear for an add-in PCI Device
-#define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM 0x4000 ///< Clear for a physical PCI Option ROM accessed through ROM BAR
-#define EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000 ///< Clear for PCI controllers that can not genrate a DAC
-#define EFI_PCI_IO_ATTRIBUTE_ISA_IO_16 0x10000 ///< I/O cycles 0x0100-0x03FF or greater (16 bit decode)
-#define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000 ///< I/O cycles 0x3C6, 0x3C8, 0x3C9 (16 bit decode)
-#define EFI_PCI_IO_ATTRIBUTE_VGA_IO_16 0x40000 ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (16 bit decode)
+#define EFI_PCI_IO_PASS_THROUGH_BAR 0xff ///< Special BAR that passes a memory or I/O cycle through unchanged
+#define EFI_PCI_IO_ATTRIBUTE_MASK 0x077f ///< All the following I/O and Memory cycles
+#define EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001 ///< I/O cycles 0x0000-0x00FF (10 bit decode)
+#define EFI_PCI_IO_ATTRIBUTE_ISA_IO 0x0002 ///< I/O cycles 0x0100-0x03FF or greater (10 bit decode)
+#define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO 0x0004 ///< I/O cycles 0x3C6, 0x3C8, 0x3C9 (10 bit decode)
+#define EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY 0x0008 ///< MEM cycles 0xA0000-0xBFFFF (24 bit decode)
+#define EFI_PCI_IO_ATTRIBUTE_VGA_IO 0x0010 ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (10 bit decode)
+#define EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO 0x0020 ///< I/O cycles 0x1F0-0x1F7, 0x3F6, 0x3F7 (10 bit decode)
+#define EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO 0x0040 ///< I/O cycles 0x170-0x177, 0x376, 0x377 (10 bit decode)
+#define EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080 ///< Map a memory range so writes are combined
+#define EFI_PCI_IO_ATTRIBUTE_IO 0x0100 ///< Enable the I/O decode bit in the PCI Config Header
+#define EFI_PCI_IO_ATTRIBUTE_MEMORY 0x0200 ///< Enable the Memory decode bit in the PCI Config Header
+#define EFI_PCI_IO_ATTRIBUTE_BUS_MASTER 0x0400 ///< Enable the DMA bit in the PCI Config Header
+#define EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED 0x0800 ///< Map a memory range so all r/w accesses are cached
+#define EFI_PCI_IO_ATTRIBUTE_MEMORY_DISABLE 0x1000 ///< Disable a memory range
+#define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE 0x2000 ///< Clear for an add-in PCI Device
+#define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM 0x4000 ///< Clear for a physical PCI Option ROM accessed through ROM BAR
+#define EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000 ///< Clear for PCI controllers that can not genrate a DAC
+#define EFI_PCI_IO_ATTRIBUTE_ISA_IO_16 0x10000 ///< I/O cycles 0x0100-0x03FF or greater (16 bit decode)
+#define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000 ///< I/O cycles 0x3C6, 0x3C8, 0x3C9 (16 bit decode)
+#define EFI_PCI_IO_ATTRIBUTE_VGA_IO_16 0x40000 ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (16 bit decode)
-#define EFI_PCI_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_IO | EFI_PCI_IO_ATTRIBUTE_MEMORY | EFI_PCI_IO_ATTRIBUTE_BUS_MASTER)
-#define EFI_VGA_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY | EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_IO)
+#define EFI_PCI_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_IO | EFI_PCI_IO_ATTRIBUTE_MEMORY | EFI_PCI_IO_ATTRIBUTE_BUS_MASTER)
+#define EFI_VGA_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY | EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_IO)
///
/// *******************************************************
@@ -198,11 +192,11 @@
///
/// Read PCI controller registers in the PCI memory or I/O space.
///
- EFI_PCI_IO_PROTOCOL_IO_MEM Read;
+ EFI_PCI_IO_PROTOCOL_IO_MEM Read;
///
/// Write PCI controller registers in the PCI memory or I/O space.
///
- EFI_PCI_IO_PROTOCOL_IO_MEM Write;
+ EFI_PCI_IO_PROTOCOL_IO_MEM Write;
} EFI_PCI_IO_PROTOCOL_ACCESS;
/**
@@ -237,11 +231,11 @@
///
/// Read PCI controller registers in PCI configuration space.
///
- EFI_PCI_IO_PROTOCOL_CONFIG Read;
+ EFI_PCI_IO_PROTOCOL_CONFIG Read;
///
/// Write PCI controller registers in PCI configuration space.
///
- EFI_PCI_IO_PROTOCOL_CONFIG Write;
+ EFI_PCI_IO_PROTOCOL_CONFIG Write;
} EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS;
/**
@@ -333,7 +327,7 @@
/**
Allocates pages that are suitable for an EfiPciIoOperationBusMasterCommonBuffer
- mapping.
+ or EfiPciOperationBusMasterCommonBuffer64 mapping.
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param Type This parameter is not used and must be ignored.
@@ -346,7 +340,7 @@
@retval EFI_SUCCESS The requested memory pages were allocated.
@retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
- MEMORY_WRITE_COMBINE and MEMORY_CACHED.
+ MEMORY_WRITE_COMBINE, MEMORY_CACHED and DUAL_ADDRESS_CYCLE.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
@retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
@@ -459,25 +453,24 @@
base address for resource range. The legal range for this field is 0..5.
@param Supports A pointer to the mask of attributes that this PCI controller supports
setting for this BAR with SetBarAttributes().
- @param Resources A pointer to the ACPI 2.0 resource descriptors that describe the current
+ @param Resources A pointer to the resource descriptors that describe the current
configuration of this BAR of the PCI controller.
@retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI
controller supports are returned in Supports. If Resources
- is not NULL, then the ACPI 2.0 resource descriptors that the PCI
+ is not NULL, then the resource descriptors that the PCI
controller is currently using are returned in Resources.
@retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.
@retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
@retval EFI_OUT_OF_RESOURCES There are not enough resources available to allocate
Resources.
-
**/
typedef
EFI_STATUS
(EFIAPI *EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES)(
IN EFI_PCI_IO_PROTOCOL *This,
IN UINT8 BarIndex,
- OUT UINT64 *Supports, OPTIONAL
+ OUT UINT64 *Supports OPTIONAL,
OUT VOID **Resources OPTIONAL
);
@@ -523,26 +516,26 @@
/// retrieve the EFI_PCI_IO_PROTOCOL instance that is associated with the PCI controller.
///
struct _EFI_PCI_IO_PROTOCOL {
- EFI_PCI_IO_PROTOCOL_POLL_IO_MEM PollMem;
- EFI_PCI_IO_PROTOCOL_POLL_IO_MEM PollIo;
- EFI_PCI_IO_PROTOCOL_ACCESS Mem;
- EFI_PCI_IO_PROTOCOL_ACCESS Io;
- EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS Pci;
- EFI_PCI_IO_PROTOCOL_COPY_MEM CopyMem;
- EFI_PCI_IO_PROTOCOL_MAP Map;
- EFI_PCI_IO_PROTOCOL_UNMAP Unmap;
- EFI_PCI_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;
- EFI_PCI_IO_PROTOCOL_FREE_BUFFER FreeBuffer;
- EFI_PCI_IO_PROTOCOL_FLUSH Flush;
- EFI_PCI_IO_PROTOCOL_GET_LOCATION GetLocation;
- EFI_PCI_IO_PROTOCOL_ATTRIBUTES Attributes;
- EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES GetBarAttributes;
- EFI_PCI_IO_PROTOCOL_SET_BAR_ATTRIBUTES SetBarAttributes;
+ EFI_PCI_IO_PROTOCOL_POLL_IO_MEM PollMem;
+ EFI_PCI_IO_PROTOCOL_POLL_IO_MEM PollIo;
+ EFI_PCI_IO_PROTOCOL_ACCESS Mem;
+ EFI_PCI_IO_PROTOCOL_ACCESS Io;
+ EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS Pci;
+ EFI_PCI_IO_PROTOCOL_COPY_MEM CopyMem;
+ EFI_PCI_IO_PROTOCOL_MAP Map;
+ EFI_PCI_IO_PROTOCOL_UNMAP Unmap;
+ EFI_PCI_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;
+ EFI_PCI_IO_PROTOCOL_FREE_BUFFER FreeBuffer;
+ EFI_PCI_IO_PROTOCOL_FLUSH Flush;
+ EFI_PCI_IO_PROTOCOL_GET_LOCATION GetLocation;
+ EFI_PCI_IO_PROTOCOL_ATTRIBUTES Attributes;
+ EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES GetBarAttributes;
+ EFI_PCI_IO_PROTOCOL_SET_BAR_ATTRIBUTES SetBarAttributes;
///
/// The size, in bytes, of the ROM image.
///
- UINT64 RomSize;
+ UINT64 RomSize;
///
/// A pointer to the in memory copy of the ROM image. The PCI Bus Driver is responsible
@@ -552,9 +545,9 @@
/// The Attributes() function can be used to determine from which of these two sources
/// the RomImage buffer was initialized.
///
- VOID *RomImage;
+ VOID *RomImage;
};
-extern EFI_GUID gEfiPciIoProtocolGuid;
+extern EFI_GUID gEfiPciIoProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/PciRootBridgeIo.h b/src/include/ipxe/efi/Protocol/PciRootBridgeIo.h
index b9c80f5..b6a4780 100644
--- a/src/include/ipxe/efi/Protocol/PciRootBridgeIo.h
+++ b/src/include/ipxe/efi/Protocol/PciRootBridgeIo.h
@@ -5,21 +5,15 @@
and PCI Configuration cycles on a PCI Root Bridge. It also provides services to perform
defferent types of bus mastering DMA.
- Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __PCI_ROOT_BRIDGE_IO_H__
#define __PCI_ROOT_BRIDGE_IO_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/Library/BaseLib.h>
@@ -28,7 +22,7 @@
0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
}
-typedef struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL;
+typedef struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL;
///
/// *******************************************************
@@ -90,24 +84,24 @@
EfiPciOperationMaximum
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION;
-#define EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001
-#define EFI_PCI_ATTRIBUTE_ISA_IO 0x0002
-#define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO 0x0004
-#define EFI_PCI_ATTRIBUTE_VGA_MEMORY 0x0008
-#define EFI_PCI_ATTRIBUTE_VGA_IO 0x0010
-#define EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO 0x0020
-#define EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO 0x0040
-#define EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080
-#define EFI_PCI_ATTRIBUTE_MEMORY_CACHED 0x0800
-#define EFI_PCI_ATTRIBUTE_MEMORY_DISABLE 0x1000
-#define EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000
-#define EFI_PCI_ATTRIBUTE_ISA_IO_16 0x10000
-#define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000
-#define EFI_PCI_ATTRIBUTE_VGA_IO_16 0x40000
+#define EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001
+#define EFI_PCI_ATTRIBUTE_ISA_IO 0x0002
+#define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO 0x0004
+#define EFI_PCI_ATTRIBUTE_VGA_MEMORY 0x0008
+#define EFI_PCI_ATTRIBUTE_VGA_IO 0x0010
+#define EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO 0x0020
+#define EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO 0x0040
+#define EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080
+#define EFI_PCI_ATTRIBUTE_MEMORY_CACHED 0x0800
+#define EFI_PCI_ATTRIBUTE_MEMORY_DISABLE 0x1000
+#define EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000
+#define EFI_PCI_ATTRIBUTE_ISA_IO_16 0x10000
+#define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000
+#define EFI_PCI_ATTRIBUTE_VGA_IO_16 0x40000
-#define EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER (EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | EFI_PCI_ATTRIBUTE_MEMORY_CACHED | EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE)
+#define EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER (EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | EFI_PCI_ATTRIBUTE_MEMORY_CACHED | EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE)
-#define EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)
+#define EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)
#define EFI_PCI_ADDRESS(bus, dev, func, reg) \
(UINT64) ( \
@@ -117,11 +111,11 @@
(((UINTN) (reg)) < 256 ? ((UINTN) (reg)) : (UINT64) (LShiftU64 ((UINT64) (reg), 32))))
typedef struct {
- UINT8 Register;
- UINT8 Function;
- UINT8 Device;
- UINT8 Bus;
- UINT32 ExtendedRegister;
+ UINT8 Register;
+ UINT8 Function;
+ UINT8 Device;
+ UINT8 Bus;
+ UINT32 ExtendedRegister;
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS;
/**
@@ -183,11 +177,11 @@
///
/// Read PCI controller registers in the PCI root bridge memory space.
///
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Read;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Read;
///
/// Write PCI controller registers in the PCI root bridge memory space.
///
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Write;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Write;
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS;
/**
@@ -389,11 +383,11 @@
);
/**
- Retrieves the current resource settings of this PCI root bridge in the form of a set of ACPI 2.0
+ Retrieves the current resource settings of this PCI root bridge in the form of a set of ACPI
resource descriptors.
@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
- @param Resources A pointer to the ACPI 2.0 resource descriptors that describe the current
+ @param Resources A pointer to the resource descriptors that describe the current
configuration of this PCI root bridge.
@retval EFI_SUCCESS The current configuration of this PCI root bridge was returned in
@@ -417,28 +411,28 @@
///
/// The EFI_HANDLE of the PCI Host Bridge of which this PCI Root Bridge is a member.
///
- EFI_HANDLE ParentHandle;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollMem;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollIo;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Mem;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Io;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Pci;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM CopyMem;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP Map;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP Unmap;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER FreeBuffer;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH Flush;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES GetAttributes;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES SetAttributes;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION Configuration;
+ EFI_HANDLE ParentHandle;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollMem;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollIo;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Mem;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Io;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Pci;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM CopyMem;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP Map;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP Unmap;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER FreeBuffer;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH Flush;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES GetAttributes;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES SetAttributes;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION Configuration;
///
/// The segment number that this PCI root bridge resides.
///
- UINT32 SegmentNumber;
+ UINT32 SegmentNumber;
};
-extern EFI_GUID gEfiPciRootBridgeIoProtocolGuid;
+extern EFI_GUID gEfiPciRootBridgeIoProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/PxeBaseCode.h b/src/include/ipxe/efi/Protocol/PxeBaseCode.h
index 2644798..20efd72 100644
--- a/src/include/ipxe/efi/Protocol/PxeBaseCode.h
+++ b/src/include/ipxe/efi/Protocol/PxeBaseCode.h
@@ -2,23 +2,21 @@
EFI PXE Base Code Protocol definitions, which is used to access PXE-compatible
devices for network access and network booting.
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
This Protocol is introduced in EFI Specification 1.10.
**/
+
#ifndef __PXE_BASE_CODE_PROTOCOL_H__
#define __PXE_BASE_CODE_PROTOCOL_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
///
/// PXE Base Code protocol.
@@ -28,94 +26,94 @@
0x03c4e603, 0xac28, 0x11d3, {0x9a, 0x2d, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
}
-typedef struct _EFI_PXE_BASE_CODE_PROTOCOL EFI_PXE_BASE_CODE_PROTOCOL;
+typedef struct _EFI_PXE_BASE_CODE_PROTOCOL EFI_PXE_BASE_CODE_PROTOCOL;
///
/// Protocol defined in EFI1.1.
///
-typedef EFI_PXE_BASE_CODE_PROTOCOL EFI_PXE_BASE_CODE;
+typedef EFI_PXE_BASE_CODE_PROTOCOL EFI_PXE_BASE_CODE;
///
/// Default IP TTL and ToS.
///
-#define DEFAULT_TTL 16
-#define DEFAULT_ToS 0
+#define DEFAULT_TTL 16
+#define DEFAULT_ToS 0
///
/// ICMP error format.
///
typedef struct {
- UINT8 Type;
- UINT8 Code;
- UINT16 Checksum;
+ UINT8 Type;
+ UINT8 Code;
+ UINT16 Checksum;
union {
- UINT32 reserved;
- UINT32 Mtu;
- UINT32 Pointer;
+ UINT32 reserved;
+ UINT32 Mtu;
+ UINT32 Pointer;
struct {
- UINT16 Identifier;
- UINT16 Sequence;
+ UINT16 Identifier;
+ UINT16 Sequence;
} Echo;
} u;
- UINT8 Data[494];
+ UINT8 Data[494];
} EFI_PXE_BASE_CODE_ICMP_ERROR;
///
/// TFTP error format.
///
typedef struct {
- UINT8 ErrorCode;
- CHAR8 ErrorString[127];
+ UINT8 ErrorCode;
+ CHAR8 ErrorString[127];
} EFI_PXE_BASE_CODE_TFTP_ERROR;
///
/// IP Receive Filter definitions.
///
-#define EFI_PXE_BASE_CODE_MAX_IPCNT 8
+#define EFI_PXE_BASE_CODE_MAX_IPCNT 8
///
/// IP Receive Filter structure.
///
typedef struct {
- UINT8 Filters;
- UINT8 IpCnt;
- UINT16 reserved;
- EFI_IP_ADDRESS IpList[EFI_PXE_BASE_CODE_MAX_IPCNT];
+ UINT8 Filters;
+ UINT8 IpCnt;
+ UINT16 reserved;
+ EFI_IP_ADDRESS IpList[EFI_PXE_BASE_CODE_MAX_IPCNT];
} EFI_PXE_BASE_CODE_IP_FILTER;
-#define EFI_PXE_BASE_CODE_IP_FILTER_STATION_IP 0x0001
-#define EFI_PXE_BASE_CODE_IP_FILTER_BROADCAST 0x0002
-#define EFI_PXE_BASE_CODE_IP_FILTER_PROMISCUOUS 0x0004
-#define EFI_PXE_BASE_CODE_IP_FILTER_PROMISCUOUS_MULTICAST 0x0008
+#define EFI_PXE_BASE_CODE_IP_FILTER_STATION_IP 0x0001
+#define EFI_PXE_BASE_CODE_IP_FILTER_BROADCAST 0x0002
+#define EFI_PXE_BASE_CODE_IP_FILTER_PROMISCUOUS 0x0004
+#define EFI_PXE_BASE_CODE_IP_FILTER_PROMISCUOUS_MULTICAST 0x0008
///
/// ARP cache entries.
///
typedef struct {
- EFI_IP_ADDRESS IpAddr;
- EFI_MAC_ADDRESS MacAddr;
+ EFI_IP_ADDRESS IpAddr;
+ EFI_MAC_ADDRESS MacAddr;
} EFI_PXE_BASE_CODE_ARP_ENTRY;
///
/// ARP route table entries.
///
typedef struct {
- EFI_IP_ADDRESS IpAddr;
- EFI_IP_ADDRESS SubnetMask;
- EFI_IP_ADDRESS GwAddr;
+ EFI_IP_ADDRESS IpAddr;
+ EFI_IP_ADDRESS SubnetMask;
+ EFI_IP_ADDRESS GwAddr;
} EFI_PXE_BASE_CODE_ROUTE_ENTRY;
//
// UDP definitions
//
-typedef UINT16 EFI_PXE_BASE_CODE_UDP_PORT;
+typedef UINT16 EFI_PXE_BASE_CODE_UDP_PORT;
-#define EFI_PXE_BASE_CODE_UDP_OPFLAGS_ANY_SRC_IP 0x0001
-#define EFI_PXE_BASE_CODE_UDP_OPFLAGS_ANY_SRC_PORT 0x0002
-#define EFI_PXE_BASE_CODE_UDP_OPFLAGS_ANY_DEST_IP 0x0004
-#define EFI_PXE_BASE_CODE_UDP_OPFLAGS_ANY_DEST_PORT 0x0008
-#define EFI_PXE_BASE_CODE_UDP_OPFLAGS_USE_FILTER 0x0010
-#define EFI_PXE_BASE_CODE_UDP_OPFLAGS_MAY_FRAGMENT 0x0020
+#define EFI_PXE_BASE_CODE_UDP_OPFLAGS_ANY_SRC_IP 0x0001
+#define EFI_PXE_BASE_CODE_UDP_OPFLAGS_ANY_SRC_PORT 0x0002
+#define EFI_PXE_BASE_CODE_UDP_OPFLAGS_ANY_DEST_IP 0x0004
+#define EFI_PXE_BASE_CODE_UDP_OPFLAGS_ANY_DEST_PORT 0x0008
+#define EFI_PXE_BASE_CODE_UDP_OPFLAGS_USE_FILTER 0x0010
+#define EFI_PXE_BASE_CODE_UDP_OPFLAGS_MAY_FRAGMENT 0x0020
//
// Discover() definitions
@@ -142,7 +140,7 @@
// 32768 through 65279 are for vendor use
// 65280 through 65534 are reserved
//
-#define EFI_PXE_BASE_CODE_BOOT_TYPE_PXETEST 65535
+#define EFI_PXE_BASE_CODE_BOOT_TYPE_PXETEST 65535
#define EFI_PXE_BASE_CODE_BOOT_LAYER_MASK 0x7FFF
#define EFI_PXE_BASE_CODE_BOOT_LAYER_INITIAL 0x0000
@@ -154,39 +152,40 @@
// http://www.ietf.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xml
//
#if defined (MDE_CPU_IA32)
-#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x0006
-#elif defined (MDE_CPU_IPF)
-#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x0002
+#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x0006
#elif defined (MDE_CPU_X64)
-#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x0007
+#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x0007
#elif defined (MDE_CPU_ARM)
-#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x000A
+#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x000A
#elif defined (MDE_CPU_AARCH64)
-#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x000B
+#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x000B
+#elif defined (MDE_CPU_RISCV64)
+#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x001B
+#elif defined (MDE_CPU_LOONGARCH64)
+#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x0027
#endif
-
///
/// Discover() server list structure.
///
typedef struct {
- UINT16 Type;
- BOOLEAN AcceptAnyResponse;
- UINT8 Reserved;
- EFI_IP_ADDRESS IpAddr;
+ UINT16 Type;
+ BOOLEAN AcceptAnyResponse;
+ UINT8 Reserved;
+ EFI_IP_ADDRESS IpAddr;
} EFI_PXE_BASE_CODE_SRVLIST;
///
/// Discover() information override structure.
///
typedef struct {
- BOOLEAN UseMCast;
- BOOLEAN UseBCast;
- BOOLEAN UseUCast;
- BOOLEAN MustUseList;
- EFI_IP_ADDRESS ServerMCastIp;
- UINT16 IpCnt;
- EFI_PXE_BASE_CODE_SRVLIST SrvList[1];
+ BOOLEAN UseMCast;
+ BOOLEAN UseBCast;
+ BOOLEAN UseUCast;
+ BOOLEAN MustUseList;
+ EFI_IP_ADDRESS ServerMCastIp;
+ UINT16 IpCnt;
+ EFI_PXE_BASE_CODE_SRVLIST SrvList[1];
} EFI_PXE_BASE_CODE_DISCOVER_INFO;
///
@@ -210,58 +209,58 @@
/// perform the "get file size" and "read directory" operations of MTFTP.
///
typedef struct {
- EFI_IP_ADDRESS MCastIp;
- EFI_PXE_BASE_CODE_UDP_PORT CPort;
- EFI_PXE_BASE_CODE_UDP_PORT SPort;
- UINT16 ListenTimeout;
- UINT16 TransmitTimeout;
+ EFI_IP_ADDRESS MCastIp;
+ EFI_PXE_BASE_CODE_UDP_PORT CPort;
+ EFI_PXE_BASE_CODE_UDP_PORT SPort;
+ UINT16 ListenTimeout;
+ UINT16 TransmitTimeout;
} EFI_PXE_BASE_CODE_MTFTP_INFO;
///
/// DHCPV4 Packet structure.
///
typedef struct {
- UINT8 BootpOpcode;
- UINT8 BootpHwType;
- UINT8 BootpHwAddrLen;
- UINT8 BootpGateHops;
- UINT32 BootpIdent;
- UINT16 BootpSeconds;
- UINT16 BootpFlags;
- UINT8 BootpCiAddr[4];
- UINT8 BootpYiAddr[4];
- UINT8 BootpSiAddr[4];
- UINT8 BootpGiAddr[4];
- UINT8 BootpHwAddr[16];
- UINT8 BootpSrvName[64];
- UINT8 BootpBootFile[128];
- UINT32 DhcpMagik;
- UINT8 DhcpOptions[56];
+ UINT8 BootpOpcode;
+ UINT8 BootpHwType;
+ UINT8 BootpHwAddrLen;
+ UINT8 BootpGateHops;
+ UINT32 BootpIdent;
+ UINT16 BootpSeconds;
+ UINT16 BootpFlags;
+ UINT8 BootpCiAddr[4];
+ UINT8 BootpYiAddr[4];
+ UINT8 BootpSiAddr[4];
+ UINT8 BootpGiAddr[4];
+ UINT8 BootpHwAddr[16];
+ UINT8 BootpSrvName[64];
+ UINT8 BootpBootFile[128];
+ UINT32 DhcpMagik;
+ UINT8 DhcpOptions[56];
} EFI_PXE_BASE_CODE_DHCPV4_PACKET;
///
/// DHCPV6 Packet structure.
///
typedef struct {
- UINT32 MessageType:8;
- UINT32 TransactionId:24;
- UINT8 DhcpOptions[1024];
+ UINT32 MessageType : 8;
+ UINT32 TransactionId : 24;
+ UINT8 DhcpOptions[1024];
} EFI_PXE_BASE_CODE_DHCPV6_PACKET;
///
/// Packet structure.
///
typedef union {
- UINT8 Raw[1472];
- EFI_PXE_BASE_CODE_DHCPV4_PACKET Dhcpv4;
- EFI_PXE_BASE_CODE_DHCPV6_PACKET Dhcpv6;
+ UINT8 Raw[1472];
+ EFI_PXE_BASE_CODE_DHCPV4_PACKET Dhcpv4;
+ EFI_PXE_BASE_CODE_DHCPV6_PACKET Dhcpv6;
} EFI_PXE_BASE_CODE_PACKET;
//
// PXE Base Code Mode structure
//
-#define EFI_PXE_BASE_CODE_MAX_ARP_ENTRIES 8
-#define EFI_PXE_BASE_CODE_MAX_ROUTE_ENTRIES 8
+#define EFI_PXE_BASE_CODE_MAX_ARP_ENTRIES 8
+#define EFI_PXE_BASE_CODE_MAX_ROUTE_ENTRIES 8
///
/// EFI_PXE_BASE_CODE_MODE.
@@ -270,40 +269,40 @@
/// EFI_PXE_BASE_CODE_PROTOCOL functions.
///
typedef struct {
- BOOLEAN Started;
- BOOLEAN Ipv6Available;
- BOOLEAN Ipv6Supported;
- BOOLEAN UsingIpv6;
- BOOLEAN BisSupported;
- BOOLEAN BisDetected;
- BOOLEAN AutoArp;
- BOOLEAN SendGUID;
- BOOLEAN DhcpDiscoverValid;
- BOOLEAN DhcpAckReceived;
- BOOLEAN ProxyOfferReceived;
- BOOLEAN PxeDiscoverValid;
- BOOLEAN PxeReplyReceived;
- BOOLEAN PxeBisReplyReceived;
- BOOLEAN IcmpErrorReceived;
- BOOLEAN TftpErrorReceived;
- BOOLEAN MakeCallbacks;
- UINT8 TTL;
- UINT8 ToS;
- EFI_IP_ADDRESS StationIp;
- EFI_IP_ADDRESS SubnetMask;
- EFI_PXE_BASE_CODE_PACKET DhcpDiscover;
- EFI_PXE_BASE_CODE_PACKET DhcpAck;
- EFI_PXE_BASE_CODE_PACKET ProxyOffer;
- EFI_PXE_BASE_CODE_PACKET PxeDiscover;
- EFI_PXE_BASE_CODE_PACKET PxeReply;
- EFI_PXE_BASE_CODE_PACKET PxeBisReply;
- EFI_PXE_BASE_CODE_IP_FILTER IpFilter;
- UINT32 ArpCacheEntries;
- EFI_PXE_BASE_CODE_ARP_ENTRY ArpCache[EFI_PXE_BASE_CODE_MAX_ARP_ENTRIES];
- UINT32 RouteTableEntries;
- EFI_PXE_BASE_CODE_ROUTE_ENTRY RouteTable[EFI_PXE_BASE_CODE_MAX_ROUTE_ENTRIES];
- EFI_PXE_BASE_CODE_ICMP_ERROR IcmpError;
- EFI_PXE_BASE_CODE_TFTP_ERROR TftpError;
+ BOOLEAN Started;
+ BOOLEAN Ipv6Available;
+ BOOLEAN Ipv6Supported;
+ BOOLEAN UsingIpv6;
+ BOOLEAN BisSupported;
+ BOOLEAN BisDetected;
+ BOOLEAN AutoArp;
+ BOOLEAN SendGUID;
+ BOOLEAN DhcpDiscoverValid;
+ BOOLEAN DhcpAckReceived;
+ BOOLEAN ProxyOfferReceived;
+ BOOLEAN PxeDiscoverValid;
+ BOOLEAN PxeReplyReceived;
+ BOOLEAN PxeBisReplyReceived;
+ BOOLEAN IcmpErrorReceived;
+ BOOLEAN TftpErrorReceived;
+ BOOLEAN MakeCallbacks;
+ UINT8 TTL;
+ UINT8 ToS;
+ EFI_IP_ADDRESS StationIp;
+ EFI_IP_ADDRESS SubnetMask;
+ EFI_PXE_BASE_CODE_PACKET DhcpDiscover;
+ EFI_PXE_BASE_CODE_PACKET DhcpAck;
+ EFI_PXE_BASE_CODE_PACKET ProxyOffer;
+ EFI_PXE_BASE_CODE_PACKET PxeDiscover;
+ EFI_PXE_BASE_CODE_PACKET PxeReply;
+ EFI_PXE_BASE_CODE_PACKET PxeBisReply;
+ EFI_PXE_BASE_CODE_IP_FILTER IpFilter;
+ UINT32 ArpCacheEntries;
+ EFI_PXE_BASE_CODE_ARP_ENTRY ArpCache[EFI_PXE_BASE_CODE_MAX_ARP_ENTRIES];
+ UINT32 RouteTableEntries;
+ EFI_PXE_BASE_CODE_ROUTE_ENTRY RouteTable[EFI_PXE_BASE_CODE_MAX_ROUTE_ENTRIES];
+ EFI_PXE_BASE_CODE_ICMP_ERROR IcmpError;
+ EFI_PXE_BASE_CODE_TFTP_ERROR TftpError;
} EFI_PXE_BASE_CODE_MODE;
//
@@ -627,11 +626,11 @@
IN UINT16 OpFlags,
IN EFI_IP_ADDRESS *DestIp,
IN EFI_PXE_BASE_CODE_UDP_PORT *DestPort,
- IN EFI_IP_ADDRESS *GatewayIp, OPTIONAL
- IN EFI_IP_ADDRESS *SrcIp, OPTIONAL
- IN OUT EFI_PXE_BASE_CODE_UDP_PORT *SrcPort, OPTIONAL
- IN UINTN *HeaderSize, OPTIONAL
- IN VOID *HeaderPtr, OPTIONAL
+ IN EFI_IP_ADDRESS *GatewayIp OPTIONAL,
+ IN EFI_IP_ADDRESS *SrcIp OPTIONAL,
+ IN OUT EFI_PXE_BASE_CODE_UDP_PORT *SrcPort OPTIONAL,
+ IN UINTN *HeaderSize OPTIONAL,
+ IN VOID *HeaderPtr OPTIONAL,
IN UINTN *BufferSize,
IN VOID *BufferPtr
);
@@ -679,12 +678,12 @@
(EFIAPI *EFI_PXE_BASE_CODE_UDP_READ)(
IN EFI_PXE_BASE_CODE_PROTOCOL *This,
IN UINT16 OpFlags,
- IN OUT EFI_IP_ADDRESS *DestIp, OPTIONAL
- IN OUT EFI_PXE_BASE_CODE_UDP_PORT *DestPort, OPTIONAL
- IN OUT EFI_IP_ADDRESS *SrcIp, OPTIONAL
- IN OUT EFI_PXE_BASE_CODE_UDP_PORT *SrcPort, OPTIONAL
- IN UINTN *HeaderSize, OPTIONAL
- IN VOID *HeaderPtr, OPTIONAL
+ IN OUT EFI_IP_ADDRESS *DestIp OPTIONAL,
+ IN OUT EFI_PXE_BASE_CODE_UDP_PORT *DestPort OPTIONAL,
+ IN OUT EFI_IP_ADDRESS *SrcIp OPTIONAL,
+ IN OUT EFI_PXE_BASE_CODE_UDP_PORT *SrcPort OPTIONAL,
+ IN UINTN *HeaderSize OPTIONAL,
+ IN VOID *HeaderPtr OPTIONAL,
IN OUT UINTN *BufferSize,
IN VOID *BufferPtr
);
@@ -801,10 +800,10 @@
EFI_STATUS
(EFIAPI *EFI_PXE_BASE_CODE_SET_PARAMETERS)(
IN EFI_PXE_BASE_CODE_PROTOCOL *This,
- IN BOOLEAN *NewAutoArp, OPTIONAL
- IN BOOLEAN *NewSendGUID, OPTIONAL
- IN UINT8 *NewTTL, OPTIONAL
- IN UINT8 *NewToS, OPTIONAL
+ IN BOOLEAN *NewAutoArp OPTIONAL,
+ IN BOOLEAN *NewSendGUID OPTIONAL,
+ IN UINT8 *NewTTL OPTIONAL,
+ IN UINT8 *NewToS OPTIONAL,
IN BOOLEAN *NewMakeCallback OPTIONAL
);
@@ -835,7 +834,7 @@
EFI_STATUS
(EFIAPI *EFI_PXE_BASE_CODE_SET_STATION_IP)(
IN EFI_PXE_BASE_CODE_PROTOCOL *This,
- IN EFI_IP_ADDRESS *NewStationIp, OPTIONAL
+ IN EFI_IP_ADDRESS *NewStationIp OPTIONAL,
IN EFI_IP_ADDRESS *NewSubnetMask OPTIONAL
);
@@ -874,24 +873,24 @@
EFI_STATUS
(EFIAPI *EFI_PXE_BASE_CODE_SET_PACKETS)(
IN EFI_PXE_BASE_CODE_PROTOCOL *This,
- BOOLEAN *NewDhcpDiscoverValid, OPTIONAL
- BOOLEAN *NewDhcpAckReceived, OPTIONAL
- BOOLEAN *NewProxyOfferReceived, OPTIONAL
- BOOLEAN *NewPxeDiscoverValid, OPTIONAL
- BOOLEAN *NewPxeReplyReceived, OPTIONAL
- BOOLEAN *NewPxeBisReplyReceived, OPTIONAL
- IN EFI_PXE_BASE_CODE_PACKET *NewDhcpDiscover, OPTIONAL
- IN EFI_PXE_BASE_CODE_PACKET *NewDhcpAck, OPTIONAL
- IN EFI_PXE_BASE_CODE_PACKET *NewProxyOffer, OPTIONAL
- IN EFI_PXE_BASE_CODE_PACKET *NewPxeDiscover, OPTIONAL
- IN EFI_PXE_BASE_CODE_PACKET *NewPxeReply, OPTIONAL
+ BOOLEAN *NewDhcpDiscoverValid OPTIONAL,
+ BOOLEAN *NewDhcpAckReceived OPTIONAL,
+ BOOLEAN *NewProxyOfferReceived OPTIONAL,
+ BOOLEAN *NewPxeDiscoverValid OPTIONAL,
+ BOOLEAN *NewPxeReplyReceived OPTIONAL,
+ BOOLEAN *NewPxeBisReplyReceived OPTIONAL,
+ IN EFI_PXE_BASE_CODE_PACKET *NewDhcpDiscover OPTIONAL,
+ IN EFI_PXE_BASE_CODE_PACKET *NewDhcpAck OPTIONAL,
+ IN EFI_PXE_BASE_CODE_PACKET *NewProxyOffer OPTIONAL,
+ IN EFI_PXE_BASE_CODE_PACKET *NewPxeDiscover OPTIONAL,
+ IN EFI_PXE_BASE_CODE_PACKET *NewPxeReply OPTIONAL,
IN EFI_PXE_BASE_CODE_PACKET *NewPxeBisReply OPTIONAL
);
//
// PXE Base Code Protocol structure
//
-#define EFI_PXE_BASE_CODE_PROTOCOL_REVISION 0x00010000
+#define EFI_PXE_BASE_CODE_PROTOCOL_REVISION 0x00010000
//
// Revision defined in EFI1.1
@@ -912,25 +911,25 @@
/// be backwards compatible. If a future version is not backwards compatible
/// it is not the same GUID.
///
- UINT64 Revision;
- EFI_PXE_BASE_CODE_START Start;
- EFI_PXE_BASE_CODE_STOP Stop;
- EFI_PXE_BASE_CODE_DHCP Dhcp;
- EFI_PXE_BASE_CODE_DISCOVER Discover;
- EFI_PXE_BASE_CODE_MTFTP Mtftp;
- EFI_PXE_BASE_CODE_UDP_WRITE UdpWrite;
- EFI_PXE_BASE_CODE_UDP_READ UdpRead;
- EFI_PXE_BASE_CODE_SET_IP_FILTER SetIpFilter;
- EFI_PXE_BASE_CODE_ARP Arp;
- EFI_PXE_BASE_CODE_SET_PARAMETERS SetParameters;
- EFI_PXE_BASE_CODE_SET_STATION_IP SetStationIp;
- EFI_PXE_BASE_CODE_SET_PACKETS SetPackets;
+ UINT64 Revision;
+ EFI_PXE_BASE_CODE_START Start;
+ EFI_PXE_BASE_CODE_STOP Stop;
+ EFI_PXE_BASE_CODE_DHCP Dhcp;
+ EFI_PXE_BASE_CODE_DISCOVER Discover;
+ EFI_PXE_BASE_CODE_MTFTP Mtftp;
+ EFI_PXE_BASE_CODE_UDP_WRITE UdpWrite;
+ EFI_PXE_BASE_CODE_UDP_READ UdpRead;
+ EFI_PXE_BASE_CODE_SET_IP_FILTER SetIpFilter;
+ EFI_PXE_BASE_CODE_ARP Arp;
+ EFI_PXE_BASE_CODE_SET_PARAMETERS SetParameters;
+ EFI_PXE_BASE_CODE_SET_STATION_IP SetStationIp;
+ EFI_PXE_BASE_CODE_SET_PACKETS SetPackets;
///
/// The pointer to the EFI_PXE_BASE_CODE_MODE data for this device.
///
- EFI_PXE_BASE_CODE_MODE *Mode;
+ EFI_PXE_BASE_CODE_MODE *Mode;
};
-extern EFI_GUID gEfiPxeBaseCodeProtocolGuid;
+extern EFI_GUID gEfiPxeBaseCodeProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/Rng.h b/src/include/ipxe/efi/Protocol/Rng.h
index f04efbb..87c5c0e 100644
--- a/src/include/ipxe/efi/Protocol/Rng.h
+++ b/src/include/ipxe/efi/Protocol/Rng.h
@@ -3,21 +3,15 @@
The UEFI Random Number Generator Protocol is used to provide random bits for use
in applications, or entropy for seeding other random number generators.
-Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __EFI_RNG_PROTOCOL_H__
#define __EFI_RNG_PROTOCOL_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
///
/// Global ID for the Random Number Generator Protocol
@@ -101,7 +95,7 @@
**/
typedef
EFI_STATUS
-(EFIAPI *EFI_RNG_GET_INFO) (
+(EFIAPI *EFI_RNG_GET_INFO)(
IN EFI_RNG_PROTOCOL *This,
IN OUT UINTN *RNGAlgorithmListSize,
OUT EFI_RNG_ALGORITHM *RNGAlgorithmList
@@ -131,9 +125,9 @@
**/
typedef
EFI_STATUS
-(EFIAPI *EFI_RNG_GET_RNG) (
+(EFIAPI *EFI_RNG_GET_RNG)(
IN EFI_RNG_PROTOCOL *This,
- IN EFI_RNG_ALGORITHM *RNGAlgorithm, OPTIONAL
+ IN EFI_RNG_ALGORITHM *RNGAlgorithm OPTIONAL,
IN UINTN RNGValueLength,
OUT UINT8 *RNGValue
);
@@ -143,16 +137,16 @@
/// applications, or entropy for seeding other random number generators.
///
struct _EFI_RNG_PROTOCOL {
- EFI_RNG_GET_INFO GetInfo;
- EFI_RNG_GET_RNG GetRNG;
+ EFI_RNG_GET_INFO GetInfo;
+ EFI_RNG_GET_RNG GetRNG;
};
-extern EFI_GUID gEfiRngProtocolGuid;
-extern EFI_GUID gEfiRngAlgorithmSp80090Hash256Guid;
-extern EFI_GUID gEfiRngAlgorithmSp80090Hmac256Guid;
-extern EFI_GUID gEfiRngAlgorithmSp80090Ctr256Guid;
-extern EFI_GUID gEfiRngAlgorithmX9313DesGuid;
-extern EFI_GUID gEfiRngAlgorithmX931AesGuid;
-extern EFI_GUID gEfiRngAlgorithmRaw;
+extern EFI_GUID gEfiRngProtocolGuid;
+extern EFI_GUID gEfiRngAlgorithmSp80090Hash256Guid;
+extern EFI_GUID gEfiRngAlgorithmSp80090Hmac256Guid;
+extern EFI_GUID gEfiRngAlgorithmSp80090Ctr256Guid;
+extern EFI_GUID gEfiRngAlgorithmX9313DesGuid;
+extern EFI_GUID gEfiRngAlgorithmX931AesGuid;
+extern EFI_GUID gEfiRngAlgorithmRaw;
#endif
diff --git a/src/include/ipxe/efi/Protocol/SerialIo.h b/src/include/ipxe/efi/Protocol/SerialIo.h
index 130a6ec..1e44a21 100644
--- a/src/include/ipxe/efi/Protocol/SerialIo.h
+++ b/src/include/ipxe/efi/Protocol/SerialIo.h
@@ -4,27 +4,26 @@
Abstraction of a basic serial device. Targeted at 16550 UART, but
could be much more generic.
- Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __SERIAL_IO_PROTOCOL_H__
#define __SERIAL_IO_PROTOCOL_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_SERIAL_IO_PROTOCOL_GUID \
{ \
0xBB25CF6F, 0xF1D4, 0x11D2, {0x9A, 0x0C, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0xFD } \
}
+#define EFI_SERIAL_TERMINAL_DEVICE_TYPE_GUID \
+ { \
+ 0X6AD9A60F, 0X5815, 0X4C7C, { 0X8A, 0X10, 0X50, 0X53, 0XD2, 0XBF, 0X7A, 0X1B } \
+ }
+
///
/// Protocol GUID defined in EFI1.1.
///
@@ -32,11 +31,10 @@
typedef struct _EFI_SERIAL_IO_PROTOCOL EFI_SERIAL_IO_PROTOCOL;
-
///
/// Backward-compatible with EFI1.1.
///
-typedef EFI_SERIAL_IO_PROTOCOL SERIAL_IO_INTERFACE;
+typedef EFI_SERIAL_IO_PROTOCOL SERIAL_IO_INTERFACE;
///
/// Parity type that is computed or checked as each character is transmitted or received. If the
@@ -83,13 +81,14 @@
//
// Read Write
//
-#define EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE 0x00001000
-#define EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE 0x00002000
-#define EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE 0x00004000
+#define EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE 0x00001000
+#define EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE 0x00002000
+#define EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE 0x00004000
//
// Serial IO Member Functions
//
+
/**
Reset the serial device.
@@ -127,8 +126,9 @@
value of DefaultStopBits will use the device's default number of
stop bits.
- @retval EFI_SUCCESS The device was reset.
- @retval EFI_DEVICE_ERROR The serial device could not be reset.
+ @retval EFI_SUCCESS The device was reset.
+ @retval EFI_INVALID_PARAMETER One or more attributes has an unsupported value.
+ @retval EFI_DEVICE_ERROR The serial device is not functioning correctly.
**/
typedef
@@ -256,21 +256,22 @@
**/
typedef struct {
- UINT32 ControlMask;
+ UINT32 ControlMask;
//
// current Attributes
//
- UINT32 Timeout;
- UINT64 BaudRate;
- UINT32 ReceiveFifoDepth;
- UINT32 DataBits;
- UINT32 Parity;
- UINT32 StopBits;
+ UINT32 Timeout;
+ UINT64 BaudRate;
+ UINT32 ReceiveFifoDepth;
+ UINT32 DataBits;
+ UINT32 Parity;
+ UINT32 StopBits;
} EFI_SERIAL_IO_MODE;
-#define EFI_SERIAL_IO_PROTOCOL_REVISION 0x00010000
-#define SERIAL_IO_INTERFACE_REVISION EFI_SERIAL_IO_PROTOCOL_REVISION
+#define EFI_SERIAL_IO_PROTOCOL_REVISION 0x00010000
+#define EFI_SERIAL_IO_PROTOCOL_REVISION1p1 0x00010001
+#define SERIAL_IO_INTERFACE_REVISION EFI_SERIAL_IO_PROTOCOL_REVISION
///
/// The Serial I/O protocol is used to communicate with UART-style serial devices.
@@ -283,19 +284,28 @@
/// must be backwards compatible. If a future version is not backwards compatible,
/// it is not the same GUID.
///
- UINT32 Revision;
- EFI_SERIAL_RESET Reset;
- EFI_SERIAL_SET_ATTRIBUTES SetAttributes;
- EFI_SERIAL_SET_CONTROL_BITS SetControl;
- EFI_SERIAL_GET_CONTROL_BITS GetControl;
- EFI_SERIAL_WRITE Write;
- EFI_SERIAL_READ Read;
+ UINT32 Revision;
+ EFI_SERIAL_RESET Reset;
+ EFI_SERIAL_SET_ATTRIBUTES SetAttributes;
+ EFI_SERIAL_SET_CONTROL_BITS SetControl;
+ EFI_SERIAL_GET_CONTROL_BITS GetControl;
+ EFI_SERIAL_WRITE Write;
+ EFI_SERIAL_READ Read;
///
/// Pointer to SERIAL_IO_MODE data.
///
- EFI_SERIAL_IO_MODE *Mode;
+ EFI_SERIAL_IO_MODE *Mode;
+ ///
+ /// Pointer to a GUID identifying the device connected to the serial port.
+ /// This field is NULL when the protocol is installed by the serial port
+ /// driver and may be populated by a platform driver for a serial port
+ /// with a known device attached. The field will remain NULL if there is
+ /// no platform serial device identification information available.
+ ///
+ CONST EFI_GUID *DeviceTypeGuid; // Revision 1.1
};
-extern EFI_GUID gEfiSerialIoProtocolGuid;
+extern EFI_GUID gEfiSerialIoProtocolGuid;
+extern EFI_GUID gEfiSerialTerminalDeviceTypeGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/SimpleFileSystem.h b/src/include/ipxe/efi/Protocol/SimpleFileSystem.h
index b6bacfd..62edb2a 100644
--- a/src/include/ipxe/efi/Protocol/SimpleFileSystem.h
+++ b/src/include/ipxe/efi/Protocol/SimpleFileSystem.h
@@ -7,42 +7,36 @@
UEFI 2.0 can boot from any valid EFI image contained in a SimpleFileSystem.
-Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __SIMPLE_FILE_SYSTEM_H__
#define __SIMPLE_FILE_SYSTEM_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_GUID \
{ \
0x964e5b22, 0x6459, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \
}
-typedef struct _EFI_SIMPLE_FILE_SYSTEM_PROTOCOL EFI_SIMPLE_FILE_SYSTEM_PROTOCOL;
+typedef struct _EFI_SIMPLE_FILE_SYSTEM_PROTOCOL EFI_SIMPLE_FILE_SYSTEM_PROTOCOL;
-typedef struct _EFI_FILE_PROTOCOL EFI_FILE_PROTOCOL;
-typedef struct _EFI_FILE_PROTOCOL *EFI_FILE_HANDLE;
+typedef struct _EFI_FILE_PROTOCOL EFI_FILE_PROTOCOL;
+typedef struct _EFI_FILE_PROTOCOL *EFI_FILE_HANDLE;
///
/// Protocol GUID name defined in EFI1.1.
///
-#define SIMPLE_FILE_SYSTEM_PROTOCOL EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_GUID
+#define SIMPLE_FILE_SYSTEM_PROTOCOL EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_GUID
///
/// Protocol name defined in EFI1.1.
///
-typedef EFI_SIMPLE_FILE_SYSTEM_PROTOCOL EFI_FILE_IO_INTERFACE;
-typedef EFI_FILE_PROTOCOL EFI_FILE;
+typedef EFI_SIMPLE_FILE_SYSTEM_PROTOCOL EFI_FILE_IO_INTERFACE;
+typedef EFI_FILE_PROTOCOL EFI_FILE;
/**
Open the root directory on a volume.
@@ -84,8 +78,8 @@
/// specified by this specification is 0x00010000. All future revisions
/// must be backwards compatible.
///
- UINT64 Revision;
- EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_OPEN_VOLUME OpenVolume;
+ UINT64 Revision;
+ EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_OPEN_VOLUME OpenVolume;
};
/**
@@ -138,13 +132,13 @@
//
// File attributes
//
-#define EFI_FILE_READ_ONLY 0x0000000000000001ULL
-#define EFI_FILE_HIDDEN 0x0000000000000002ULL
-#define EFI_FILE_SYSTEM 0x0000000000000004ULL
-#define EFI_FILE_RESERVED 0x0000000000000008ULL
-#define EFI_FILE_DIRECTORY 0x0000000000000010ULL
-#define EFI_FILE_ARCHIVE 0x0000000000000020ULL
-#define EFI_FILE_VALID_ATTR 0x0000000000000037ULL
+#define EFI_FILE_READ_ONLY 0x0000000000000001ULL
+#define EFI_FILE_HIDDEN 0x0000000000000002ULL
+#define EFI_FILE_SYSTEM 0x0000000000000004ULL
+#define EFI_FILE_RESERVED 0x0000000000000008ULL
+#define EFI_FILE_DIRECTORY 0x0000000000000010ULL
+#define EFI_FILE_ARCHIVE 0x0000000000000020ULL
+#define EFI_FILE_VALID_ATTR 0x0000000000000037ULL
/**
Closes a specified file handle.
@@ -373,12 +367,12 @@
// The caller must be prepared to handle the case where the callback associated with Event
// occurs before the original asynchronous I/O request call returns.
//
- EFI_EVENT Event;
+ EFI_EVENT Event;
//
// Defines whether or not the signaled event encountered an error.
//
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// For OpenEx(): Not Used, ignored.
@@ -388,7 +382,7 @@
// In both cases, the size is measured in bytes.
// For FlushEx(): Not used, ignored.
//
- UINTN BufferSize;
+ UINTN BufferSize;
//
// For OpenEx(): Not Used, ignored.
@@ -396,7 +390,7 @@
// For WriteEx(): The buffer of data to write.
// For FlushEx(): Not Used, ignored.
//
- VOID *Buffer;
+ VOID *Buffer;
} EFI_FILE_IO_TOKEN;
/**
@@ -442,7 +436,6 @@
IN OUT EFI_FILE_IO_TOKEN *Token
);
-
/**
Reads data from a file.
@@ -461,11 +454,10 @@
**/
typedef
EFI_STATUS
-(EFIAPI *EFI_FILE_READ_EX) (
+(EFIAPI *EFI_FILE_READ_EX)(
IN EFI_FILE_PROTOCOL *This,
IN OUT EFI_FILE_IO_TOKEN *Token
-);
-
+ );
/**
Writes data to a file.
@@ -488,10 +480,10 @@
**/
typedef
EFI_STATUS
-(EFIAPI *EFI_FILE_WRITE_EX) (
+(EFIAPI *EFI_FILE_WRITE_EX)(
IN EFI_FILE_PROTOCOL *This,
IN OUT EFI_FILE_IO_TOKEN *Token
-);
+ );
/**
Flushes all modified data associated with a file to a device.
@@ -514,19 +506,19 @@
**/
typedef
EFI_STATUS
-(EFIAPI *EFI_FILE_FLUSH_EX) (
+(EFIAPI *EFI_FILE_FLUSH_EX)(
IN EFI_FILE_PROTOCOL *This,
IN OUT EFI_FILE_IO_TOKEN *Token
);
-#define EFI_FILE_PROTOCOL_REVISION 0x00010000
-#define EFI_FILE_PROTOCOL_REVISION2 0x00020000
-#define EFI_FILE_PROTOCOL_LATEST_REVISION EFI_FILE_PROTOCOL_REVISION2
+#define EFI_FILE_PROTOCOL_REVISION 0x00010000
+#define EFI_FILE_PROTOCOL_REVISION2 0x00020000
+#define EFI_FILE_PROTOCOL_LATEST_REVISION EFI_FILE_PROTOCOL_REVISION2
//
// Revision defined in EFI1.1.
//
-#define EFI_FILE_REVISION EFI_FILE_PROTOCOL_REVISION
+#define EFI_FILE_REVISION EFI_FILE_PROTOCOL_REVISION
///
/// The EFI_FILE_PROTOCOL provides file IO access to supported file systems.
@@ -541,24 +533,23 @@
/// by this specification is EFI_FILE_PROTOCOL_LATEST_REVISION.
/// Future versions are required to be backward compatible to version 1.0.
///
- UINT64 Revision;
- EFI_FILE_OPEN Open;
- EFI_FILE_CLOSE Close;
- EFI_FILE_DELETE Delete;
- EFI_FILE_READ Read;
- EFI_FILE_WRITE Write;
- EFI_FILE_GET_POSITION GetPosition;
- EFI_FILE_SET_POSITION SetPosition;
- EFI_FILE_GET_INFO GetInfo;
- EFI_FILE_SET_INFO SetInfo;
- EFI_FILE_FLUSH Flush;
- EFI_FILE_OPEN_EX OpenEx;
- EFI_FILE_READ_EX ReadEx;
- EFI_FILE_WRITE_EX WriteEx;
- EFI_FILE_FLUSH_EX FlushEx;
+ UINT64 Revision;
+ EFI_FILE_OPEN Open;
+ EFI_FILE_CLOSE Close;
+ EFI_FILE_DELETE Delete;
+ EFI_FILE_READ Read;
+ EFI_FILE_WRITE Write;
+ EFI_FILE_GET_POSITION GetPosition;
+ EFI_FILE_SET_POSITION SetPosition;
+ EFI_FILE_GET_INFO GetInfo;
+ EFI_FILE_SET_INFO SetInfo;
+ EFI_FILE_FLUSH Flush;
+ EFI_FILE_OPEN_EX OpenEx;
+ EFI_FILE_READ_EX ReadEx;
+ EFI_FILE_WRITE_EX WriteEx;
+ EFI_FILE_FLUSH_EX FlushEx;
};
-
-extern EFI_GUID gEfiSimpleFileSystemProtocolGuid;
+extern EFI_GUID gEfiSimpleFileSystemProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/SimpleNetwork.h b/src/include/ipxe/efi/Protocol/SimpleNetwork.h
index 2faa668..141ab88 100644
--- a/src/include/ipxe/efi/Protocol/SimpleNetwork.h
+++ b/src/include/ipxe/efi/Protocol/SimpleNetwork.h
@@ -9,14 +9,8 @@
MCast - MultiCast
...
-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
This Protocol is introduced in EFI Specification 1.10.
@@ -26,20 +20,19 @@
#ifndef __SIMPLE_NETWORK_H__
#define __SIMPLE_NETWORK_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_SIMPLE_NETWORK_PROTOCOL_GUID \
{ \
0xA19832B9, 0xAC25, 0x11D3, {0x9A, 0x2D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D } \
}
-typedef struct _EFI_SIMPLE_NETWORK_PROTOCOL EFI_SIMPLE_NETWORK_PROTOCOL;
-
+typedef struct _EFI_SIMPLE_NETWORK_PROTOCOL EFI_SIMPLE_NETWORK_PROTOCOL;
///
/// Protocol defined in EFI1.1.
///
-typedef EFI_SIMPLE_NETWORK_PROTOCOL EFI_SIMPLE_NETWORK;
+typedef EFI_SIMPLE_NETWORK_PROTOCOL EFI_SIMPLE_NETWORK;
///
/// Simple Network Protocol data structures.
@@ -49,99 +42,99 @@
/// Total number of frames received. Includes frames with errors and
/// dropped frames.
///
- UINT64 RxTotalFrames;
+ UINT64 RxTotalFrames;
///
/// Number of valid frames received and copied into receive buffers.
///
- UINT64 RxGoodFrames;
+ UINT64 RxGoodFrames;
///
/// Number of frames below the minimum length for the media.
/// This would be <64 for ethernet.
///
- UINT64 RxUndersizeFrames;
+ UINT64 RxUndersizeFrames;
///
/// Number of frames longer than the maxminum length for the
/// media. This would be >1500 for ethernet.
///
- UINT64 RxOversizeFrames;
+ UINT64 RxOversizeFrames;
///
/// Valid frames that were dropped because receive buffers were full.
///
- UINT64 RxDroppedFrames;
+ UINT64 RxDroppedFrames;
///
/// Number of valid unicast frames received and not dropped.
///
- UINT64 RxUnicastFrames;
+ UINT64 RxUnicastFrames;
///
/// Number of valid broadcast frames received and not dropped.
///
- UINT64 RxBroadcastFrames;
+ UINT64 RxBroadcastFrames;
///
/// Number of valid mutlicast frames received and not dropped.
///
- UINT64 RxMulticastFrames;
+ UINT64 RxMulticastFrames;
///
/// Number of frames w/ CRC or alignment errors.
///
- UINT64 RxCrcErrorFrames;
+ UINT64 RxCrcErrorFrames;
///
/// Total number of bytes received. Includes frames with errors
/// and dropped frames.
//
- UINT64 RxTotalBytes;
+ UINT64 RxTotalBytes;
///
/// Transmit statistics.
///
- UINT64 TxTotalFrames;
- UINT64 TxGoodFrames;
- UINT64 TxUndersizeFrames;
- UINT64 TxOversizeFrames;
- UINT64 TxDroppedFrames;
- UINT64 TxUnicastFrames;
- UINT64 TxBroadcastFrames;
- UINT64 TxMulticastFrames;
- UINT64 TxCrcErrorFrames;
- UINT64 TxTotalBytes;
+ UINT64 TxTotalFrames;
+ UINT64 TxGoodFrames;
+ UINT64 TxUndersizeFrames;
+ UINT64 TxOversizeFrames;
+ UINT64 TxDroppedFrames;
+ UINT64 TxUnicastFrames;
+ UINT64 TxBroadcastFrames;
+ UINT64 TxMulticastFrames;
+ UINT64 TxCrcErrorFrames;
+ UINT64 TxTotalBytes;
///
/// Number of collisions detection on this subnet.
///
- UINT64 Collisions;
+ UINT64 Collisions;
///
/// Number of frames destined for unsupported protocol.
///
- UINT64 UnsupportedProtocol;
+ UINT64 UnsupportedProtocol;
///
/// Number of valid frames received that were duplicated.
///
- UINT64 RxDuplicatedFrames;
+ UINT64 RxDuplicatedFrames;
///
/// Number of encrypted frames received that failed to decrypt.
///
- UINT64 RxDecryptErrorFrames;
+ UINT64 RxDecryptErrorFrames;
///
/// Number of frames that failed to transmit after exceeding the retry limit.
///
- UINT64 TxErrorFrames;
+ UINT64 TxErrorFrames;
///
/// Number of frames transmitted successfully after more than one attempt.
///
- UINT64 TxRetryFrames;
+ UINT64 TxRetryFrames;
} EFI_NETWORK_STATISTICS;
///
@@ -162,97 +155,98 @@
#define EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS 0x08
#define EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS_MULTICAST 0x10
-#define EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT 0x01
-#define EFI_SIMPLE_NETWORK_TRANSMIT_INTERRUPT 0x02
-#define EFI_SIMPLE_NETWORK_COMMAND_INTERRUPT 0x04
-#define EFI_SIMPLE_NETWORK_SOFTWARE_INTERRUPT 0x08
+#define EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT 0x01
+#define EFI_SIMPLE_NETWORK_TRANSMIT_INTERRUPT 0x02
+#define EFI_SIMPLE_NETWORK_COMMAND_INTERRUPT 0x04
+#define EFI_SIMPLE_NETWORK_SOFTWARE_INTERRUPT 0x08
-#define MAX_MCAST_FILTER_CNT 16
+#define MAX_MCAST_FILTER_CNT 16
typedef struct {
///
/// Reports the current state of the network interface.
///
- UINT32 State;
+ UINT32 State;
///
/// The size, in bytes, of the network interface's HW address.
///
- UINT32 HwAddressSize;
+ UINT32 HwAddressSize;
///
/// The size, in bytes, of the network interface's media header.
///
- UINT32 MediaHeaderSize;
+ UINT32 MediaHeaderSize;
///
/// The maximum size, in bytes, of the packets supported by the network interface.
///
- UINT32 MaxPacketSize;
+ UINT32 MaxPacketSize;
///
/// The size, in bytes, of the NVRAM device attached to the network interface.
///
- UINT32 NvRamSize;
+ UINT32 NvRamSize;
///
/// The size that must be used for all NVRAM reads and writes. The
/// start address for NVRAM read and write operations and the total
/// length of those operations, must be a multiple of this value. The
/// legal values for this field are 0, 1, 2, 4, and 8.
///
- UINT32 NvRamAccessSize;
+ UINT32 NvRamAccessSize;
///
/// The multicast receive filter settings supported by the network interface.
///
- UINT32 ReceiveFilterMask;
+ UINT32 ReceiveFilterMask;
///
/// The current multicast receive filter settings.
///
- UINT32 ReceiveFilterSetting;
+ UINT32 ReceiveFilterSetting;
///
/// The maximum number of multicast address receive filters supported by the driver.
///
- UINT32 MaxMCastFilterCount;
+ UINT32 MaxMCastFilterCount;
///
/// The current number of multicast address receive filters.
///
- UINT32 MCastFilterCount;
+ UINT32 MCastFilterCount;
///
/// Array containing the addresses of the current multicast address receive filters.
///
- EFI_MAC_ADDRESS MCastFilter[MAX_MCAST_FILTER_CNT];
+ EFI_MAC_ADDRESS MCastFilter[MAX_MCAST_FILTER_CNT];
///
/// The current HW MAC address for the network interface.
///
- EFI_MAC_ADDRESS CurrentAddress;
+ EFI_MAC_ADDRESS CurrentAddress;
///
/// The current HW MAC address for broadcast packets.
///
- EFI_MAC_ADDRESS BroadcastAddress;
+ EFI_MAC_ADDRESS BroadcastAddress;
///
/// The permanent HW MAC address for the network interface.
///
- EFI_MAC_ADDRESS PermanentAddress;
+ EFI_MAC_ADDRESS PermanentAddress;
///
/// The interface type of the network interface.
///
- UINT8 IfType;
+ UINT8 IfType;
///
/// TRUE if the HW MAC address can be changed.
///
- BOOLEAN MacAddressChangeable;
+ BOOLEAN MacAddressChangeable;
///
/// TRUE if the network interface can transmit more than one packet at a time.
///
- BOOLEAN MultipleTxSupported;
+ BOOLEAN MultipleTxSupported;
///
/// TRUE if the presence of media can be determined; otherwise FALSE.
///
- BOOLEAN MediaPresentSupported;
+ BOOLEAN MediaPresentSupported;
///
/// TRUE if media are connected to the network interface; otherwise FALSE.
///
- BOOLEAN MediaPresent;
+ BOOLEAN MediaPresent;
} EFI_SIMPLE_NETWORK_MODE;
//
// Protocol Member Functions
//
+
/**
Changes the state of a network interface from "stopped" to "started".
@@ -640,7 +634,7 @@
//
// Revision defined in EFI1.1
//
-#define EFI_SIMPLE_NETWORK_INTERFACE_REVISION EFI_SIMPLE_NETWORK_PROTOCOL_REVISION
+#define EFI_SIMPLE_NETWORK_INTERFACE_REVISION EFI_SIMPLE_NETWORK_PROTOCOL_REVISION
///
/// The EFI_SIMPLE_NETWORK_PROTOCOL protocol is used to initialize access
@@ -654,30 +648,30 @@
/// be backwards compatible. If a future version is not backwards compatible
/// it is not the same GUID.
///
- UINT64 Revision;
- EFI_SIMPLE_NETWORK_START Start;
- EFI_SIMPLE_NETWORK_STOP Stop;
- EFI_SIMPLE_NETWORK_INITIALIZE Initialize;
- EFI_SIMPLE_NETWORK_RESET Reset;
- EFI_SIMPLE_NETWORK_SHUTDOWN Shutdown;
- EFI_SIMPLE_NETWORK_RECEIVE_FILTERS ReceiveFilters;
- EFI_SIMPLE_NETWORK_STATION_ADDRESS StationAddress;
- EFI_SIMPLE_NETWORK_STATISTICS Statistics;
- EFI_SIMPLE_NETWORK_MCAST_IP_TO_MAC MCastIpToMac;
- EFI_SIMPLE_NETWORK_NVDATA NvData;
- EFI_SIMPLE_NETWORK_GET_STATUS GetStatus;
- EFI_SIMPLE_NETWORK_TRANSMIT Transmit;
- EFI_SIMPLE_NETWORK_RECEIVE Receive;
+ UINT64 Revision;
+ EFI_SIMPLE_NETWORK_START Start;
+ EFI_SIMPLE_NETWORK_STOP Stop;
+ EFI_SIMPLE_NETWORK_INITIALIZE Initialize;
+ EFI_SIMPLE_NETWORK_RESET Reset;
+ EFI_SIMPLE_NETWORK_SHUTDOWN Shutdown;
+ EFI_SIMPLE_NETWORK_RECEIVE_FILTERS ReceiveFilters;
+ EFI_SIMPLE_NETWORK_STATION_ADDRESS StationAddress;
+ EFI_SIMPLE_NETWORK_STATISTICS Statistics;
+ EFI_SIMPLE_NETWORK_MCAST_IP_TO_MAC MCastIpToMac;
+ EFI_SIMPLE_NETWORK_NVDATA NvData;
+ EFI_SIMPLE_NETWORK_GET_STATUS GetStatus;
+ EFI_SIMPLE_NETWORK_TRANSMIT Transmit;
+ EFI_SIMPLE_NETWORK_RECEIVE Receive;
///
/// Event used with WaitForEvent() to wait for a packet to be received.
///
- EFI_EVENT WaitForPacket;
+ EFI_EVENT WaitForPacket;
///
/// Pointer to the EFI_SIMPLE_NETWORK_MODE data for the device.
///
- EFI_SIMPLE_NETWORK_MODE *Mode;
+ EFI_SIMPLE_NETWORK_MODE *Mode;
};
-extern EFI_GUID gEfiSimpleNetworkProtocolGuid;
+extern EFI_GUID gEfiSimpleNetworkProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/SimplePointer.h b/src/include/ipxe/efi/Protocol/SimplePointer.h
index 3b1e305..45ddf8d 100644
--- a/src/include/ipxe/efi/Protocol/SimplePointer.h
+++ b/src/include/ipxe/efi/Protocol/SimplePointer.h
@@ -3,28 +3,22 @@
Abstraction of a very simple pointer device like a mouse or trackball.
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __SIMPLE_POINTER_H__
#define __SIMPLE_POINTER_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_SIMPLE_POINTER_PROTOCOL_GUID \
{ \
0x31878c87, 0xb75, 0x11d5, {0x9a, 0x4f, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
}
-typedef struct _EFI_SIMPLE_POINTER_PROTOCOL EFI_SIMPLE_POINTER_PROTOCOL;
+typedef struct _EFI_SIMPLE_POINTER_PROTOCOL EFI_SIMPLE_POINTER_PROTOCOL;
//
// Data structures
@@ -33,25 +27,25 @@
///
/// The signed distance in counts that the pointer device has been moved along the x-axis.
///
- INT32 RelativeMovementX;
+ INT32 RelativeMovementX;
///
/// The signed distance in counts that the pointer device has been moved along the y-axis.
///
- INT32 RelativeMovementY;
+ INT32 RelativeMovementY;
///
/// The signed distance in counts that the pointer device has been moved along the z-axis.
///
- INT32 RelativeMovementZ;
+ INT32 RelativeMovementZ;
///
/// If TRUE, then the left button of the pointer device is being
/// pressed. If FALSE, then the left button of the pointer device is not being pressed.
///
- BOOLEAN LeftButton;
+ BOOLEAN LeftButton;
///
/// If TRUE, then the right button of the pointer device is being
/// pressed. If FALSE, then the right button of the pointer device is not being pressed.
///
- BOOLEAN RightButton;
+ BOOLEAN RightButton;
} EFI_SIMPLE_POINTER_STATE;
typedef struct {
@@ -59,25 +53,25 @@
/// The resolution of the pointer device on the x-axis in counts/mm.
/// If 0, then the pointer device does not support an x-axis.
///
- UINT64 ResolutionX;
+ UINT64 ResolutionX;
///
/// The resolution of the pointer device on the y-axis in counts/mm.
/// If 0, then the pointer device does not support an x-axis.
///
- UINT64 ResolutionY;
+ UINT64 ResolutionY;
///
/// The resolution of the pointer device on the z-axis in counts/mm.
/// If 0, then the pointer device does not support an x-axis.
///
- UINT64 ResolutionZ;
+ UINT64 ResolutionZ;
///
/// TRUE if a left button is present on the pointer device. Otherwise FALSE.
///
- BOOLEAN LeftButton;
+ BOOLEAN LeftButton;
///
/// TRUE if a right button is present on the pointer device. Otherwise FALSE.
///
- BOOLEAN RightButton;
+ BOOLEAN RightButton;
} EFI_SIMPLE_POINTER_MODE;
/**
@@ -117,7 +111,7 @@
EFI_STATUS
(EFIAPI *EFI_SIMPLE_POINTER_GET_STATE)(
IN EFI_SIMPLE_POINTER_PROTOCOL *This,
- IN OUT EFI_SIMPLE_POINTER_STATE *State
+ OUT EFI_SIMPLE_POINTER_STATE *State
);
///
@@ -128,18 +122,18 @@
/// retrieve the capabilities of the pointer device.
///
struct _EFI_SIMPLE_POINTER_PROTOCOL {
- EFI_SIMPLE_POINTER_RESET Reset;
- EFI_SIMPLE_POINTER_GET_STATE GetState;
+ EFI_SIMPLE_POINTER_RESET Reset;
+ EFI_SIMPLE_POINTER_GET_STATE GetState;
///
/// Event to use with WaitForEvent() to wait for input from the pointer device.
///
- EFI_EVENT WaitForInput;
+ EFI_EVENT WaitForInput;
///
/// Pointer to EFI_SIMPLE_POINTER_MODE data.
///
- EFI_SIMPLE_POINTER_MODE *Mode;
+ EFI_SIMPLE_POINTER_MODE *Mode;
};
-extern EFI_GUID gEfiSimplePointerProtocolGuid;
+extern EFI_GUID gEfiSimplePointerProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/SimpleTextIn.h b/src/include/ipxe/efi/Protocol/SimpleTextIn.h
index e6d0eb2..11daeb5 100644
--- a/src/include/ipxe/efi/Protocol/SimpleTextIn.h
+++ b/src/include/ipxe/efi/Protocol/SimpleTextIn.h
@@ -5,44 +5,38 @@
terminal.
Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __SIMPLE_TEXT_IN_PROTOCOL_H__
#define __SIMPLE_TEXT_IN_PROTOCOL_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_SIMPLE_TEXT_INPUT_PROTOCOL_GUID \
{ \
0x387477c1, 0x69c7, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \
}
-typedef struct _EFI_SIMPLE_TEXT_INPUT_PROTOCOL EFI_SIMPLE_TEXT_INPUT_PROTOCOL;
+typedef struct _EFI_SIMPLE_TEXT_INPUT_PROTOCOL EFI_SIMPLE_TEXT_INPUT_PROTOCOL;
///
/// Protocol GUID name defined in EFI1.1.
///
-#define SIMPLE_INPUT_PROTOCOL EFI_SIMPLE_TEXT_INPUT_PROTOCOL_GUID
+#define SIMPLE_INPUT_PROTOCOL EFI_SIMPLE_TEXT_INPUT_PROTOCOL_GUID
///
/// Protocol name in EFI1.1 for backward-compatible.
///
-typedef struct _EFI_SIMPLE_TEXT_INPUT_PROTOCOL SIMPLE_INPUT_INTERFACE;
+typedef struct _EFI_SIMPLE_TEXT_INPUT_PROTOCOL SIMPLE_INPUT_INTERFACE;
///
/// The keystroke information for the key that was pressed.
///
typedef struct {
- UINT16 ScanCode;
- CHAR16 UnicodeChar;
+ UINT16 ScanCode;
+ CHAR16 UnicodeChar;
} EFI_INPUT_KEY;
//
@@ -122,14 +116,14 @@
/// It is the minimum required protocol for ConsoleIn.
///
struct _EFI_SIMPLE_TEXT_INPUT_PROTOCOL {
- EFI_INPUT_RESET Reset;
- EFI_INPUT_READ_KEY ReadKeyStroke;
+ EFI_INPUT_RESET Reset;
+ EFI_INPUT_READ_KEY ReadKeyStroke;
///
/// Event to use with WaitForEvent() to wait for a key to be available
///
- EFI_EVENT WaitForKey;
+ EFI_EVENT WaitForKey;
};
-extern EFI_GUID gEfiSimpleTextInProtocolGuid;
+extern EFI_GUID gEfiSimpleTextInProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/SimpleTextInEx.h b/src/include/ipxe/efi/Protocol/SimpleTextInEx.h
index 9a9f5ab..9a93da5 100644
--- a/src/include/ipxe/efi/Protocol/SimpleTextInEx.h
+++ b/src/include/ipxe/efi/Protocol/SimpleTextInEx.h
@@ -5,28 +5,21 @@
which exposes much more state and modifier information from the input device,
also allows one to register a notification for a particular keystroke.
- Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __SIMPLE_TEXT_IN_EX_H__
#define __SIMPLE_TEXT_IN_EX_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/Protocol/SimpleTextIn.h>
#define EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL_GUID \
{0xdd9e7534, 0x7762, 0x4698, { 0x8c, 0x14, 0xf5, 0x85, 0x17, 0xa6, 0x25, 0xaa } }
-
typedef struct _EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL;
/**
@@ -59,8 +52,7 @@
(EFIAPI *EFI_INPUT_RESET_EX)(
IN EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *This,
IN BOOLEAN ExtendedVerification
-);
-
+ );
///
/// EFI_KEY_TOGGLE_STATE. The toggle states are defined.
@@ -76,25 +68,25 @@
/// returned value is valid only if the high
/// order bit has been set.
///
- UINT32 KeyShiftState;
+ UINT32 KeyShiftState;
///
/// Reflects the current internal state of
/// various toggled attributes. The returned
/// value is valid only if the high order
/// bit has been set.
///
- EFI_KEY_TOGGLE_STATE KeyToggleState;
+ EFI_KEY_TOGGLE_STATE KeyToggleState;
} EFI_KEY_STATE;
typedef struct {
///
/// The EFI scan code and Unicode value returned from the input device.
///
- EFI_INPUT_KEY Key;
+ EFI_INPUT_KEY Key;
///
/// The current state of various toggled attributes as well as input modifier values.
///
- EFI_KEY_STATE KeyState;
+ EFI_KEY_STATE KeyState;
} EFI_KEY_DATA;
//
@@ -103,55 +95,55 @@
//
// Shift state
//
-#define EFI_SHIFT_STATE_VALID 0x80000000
-#define EFI_RIGHT_SHIFT_PRESSED 0x00000001
-#define EFI_LEFT_SHIFT_PRESSED 0x00000002
-#define EFI_RIGHT_CONTROL_PRESSED 0x00000004
-#define EFI_LEFT_CONTROL_PRESSED 0x00000008
-#define EFI_RIGHT_ALT_PRESSED 0x00000010
-#define EFI_LEFT_ALT_PRESSED 0x00000020
-#define EFI_RIGHT_LOGO_PRESSED 0x00000040
-#define EFI_LEFT_LOGO_PRESSED 0x00000080
-#define EFI_MENU_KEY_PRESSED 0x00000100
-#define EFI_SYS_REQ_PRESSED 0x00000200
+#define EFI_SHIFT_STATE_VALID 0x80000000
+#define EFI_RIGHT_SHIFT_PRESSED 0x00000001
+#define EFI_LEFT_SHIFT_PRESSED 0x00000002
+#define EFI_RIGHT_CONTROL_PRESSED 0x00000004
+#define EFI_LEFT_CONTROL_PRESSED 0x00000008
+#define EFI_RIGHT_ALT_PRESSED 0x00000010
+#define EFI_LEFT_ALT_PRESSED 0x00000020
+#define EFI_RIGHT_LOGO_PRESSED 0x00000040
+#define EFI_LEFT_LOGO_PRESSED 0x00000080
+#define EFI_MENU_KEY_PRESSED 0x00000100
+#define EFI_SYS_REQ_PRESSED 0x00000200
//
// Toggle state
//
-#define EFI_TOGGLE_STATE_VALID 0x80
-#define EFI_KEY_STATE_EXPOSED 0x40
-#define EFI_SCROLL_LOCK_ACTIVE 0x01
-#define EFI_NUM_LOCK_ACTIVE 0x02
-#define EFI_CAPS_LOCK_ACTIVE 0x04
+#define EFI_TOGGLE_STATE_VALID 0x80
+#define EFI_KEY_STATE_EXPOSED 0x40
+#define EFI_SCROLL_LOCK_ACTIVE 0x01
+#define EFI_NUM_LOCK_ACTIVE 0x02
+#define EFI_CAPS_LOCK_ACTIVE 0x04
//
// EFI Scan codes
//
-#define SCAN_F11 0x0015
-#define SCAN_F12 0x0016
-#define SCAN_PAUSE 0x0048
-#define SCAN_F13 0x0068
-#define SCAN_F14 0x0069
-#define SCAN_F15 0x006A
-#define SCAN_F16 0x006B
-#define SCAN_F17 0x006C
-#define SCAN_F18 0x006D
-#define SCAN_F19 0x006E
-#define SCAN_F20 0x006F
-#define SCAN_F21 0x0070
-#define SCAN_F22 0x0071
-#define SCAN_F23 0x0072
-#define SCAN_F24 0x0073
-#define SCAN_MUTE 0x007F
-#define SCAN_VOLUME_UP 0x0080
-#define SCAN_VOLUME_DOWN 0x0081
-#define SCAN_BRIGHTNESS_UP 0x0100
-#define SCAN_BRIGHTNESS_DOWN 0x0101
-#define SCAN_SUSPEND 0x0102
-#define SCAN_HIBERNATE 0x0103
-#define SCAN_TOGGLE_DISPLAY 0x0104
-#define SCAN_RECOVERY 0x0105
-#define SCAN_EJECT 0x0106
+#define SCAN_F11 0x0015
+#define SCAN_F12 0x0016
+#define SCAN_PAUSE 0x0048
+#define SCAN_F13 0x0068
+#define SCAN_F14 0x0069
+#define SCAN_F15 0x006A
+#define SCAN_F16 0x006B
+#define SCAN_F17 0x006C
+#define SCAN_F18 0x006D
+#define SCAN_F19 0x006E
+#define SCAN_F20 0x006F
+#define SCAN_F21 0x0070
+#define SCAN_F22 0x0071
+#define SCAN_F23 0x0072
+#define SCAN_F24 0x0073
+#define SCAN_MUTE 0x007F
+#define SCAN_VOLUME_UP 0x0080
+#define SCAN_VOLUME_DOWN 0x0081
+#define SCAN_BRIGHTNESS_UP 0x0100
+#define SCAN_BRIGHTNESS_DOWN 0x0101
+#define SCAN_SUSPEND 0x0102
+#define SCAN_HIBERNATE 0x0103
+#define SCAN_TOGGLE_DISPLAY 0x0104
+#define SCAN_RECOVERY 0x0105
+#define SCAN_EJECT 0x0106
/**
The function reads the next keystroke from the input device. If
@@ -192,13 +184,10 @@
pressed.
- @retval EFI_SUCCESS The keystroke information was
- returned.
-
- @retval EFI_NOT_READY There was no keystroke data available.
- EFI_DEVICE_ERROR The keystroke
- information was not returned due to
- hardware errors.
+ @retval EFI_SUCCESS The keystroke information was returned.
+ @retval EFI_NOT_READY There was no keystroke data available.
+ @retval EFI_DEVICE_ERROR The keystroke information was not returned due to
+ hardware errors.
**/
@@ -207,7 +196,7 @@
(EFIAPI *EFI_INPUT_READ_KEY_EX)(
IN EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *This,
OUT EFI_KEY_DATA *KeyData
-);
+ );
/**
The SetState() function allows the input device hardware to
@@ -234,7 +223,7 @@
(EFIAPI *EFI_SET_STATE)(
IN EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *This,
IN EFI_KEY_TOGGLE_STATE *KeyToggleState
-);
+ );
///
/// The function will be called when the key sequence is typed specified by KeyData.
@@ -243,7 +232,7 @@
EFI_STATUS
(EFIAPI *EFI_KEY_NOTIFY_FUNCTION)(
IN EFI_KEY_DATA *KeyData
-);
+ );
/**
The RegisterKeystrokeNotify() function registers a function
@@ -253,18 +242,19 @@
@param KeyData A pointer to a buffer that is filled in with
the keystroke information for the key that was
- pressed.
+ pressed. If KeyData.Key, KeyData.KeyState.KeyToggleState
+ and KeyData.KeyState.KeyShiftState are 0, then any incomplete
+ keystroke will trigger a notification of the KeyNotificationFunction.
- @param KeyNotificationFunction Points to the function to be
- called when the key sequence
- is typed specified by KeyData.
+ @param KeyNotificationFunction Points to the function to be called when the key sequence
+ is typed specified by KeyData. This notification function
+ should be called at <=TPL_CALLBACK.
@param NotifyHandle Points to the unique handle assigned to
the registered notification.
- @retval EFI_SUCCESS The device state was set
- appropriately.
+ @retval EFI_SUCCESS Key notify was registered successfully.
@retval EFI_OUT_OF_RESOURCES Unable to allocate necessary
data structures.
@@ -277,7 +267,7 @@
IN EFI_KEY_DATA *KeyData,
IN EFI_KEY_NOTIFY_FUNCTION KeyNotificationFunction,
OUT VOID **NotifyHandle
-);
+ );
/**
The UnregisterKeystrokeNotify() function removes the
@@ -288,7 +278,7 @@
@param NotificationHandle The handle of the notification
function being unregistered.
- @retval EFI_SUCCESS The device state was set appropriately.
+ @retval EFI_SUCCESS Key notify was unregistered successfully.
@retval EFI_INVALID_PARAMETER The NotificationHandle is
invalid.
@@ -299,8 +289,7 @@
(EFIAPI *EFI_UNREGISTER_KEYSTROKE_NOTIFY)(
IN EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *This,
IN VOID *NotificationHandle
-);
-
+ );
///
/// The EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL is used on the ConsoleIn
@@ -308,20 +297,18 @@
/// which allows a variety of extended shift state information to be
/// returned.
///
-struct _EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL{
- EFI_INPUT_RESET_EX Reset;
- EFI_INPUT_READ_KEY_EX ReadKeyStrokeEx;
+struct _EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL {
+ EFI_INPUT_RESET_EX Reset;
+ EFI_INPUT_READ_KEY_EX ReadKeyStrokeEx;
///
/// Event to use with WaitForEvent() to wait for a key to be available.
///
- EFI_EVENT WaitForKeyEx;
- EFI_SET_STATE SetState;
- EFI_REGISTER_KEYSTROKE_NOTIFY RegisterKeyNotify;
- EFI_UNREGISTER_KEYSTROKE_NOTIFY UnregisterKeyNotify;
+ EFI_EVENT WaitForKeyEx;
+ EFI_SET_STATE SetState;
+ EFI_REGISTER_KEYSTROKE_NOTIFY RegisterKeyNotify;
+ EFI_UNREGISTER_KEYSTROKE_NOTIFY UnregisterKeyNotify;
};
-
-extern EFI_GUID gEfiSimpleTextInputExProtocolGuid;
+extern EFI_GUID gEfiSimpleTextInputExProtocolGuid;
#endif
-
diff --git a/src/include/ipxe/efi/Protocol/SimpleTextOut.h b/src/include/ipxe/efi/Protocol/SimpleTextOut.h
index 54d38b3..8240188 100644
--- a/src/include/ipxe/efi/Protocol/SimpleTextOut.h
+++ b/src/include/ipxe/efi/Protocol/SimpleTextOut.h
@@ -6,21 +6,15 @@
a single hardware device or a virtual device that is an aggregation
of multiple physical devices.
-Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __SIMPLE_TEXT_OUT_H__
#define __SIMPLE_TEXT_OUT_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL_GUID \
{ \
@@ -30,17 +24,17 @@
///
/// Protocol GUID defined in EFI1.1.
///
-#define SIMPLE_TEXT_OUTPUT_PROTOCOL EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL_GUID
+#define SIMPLE_TEXT_OUTPUT_PROTOCOL EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL_GUID
typedef struct _EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL;
///
/// Backward-compatible with EFI1.1.
///
-typedef EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL SIMPLE_TEXT_OUTPUT_INTERFACE;
+typedef EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL SIMPLE_TEXT_OUTPUT_INTERFACE;
//
-// Define's for required EFI Unicode Box Draw characters
+// Defines for required EFI Unicode Box Draw characters
//
#define BOXDRAW_HORIZONTAL 0x2500
#define BOXDRAW_VERTICAL 0x2502
@@ -92,39 +86,39 @@
//
// EFI Required Geometric Shapes Code Chart
//
-#define GEOMETRICSHAPE_UP_TRIANGLE 0x25b2
-#define GEOMETRICSHAPE_RIGHT_TRIANGLE 0x25ba
-#define GEOMETRICSHAPE_DOWN_TRIANGLE 0x25bc
-#define GEOMETRICSHAPE_LEFT_TRIANGLE 0x25c4
+#define GEOMETRICSHAPE_UP_TRIANGLE 0x25b2
+#define GEOMETRICSHAPE_RIGHT_TRIANGLE 0x25ba
+#define GEOMETRICSHAPE_DOWN_TRIANGLE 0x25bc
+#define GEOMETRICSHAPE_LEFT_TRIANGLE 0x25c4
//
// EFI Required Arrow shapes
//
-#define ARROW_LEFT 0x2190
-#define ARROW_UP 0x2191
-#define ARROW_RIGHT 0x2192
-#define ARROW_DOWN 0x2193
+#define ARROW_LEFT 0x2190
+#define ARROW_UP 0x2191
+#define ARROW_RIGHT 0x2192
+#define ARROW_DOWN 0x2193
//
// EFI Console Colours
//
-#define EFI_BLACK 0x00
-#define EFI_BLUE 0x01
-#define EFI_GREEN 0x02
-#define EFI_CYAN (EFI_BLUE | EFI_GREEN)
-#define EFI_RED 0x04
-#define EFI_MAGENTA (EFI_BLUE | EFI_RED)
-#define EFI_BROWN (EFI_GREEN | EFI_RED)
-#define EFI_LIGHTGRAY (EFI_BLUE | EFI_GREEN | EFI_RED)
-#define EFI_BRIGHT 0x08
-#define EFI_DARKGRAY (EFI_BLACK | EFI_BRIGHT)
-#define EFI_LIGHTBLUE (EFI_BLUE | EFI_BRIGHT)
-#define EFI_LIGHTGREEN (EFI_GREEN | EFI_BRIGHT)
-#define EFI_LIGHTCYAN (EFI_CYAN | EFI_BRIGHT)
-#define EFI_LIGHTRED (EFI_RED | EFI_BRIGHT)
-#define EFI_LIGHTMAGENTA (EFI_MAGENTA | EFI_BRIGHT)
-#define EFI_YELLOW (EFI_BROWN | EFI_BRIGHT)
-#define EFI_WHITE (EFI_BLUE | EFI_GREEN | EFI_RED | EFI_BRIGHT)
+#define EFI_BLACK 0x00
+#define EFI_BLUE 0x01
+#define EFI_GREEN 0x02
+#define EFI_CYAN (EFI_BLUE | EFI_GREEN)
+#define EFI_RED 0x04
+#define EFI_MAGENTA (EFI_BLUE | EFI_RED)
+#define EFI_BROWN (EFI_GREEN | EFI_RED)
+#define EFI_LIGHTGRAY (EFI_BLUE | EFI_GREEN | EFI_RED)
+#define EFI_BRIGHT 0x08
+#define EFI_DARKGRAY (EFI_BLACK | EFI_BRIGHT)
+#define EFI_LIGHTBLUE (EFI_BLUE | EFI_BRIGHT)
+#define EFI_LIGHTGREEN (EFI_GREEN | EFI_BRIGHT)
+#define EFI_LIGHTCYAN (EFI_CYAN | EFI_BRIGHT)
+#define EFI_LIGHTRED (EFI_RED | EFI_BRIGHT)
+#define EFI_LIGHTMAGENTA (EFI_MAGENTA | EFI_BRIGHT)
+#define EFI_YELLOW (EFI_BROWN | EFI_BRIGHT)
+#define EFI_WHITE (EFI_BLUE | EFI_GREEN | EFI_RED | EFI_BRIGHT)
//
// Macro to accept color values in their raw form to create
@@ -137,7 +131,7 @@
//
// Do not use EFI_BACKGROUND_xxx values with this macro.
//
-#define EFI_TEXT_ATTR(Foreground,Background) ((Foreground) | ((Background) << 4))
+#define EFI_TEXT_ATTR(Foreground, Background) ((Foreground) | ((Background) << 4))
#define EFI_BACKGROUND_BLACK 0x00
#define EFI_BACKGROUND_BLUE 0x10
@@ -159,7 +153,7 @@
#define EFI_WIDE_ATTRIBUTE 0x80
/**
- Reset the text output device hardware and optionaly run diagnostics
+ Reset the text output device hardware and optionally run diagnostics
@param This The protocol instance pointer.
@param ExtendedVerification Driver may perform more exhaustive verification
@@ -358,7 +352,7 @@
///
/// The number of modes supported by QueryMode () and SetMode ().
///
- INT32 MaxMode;
+ INT32 MaxMode;
//
// current settings
@@ -367,23 +361,23 @@
///
/// The text mode of the output device(s).
///
- INT32 Mode;
+ INT32 Mode;
///
/// The current character output attribute.
///
- INT32 Attribute;
+ INT32 Attribute;
///
/// The cursor's column.
///
- INT32 CursorColumn;
+ INT32 CursorColumn;
///
/// The cursor's row.
///
- INT32 CursorRow;
+ INT32 CursorRow;
///
- /// The cursor is currently visbile or not.
+ /// The cursor is currently visible or not.
///
- BOOLEAN CursorVisible;
+ BOOLEAN CursorVisible;
} EFI_SIMPLE_TEXT_OUTPUT_MODE;
///
@@ -393,25 +387,25 @@
/// devices is at least 80 x 25 characters.
///
struct _EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL {
- EFI_TEXT_RESET Reset;
+ EFI_TEXT_RESET Reset;
- EFI_TEXT_STRING OutputString;
- EFI_TEXT_TEST_STRING TestString;
+ EFI_TEXT_STRING OutputString;
+ EFI_TEXT_TEST_STRING TestString;
- EFI_TEXT_QUERY_MODE QueryMode;
- EFI_TEXT_SET_MODE SetMode;
- EFI_TEXT_SET_ATTRIBUTE SetAttribute;
+ EFI_TEXT_QUERY_MODE QueryMode;
+ EFI_TEXT_SET_MODE SetMode;
+ EFI_TEXT_SET_ATTRIBUTE SetAttribute;
- EFI_TEXT_CLEAR_SCREEN ClearScreen;
- EFI_TEXT_SET_CURSOR_POSITION SetCursorPosition;
- EFI_TEXT_ENABLE_CURSOR EnableCursor;
+ EFI_TEXT_CLEAR_SCREEN ClearScreen;
+ EFI_TEXT_SET_CURSOR_POSITION SetCursorPosition;
+ EFI_TEXT_ENABLE_CURSOR EnableCursor;
///
/// Pointer to SIMPLE_TEXT_OUTPUT_MODE data.
///
- EFI_SIMPLE_TEXT_OUTPUT_MODE *Mode;
+ EFI_SIMPLE_TEXT_OUTPUT_MODE *Mode;
};
-extern EFI_GUID gEfiSimpleTextOutProtocolGuid;
+extern EFI_GUID gEfiSimpleTextOutProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/TcgService.h b/src/include/ipxe/efi/Protocol/TcgService.h
index 86c69a8..d225ae8 100644
--- a/src/include/ipxe/efi/Protocol/TcgService.h
+++ b/src/include/ipxe/efi/Protocol/TcgService.h
@@ -2,21 +2,15 @@
TCG Service Protocol as defined in TCG_EFI_Protocol_1_22_Final
See http://trustedcomputinggroup.org for the latest specification
-Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _TCG_SERVICE_PROTOCOL_H_
#define _TCG_SERVICE_PROTOCOL_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/IndustryStandard/UefiTcgPlatform.h>
@@ -26,10 +20,10 @@
typedef struct _EFI_TCG_PROTOCOL EFI_TCG_PROTOCOL;
typedef struct {
- UINT8 Major;
- UINT8 Minor;
- UINT8 RevMajor;
- UINT8 RevMinor;
+ UINT8 Major;
+ UINT8 Minor;
+ UINT8 RevMajor;
+ UINT8 RevMinor;
} TCG_VERSION;
typedef struct _TCG_EFI_BOOT_SERVICE_CAPABILITY {
@@ -42,7 +36,7 @@
BOOLEAN TPMDeactivatedFlag; /// 01h = TPM currently deactivated.
} TCG_EFI_BOOT_SERVICE_CAPABILITY;
-typedef UINT32 TCG_ALGORITHM_ID;
+typedef UINT32 TCG_ALGORITHM_ID;
/**
This service provides EFI protocol capability information, state information
@@ -70,7 +64,7 @@
(EFIAPI *EFI_TCG_STATUS_CHECK)(
IN EFI_TCG_PROTOCOL *This,
OUT TCG_EFI_BOOT_SERVICE_CAPABILITY
- *ProtocolCapability,
+ *ProtocolCapability,
OUT UINT32 *TCGFeatureFlags,
OUT EFI_PHYSICAL_ADDRESS *EventLogLocation,
OUT EFI_PHYSICAL_ADDRESS *EventLogLastEntry
@@ -184,20 +178,20 @@
IN TCG_ALGORITHM_ID AlgorithmId,
IN OUT TCG_PCR_EVENT *TCGLogData,
IN OUT UINT32 *EventNumber,
- OUT EFI_PHYSICAL_ADDRESS *EventLogLastEntry
+ OUT EFI_PHYSICAL_ADDRESS *EventLogLastEntry
);
///
/// The EFI_TCG Protocol abstracts TCG activity.
///
struct _EFI_TCG_PROTOCOL {
- EFI_TCG_STATUS_CHECK StatusCheck;
- EFI_TCG_HASH_ALL HashAll;
- EFI_TCG_LOG_EVENT LogEvent;
- EFI_TCG_PASS_THROUGH_TO_TPM PassThroughToTpm;
- EFI_TCG_HASH_LOG_EXTEND_EVENT HashLogExtendEvent;
+ EFI_TCG_STATUS_CHECK StatusCheck;
+ EFI_TCG_HASH_ALL HashAll;
+ EFI_TCG_LOG_EVENT LogEvent;
+ EFI_TCG_PASS_THROUGH_TO_TPM PassThroughToTpm;
+ EFI_TCG_HASH_LOG_EXTEND_EVENT HashLogExtendEvent;
};
-extern EFI_GUID gEfiTcgProtocolGuid;
+extern EFI_GUID gEfiTcgProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/Tcp4.h b/src/include/ipxe/efi/Protocol/Tcp4.h
index 1771bc5..249f1fe 100644
--- a/src/include/ipxe/efi/Protocol/Tcp4.h
+++ b/src/include/ipxe/efi/Protocol/Tcp4.h
@@ -4,14 +4,8 @@
and destroy child of the driver to communicate with other host using TCP protocol.
The EFI TCPv4 Protocol provides services to send and receive data stream.
-Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
This Protocol is introduced in UEFI Specification 2.0.
@@ -21,7 +15,7 @@
#ifndef __EFI_TCP4_PROTOCOL_H__
#define __EFI_TCP4_PROTOCOL_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/Protocol/Ip4.h>
@@ -42,11 +36,11 @@
/// The definition in here is only present to provide backwards compatability.
///
typedef struct {
- EFI_HANDLE InstanceHandle;
- EFI_IPv4_ADDRESS LocalAddress;
- UINT16 LocalPort;
- EFI_IPv4_ADDRESS RemoteAddress;
- UINT16 RemotePort;
+ EFI_HANDLE InstanceHandle;
+ EFI_IPv4_ADDRESS LocalAddress;
+ UINT16 LocalPort;
+ EFI_IPv4_ADDRESS RemoteAddress;
+ UINT16 RemotePort;
} EFI_TCP4_SERVICE_POINT;
///
@@ -54,77 +48,77 @@
/// The definition in here is only present to provide backwards compatability.
///
typedef struct {
- EFI_HANDLE DriverHandle;
- UINT32 ServiceCount;
- EFI_TCP4_SERVICE_POINT Services[1];
+ EFI_HANDLE DriverHandle;
+ UINT32 ServiceCount;
+ EFI_TCP4_SERVICE_POINT Services[1];
} EFI_TCP4_VARIABLE_DATA;
typedef struct {
- BOOLEAN UseDefaultAddress;
- EFI_IPv4_ADDRESS StationAddress;
- EFI_IPv4_ADDRESS SubnetMask;
- UINT16 StationPort;
- EFI_IPv4_ADDRESS RemoteAddress;
- UINT16 RemotePort;
- BOOLEAN ActiveFlag;
+ BOOLEAN UseDefaultAddress;
+ EFI_IPv4_ADDRESS StationAddress;
+ EFI_IPv4_ADDRESS SubnetMask;
+ UINT16 StationPort;
+ EFI_IPv4_ADDRESS RemoteAddress;
+ UINT16 RemotePort;
+ BOOLEAN ActiveFlag;
} EFI_TCP4_ACCESS_POINT;
typedef struct {
- UINT32 ReceiveBufferSize;
- UINT32 SendBufferSize;
- UINT32 MaxSynBackLog;
- UINT32 ConnectionTimeout;
- UINT32 DataRetries;
- UINT32 FinTimeout;
- UINT32 TimeWaitTimeout;
- UINT32 KeepAliveProbes;
- UINT32 KeepAliveTime;
- UINT32 KeepAliveInterval;
- BOOLEAN EnableNagle;
- BOOLEAN EnableTimeStamp;
- BOOLEAN EnableWindowScaling;
- BOOLEAN EnableSelectiveAck;
- BOOLEAN EnablePathMtuDiscovery;
+ UINT32 ReceiveBufferSize;
+ UINT32 SendBufferSize;
+ UINT32 MaxSynBackLog;
+ UINT32 ConnectionTimeout;
+ UINT32 DataRetries;
+ UINT32 FinTimeout;
+ UINT32 TimeWaitTimeout;
+ UINT32 KeepAliveProbes;
+ UINT32 KeepAliveTime;
+ UINT32 KeepAliveInterval;
+ BOOLEAN EnableNagle;
+ BOOLEAN EnableTimeStamp;
+ BOOLEAN EnableWindowScaling;
+ BOOLEAN EnableSelectiveAck;
+ BOOLEAN EnablePathMtuDiscovery;
} EFI_TCP4_OPTION;
typedef struct {
//
// I/O parameters
//
- UINT8 TypeOfService;
- UINT8 TimeToLive;
+ UINT8 TypeOfService;
+ UINT8 TimeToLive;
//
// Access Point
//
- EFI_TCP4_ACCESS_POINT AccessPoint;
+ EFI_TCP4_ACCESS_POINT AccessPoint;
//
// TCP Control Options
//
- EFI_TCP4_OPTION *ControlOption;
+ EFI_TCP4_OPTION *ControlOption;
} EFI_TCP4_CONFIG_DATA;
///
/// TCP4 connnection state
///
typedef enum {
- Tcp4StateClosed = 0,
- Tcp4StateListen = 1,
- Tcp4StateSynSent = 2,
- Tcp4StateSynReceived = 3,
- Tcp4StateEstablished = 4,
- Tcp4StateFinWait1 = 5,
- Tcp4StateFinWait2 = 6,
- Tcp4StateClosing = 7,
- Tcp4StateTimeWait = 8,
- Tcp4StateCloseWait = 9,
- Tcp4StateLastAck = 10
+ Tcp4StateClosed = 0,
+ Tcp4StateListen = 1,
+ Tcp4StateSynSent = 2,
+ Tcp4StateSynReceived = 3,
+ Tcp4StateEstablished = 4,
+ Tcp4StateFinWait1 = 5,
+ Tcp4StateFinWait2 = 6,
+ Tcp4StateClosing = 7,
+ Tcp4StateTimeWait = 8,
+ Tcp4StateCloseWait = 9,
+ Tcp4StateLastAck = 10
} EFI_TCP4_CONNECTION_STATE;
typedef struct {
- EFI_EVENT Event;
- EFI_STATUS Status;
+ EFI_EVENT Event;
+ EFI_STATUS Status;
} EFI_TCP4_COMPLETION_TOKEN;
typedef struct {
@@ -154,17 +148,17 @@
/// EFI_DEVICE_ERROR: An unexpected system or network error occurred.
/// EFI_NO_MEDIA: There was a media error.
///
- EFI_TCP4_COMPLETION_TOKEN CompletionToken;
+ EFI_TCP4_COMPLETION_TOKEN CompletionToken;
} EFI_TCP4_CONNECTION_TOKEN;
typedef struct {
- EFI_TCP4_COMPLETION_TOKEN CompletionToken;
- EFI_HANDLE NewChildHandle;
+ EFI_TCP4_COMPLETION_TOKEN CompletionToken;
+ EFI_HANDLE NewChildHandle;
} EFI_TCP4_LISTEN_TOKEN;
typedef struct {
- UINT32 FragmentLength;
- VOID *FragmentBuffer;
+ UINT32 FragmentLength;
+ VOID *FragmentBuffer;
} EFI_TCP4_FRAGMENT_DATA;
typedef struct {
@@ -210,22 +204,22 @@
/// EFI_DEVICE_ERROR: An unexpected system or network error occurs.
/// EFI_NO_MEDIA: There was a media error.
///
- EFI_TCP4_COMPLETION_TOKEN CompletionToken;
+ EFI_TCP4_COMPLETION_TOKEN CompletionToken;
union {
///
/// When this token is used for receiving, RxData is a pointer to EFI_TCP4_RECEIVE_DATA.
///
- EFI_TCP4_RECEIVE_DATA *RxData;
+ EFI_TCP4_RECEIVE_DATA *RxData;
///
/// When this token is used for transmitting, TxData is a pointer to EFI_TCP4_TRANSMIT_DATA.
///
- EFI_TCP4_TRANSMIT_DATA *TxData;
+ EFI_TCP4_TRANSMIT_DATA *TxData;
} Packet;
} EFI_TCP4_IO_TOKEN;
typedef struct {
- EFI_TCP4_COMPLETION_TOKEN CompletionToken;
- BOOLEAN AbortOnClose;
+ EFI_TCP4_COMPLETION_TOKEN CompletionToken;
+ BOOLEAN AbortOnClose;
} EFI_TCP4_CLOSE_TOKEN;
//
@@ -289,7 +283,6 @@
IN EFI_TCP4_CONFIG_DATA *TcpConfigData OPTIONAL
);
-
/**
Add or delete a route entry to the route table
@@ -361,7 +354,6 @@
IN EFI_TCP4_CONNECTION_TOKEN *ConnectionToken
);
-
/**
Listen on the passive instance to accept an incoming connection request. This is a nonblocking operation.
@@ -428,7 +420,6 @@
IN EFI_TCP4_IO_TOKEN *Token
);
-
/**
Places an asynchronous receive request into the receiving queue.
@@ -533,7 +524,6 @@
IN EFI_TCP4_COMPLETION_TOKEN *Token OPTIONAL
);
-
/**
Poll to receive incoming data and transmit outgoing segments.
@@ -561,19 +551,19 @@
/// such as the routing table.
///
struct _EFI_TCP4_PROTOCOL {
- EFI_TCP4_GET_MODE_DATA GetModeData;
- EFI_TCP4_CONFIGURE Configure;
- EFI_TCP4_ROUTES Routes;
- EFI_TCP4_CONNECT Connect;
- EFI_TCP4_ACCEPT Accept;
- EFI_TCP4_TRANSMIT Transmit;
- EFI_TCP4_RECEIVE Receive;
- EFI_TCP4_CLOSE Close;
- EFI_TCP4_CANCEL Cancel;
- EFI_TCP4_POLL Poll;
+ EFI_TCP4_GET_MODE_DATA GetModeData;
+ EFI_TCP4_CONFIGURE Configure;
+ EFI_TCP4_ROUTES Routes;
+ EFI_TCP4_CONNECT Connect;
+ EFI_TCP4_ACCEPT Accept;
+ EFI_TCP4_TRANSMIT Transmit;
+ EFI_TCP4_RECEIVE Receive;
+ EFI_TCP4_CLOSE Close;
+ EFI_TCP4_CANCEL Cancel;
+ EFI_TCP4_POLL Poll;
};
-extern EFI_GUID gEfiTcp4ServiceBindingProtocolGuid;
-extern EFI_GUID gEfiTcp4ProtocolGuid;
+extern EFI_GUID gEfiTcp4ServiceBindingProtocolGuid;
+extern EFI_GUID gEfiTcp4ProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/Udp4.h b/src/include/ipxe/efi/Protocol/Udp4.h
index 3c61db8..dc0586d 100644
--- a/src/include/ipxe/efi/Protocol/Udp4.h
+++ b/src/include/ipxe/efi/Protocol/Udp4.h
@@ -4,14 +4,8 @@
The EFI UDPv4 Protocol provides simple packet-oriented services
to transmit and receive UDP packets.
-Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
This Protocol is introduced in UEFI Specification 2.0.
@@ -21,11 +15,11 @@
#ifndef __EFI_UDP4_PROTOCOL_H__
#define __EFI_UDP4_PROTOCOL_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/Protocol/Ip4.h>
//
-//GUID definitions
+// GUID definitions
//
#define EFI_UDP4_SERVICE_BINDING_PROTOCOL_GUID \
{ \
@@ -44,11 +38,11 @@
/// The definition in here is only present to provide backwards compatability.
///
typedef struct {
- EFI_HANDLE InstanceHandle;
- EFI_IPv4_ADDRESS LocalAddress;
- UINT16 LocalPort;
- EFI_IPv4_ADDRESS RemoteAddress;
- UINT16 RemotePort;
+ EFI_HANDLE InstanceHandle;
+ EFI_IPv4_ADDRESS LocalAddress;
+ UINT16 LocalPort;
+ EFI_IPv4_ADDRESS RemoteAddress;
+ UINT16 RemotePort;
} EFI_UDP4_SERVICE_POINT;
///
@@ -56,52 +50,52 @@
/// The definition in here is only present to provide backwards compatability.
///
typedef struct {
- EFI_HANDLE DriverHandle;
- UINT32 ServiceCount;
- EFI_UDP4_SERVICE_POINT Services[1];
+ EFI_HANDLE DriverHandle;
+ UINT32 ServiceCount;
+ EFI_UDP4_SERVICE_POINT Services[1];
} EFI_UDP4_VARIABLE_DATA;
typedef struct {
- UINT32 FragmentLength;
- VOID *FragmentBuffer;
+ UINT32 FragmentLength;
+ VOID *FragmentBuffer;
} EFI_UDP4_FRAGMENT_DATA;
typedef struct {
- EFI_IPv4_ADDRESS SourceAddress;
- UINT16 SourcePort;
- EFI_IPv4_ADDRESS DestinationAddress;
- UINT16 DestinationPort;
+ EFI_IPv4_ADDRESS SourceAddress;
+ UINT16 SourcePort;
+ EFI_IPv4_ADDRESS DestinationAddress;
+ UINT16 DestinationPort;
} EFI_UDP4_SESSION_DATA;
typedef struct {
//
// Receiving Filters
//
- BOOLEAN AcceptBroadcast;
- BOOLEAN AcceptPromiscuous;
- BOOLEAN AcceptAnyPort;
- BOOLEAN AllowDuplicatePort;
+ BOOLEAN AcceptBroadcast;
+ BOOLEAN AcceptPromiscuous;
+ BOOLEAN AcceptAnyPort;
+ BOOLEAN AllowDuplicatePort;
//
// I/O parameters
//
- UINT8 TypeOfService;
- UINT8 TimeToLive;
- BOOLEAN DoNotFragment;
- UINT32 ReceiveTimeout;
- UINT32 TransmitTimeout;
+ UINT8 TypeOfService;
+ UINT8 TimeToLive;
+ BOOLEAN DoNotFragment;
+ UINT32 ReceiveTimeout;
+ UINT32 TransmitTimeout;
//
// Access Point
//
- BOOLEAN UseDefaultAddress;
- EFI_IPv4_ADDRESS StationAddress;
- EFI_IPv4_ADDRESS SubnetMask;
- UINT16 StationPort;
- EFI_IPv4_ADDRESS RemoteAddress;
- UINT16 RemotePort;
+ BOOLEAN UseDefaultAddress;
+ EFI_IPv4_ADDRESS StationAddress;
+ EFI_IPv4_ADDRESS SubnetMask;
+ UINT16 StationPort;
+ EFI_IPv4_ADDRESS RemoteAddress;
+ UINT16 RemotePort;
} EFI_UDP4_CONFIG_DATA;
typedef struct {
- EFI_UDP4_SESSION_DATA *UdpSessionData; //OPTIONAL
- EFI_IPv4_ADDRESS *GatewayAddress; //OPTIONAL
+ EFI_UDP4_SESSION_DATA *UdpSessionData; // OPTIONAL
+ EFI_IPv4_ADDRESS *GatewayAddress; // OPTIONAL
UINT32 DataLength;
UINT32 FragmentCount;
EFI_UDP4_FRAGMENT_DATA FragmentTable[1];
@@ -116,13 +110,12 @@
EFI_UDP4_FRAGMENT_DATA FragmentTable[1];
} EFI_UDP4_RECEIVE_DATA;
-
typedef struct {
- EFI_EVENT Event;
- EFI_STATUS Status;
+ EFI_EVENT Event;
+ EFI_STATUS Status;
union {
- EFI_UDP4_RECEIVE_DATA *RxData;
- EFI_UDP4_TRANSMIT_DATA *TxData;
+ EFI_UDP4_RECEIVE_DATA *RxData;
+ EFI_UDP4_TRANSMIT_DATA *TxData;
} Packet;
} EFI_UDP4_COMPLETION_TOKEN;
@@ -156,7 +149,6 @@
OUT EFI_SIMPLE_NETWORK_MODE *SnpModeData OPTIONAL
);
-
/**
Initializes, changes, or resets the operational parameters for this instance of the EFI UDPv4
Protocol.
@@ -431,17 +423,17 @@
/// such as the routing table and group table, which are independent from each other.
///
struct _EFI_UDP4_PROTOCOL {
- EFI_UDP4_GET_MODE_DATA GetModeData;
- EFI_UDP4_CONFIGURE Configure;
- EFI_UDP4_GROUPS Groups;
- EFI_UDP4_ROUTES Routes;
- EFI_UDP4_TRANSMIT Transmit;
- EFI_UDP4_RECEIVE Receive;
- EFI_UDP4_CANCEL Cancel;
- EFI_UDP4_POLL Poll;
+ EFI_UDP4_GET_MODE_DATA GetModeData;
+ EFI_UDP4_CONFIGURE Configure;
+ EFI_UDP4_GROUPS Groups;
+ EFI_UDP4_ROUTES Routes;
+ EFI_UDP4_TRANSMIT Transmit;
+ EFI_UDP4_RECEIVE Receive;
+ EFI_UDP4_CANCEL Cancel;
+ EFI_UDP4_POLL Poll;
};
-extern EFI_GUID gEfiUdp4ServiceBindingProtocolGuid;
-extern EFI_GUID gEfiUdp4ProtocolGuid;
+extern EFI_GUID gEfiUdp4ServiceBindingProtocolGuid;
+extern EFI_GUID gEfiUdp4ProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/UgaDraw.h b/src/include/ipxe/efi/Protocol/UgaDraw.h
index 5650206..c268bd2 100644
--- a/src/include/ipxe/efi/Protocol/UgaDraw.h
+++ b/src/include/ipxe/efi/Protocol/UgaDraw.h
@@ -3,22 +3,15 @@
Abstraction of a very simple graphics device.
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __UGA_DRAW_H__
#define __UGA_DRAW_H__
-FILE_LICENCE ( BSD3 );
-
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_UGA_DRAW_PROTOCOL_GUID \
{ \
@@ -75,15 +68,15 @@
);
typedef struct {
- UINT8 Blue;
- UINT8 Green;
- UINT8 Red;
- UINT8 Reserved;
+ UINT8 Blue;
+ UINT8 Green;
+ UINT8 Red;
+ UINT8 Reserved;
} EFI_UGA_PIXEL;
typedef union {
- EFI_UGA_PIXEL Pixel;
- UINT32 Raw;
+ EFI_UGA_PIXEL Pixel;
+ UINT32 Raw;
} EFI_UGA_PIXEL_UNION;
///
@@ -135,14 +128,14 @@
@retval EFI_SUCCESS - The Blt operation completed.
@retval EFI_INVALID_PARAMETER - BltOperation is not valid.
- @retval EFI_DEVICE_ERROR - A hardware error occured writting to the video buffer.
+ @retval EFI_DEVICE_ERROR - A hardware error occurred writting to the video buffer.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_UGA_DRAW_PROTOCOL_BLT)(
- IN EFI_UGA_DRAW_PROTOCOL * This,
- IN EFI_UGA_PIXEL * BltBuffer, OPTIONAL
+ IN EFI_UGA_DRAW_PROTOCOL *This,
+ IN EFI_UGA_PIXEL *BltBuffer OPTIONAL,
IN EFI_UGA_BLT_OPERATION BltOperation,
IN UINTN SourceX,
IN UINTN SourceY,
@@ -158,11 +151,11 @@
/// copy pixels to and from the graphics controller's frame buffer.
///
struct _EFI_UGA_DRAW_PROTOCOL {
- EFI_UGA_DRAW_PROTOCOL_GET_MODE GetMode;
- EFI_UGA_DRAW_PROTOCOL_SET_MODE SetMode;
- EFI_UGA_DRAW_PROTOCOL_BLT Blt;
+ EFI_UGA_DRAW_PROTOCOL_GET_MODE GetMode;
+ EFI_UGA_DRAW_PROTOCOL_SET_MODE SetMode;
+ EFI_UGA_DRAW_PROTOCOL_BLT Blt;
};
-extern EFI_GUID gEfiUgaDrawProtocolGuid;
+extern EFI_GUID gEfiUgaDrawProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/UnicodeCollation.h b/src/include/ipxe/efi/Protocol/UnicodeCollation.h
index 870428c..f708624 100644
--- a/src/include/ipxe/efi/Protocol/UnicodeCollation.h
+++ b/src/include/ipxe/efi/Protocol/UnicodeCollation.h
@@ -3,21 +3,15 @@
This protocol is used to allow code running in the boot services environment
to perform lexical comparison functions on Unicode strings for given languages.
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __UNICODE_COLLATION_H__
#define __UNICODE_COLLATION_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_UNICODE_COLLATION_PROTOCOL_GUID \
{ \
@@ -29,27 +23,27 @@
0xa4c751fc, 0x23ae, 0x4c3e, {0x92, 0xe9, 0x49, 0x64, 0xcf, 0x63, 0xf3, 0x49 } \
}
-typedef struct _EFI_UNICODE_COLLATION_PROTOCOL EFI_UNICODE_COLLATION_PROTOCOL;
-
+typedef struct _EFI_UNICODE_COLLATION_PROTOCOL EFI_UNICODE_COLLATION_PROTOCOL;
///
/// Protocol GUID name defined in EFI1.1.
///
-#define UNICODE_COLLATION_PROTOCOL EFI_UNICODE_COLLATION_PROTOCOL_GUID
+#define UNICODE_COLLATION_PROTOCOL EFI_UNICODE_COLLATION_PROTOCOL_GUID
///
/// Protocol defined in EFI1.1.
///
-typedef EFI_UNICODE_COLLATION_PROTOCOL UNICODE_COLLATION_INTERFACE;
+typedef EFI_UNICODE_COLLATION_PROTOCOL UNICODE_COLLATION_INTERFACE;
///
/// Protocol data structures and defines
///
-#define EFI_UNICODE_BYTE_ORDER_MARK (CHAR16) (0xfeff)
+#define EFI_UNICODE_BYTE_ORDER_MARK (CHAR16) (0xfeff)
//
// Protocol member functions
//
+
/**
Performs a case-insensitive comparison of two Null-terminated strings.
@@ -169,26 +163,26 @@
/// comparisons of strings.
///
struct _EFI_UNICODE_COLLATION_PROTOCOL {
- EFI_UNICODE_COLLATION_STRICOLL StriColl;
- EFI_UNICODE_COLLATION_METAIMATCH MetaiMatch;
- EFI_UNICODE_COLLATION_STRLWR StrLwr;
- EFI_UNICODE_COLLATION_STRUPR StrUpr;
+ EFI_UNICODE_COLLATION_STRICOLL StriColl;
+ EFI_UNICODE_COLLATION_METAIMATCH MetaiMatch;
+ EFI_UNICODE_COLLATION_STRLWR StrLwr;
+ EFI_UNICODE_COLLATION_STRUPR StrUpr;
//
// for supporting fat volumes
//
- EFI_UNICODE_COLLATION_FATTOSTR FatToStr;
- EFI_UNICODE_COLLATION_STRTOFAT StrToFat;
+ EFI_UNICODE_COLLATION_FATTOSTR FatToStr;
+ EFI_UNICODE_COLLATION_STRTOFAT StrToFat;
///
/// A Null-terminated ASCII string array that contains one or more language codes.
/// When this field is used for UnicodeCollation2, it is specified in RFC 4646 format.
/// When it is used for UnicodeCollation, it is specified in ISO 639-2 format.
///
- CHAR8 *SupportedLanguages;
+ CHAR8 *SupportedLanguages;
};
-extern EFI_GUID gEfiUnicodeCollationProtocolGuid;
-extern EFI_GUID gEfiUnicodeCollation2ProtocolGuid;
+extern EFI_GUID gEfiUnicodeCollationProtocolGuid;
+extern EFI_GUID gEfiUnicodeCollation2ProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/Usb2HostController.h b/src/include/ipxe/efi/Protocol/Usb2HostController.h
index 8308e8f..657918d 100644
--- a/src/include/ipxe/efi/Protocol/Usb2HostController.h
+++ b/src/include/ipxe/efi/Protocol/Usb2HostController.h
@@ -4,21 +4,15 @@
running in the EFI boot services environment, to perform data transactions over
a USB bus. In addition, it provides an abstraction for the root hub of the USB bus.
- Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _USB2_HOSTCONTROLLER_H_
#define _USB2_HOSTCONTROLLER_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/Protocol/UsbIo.h>
@@ -32,35 +26,33 @@
///
typedef struct _EFI_USB2_HC_PROTOCOL EFI_USB2_HC_PROTOCOL;
-
typedef struct {
- UINT16 PortStatus; ///< Contains current port status bitmap.
- UINT16 PortChangeStatus; ///< Contains current port status change bitmap.
+ UINT16 PortStatus; ///< Contains current port status bitmap.
+ UINT16 PortChangeStatus; ///< Contains current port status change bitmap.
} EFI_USB_PORT_STATUS;
///
/// EFI_USB_PORT_STATUS.PortStatus bit definition
///
-#define USB_PORT_STAT_CONNECTION 0x0001
-#define USB_PORT_STAT_ENABLE 0x0002
-#define USB_PORT_STAT_SUSPEND 0x0004
-#define USB_PORT_STAT_OVERCURRENT 0x0008
-#define USB_PORT_STAT_RESET 0x0010
-#define USB_PORT_STAT_POWER 0x0100
-#define USB_PORT_STAT_LOW_SPEED 0x0200
-#define USB_PORT_STAT_HIGH_SPEED 0x0400
-#define USB_PORT_STAT_SUPER_SPEED 0x0800
-#define USB_PORT_STAT_OWNER 0x2000
+#define USB_PORT_STAT_CONNECTION 0x0001
+#define USB_PORT_STAT_ENABLE 0x0002
+#define USB_PORT_STAT_SUSPEND 0x0004
+#define USB_PORT_STAT_OVERCURRENT 0x0008
+#define USB_PORT_STAT_RESET 0x0010
+#define USB_PORT_STAT_POWER 0x0100
+#define USB_PORT_STAT_LOW_SPEED 0x0200
+#define USB_PORT_STAT_HIGH_SPEED 0x0400
+#define USB_PORT_STAT_SUPER_SPEED 0x0800
+#define USB_PORT_STAT_OWNER 0x2000
///
/// EFI_USB_PORT_STATUS.PortChangeStatus bit definition
///
-#define USB_PORT_STAT_C_CONNECTION 0x0001
-#define USB_PORT_STAT_C_ENABLE 0x0002
-#define USB_PORT_STAT_C_SUSPEND 0x0004
-#define USB_PORT_STAT_C_OVERCURRENT 0x0008
-#define USB_PORT_STAT_C_RESET 0x0010
-
+#define USB_PORT_STAT_C_CONNECTION 0x0001
+#define USB_PORT_STAT_C_ENABLE 0x0002
+#define USB_PORT_STAT_C_SUSPEND 0x0004
+#define USB_PORT_STAT_C_OVERCURRENT 0x0008
+#define USB_PORT_STAT_C_RESET 0x0010
///
/// Usb port features value
@@ -80,14 +72,14 @@
EfiUsbPortResetChange = 20
} EFI_USB_PORT_FEATURE;
-#define EFI_USB_SPEED_FULL 0x0000 ///< 12 Mb/s, USB 1.1 OHCI and UHCI HC.
-#define EFI_USB_SPEED_LOW 0x0001 ///< 1 Mb/s, USB 1.1 OHCI and UHCI HC.
-#define EFI_USB_SPEED_HIGH 0x0002 ///< 480 Mb/s, USB 2.0 EHCI HC.
-#define EFI_USB_SPEED_SUPER 0x0003 ///< 4.8 Gb/s, USB 3.0 XHCI HC.
+#define EFI_USB_SPEED_FULL 0x0000 ///< 12 Mb/s, USB 1.1 OHCI and UHCI HC.
+#define EFI_USB_SPEED_LOW 0x0001 ///< 1 Mb/s, USB 1.1 OHCI and UHCI HC.
+#define EFI_USB_SPEED_HIGH 0x0002 ///< 480 Mb/s, USB 2.0 EHCI HC.
+#define EFI_USB_SPEED_SUPER 0x0003 ///< 4.8 Gb/s, USB 3.0 XHCI HC.
typedef struct {
- UINT8 TranslatorHubAddress; ///< device address
- UINT8 TranslatorPortNumber; ///< the port number of the hub that device is connected to.
+ UINT8 TranslatorHubAddress; ///< device address
+ UINT8 TranslatorPortNumber; ///< the port number of the hub that device is connected to.
} EFI_USB2_HC_TRANSACTION_TRANSLATOR;
//
@@ -122,6 +114,7 @@
#define EFI_USB_HC_RESET_HOST_CONTROLLER 0x0002
#define EFI_USB_HC_RESET_GLOBAL_WITH_DEBUG 0x0004
#define EFI_USB_HC_RESET_HOST_WITH_DEBUG 0x0008
+
/**
Provides software reset for the USB host controller.
@@ -200,7 +193,7 @@
(EFIAPI *EFI_USB2_HC_PROTOCOL_GET_STATE)(
IN EFI_USB2_HC_PROTOCOL *This,
OUT EFI_USB_HC_STATE *State
-);
+ );
/**
Sets the USB host controller to a specific state.
@@ -266,7 +259,7 @@
OUT UINT32 *TransferResult
);
-#define EFI_USB_MAX_BULK_BUFFER_NUM 10
+#define EFI_USB_MAX_BULK_BUFFER_NUM 10
/**
Submits bulk transfer to a bulk endpoint of a USB device.
@@ -409,8 +402,8 @@
OUT UINT32 *TransferResult
);
-#define EFI_USB_MAX_ISO_BUFFER_NUM 7
-#define EFI_USB_MAX_ISO_BUFFER_NUM1 2
+#define EFI_USB_MAX_ISO_BUFFER_NUM 7
+#define EFI_USB_MAX_ISO_BUFFER_NUM1 2
/**
Submits isochronous transfer to an isochronous endpoint of a USB device.
@@ -632,35 +625,35 @@
/// instance, and an EFI_USB2_HC_PROTOCOL instance.
///
struct _EFI_USB2_HC_PROTOCOL {
- EFI_USB2_HC_PROTOCOL_GET_CAPABILITY GetCapability;
- EFI_USB2_HC_PROTOCOL_RESET Reset;
- EFI_USB2_HC_PROTOCOL_GET_STATE GetState;
- EFI_USB2_HC_PROTOCOL_SET_STATE SetState;
- EFI_USB2_HC_PROTOCOL_CONTROL_TRANSFER ControlTransfer;
- EFI_USB2_HC_PROTOCOL_BULK_TRANSFER BulkTransfer;
- EFI_USB2_HC_PROTOCOL_ASYNC_INTERRUPT_TRANSFER AsyncInterruptTransfer;
- EFI_USB2_HC_PROTOCOL_SYNC_INTERRUPT_TRANSFER SyncInterruptTransfer;
- EFI_USB2_HC_PROTOCOL_ISOCHRONOUS_TRANSFER IsochronousTransfer;
- EFI_USB2_HC_PROTOCOL_ASYNC_ISOCHRONOUS_TRANSFER AsyncIsochronousTransfer;
- EFI_USB2_HC_PROTOCOL_GET_ROOTHUB_PORT_STATUS GetRootHubPortStatus;
- EFI_USB2_HC_PROTOCOL_SET_ROOTHUB_PORT_FEATURE SetRootHubPortFeature;
- EFI_USB2_HC_PROTOCOL_CLEAR_ROOTHUB_PORT_FEATURE ClearRootHubPortFeature;
+ EFI_USB2_HC_PROTOCOL_GET_CAPABILITY GetCapability;
+ EFI_USB2_HC_PROTOCOL_RESET Reset;
+ EFI_USB2_HC_PROTOCOL_GET_STATE GetState;
+ EFI_USB2_HC_PROTOCOL_SET_STATE SetState;
+ EFI_USB2_HC_PROTOCOL_CONTROL_TRANSFER ControlTransfer;
+ EFI_USB2_HC_PROTOCOL_BULK_TRANSFER BulkTransfer;
+ EFI_USB2_HC_PROTOCOL_ASYNC_INTERRUPT_TRANSFER AsyncInterruptTransfer;
+ EFI_USB2_HC_PROTOCOL_SYNC_INTERRUPT_TRANSFER SyncInterruptTransfer;
+ EFI_USB2_HC_PROTOCOL_ISOCHRONOUS_TRANSFER IsochronousTransfer;
+ EFI_USB2_HC_PROTOCOL_ASYNC_ISOCHRONOUS_TRANSFER AsyncIsochronousTransfer;
+ EFI_USB2_HC_PROTOCOL_GET_ROOTHUB_PORT_STATUS GetRootHubPortStatus;
+ EFI_USB2_HC_PROTOCOL_SET_ROOTHUB_PORT_FEATURE SetRootHubPortFeature;
+ EFI_USB2_HC_PROTOCOL_CLEAR_ROOTHUB_PORT_FEATURE ClearRootHubPortFeature;
///
/// The major revision number of the USB host controller. The revision information
/// indicates the release of the Universal Serial Bus Specification with which the
/// host controller is compliant.
///
- UINT16 MajorRevision;
+ UINT16 MajorRevision;
///
/// The minor revision number of the USB host controller. The revision information
/// indicates the release of the Universal Serial Bus Specification with which the
/// host controller is compliant.
///
- UINT16 MinorRevision;
+ UINT16 MinorRevision;
};
-extern EFI_GUID gEfiUsb2HcProtocolGuid;
+extern EFI_GUID gEfiUsb2HcProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/UsbHostController.h b/src/include/ipxe/efi/Protocol/UsbHostController.h
index a29088c..5336f00 100644
--- a/src/include/ipxe/efi/Protocol/UsbHostController.h
+++ b/src/include/ipxe/efi/Protocol/UsbHostController.h
@@ -5,21 +5,15 @@
running in the EFI boot services environment, to perform data transactions
over a USB bus. In addition, it provides an abstraction for the root hub of the USB bus.
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _USB_HOSTCONTROLLER_H_
#define _USB_HOSTCONTROLLER_H_
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/Protocol/Usb2HostController.h>
@@ -469,7 +463,6 @@
IN EFI_USB_PORT_FEATURE PortFeature
);
-
///
/// The EFI_USB_HC_PROTOCOL provides USB host controller management, basic data transactions
/// over a USB bus, and USB root hub access. A device driver that wishes to manage a USB bus in a
@@ -478,33 +471,33 @@
/// EFI_DEVICE_PATH_PROTOCOL instance, and an EFI_USB_HC_PROTOCOL instance.
///
struct _EFI_USB_HC_PROTOCOL {
- EFI_USB_HC_PROTOCOL_RESET Reset;
- EFI_USB_HC_PROTOCOL_GET_STATE GetState;
- EFI_USB_HC_PROTOCOL_SET_STATE SetState;
- EFI_USB_HC_PROTOCOL_CONTROL_TRANSFER ControlTransfer;
- EFI_USB_HC_PROTOCOL_BULK_TRANSFER BulkTransfer;
- EFI_USB_HC_PROTOCOL_ASYNC_INTERRUPT_TRANSFER AsyncInterruptTransfer;
- EFI_USB_HC_PROTOCOL_SYNC_INTERRUPT_TRANSFER SyncInterruptTransfer;
- EFI_USB_HC_PROTOCOL_ISOCHRONOUS_TRANSFER IsochronousTransfer;
- EFI_USB_HC_PROTOCOL_ASYNC_ISOCHRONOUS_TRANSFER AsyncIsochronousTransfer;
- EFI_USB_HC_PROTOCOL_GET_ROOTHUB_PORT_NUMBER GetRootHubPortNumber;
- EFI_USB_HC_PROTOCOL_GET_ROOTHUB_PORT_STATUS GetRootHubPortStatus;
- EFI_USB_HC_PROTOCOL_SET_ROOTHUB_PORT_FEATURE SetRootHubPortFeature;
- EFI_USB_HC_PROTOCOL_CLEAR_ROOTHUB_PORT_FEATURE ClearRootHubPortFeature;
+ EFI_USB_HC_PROTOCOL_RESET Reset;
+ EFI_USB_HC_PROTOCOL_GET_STATE GetState;
+ EFI_USB_HC_PROTOCOL_SET_STATE SetState;
+ EFI_USB_HC_PROTOCOL_CONTROL_TRANSFER ControlTransfer;
+ EFI_USB_HC_PROTOCOL_BULK_TRANSFER BulkTransfer;
+ EFI_USB_HC_PROTOCOL_ASYNC_INTERRUPT_TRANSFER AsyncInterruptTransfer;
+ EFI_USB_HC_PROTOCOL_SYNC_INTERRUPT_TRANSFER SyncInterruptTransfer;
+ EFI_USB_HC_PROTOCOL_ISOCHRONOUS_TRANSFER IsochronousTransfer;
+ EFI_USB_HC_PROTOCOL_ASYNC_ISOCHRONOUS_TRANSFER AsyncIsochronousTransfer;
+ EFI_USB_HC_PROTOCOL_GET_ROOTHUB_PORT_NUMBER GetRootHubPortNumber;
+ EFI_USB_HC_PROTOCOL_GET_ROOTHUB_PORT_STATUS GetRootHubPortStatus;
+ EFI_USB_HC_PROTOCOL_SET_ROOTHUB_PORT_FEATURE SetRootHubPortFeature;
+ EFI_USB_HC_PROTOCOL_CLEAR_ROOTHUB_PORT_FEATURE ClearRootHubPortFeature;
///
/// The major revision number of the USB host controller. The revision information
/// indicates the release of the Universal Serial Bus Specification with which the
/// host controller is compliant.
///
- UINT16 MajorRevision;
+ UINT16 MajorRevision;
///
/// The minor revision number of the USB host controller. The revision information
/// indicates the release of the Universal Serial Bus Specification with which the
/// host controller is compliant.
///
- UINT16 MinorRevision;
+ UINT16 MinorRevision;
};
-extern EFI_GUID gEfiUsbHcProtocolGuid;
+extern EFI_GUID gEfiUsbHcProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/UsbIo.h b/src/include/ipxe/efi/Protocol/UsbIo.h
index b8d33ee..d5f02bb 100644
--- a/src/include/ipxe/efi/Protocol/UsbIo.h
+++ b/src/include/ipxe/efi/Protocol/UsbIo.h
@@ -5,21 +5,15 @@
mice and mass storage devices. In particular, functions for managing devices
on USB buses are defined here.
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __USB_IO_H__
#define __USB_IO_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/IndustryStandard/Usb.h>
@@ -31,7 +25,7 @@
0x2B2F68D6, 0x0CD2, 0x44cf, {0x8E, 0x8B, 0xBB, 0xA2, 0x0B, 0x1B, 0x5B, 0x75 } \
}
-typedef struct _EFI_USB_IO_PROTOCOL EFI_USB_IO_PROTOCOL;
+typedef struct _EFI_USB_IO_PROTOCOL EFI_USB_IO_PROTOCOL;
//
// Related Definition for EFI USB I/O protocol
@@ -40,11 +34,11 @@
//
// USB standard descriptors and reqeust
//
-typedef USB_DEVICE_REQUEST EFI_USB_DEVICE_REQUEST;
-typedef USB_DEVICE_DESCRIPTOR EFI_USB_DEVICE_DESCRIPTOR;
-typedef USB_CONFIG_DESCRIPTOR EFI_USB_CONFIG_DESCRIPTOR;
-typedef USB_INTERFACE_DESCRIPTOR EFI_USB_INTERFACE_DESCRIPTOR;
-typedef USB_ENDPOINT_DESCRIPTOR EFI_USB_ENDPOINT_DESCRIPTOR;
+typedef USB_DEVICE_REQUEST EFI_USB_DEVICE_REQUEST;
+typedef USB_DEVICE_DESCRIPTOR EFI_USB_DEVICE_DESCRIPTOR;
+typedef USB_CONFIG_DESCRIPTOR EFI_USB_CONFIG_DESCRIPTOR;
+typedef USB_INTERFACE_DESCRIPTOR EFI_USB_INTERFACE_DESCRIPTOR;
+typedef USB_ENDPOINT_DESCRIPTOR EFI_USB_ENDPOINT_DESCRIPTOR;
///
/// USB data transfer direction
@@ -58,16 +52,16 @@
//
// USB Transfer Results
//
-#define EFI_USB_NOERROR 0x00
-#define EFI_USB_ERR_NOTEXECUTE 0x01
-#define EFI_USB_ERR_STALL 0x02
-#define EFI_USB_ERR_BUFFER 0x04
-#define EFI_USB_ERR_BABBLE 0x08
-#define EFI_USB_ERR_NAK 0x10
-#define EFI_USB_ERR_CRC 0x20
-#define EFI_USB_ERR_TIMEOUT 0x40
-#define EFI_USB_ERR_BITSTUFF 0x80
-#define EFI_USB_ERR_SYSTEM 0x100
+#define EFI_USB_NOERROR 0x00
+#define EFI_USB_ERR_NOTEXECUTE 0x01
+#define EFI_USB_ERR_STALL 0x02
+#define EFI_USB_ERR_BUFFER 0x04
+#define EFI_USB_ERR_BABBLE 0x08
+#define EFI_USB_ERR_NAK 0x10
+#define EFI_USB_ERR_CRC 0x20
+#define EFI_USB_ERR_TIMEOUT 0x40
+#define EFI_USB_ERR_BITSTUFF 0x80
+#define EFI_USB_ERR_SYSTEM 0x100
/**
Async USB transfer callback routine.
@@ -96,7 +90,6 @@
// Prototype for EFI USB I/O protocol
//
-
/**
This function is used to manage a USB device with a control transfer pipe. A control transfer is
typically used to perform device initialization and configuration.
@@ -114,7 +107,7 @@
@retval EFI_SUCCESS The control transfer has been successfully executed.
@retval EFI_DEVICE_ERROR The transfer failed. The transfer status is returned in Status.
- @retval EFI_INVALID_PARAMETE One or more parameters are invalid.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
@retval EFI_TIMEOUT The control transfer fails due to timeout.
@@ -157,7 +150,7 @@
@retval EFI_SUCCESS The bulk transfer has been successfully executed.
@retval EFI_DEVICE_ERROR The transfer failed. The transfer status is returned in Status.
- @retval EFI_INVALID_PARAMETE One or more parameters are invalid.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
@retval EFI_OUT_OF_RESOURCES The request could not be submitted due to a lack of resources.
@retval EFI_TIMEOUT The control transfer fails due to timeout.
@@ -486,29 +479,29 @@
//
// IO transfer
//
- EFI_USB_IO_CONTROL_TRANSFER UsbControlTransfer;
- EFI_USB_IO_BULK_TRANSFER UsbBulkTransfer;
- EFI_USB_IO_ASYNC_INTERRUPT_TRANSFER UsbAsyncInterruptTransfer;
- EFI_USB_IO_SYNC_INTERRUPT_TRANSFER UsbSyncInterruptTransfer;
- EFI_USB_IO_ISOCHRONOUS_TRANSFER UsbIsochronousTransfer;
- EFI_USB_IO_ASYNC_ISOCHRONOUS_TRANSFER UsbAsyncIsochronousTransfer;
+ EFI_USB_IO_CONTROL_TRANSFER UsbControlTransfer;
+ EFI_USB_IO_BULK_TRANSFER UsbBulkTransfer;
+ EFI_USB_IO_ASYNC_INTERRUPT_TRANSFER UsbAsyncInterruptTransfer;
+ EFI_USB_IO_SYNC_INTERRUPT_TRANSFER UsbSyncInterruptTransfer;
+ EFI_USB_IO_ISOCHRONOUS_TRANSFER UsbIsochronousTransfer;
+ EFI_USB_IO_ASYNC_ISOCHRONOUS_TRANSFER UsbAsyncIsochronousTransfer;
//
// Common device request
//
- EFI_USB_IO_GET_DEVICE_DESCRIPTOR UsbGetDeviceDescriptor;
- EFI_USB_IO_GET_CONFIG_DESCRIPTOR UsbGetConfigDescriptor;
- EFI_USB_IO_GET_INTERFACE_DESCRIPTOR UsbGetInterfaceDescriptor;
- EFI_USB_IO_GET_ENDPOINT_DESCRIPTOR UsbGetEndpointDescriptor;
- EFI_USB_IO_GET_STRING_DESCRIPTOR UsbGetStringDescriptor;
- EFI_USB_IO_GET_SUPPORTED_LANGUAGE UsbGetSupportedLanguages;
+ EFI_USB_IO_GET_DEVICE_DESCRIPTOR UsbGetDeviceDescriptor;
+ EFI_USB_IO_GET_CONFIG_DESCRIPTOR UsbGetConfigDescriptor;
+ EFI_USB_IO_GET_INTERFACE_DESCRIPTOR UsbGetInterfaceDescriptor;
+ EFI_USB_IO_GET_ENDPOINT_DESCRIPTOR UsbGetEndpointDescriptor;
+ EFI_USB_IO_GET_STRING_DESCRIPTOR UsbGetStringDescriptor;
+ EFI_USB_IO_GET_SUPPORTED_LANGUAGE UsbGetSupportedLanguages;
//
// Reset controller's parent port
//
- EFI_USB_IO_PORT_RESET UsbPortReset;
+ EFI_USB_IO_PORT_RESET UsbPortReset;
};
-extern EFI_GUID gEfiUsbIoProtocolGuid;
+extern EFI_GUID gEfiUsbIoProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Protocol/VlanConfig.h b/src/include/ipxe/efi/Protocol/VlanConfig.h
index 928fade..79b6bc4 100644
--- a/src/include/ipxe/efi/Protocol/VlanConfig.h
+++ b/src/include/ipxe/efi/Protocol/VlanConfig.h
@@ -1,14 +1,8 @@
/** @file
EFI VLAN Config protocol is to provide manageability interface for VLAN configuration.
- Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
This Protocol is introduced in UEFI Specification 2.2
@@ -18,8 +12,7 @@
#ifndef __EFI_VLANCONFIG_PROTOCOL_H__
#define __EFI_VLANCONFIG_PROTOCOL_H__
-FILE_LICENCE ( BSD3 );
-
+FILE_LICENCE ( BSD2_PATENT );
#define EFI_VLAN_CONFIG_PROTOCOL_GUID \
{ \
@@ -28,16 +21,14 @@
typedef struct _EFI_VLAN_CONFIG_PROTOCOL EFI_VLAN_CONFIG_PROTOCOL;
-
///
/// EFI_VLAN_FIND_DATA
///
typedef struct {
- UINT16 VlanId; ///< Vlan Identifier.
- UINT8 Priority; ///< Priority of this VLAN.
+ UINT16 VlanId; ///< Vlan Identifier.
+ UINT8 Priority; ///< Priority of this VLAN.
} EFI_VLAN_FIND_DATA;
-
/**
Create a VLAN device or modify the configuration parameter of an
already-configured VLAN.
@@ -135,11 +126,11 @@
/// VLAN tagging implementation is IEEE802.1Q.
///
struct _EFI_VLAN_CONFIG_PROTOCOL {
- EFI_VLAN_CONFIG_SET Set;
- EFI_VLAN_CONFIG_FIND Find;
- EFI_VLAN_CONFIG_REMOVE Remove;
+ EFI_VLAN_CONFIG_SET Set;
+ EFI_VLAN_CONFIG_FIND Find;
+ EFI_VLAN_CONFIG_REMOVE Remove;
};
-extern EFI_GUID gEfiVlanConfigProtocolGuid;
+extern EFI_GUID gEfiVlanConfigProtocolGuid;
#endif
diff --git a/src/include/ipxe/efi/Uefi.h b/src/include/ipxe/efi/Uefi.h
index a5a25a9..2a9973d 100644
--- a/src/include/ipxe/efi/Uefi.h
+++ b/src/include/ipxe/efi/Uefi.h
@@ -6,24 +6,17 @@
types defined via this include file and can be ported easily to any
environment.
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __PI_UEFI_H__
#define __PI_UEFI_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/Uefi/UefiBaseType.h>
#include <ipxe/efi/Uefi/UefiSpec.h>
#endif
-
diff --git a/src/include/ipxe/efi/Uefi/UefiBaseType.h b/src/include/ipxe/efi/Uefi/UefiBaseType.h
index 5bfcccf..0492759 100644
--- a/src/include/ipxe/efi/Uefi/UefiBaseType.h
+++ b/src/include/ipxe/efi/Uefi/UefiBaseType.h
@@ -1,23 +1,19 @@
/** @file
Defines data types and constants introduced in UEFI.
-Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>
Portions copyright (c) 2011 - 2016, ARM Ltd. All rights reserved.<BR>
+Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __UEFI_BASETYPE_H__
#define __UEFI_BASETYPE_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/Base.h>
@@ -28,37 +24,37 @@
///
/// 128-bit buffer containing a unique identifier value.
///
-typedef GUID EFI_GUID;
+typedef GUID EFI_GUID;
///
/// Function return status for EFI API.
///
-typedef RETURN_STATUS EFI_STATUS;
+typedef RETURN_STATUS EFI_STATUS;
///
/// A collection of related interfaces.
///
-typedef VOID *EFI_HANDLE;
+typedef VOID *EFI_HANDLE;
///
/// Handle to an event structure.
///
-typedef VOID *EFI_EVENT;
+typedef VOID *EFI_EVENT;
///
/// Task priority level.
///
-typedef UINTN EFI_TPL;
+typedef UINTN EFI_TPL;
///
/// Logical block address.
///
-typedef UINT64 EFI_LBA;
+typedef UINT64 EFI_LBA;
///
/// 64-bit physical memory address.
///
-typedef UINT64 EFI_PHYSICAL_ADDRESS;
+typedef UINT64 EFI_PHYSICAL_ADDRESS;
///
/// 64-bit virtual memory address.
///
-typedef UINT64 EFI_VIRTUAL_ADDRESS;
+typedef UINT64 EFI_VIRTUAL_ADDRESS;
///
/// EFI Time Abstraction:
@@ -72,20 +68,19 @@
/// TimeZone: -1440 to 1440 or 2047
///
typedef struct {
- UINT16 Year;
- UINT8 Month;
- UINT8 Day;
- UINT8 Hour;
- UINT8 Minute;
- UINT8 Second;
- UINT8 Pad1;
- UINT32 Nanosecond;
- INT16 TimeZone;
- UINT8 Daylight;
- UINT8 Pad2;
+ UINT16 Year;
+ UINT8 Month;
+ UINT8 Day;
+ UINT8 Hour;
+ UINT8 Minute;
+ UINT8 Second;
+ UINT8 Pad1;
+ UINT32 Nanosecond;
+ INT16 TimeZone;
+ UINT8 Daylight;
+ UINT8 Pad2;
} EFI_TIME;
-
///
/// 4-byte buffer. An IPv4 internet protocol address.
///
@@ -100,7 +95,7 @@
/// 32-byte buffer containing a network Media Access Control address.
///
typedef struct {
- UINT8 Addr[32];
+ UINT8 Addr[32];
} EFI_MAC_ADDRESS;
///
@@ -108,12 +103,11 @@
/// An IPv4 or IPv6 internet protocol address.
///
typedef union {
- UINT32 Addr[4];
- EFI_IPv4_ADDRESS v4;
- EFI_IPv6_ADDRESS v6;
+ UINT32 Addr[4];
+ EFI_IPv4_ADDRESS v4;
+ EFI_IPv6_ADDRESS v6;
} EFI_IP_ADDRESS;
-
///
/// Enumeration of EFI_STATUS.
///@{
@@ -151,20 +145,20 @@
#define EFI_COMPROMISED_DATA RETURN_COMPROMISED_DATA
#define EFI_HTTP_ERROR RETURN_HTTP_ERROR
-#define EFI_WARN_UNKNOWN_GLYPH RETURN_WARN_UNKNOWN_GLYPH
-#define EFI_WARN_DELETE_FAILURE RETURN_WARN_DELETE_FAILURE
-#define EFI_WARN_WRITE_FAILURE RETURN_WARN_WRITE_FAILURE
-#define EFI_WARN_BUFFER_TOO_SMALL RETURN_WARN_BUFFER_TOO_SMALL
-#define EFI_WARN_STALE_DATA RETURN_WARN_STALE_DATA
-#define EFI_WARN_FILE_SYSTEM RETURN_WARN_FILE_SYSTEM
+#define EFI_WARN_UNKNOWN_GLYPH RETURN_WARN_UNKNOWN_GLYPH
+#define EFI_WARN_DELETE_FAILURE RETURN_WARN_DELETE_FAILURE
+#define EFI_WARN_WRITE_FAILURE RETURN_WARN_WRITE_FAILURE
+#define EFI_WARN_BUFFER_TOO_SMALL RETURN_WARN_BUFFER_TOO_SMALL
+#define EFI_WARN_STALE_DATA RETURN_WARN_STALE_DATA
+#define EFI_WARN_FILE_SYSTEM RETURN_WARN_FILE_SYSTEM
///@}
///
/// Define macro to encode the status code.
///
-#define EFIERR(_a) ENCODE_ERROR(_a)
+#define EFIERR(_a) ENCODE_ERROR(_a)
-#define EFI_ERROR(A) RETURN_ERROR(A)
+#define EFI_ERROR(A) RETURN_ERROR(A)
///
/// ICMP error definitions
@@ -178,9 +172,9 @@
///
/// Tcp connection status definitions
///@{
-#define EFI_CONNECTION_FIN EFIERR(104)
-#define EFI_CONNECTION_RESET EFIERR(105)
-#define EFI_CONNECTION_REFUSED EFIERR(106)
+#define EFI_CONNECTION_FIN EFIERR(104)
+#define EFI_CONNECTION_RESET EFIERR(105)
+#define EFI_CONNECTION_REFUSED EFIERR(106)
///@}
//
@@ -188,9 +182,9 @@
// 4KB. This should in no way be confused with the page size of the processor.
// An EFI_PAGE is just the quanta of memory in EFI.
//
-#define EFI_PAGE_SIZE SIZE_4KB
-#define EFI_PAGE_MASK 0xFFF
-#define EFI_PAGE_SHIFT 12
+#define EFI_PAGE_SIZE SIZE_4KB
+#define EFI_PAGE_MASK 0xFFF
+#define EFI_PAGE_SHIFT 12
/**
Macro that converts a size, in bytes, to a number of EFI_PAGESs.
@@ -221,22 +215,22 @@
///
/// PE32+ Machine type for IA32 UEFI images.
///
-#define EFI_IMAGE_MACHINE_IA32 0x014C
+#define EFI_IMAGE_MACHINE_IA32 0x014C
///
/// PE32+ Machine type for IA64 UEFI images.
///
-#define EFI_IMAGE_MACHINE_IA64 0x0200
+#define EFI_IMAGE_MACHINE_IA64 0x0200
///
/// PE32+ Machine type for EBC UEFI images.
///
-#define EFI_IMAGE_MACHINE_EBC 0x0EBC
+#define EFI_IMAGE_MACHINE_EBC 0x0EBC
///
/// PE32+ Machine type for X64 UEFI images.
///
-#define EFI_IMAGE_MACHINE_X64 0x8664
+#define EFI_IMAGE_MACHINE_X64 0x8664
///
/// PE32+ Machine type for ARM mixed ARM and Thumb/Thumb2 images.
@@ -248,54 +242,84 @@
///
#define EFI_IMAGE_MACHINE_AARCH64 0xAA64
+///
+/// PE32+ Machine type for RISC-V 32/64/128
+///
+#define EFI_IMAGE_MACHINE_RISCV32 0x5032
+#define EFI_IMAGE_MACHINE_RISCV64 0x5064
+#define EFI_IMAGE_MACHINE_RISCV128 0x5128
-#if defined (MDE_CPU_IA32)
+///
+/// PE32+ Machine type for LoongArch 32/64 images.
+///
+#define EFI_IMAGE_MACHINE_LOONGARCH32 0x6232
+#define EFI_IMAGE_MACHINE_LOONGARCH64 0x6264
+
+#if !defined (EFI_IMAGE_MACHINE_TYPE_VALUE) && !defined (EFI_IMAGE_MACHINE_CROSS_TYPE_VALUE)
+ #if defined (MDE_CPU_IA32)
#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) \
- (((Machine) == EFI_IMAGE_MACHINE_IA32) || ((Machine) == EFI_IMAGE_MACHINE_EBC))
+ ((Machine) == EFI_IMAGE_MACHINE_IA32)
-#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) ((Machine) == EFI_IMAGE_MACHINE_X64)
+#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) ((Machine) == EFI_IMAGE_MACHINE_X64)
-#elif defined (MDE_CPU_IPF)
+ #elif defined (MDE_CPU_X64)
#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) \
- (((Machine) == EFI_IMAGE_MACHINE_IA64) || ((Machine) == EFI_IMAGE_MACHINE_EBC))
+ ((Machine) == EFI_IMAGE_MACHINE_X64)
-#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE)
+#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) ((Machine) == EFI_IMAGE_MACHINE_IA32)
-#elif defined (MDE_CPU_X64)
+ #elif defined (MDE_CPU_ARM)
+
+#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) ((Machine) == EFI_IMAGE_MACHINE_ARMTHUMB_MIXED)
+
+#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE)
+
+ #elif defined (MDE_CPU_AARCH64)
#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) \
- (((Machine) == EFI_IMAGE_MACHINE_X64) || ((Machine) == EFI_IMAGE_MACHINE_EBC))
+ ((Machine) == EFI_IMAGE_MACHINE_AARCH64)
-#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) ((Machine) == EFI_IMAGE_MACHINE_IA32)
+#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE)
-#elif defined (MDE_CPU_ARM)
+ #elif defined (MDE_CPU_RISCV64)
+#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) \
+ ((Machine) == EFI_IMAGE_MACHINE_RISCV64)
+
+#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE)
+
+ #elif defined (MDE_CPU_LOONGARCH64)
#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) \
- (((Machine) == EFI_IMAGE_MACHINE_ARMTHUMB_MIXED) || ((Machine) == EFI_IMAGE_MACHINE_EBC))
+ ((Machine) == EFI_IMAGE_MACHINE_LOONGARCH64)
-#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) ((Machine) == EFI_IMAGE_MACHINE_ARMTHUMB_MIXED)
+#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE)
-#elif defined (MDE_CPU_AARCH64)
-
-#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) \
- (((Machine) == EFI_IMAGE_MACHINE_AARCH64) || ((Machine) == EFI_IMAGE_MACHINE_EBC))
-
-#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE)
-
-#elif defined (MDE_CPU_EBC)
+ #elif defined (MDE_CPU_EBC)
///
/// This is just to make sure you can cross compile with the EBC compiler.
/// It does not make sense to have a PE loader coded in EBC.
///
-#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) ((Machine) == EFI_IMAGE_MACHINE_EBC)
+#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) ((Machine) == EFI_IMAGE_MACHINE_EBC)
-#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE)
+#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE)
+ #else
+ #error Unknown Processor Type
+ #endif
#else
-#error Unknown Processor Type
+ #if defined (EFI_IMAGE_MACHINE_TYPE_VALUE)
+#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) ((Machine) == EFI_IMAGE_MACHINE_TYPE_VALUE)
+ #else
+#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) (FALSE)
+ #endif
+ #if defined (EFI_IMAGE_MACHINE_CROSS_TYPE_VALUE)
+#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) ((Machine) == EFI_IMAGE_MACHINE_CROSS_TYPE_VALUE)
+ #else
+#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE)
+ #endif
#endif
#endif
diff --git a/src/include/ipxe/efi/Uefi/UefiGpt.h b/src/include/ipxe/efi/Uefi/UefiGpt.h
index 19acf55..38eff7d 100644
--- a/src/include/ipxe/efi/Uefi/UefiGpt.h
+++ b/src/include/ipxe/efi/Uefi/UefiGpt.h
@@ -1,31 +1,29 @@
/** @file
EFI Guid Partition Table Format Definition.
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __UEFI_GPT_H__
#define __UEFI_GPT_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
///
/// The primary GUID Partition Table Header must be
/// located in LBA 1 (i.e., the second logical block).
///
-#define PRIMARY_PART_HEADER_LBA 1
+#define PRIMARY_PART_HEADER_LBA 1
///
/// EFI Partition Table Signature: "EFI PART".
///
-#define EFI_PTAB_HEADER_ID SIGNATURE_64 ('E','F','I',' ','P','A','R','T')
+#define EFI_PTAB_HEADER_ID SIGNATURE_64 ('E','F','I',' ','P','A','R','T')
+///
+/// Minimum bytes reserve for EFI entry array buffer.
+///
+#define EFI_GPT_PART_ENTRY_MIN_SIZE 16384
#pragma pack(1)
@@ -37,51 +35,51 @@
/// The table header for the GPT partition Table.
/// This header contains EFI_PTAB_HEADER_ID.
///
- EFI_TABLE_HEADER Header;
+ EFI_TABLE_HEADER Header;
///
/// The LBA that contains this data structure.
///
- EFI_LBA MyLBA;
+ EFI_LBA MyLBA;
///
/// LBA address of the alternate GUID Partition Table Header.
///
- EFI_LBA AlternateLBA;
+ EFI_LBA AlternateLBA;
///
/// The first usable logical block that may be used
/// by a partition described by a GUID Partition Entry.
///
- EFI_LBA FirstUsableLBA;
+ EFI_LBA FirstUsableLBA;
///
/// The last usable logical block that may be used
/// by a partition described by a GUID Partition Entry.
///
- EFI_LBA LastUsableLBA;
+ EFI_LBA LastUsableLBA;
///
/// GUID that can be used to uniquely identify the disk.
///
- EFI_GUID DiskGUID;
+ EFI_GUID DiskGUID;
///
/// The starting LBA of the GUID Partition Entry array.
///
- EFI_LBA PartitionEntryLBA;
+ EFI_LBA PartitionEntryLBA;
///
/// The number of Partition Entries in the GUID Partition Entry array.
///
- UINT32 NumberOfPartitionEntries;
+ UINT32 NumberOfPartitionEntries;
///
/// The size, in bytes, of each the GUID Partition
/// Entry structures in the GUID Partition Entry
/// array. This field shall be set to a value of 128 x 2^n where n is
/// an integer greater than or equal to zero (e.g., 128, 256, 512, etc.).
///
- UINT32 SizeOfPartitionEntry;
+ UINT32 SizeOfPartitionEntry;
///
/// The CRC32 of the GUID Partition Entry array.
/// Starts at PartitionEntryLBA and is
/// computed over a byte length of
/// NumberOfPartitionEntries * SizeOfPartitionEntry.
///
- UINT32 PartitionEntryArrayCRC32;
+ UINT32 PartitionEntryArrayCRC32;
} EFI_PARTITION_TABLE_HEADER;
///
@@ -92,21 +90,21 @@
/// Unique ID that defines the purpose and type of this Partition. A value of
/// zero defines that this partition entry is not being used.
///
- EFI_GUID PartitionTypeGUID;
+ EFI_GUID PartitionTypeGUID;
///
/// GUID that is unique for every partition entry. Every partition ever
/// created will have a unique GUID.
/// This GUID must be assigned when the GUID Partition Entry is created.
///
- EFI_GUID UniquePartitionGUID;
+ EFI_GUID UniquePartitionGUID;
///
/// Starting LBA of the partition defined by this entry
///
- EFI_LBA StartingLBA;
+ EFI_LBA StartingLBA;
///
/// Ending LBA of the partition defined by this entry.
///
- EFI_LBA EndingLBA;
+ EFI_LBA EndingLBA;
///
/// Attribute bits, all bits reserved by UEFI
/// Bit 0: If this bit is set, the partition is required for the platform to function. The owner/creator of the
@@ -139,5 +137,3 @@
#pragma pack()
#endif
-
-
diff --git a/src/include/ipxe/efi/Uefi/UefiInternalFormRepresentation.h b/src/include/ipxe/efi/Uefi/UefiInternalFormRepresentation.h
index 88c0262..36468e0 100644
--- a/src/include/ipxe/efi/Uefi/UefiInternalFormRepresentation.h
+++ b/src/include/ipxe/efi/Uefi/UefiInternalFormRepresentation.h
@@ -3,15 +3,9 @@
IFR is primarily consumed by the EFI presentation engine, and produced by EFI
internal application and drivers as well as all add-in card option-ROM drivers
-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
(C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
These definitions are from UEFI 2.1 and 2.2.
@@ -21,15 +15,15 @@
#ifndef __UEFI_INTERNAL_FORMREPRESENTATION_H__
#define __UEFI_INTERNAL_FORMREPRESENTATION_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/Guid/HiiFormMapMethodGuid.h>
///
/// The following types are currently defined:
///
-typedef VOID* EFI_HII_HANDLE;
-typedef CHAR16* EFI_STRING;
+typedef VOID *EFI_HII_HANDLE;
+typedef CHAR16 *EFI_STRING;
typedef UINT16 EFI_IMAGE_ID;
typedef UINT16 EFI_QUESTION_ID;
typedef UINT16 EFI_STRING_ID;
@@ -37,11 +31,9 @@
typedef UINT16 EFI_VARSTORE_ID;
typedef UINT16 EFI_ANIMATION_ID;
-typedef UINT16 EFI_DEFAULT_ID;
+typedef UINT16 EFI_DEFAULT_ID;
-typedef UINT32 EFI_HII_FONT_STYLE;
-
-
+typedef UINT32 EFI_HII_FONT_STYLE;
#pragma pack(1)
@@ -54,35 +46,35 @@
/// The header found at the start of each package list.
///
typedef struct {
- EFI_GUID PackageListGuid;
- UINT32 PackageLength;
+ EFI_GUID PackageListGuid;
+ UINT32 PackageLength;
} EFI_HII_PACKAGE_LIST_HEADER;
///
/// The header found at the start of each package.
///
typedef struct {
- UINT32 Length:24;
- UINT32 Type:8;
+ UINT32 Length : 24;
+ UINT32 Type : 8;
// UINT8 Data[...];
} EFI_HII_PACKAGE_HEADER;
//
// Value of HII package type
//
-#define EFI_HII_PACKAGE_TYPE_ALL 0x00
-#define EFI_HII_PACKAGE_TYPE_GUID 0x01
-#define EFI_HII_PACKAGE_FORMS 0x02
-#define EFI_HII_PACKAGE_STRINGS 0x04
-#define EFI_HII_PACKAGE_FONTS 0x05
-#define EFI_HII_PACKAGE_IMAGES 0x06
-#define EFI_HII_PACKAGE_SIMPLE_FONTS 0x07
-#define EFI_HII_PACKAGE_DEVICE_PATH 0x08
-#define EFI_HII_PACKAGE_KEYBOARD_LAYOUT 0x09
-#define EFI_HII_PACKAGE_ANIMATIONS 0x0A
-#define EFI_HII_PACKAGE_END 0xDF
-#define EFI_HII_PACKAGE_TYPE_SYSTEM_BEGIN 0xE0
-#define EFI_HII_PACKAGE_TYPE_SYSTEM_END 0xFF
+#define EFI_HII_PACKAGE_TYPE_ALL 0x00
+#define EFI_HII_PACKAGE_TYPE_GUID 0x01
+#define EFI_HII_PACKAGE_FORMS 0x02
+#define EFI_HII_PACKAGE_STRINGS 0x04
+#define EFI_HII_PACKAGE_FONTS 0x05
+#define EFI_HII_PACKAGE_IMAGES 0x06
+#define EFI_HII_PACKAGE_SIMPLE_FONTS 0x07
+#define EFI_HII_PACKAGE_DEVICE_PATH 0x08
+#define EFI_HII_PACKAGE_KEYBOARD_LAYOUT 0x09
+#define EFI_HII_PACKAGE_ANIMATIONS 0x0A
+#define EFI_HII_PACKAGE_END 0xDF
+#define EFI_HII_PACKAGE_TYPE_SYSTEM_BEGIN 0xE0
+#define EFI_HII_PACKAGE_TYPE_SYSTEM_END 0xFF
//
// Definitions for Simplified Font Package
@@ -91,10 +83,10 @@
///
/// Contents of EFI_NARROW_GLYPH.Attributes.
///@{
-#define EFI_GLYPH_NON_SPACING 0x01
-#define EFI_GLYPH_WIDE 0x02
-#define EFI_GLYPH_HEIGHT 19
-#define EFI_GLYPH_WIDTH 8
+#define EFI_GLYPH_NON_SPACING 0x01
+#define EFI_GLYPH_WIDE 0x02
+#define EFI_GLYPH_HEIGHT 19
+#define EFI_GLYPH_WIDTH 8
///@}
///
@@ -105,17 +97,17 @@
/// The Unicode representation of the glyph. The term weight is the
/// technical term for a character code.
///
- CHAR16 UnicodeWeight;
+ CHAR16 UnicodeWeight;
///
/// The data element containing the glyph definitions.
///
- UINT8 Attributes;
+ UINT8 Attributes;
///
/// The column major glyph representation of the character. Bits
/// with values of one indicate that the corresponding pixel is to be
/// on when normally displayed; those with zero are off.
///
- UINT8 GlyphCol1[EFI_GLYPH_HEIGHT];
+ UINT8 GlyphCol1[EFI_GLYPH_HEIGHT];
} EFI_NARROW_GLYPH;
///
@@ -127,29 +119,29 @@
/// The Unicode representation of the glyph. The term weight is the
/// technical term for a character code.
///
- CHAR16 UnicodeWeight;
+ CHAR16 UnicodeWeight;
///
/// The data element containing the glyph definitions.
///
- UINT8 Attributes;
+ UINT8 Attributes;
///
/// The column major glyph representation of the character. Bits
/// with values of one indicate that the corresponding pixel is to be
/// on when normally displayed; those with zero are off.
///
- UINT8 GlyphCol1[EFI_GLYPH_HEIGHT];
+ UINT8 GlyphCol1[EFI_GLYPH_HEIGHT];
///
/// The column major glyph representation of the character. Bits
/// with values of one indicate that the corresponding pixel is to be
/// on when normally displayed; those with zero are off.
///
- UINT8 GlyphCol2[EFI_GLYPH_HEIGHT];
+ UINT8 GlyphCol2[EFI_GLYPH_HEIGHT];
///
/// Ensures that sizeof (EFI_WIDE_GLYPH) is twice the
/// sizeof (EFI_NARROW_GLYPH). The contents of Pad must
/// be zero.
///
- UINT8 Pad[3];
+ UINT8 Pad[3];
} EFI_WIDE_GLYPH;
///
@@ -157,9 +149,9 @@
/// followed by a series of glyph structures.
///
typedef struct _EFI_HII_SIMPLE_FONT_PACKAGE_HDR {
- EFI_HII_PACKAGE_HEADER Header;
- UINT16 NumberOfNarrowGlyphs;
- UINT16 NumberOfWideGlyphs;
+ EFI_HII_PACKAGE_HEADER Header;
+ UINT16 NumberOfNarrowGlyphs;
+ UINT16 NumberOfWideGlyphs;
// EFI_NARROW_GLYPH NarrowGlyphs[];
// EFI_WIDE_GLYPH WideGlyphs[];
} EFI_HII_SIMPLE_FONT_PACKAGE_HDR;
@@ -172,21 +164,21 @@
//
// Value for font style
//
-#define EFI_HII_FONT_STYLE_NORMAL 0x00000000
-#define EFI_HII_FONT_STYLE_BOLD 0x00000001
-#define EFI_HII_FONT_STYLE_ITALIC 0x00000002
-#define EFI_HII_FONT_STYLE_EMBOSS 0x00010000
-#define EFI_HII_FONT_STYLE_OUTLINE 0x00020000
-#define EFI_HII_FONT_STYLE_SHADOW 0x00040000
-#define EFI_HII_FONT_STYLE_UNDERLINE 0x00080000
-#define EFI_HII_FONT_STYLE_DBL_UNDER 0x00100000
+#define EFI_HII_FONT_STYLE_NORMAL 0x00000000
+#define EFI_HII_FONT_STYLE_BOLD 0x00000001
+#define EFI_HII_FONT_STYLE_ITALIC 0x00000002
+#define EFI_HII_FONT_STYLE_EMBOSS 0x00010000
+#define EFI_HII_FONT_STYLE_OUTLINE 0x00020000
+#define EFI_HII_FONT_STYLE_SHADOW 0x00040000
+#define EFI_HII_FONT_STYLE_UNDERLINE 0x00080000
+#define EFI_HII_FONT_STYLE_DBL_UNDER 0x00100000
typedef struct _EFI_HII_GLYPH_INFO {
- UINT16 Width;
- UINT16 Height;
- INT16 OffsetX;
- INT16 OffsetY;
- INT16 AdvanceX;
+ UINT16 Width;
+ UINT16 Height;
+ INT16 OffsetX;
+ INT16 OffsetY;
+ INT16 AdvanceX;
} EFI_HII_GLYPH_INFO;
///
@@ -196,33 +188,33 @@
/// information, the glyph bitmaps and the character map.
///
typedef struct _EFI_HII_FONT_PACKAGE_HDR {
- EFI_HII_PACKAGE_HEADER Header;
- UINT32 HdrSize;
- UINT32 GlyphBlockOffset;
- EFI_HII_GLYPH_INFO Cell;
- EFI_HII_FONT_STYLE FontStyle;
- CHAR16 FontFamily[1];
+ EFI_HII_PACKAGE_HEADER Header;
+ UINT32 HdrSize;
+ UINT32 GlyphBlockOffset;
+ EFI_HII_GLYPH_INFO Cell;
+ EFI_HII_FONT_STYLE FontStyle;
+ CHAR16 FontFamily[1];
} EFI_HII_FONT_PACKAGE_HDR;
//
// Value of different glyph info block types
//
-#define EFI_HII_GIBT_END 0x00
-#define EFI_HII_GIBT_GLYPH 0x10
-#define EFI_HII_GIBT_GLYPHS 0x11
-#define EFI_HII_GIBT_GLYPH_DEFAULT 0x12
-#define EFI_HII_GIBT_GLYPHS_DEFAULT 0x13
-#define EFI_HII_GIBT_GLYPH_VARIABILITY 0x14
-#define EFI_HII_GIBT_DUPLICATE 0x20
-#define EFI_HII_GIBT_SKIP2 0x21
-#define EFI_HII_GIBT_SKIP1 0x22
-#define EFI_HII_GIBT_DEFAULTS 0x23
-#define EFI_HII_GIBT_EXT1 0x30
-#define EFI_HII_GIBT_EXT2 0x31
-#define EFI_HII_GIBT_EXT4 0x32
+#define EFI_HII_GIBT_END 0x00
+#define EFI_HII_GIBT_GLYPH 0x10
+#define EFI_HII_GIBT_GLYPHS 0x11
+#define EFI_HII_GIBT_GLYPH_DEFAULT 0x12
+#define EFI_HII_GIBT_GLYPHS_DEFAULT 0x13
+#define EFI_HII_GIBT_GLYPH_VARIABILITY 0x14
+#define EFI_HII_GIBT_DUPLICATE 0x20
+#define EFI_HII_GIBT_SKIP2 0x21
+#define EFI_HII_GIBT_SKIP1 0x22
+#define EFI_HII_GIBT_DEFAULTS 0x23
+#define EFI_HII_GIBT_EXT1 0x30
+#define EFI_HII_GIBT_EXT2 0x31
+#define EFI_HII_GIBT_EXT4 0x32
typedef struct _EFI_HII_GLYPH_BLOCK {
- UINT8 BlockType;
+ UINT8 BlockType;
} EFI_HII_GLYPH_BLOCK;
//
@@ -289,7 +281,7 @@
EFI_HII_GLYPH_BLOCK Header;
EFI_HII_GLYPH_INFO Cell;
UINT8 GlyphPackInBits;
- UINT8 BitmapData [1];
+ UINT8 BitmapData[1];
} EFI_HII_GIBT_VARIABILITY_BLOCK;
typedef struct _EFI_HII_GIBT_SKIP1_BLOCK {
@@ -312,7 +304,7 @@
/// associated with the package list.
///
typedef struct _EFI_HII_DEVICE_PATH_PACKAGE_HDR {
- EFI_HII_PACKAGE_HEADER Header;
+ EFI_HII_PACKAGE_HEADER Header;
// EFI_DEVICE_PATH_PROTOCOL DevicePath[];
} EFI_HII_DEVICE_PATH_PACKAGE_HDR;
@@ -325,8 +317,8 @@
/// The GUID package is used to carry data where the format is defined by a GUID.
///
typedef struct _EFI_HII_GUID_PACKAGE_HDR {
- EFI_HII_PACKAGE_HEADER Header;
- EFI_GUID Guid;
+ EFI_HII_PACKAGE_HEADER Header;
+ EFI_GUID Guid;
// Data per GUID definition may follow
} EFI_HII_GUID_PACKAGE_HDR;
@@ -335,45 +327,45 @@
// Section 27.3.6
//
-#define UEFI_CONFIG_LANG "x-UEFI"
-#define UEFI_CONFIG_LANG_2 "x-i-UEFI"
+#define UEFI_CONFIG_LANG "x-UEFI"
+#define UEFI_CONFIG_LANG_2 "x-i-UEFI"
///
/// The fixed header consists of a standard record header and then the string identifiers
/// contained in this section and the offsets of the string and language information.
///
typedef struct _EFI_HII_STRING_PACKAGE_HDR {
- EFI_HII_PACKAGE_HEADER Header;
- UINT32 HdrSize;
- UINT32 StringInfoOffset;
- CHAR16 LanguageWindow[16];
- EFI_STRING_ID LanguageName;
- CHAR8 Language[1];
+ EFI_HII_PACKAGE_HEADER Header;
+ UINT32 HdrSize;
+ UINT32 StringInfoOffset;
+ CHAR16 LanguageWindow[16];
+ EFI_STRING_ID LanguageName;
+ CHAR8 Language[1];
} EFI_HII_STRING_PACKAGE_HDR;
typedef struct {
- UINT8 BlockType;
+ UINT8 BlockType;
} EFI_HII_STRING_BLOCK;
//
// Value of different string information block types
//
-#define EFI_HII_SIBT_END 0x00
-#define EFI_HII_SIBT_STRING_SCSU 0x10
-#define EFI_HII_SIBT_STRING_SCSU_FONT 0x11
-#define EFI_HII_SIBT_STRINGS_SCSU 0x12
-#define EFI_HII_SIBT_STRINGS_SCSU_FONT 0x13
-#define EFI_HII_SIBT_STRING_UCS2 0x14
-#define EFI_HII_SIBT_STRING_UCS2_FONT 0x15
-#define EFI_HII_SIBT_STRINGS_UCS2 0x16
-#define EFI_HII_SIBT_STRINGS_UCS2_FONT 0x17
-#define EFI_HII_SIBT_DUPLICATE 0x20
-#define EFI_HII_SIBT_SKIP2 0x21
-#define EFI_HII_SIBT_SKIP1 0x22
-#define EFI_HII_SIBT_EXT1 0x30
-#define EFI_HII_SIBT_EXT2 0x31
-#define EFI_HII_SIBT_EXT4 0x32
-#define EFI_HII_SIBT_FONT 0x40
+#define EFI_HII_SIBT_END 0x00
+#define EFI_HII_SIBT_STRING_SCSU 0x10
+#define EFI_HII_SIBT_STRING_SCSU_FONT 0x11
+#define EFI_HII_SIBT_STRINGS_SCSU 0x12
+#define EFI_HII_SIBT_STRINGS_SCSU_FONT 0x13
+#define EFI_HII_SIBT_STRING_UCS2 0x14
+#define EFI_HII_SIBT_STRING_UCS2_FONT 0x15
+#define EFI_HII_SIBT_STRINGS_UCS2 0x16
+#define EFI_HII_SIBT_STRINGS_UCS2_FONT 0x17
+#define EFI_HII_SIBT_DUPLICATE 0x20
+#define EFI_HII_SIBT_SKIP2 0x21
+#define EFI_HII_SIBT_SKIP1 0x22
+#define EFI_HII_SIBT_EXT1 0x30
+#define EFI_HII_SIBT_EXT2 0x31
+#define EFI_HII_SIBT_EXT4 0x32
+#define EFI_HII_SIBT_FONT 0x40
//
// Definition of different string information block types
@@ -407,11 +399,11 @@
} EFI_HII_SIBT_EXT4_BLOCK;
typedef struct _EFI_HII_SIBT_FONT_BLOCK {
- EFI_HII_SIBT_EXT2_BLOCK Header;
- UINT8 FontId;
- UINT16 FontSize;
- EFI_HII_FONT_STYLE FontStyle;
- CHAR16 FontName[1];
+ EFI_HII_SIBT_EXT2_BLOCK Header;
+ UINT8 FontId;
+ UINT16 FontSize;
+ EFI_HII_FONT_STYLE FontStyle;
+ CHAR16 FontName[1];
} EFI_HII_SIBT_FONT_BLOCK;
typedef struct _EFI_HII_SIBT_SKIP1_BLOCK {
@@ -478,163 +470,163 @@
//
typedef struct _EFI_HII_IMAGE_PACKAGE_HDR {
- EFI_HII_PACKAGE_HEADER Header;
- UINT32 ImageInfoOffset;
- UINT32 PaletteInfoOffset;
+ EFI_HII_PACKAGE_HEADER Header;
+ UINT32 ImageInfoOffset;
+ UINT32 PaletteInfoOffset;
} EFI_HII_IMAGE_PACKAGE_HDR;
typedef struct _EFI_HII_IMAGE_BLOCK {
- UINT8 BlockType;
+ UINT8 BlockType;
} EFI_HII_IMAGE_BLOCK;
//
// Value of different image information block types
//
-#define EFI_HII_IIBT_END 0x00
-#define EFI_HII_IIBT_IMAGE_1BIT 0x10
-#define EFI_HII_IIBT_IMAGE_1BIT_TRANS 0x11
-#define EFI_HII_IIBT_IMAGE_4BIT 0x12
-#define EFI_HII_IIBT_IMAGE_4BIT_TRANS 0x13
-#define EFI_HII_IIBT_IMAGE_8BIT 0x14
-#define EFI_HII_IIBT_IMAGE_8BIT_TRANS 0x15
-#define EFI_HII_IIBT_IMAGE_24BIT 0x16
-#define EFI_HII_IIBT_IMAGE_24BIT_TRANS 0x17
-#define EFI_HII_IIBT_IMAGE_JPEG 0x18
-#define EFI_HII_IIBT_IMAGE_PNG 0x19
-#define EFI_HII_IIBT_DUPLICATE 0x20
-#define EFI_HII_IIBT_SKIP2 0x21
-#define EFI_HII_IIBT_SKIP1 0x22
-#define EFI_HII_IIBT_EXT1 0x30
-#define EFI_HII_IIBT_EXT2 0x31
-#define EFI_HII_IIBT_EXT4 0x32
+#define EFI_HII_IIBT_END 0x00
+#define EFI_HII_IIBT_IMAGE_1BIT 0x10
+#define EFI_HII_IIBT_IMAGE_1BIT_TRANS 0x11
+#define EFI_HII_IIBT_IMAGE_4BIT 0x12
+#define EFI_HII_IIBT_IMAGE_4BIT_TRANS 0x13
+#define EFI_HII_IIBT_IMAGE_8BIT 0x14
+#define EFI_HII_IIBT_IMAGE_8BIT_TRANS 0x15
+#define EFI_HII_IIBT_IMAGE_24BIT 0x16
+#define EFI_HII_IIBT_IMAGE_24BIT_TRANS 0x17
+#define EFI_HII_IIBT_IMAGE_JPEG 0x18
+#define EFI_HII_IIBT_IMAGE_PNG 0x19
+#define EFI_HII_IIBT_DUPLICATE 0x20
+#define EFI_HII_IIBT_SKIP2 0x21
+#define EFI_HII_IIBT_SKIP1 0x22
+#define EFI_HII_IIBT_EXT1 0x30
+#define EFI_HII_IIBT_EXT2 0x31
+#define EFI_HII_IIBT_EXT4 0x32
//
// Definition of different image information block types
//
typedef struct _EFI_HII_IIBT_END_BLOCK {
- EFI_HII_IMAGE_BLOCK Header;
+ EFI_HII_IMAGE_BLOCK Header;
} EFI_HII_IIBT_END_BLOCK;
typedef struct _EFI_HII_IIBT_EXT1_BLOCK {
- EFI_HII_IMAGE_BLOCK Header;
- UINT8 BlockType2;
- UINT8 Length;
+ EFI_HII_IMAGE_BLOCK Header;
+ UINT8 BlockType2;
+ UINT8 Length;
} EFI_HII_IIBT_EXT1_BLOCK;
typedef struct _EFI_HII_IIBT_EXT2_BLOCK {
- EFI_HII_IMAGE_BLOCK Header;
- UINT8 BlockType2;
- UINT16 Length;
+ EFI_HII_IMAGE_BLOCK Header;
+ UINT8 BlockType2;
+ UINT16 Length;
} EFI_HII_IIBT_EXT2_BLOCK;
typedef struct _EFI_HII_IIBT_EXT4_BLOCK {
- EFI_HII_IMAGE_BLOCK Header;
- UINT8 BlockType2;
- UINT32 Length;
+ EFI_HII_IMAGE_BLOCK Header;
+ UINT8 BlockType2;
+ UINT32 Length;
} EFI_HII_IIBT_EXT4_BLOCK;
typedef struct _EFI_HII_IIBT_IMAGE_1BIT_BASE {
- UINT16 Width;
- UINT16 Height;
- UINT8 Data[1];
+ UINT16 Width;
+ UINT16 Height;
+ UINT8 Data[1];
} EFI_HII_IIBT_IMAGE_1BIT_BASE;
typedef struct _EFI_HII_IIBT_IMAGE_1BIT_BLOCK {
- EFI_HII_IMAGE_BLOCK Header;
- UINT8 PaletteIndex;
- EFI_HII_IIBT_IMAGE_1BIT_BASE Bitmap;
+ EFI_HII_IMAGE_BLOCK Header;
+ UINT8 PaletteIndex;
+ EFI_HII_IIBT_IMAGE_1BIT_BASE Bitmap;
} EFI_HII_IIBT_IMAGE_1BIT_BLOCK;
typedef struct _EFI_HII_IIBT_IMAGE_1BIT_TRANS_BLOCK {
- EFI_HII_IMAGE_BLOCK Header;
- UINT8 PaletteIndex;
- EFI_HII_IIBT_IMAGE_1BIT_BASE Bitmap;
+ EFI_HII_IMAGE_BLOCK Header;
+ UINT8 PaletteIndex;
+ EFI_HII_IIBT_IMAGE_1BIT_BASE Bitmap;
} EFI_HII_IIBT_IMAGE_1BIT_TRANS_BLOCK;
typedef struct _EFI_HII_RGB_PIXEL {
- UINT8 b;
- UINT8 g;
- UINT8 r;
+ UINT8 b;
+ UINT8 g;
+ UINT8 r;
} EFI_HII_RGB_PIXEL;
typedef struct _EFI_HII_IIBT_IMAGE_24BIT_BASE {
- UINT16 Width;
- UINT16 Height;
- EFI_HII_RGB_PIXEL Bitmap[1];
+ UINT16 Width;
+ UINT16 Height;
+ EFI_HII_RGB_PIXEL Bitmap[1];
} EFI_HII_IIBT_IMAGE_24BIT_BASE;
typedef struct _EFI_HII_IIBT_IMAGE_24BIT_BLOCK {
- EFI_HII_IMAGE_BLOCK Header;
- EFI_HII_IIBT_IMAGE_24BIT_BASE Bitmap;
+ EFI_HII_IMAGE_BLOCK Header;
+ EFI_HII_IIBT_IMAGE_24BIT_BASE Bitmap;
} EFI_HII_IIBT_IMAGE_24BIT_BLOCK;
typedef struct _EFI_HII_IIBT_IMAGE_24BIT_TRANS_BLOCK {
- EFI_HII_IMAGE_BLOCK Header;
- EFI_HII_IIBT_IMAGE_24BIT_BASE Bitmap;
+ EFI_HII_IMAGE_BLOCK Header;
+ EFI_HII_IIBT_IMAGE_24BIT_BASE Bitmap;
} EFI_HII_IIBT_IMAGE_24BIT_TRANS_BLOCK;
typedef struct _EFI_HII_IIBT_IMAGE_4BIT_BASE {
- UINT16 Width;
- UINT16 Height;
- UINT8 Data[1];
+ UINT16 Width;
+ UINT16 Height;
+ UINT8 Data[1];
} EFI_HII_IIBT_IMAGE_4BIT_BASE;
typedef struct _EFI_HII_IIBT_IMAGE_4BIT_BLOCK {
- EFI_HII_IMAGE_BLOCK Header;
- UINT8 PaletteIndex;
- EFI_HII_IIBT_IMAGE_4BIT_BASE Bitmap;
+ EFI_HII_IMAGE_BLOCK Header;
+ UINT8 PaletteIndex;
+ EFI_HII_IIBT_IMAGE_4BIT_BASE Bitmap;
} EFI_HII_IIBT_IMAGE_4BIT_BLOCK;
typedef struct _EFI_HII_IIBT_IMAGE_4BIT_TRANS_BLOCK {
- EFI_HII_IMAGE_BLOCK Header;
- UINT8 PaletteIndex;
- EFI_HII_IIBT_IMAGE_4BIT_BASE Bitmap;
+ EFI_HII_IMAGE_BLOCK Header;
+ UINT8 PaletteIndex;
+ EFI_HII_IIBT_IMAGE_4BIT_BASE Bitmap;
} EFI_HII_IIBT_IMAGE_4BIT_TRANS_BLOCK;
typedef struct _EFI_HII_IIBT_IMAGE_8BIT_BASE {
- UINT16 Width;
- UINT16 Height;
- UINT8 Data[1];
+ UINT16 Width;
+ UINT16 Height;
+ UINT8 Data[1];
} EFI_HII_IIBT_IMAGE_8BIT_BASE;
typedef struct _EFI_HII_IIBT_IMAGE_8BIT_PALETTE_BLOCK {
- EFI_HII_IMAGE_BLOCK Header;
- UINT8 PaletteIndex;
- EFI_HII_IIBT_IMAGE_8BIT_BASE Bitmap;
+ EFI_HII_IMAGE_BLOCK Header;
+ UINT8 PaletteIndex;
+ EFI_HII_IIBT_IMAGE_8BIT_BASE Bitmap;
} EFI_HII_IIBT_IMAGE_8BIT_BLOCK;
typedef struct _EFI_HII_IIBT_IMAGE_8BIT_TRANS_BLOCK {
- EFI_HII_IMAGE_BLOCK Header;
- UINT8 PaletteIndex;
- EFI_HII_IIBT_IMAGE_8BIT_BASE Bitmap;
+ EFI_HII_IMAGE_BLOCK Header;
+ UINT8 PaletteIndex;
+ EFI_HII_IIBT_IMAGE_8BIT_BASE Bitmap;
} EFI_HII_IIBT_IMAGE_8BIT_TRAN_BLOCK;
typedef struct _EFI_HII_IIBT_DUPLICATE_BLOCK {
- EFI_HII_IMAGE_BLOCK Header;
- EFI_IMAGE_ID ImageId;
+ EFI_HII_IMAGE_BLOCK Header;
+ EFI_IMAGE_ID ImageId;
} EFI_HII_IIBT_DUPLICATE_BLOCK;
typedef struct _EFI_HII_IIBT_JPEG_BLOCK {
- EFI_HII_IMAGE_BLOCK Header;
- UINT32 Size;
- UINT8 Data[1];
+ EFI_HII_IMAGE_BLOCK Header;
+ UINT32 Size;
+ UINT8 Data[1];
} EFI_HII_IIBT_JPEG_BLOCK;
typedef struct _EFI_HII_IIBT_PNG_BLOCK {
- EFI_HII_IMAGE_BLOCK Header;
- UINT32 Size;
- UINT8 Data[1];
+ EFI_HII_IMAGE_BLOCK Header;
+ UINT32 Size;
+ UINT8 Data[1];
} EFI_HII_IIBT_PNG_BLOCK;
typedef struct _EFI_HII_IIBT_SKIP1_BLOCK {
- EFI_HII_IMAGE_BLOCK Header;
- UINT8 SkipCount;
+ EFI_HII_IMAGE_BLOCK Header;
+ UINT8 SkipCount;
} EFI_HII_IIBT_SKIP1_BLOCK;
typedef struct _EFI_HII_IIBT_SKIP2_BLOCK {
- EFI_HII_IMAGE_BLOCK Header;
- UINT16 SkipCount;
+ EFI_HII_IMAGE_BLOCK Header;
+ UINT16 SkipCount;
} EFI_HII_IIBT_SKIP2_BLOCK;
//
@@ -642,12 +634,12 @@
//
typedef struct _EFI_HII_IMAGE_PALETTE_INFO_HEADER {
- UINT16 PaletteCount;
+ UINT16 PaletteCount;
} EFI_HII_IMAGE_PALETTE_INFO_HEADER;
typedef struct _EFI_HII_IMAGE_PALETTE_INFO {
- UINT16 PaletteSize;
- EFI_HII_RGB_PIXEL PaletteValue[1];
+ UINT16 PaletteSize;
+ EFI_HII_RGB_PIXEL PaletteValue[1];
} EFI_HII_IMAGE_PALETTE_INFO;
//
@@ -659,146 +651,146 @@
/// The Form package is used to carry form-based encoding data.
///
typedef struct _EFI_HII_FORM_PACKAGE_HDR {
- EFI_HII_PACKAGE_HEADER Header;
+ EFI_HII_PACKAGE_HEADER Header;
// EFI_IFR_OP_HEADER OpCodeHeader;
// More op-codes follow
} EFI_HII_FORM_PACKAGE_HDR;
typedef struct {
- UINT8 Hour;
- UINT8 Minute;
- UINT8 Second;
+ UINT8 Hour;
+ UINT8 Minute;
+ UINT8 Second;
} EFI_HII_TIME;
typedef struct {
- UINT16 Year;
- UINT8 Month;
- UINT8 Day;
+ UINT16 Year;
+ UINT8 Month;
+ UINT8 Day;
} EFI_HII_DATE;
typedef struct {
- EFI_QUESTION_ID QuestionId;
- EFI_FORM_ID FormId;
- EFI_GUID FormSetGuid;
- EFI_STRING_ID DevicePath;
+ EFI_QUESTION_ID QuestionId;
+ EFI_FORM_ID FormId;
+ EFI_GUID FormSetGuid;
+ EFI_STRING_ID DevicePath;
} EFI_HII_REF;
typedef union {
- UINT8 u8;
- UINT16 u16;
- UINT32 u32;
- UINT64 u64;
- BOOLEAN b;
- EFI_HII_TIME time;
- EFI_HII_DATE date;
- EFI_STRING_ID string; ///< EFI_IFR_TYPE_STRING, EFI_IFR_TYPE_ACTION
- EFI_HII_REF ref; ///< EFI_IFR_TYPE_REF
+ UINT8 u8;
+ UINT16 u16;
+ UINT32 u32;
+ UINT64 u64;
+ BOOLEAN b;
+ EFI_HII_TIME time;
+ EFI_HII_DATE date;
+ EFI_STRING_ID string; ///< EFI_IFR_TYPE_STRING, EFI_IFR_TYPE_ACTION
+ EFI_HII_REF ref; ///< EFI_IFR_TYPE_REF
// UINT8 buffer[]; ///< EFI_IFR_TYPE_BUFFER
} EFI_IFR_TYPE_VALUE;
//
// IFR Opcodes
//
-#define EFI_IFR_FORM_OP 0x01
-#define EFI_IFR_SUBTITLE_OP 0x02
-#define EFI_IFR_TEXT_OP 0x03
-#define EFI_IFR_IMAGE_OP 0x04
-#define EFI_IFR_ONE_OF_OP 0x05
-#define EFI_IFR_CHECKBOX_OP 0x06
-#define EFI_IFR_NUMERIC_OP 0x07
-#define EFI_IFR_PASSWORD_OP 0x08
-#define EFI_IFR_ONE_OF_OPTION_OP 0x09
-#define EFI_IFR_SUPPRESS_IF_OP 0x0A
-#define EFI_IFR_LOCKED_OP 0x0B
-#define EFI_IFR_ACTION_OP 0x0C
-#define EFI_IFR_RESET_BUTTON_OP 0x0D
-#define EFI_IFR_FORM_SET_OP 0x0E
-#define EFI_IFR_REF_OP 0x0F
-#define EFI_IFR_NO_SUBMIT_IF_OP 0x10
-#define EFI_IFR_INCONSISTENT_IF_OP 0x11
-#define EFI_IFR_EQ_ID_VAL_OP 0x12
-#define EFI_IFR_EQ_ID_ID_OP 0x13
-#define EFI_IFR_EQ_ID_VAL_LIST_OP 0x14
-#define EFI_IFR_AND_OP 0x15
-#define EFI_IFR_OR_OP 0x16
-#define EFI_IFR_NOT_OP 0x17
-#define EFI_IFR_RULE_OP 0x18
-#define EFI_IFR_GRAY_OUT_IF_OP 0x19
-#define EFI_IFR_DATE_OP 0x1A
-#define EFI_IFR_TIME_OP 0x1B
-#define EFI_IFR_STRING_OP 0x1C
-#define EFI_IFR_REFRESH_OP 0x1D
-#define EFI_IFR_DISABLE_IF_OP 0x1E
-#define EFI_IFR_ANIMATION_OP 0x1F
-#define EFI_IFR_TO_LOWER_OP 0x20
-#define EFI_IFR_TO_UPPER_OP 0x21
-#define EFI_IFR_MAP_OP 0x22
-#define EFI_IFR_ORDERED_LIST_OP 0x23
-#define EFI_IFR_VARSTORE_OP 0x24
-#define EFI_IFR_VARSTORE_NAME_VALUE_OP 0x25
-#define EFI_IFR_VARSTORE_EFI_OP 0x26
-#define EFI_IFR_VARSTORE_DEVICE_OP 0x27
-#define EFI_IFR_VERSION_OP 0x28
-#define EFI_IFR_END_OP 0x29
-#define EFI_IFR_MATCH_OP 0x2A
-#define EFI_IFR_GET_OP 0x2B
-#define EFI_IFR_SET_OP 0x2C
-#define EFI_IFR_READ_OP 0x2D
-#define EFI_IFR_WRITE_OP 0x2E
-#define EFI_IFR_EQUAL_OP 0x2F
-#define EFI_IFR_NOT_EQUAL_OP 0x30
-#define EFI_IFR_GREATER_THAN_OP 0x31
-#define EFI_IFR_GREATER_EQUAL_OP 0x32
-#define EFI_IFR_LESS_THAN_OP 0x33
-#define EFI_IFR_LESS_EQUAL_OP 0x34
-#define EFI_IFR_BITWISE_AND_OP 0x35
-#define EFI_IFR_BITWISE_OR_OP 0x36
-#define EFI_IFR_BITWISE_NOT_OP 0x37
-#define EFI_IFR_SHIFT_LEFT_OP 0x38
-#define EFI_IFR_SHIFT_RIGHT_OP 0x39
-#define EFI_IFR_ADD_OP 0x3A
-#define EFI_IFR_SUBTRACT_OP 0x3B
-#define EFI_IFR_MULTIPLY_OP 0x3C
-#define EFI_IFR_DIVIDE_OP 0x3D
-#define EFI_IFR_MODULO_OP 0x3E
-#define EFI_IFR_RULE_REF_OP 0x3F
-#define EFI_IFR_QUESTION_REF1_OP 0x40
-#define EFI_IFR_QUESTION_REF2_OP 0x41
-#define EFI_IFR_UINT8_OP 0x42
-#define EFI_IFR_UINT16_OP 0x43
-#define EFI_IFR_UINT32_OP 0x44
-#define EFI_IFR_UINT64_OP 0x45
-#define EFI_IFR_TRUE_OP 0x46
-#define EFI_IFR_FALSE_OP 0x47
-#define EFI_IFR_TO_UINT_OP 0x48
-#define EFI_IFR_TO_STRING_OP 0x49
-#define EFI_IFR_TO_BOOLEAN_OP 0x4A
-#define EFI_IFR_MID_OP 0x4B
-#define EFI_IFR_FIND_OP 0x4C
-#define EFI_IFR_TOKEN_OP 0x4D
-#define EFI_IFR_STRING_REF1_OP 0x4E
-#define EFI_IFR_STRING_REF2_OP 0x4F
-#define EFI_IFR_CONDITIONAL_OP 0x50
-#define EFI_IFR_QUESTION_REF3_OP 0x51
-#define EFI_IFR_ZERO_OP 0x52
-#define EFI_IFR_ONE_OP 0x53
-#define EFI_IFR_ONES_OP 0x54
-#define EFI_IFR_UNDEFINED_OP 0x55
-#define EFI_IFR_LENGTH_OP 0x56
-#define EFI_IFR_DUP_OP 0x57
-#define EFI_IFR_THIS_OP 0x58
-#define EFI_IFR_SPAN_OP 0x59
-#define EFI_IFR_VALUE_OP 0x5A
-#define EFI_IFR_DEFAULT_OP 0x5B
-#define EFI_IFR_DEFAULTSTORE_OP 0x5C
-#define EFI_IFR_FORM_MAP_OP 0x5D
-#define EFI_IFR_CATENATE_OP 0x5E
-#define EFI_IFR_GUID_OP 0x5F
-#define EFI_IFR_SECURITY_OP 0x60
-#define EFI_IFR_MODAL_TAG_OP 0x61
-#define EFI_IFR_REFRESH_ID_OP 0x62
-#define EFI_IFR_WARNING_IF_OP 0x63
-#define EFI_IFR_MATCH2_OP 0x64
+#define EFI_IFR_FORM_OP 0x01
+#define EFI_IFR_SUBTITLE_OP 0x02
+#define EFI_IFR_TEXT_OP 0x03
+#define EFI_IFR_IMAGE_OP 0x04
+#define EFI_IFR_ONE_OF_OP 0x05
+#define EFI_IFR_CHECKBOX_OP 0x06
+#define EFI_IFR_NUMERIC_OP 0x07
+#define EFI_IFR_PASSWORD_OP 0x08
+#define EFI_IFR_ONE_OF_OPTION_OP 0x09
+#define EFI_IFR_SUPPRESS_IF_OP 0x0A
+#define EFI_IFR_LOCKED_OP 0x0B
+#define EFI_IFR_ACTION_OP 0x0C
+#define EFI_IFR_RESET_BUTTON_OP 0x0D
+#define EFI_IFR_FORM_SET_OP 0x0E
+#define EFI_IFR_REF_OP 0x0F
+#define EFI_IFR_NO_SUBMIT_IF_OP 0x10
+#define EFI_IFR_INCONSISTENT_IF_OP 0x11
+#define EFI_IFR_EQ_ID_VAL_OP 0x12
+#define EFI_IFR_EQ_ID_ID_OP 0x13
+#define EFI_IFR_EQ_ID_VAL_LIST_OP 0x14
+#define EFI_IFR_AND_OP 0x15
+#define EFI_IFR_OR_OP 0x16
+#define EFI_IFR_NOT_OP 0x17
+#define EFI_IFR_RULE_OP 0x18
+#define EFI_IFR_GRAY_OUT_IF_OP 0x19
+#define EFI_IFR_DATE_OP 0x1A
+#define EFI_IFR_TIME_OP 0x1B
+#define EFI_IFR_STRING_OP 0x1C
+#define EFI_IFR_REFRESH_OP 0x1D
+#define EFI_IFR_DISABLE_IF_OP 0x1E
+#define EFI_IFR_ANIMATION_OP 0x1F
+#define EFI_IFR_TO_LOWER_OP 0x20
+#define EFI_IFR_TO_UPPER_OP 0x21
+#define EFI_IFR_MAP_OP 0x22
+#define EFI_IFR_ORDERED_LIST_OP 0x23
+#define EFI_IFR_VARSTORE_OP 0x24
+#define EFI_IFR_VARSTORE_NAME_VALUE_OP 0x25
+#define EFI_IFR_VARSTORE_EFI_OP 0x26
+#define EFI_IFR_VARSTORE_DEVICE_OP 0x27
+#define EFI_IFR_VERSION_OP 0x28
+#define EFI_IFR_END_OP 0x29
+#define EFI_IFR_MATCH_OP 0x2A
+#define EFI_IFR_GET_OP 0x2B
+#define EFI_IFR_SET_OP 0x2C
+#define EFI_IFR_READ_OP 0x2D
+#define EFI_IFR_WRITE_OP 0x2E
+#define EFI_IFR_EQUAL_OP 0x2F
+#define EFI_IFR_NOT_EQUAL_OP 0x30
+#define EFI_IFR_GREATER_THAN_OP 0x31
+#define EFI_IFR_GREATER_EQUAL_OP 0x32
+#define EFI_IFR_LESS_THAN_OP 0x33
+#define EFI_IFR_LESS_EQUAL_OP 0x34
+#define EFI_IFR_BITWISE_AND_OP 0x35
+#define EFI_IFR_BITWISE_OR_OP 0x36
+#define EFI_IFR_BITWISE_NOT_OP 0x37
+#define EFI_IFR_SHIFT_LEFT_OP 0x38
+#define EFI_IFR_SHIFT_RIGHT_OP 0x39
+#define EFI_IFR_ADD_OP 0x3A
+#define EFI_IFR_SUBTRACT_OP 0x3B
+#define EFI_IFR_MULTIPLY_OP 0x3C
+#define EFI_IFR_DIVIDE_OP 0x3D
+#define EFI_IFR_MODULO_OP 0x3E
+#define EFI_IFR_RULE_REF_OP 0x3F
+#define EFI_IFR_QUESTION_REF1_OP 0x40
+#define EFI_IFR_QUESTION_REF2_OP 0x41
+#define EFI_IFR_UINT8_OP 0x42
+#define EFI_IFR_UINT16_OP 0x43
+#define EFI_IFR_UINT32_OP 0x44
+#define EFI_IFR_UINT64_OP 0x45
+#define EFI_IFR_TRUE_OP 0x46
+#define EFI_IFR_FALSE_OP 0x47
+#define EFI_IFR_TO_UINT_OP 0x48
+#define EFI_IFR_TO_STRING_OP 0x49
+#define EFI_IFR_TO_BOOLEAN_OP 0x4A
+#define EFI_IFR_MID_OP 0x4B
+#define EFI_IFR_FIND_OP 0x4C
+#define EFI_IFR_TOKEN_OP 0x4D
+#define EFI_IFR_STRING_REF1_OP 0x4E
+#define EFI_IFR_STRING_REF2_OP 0x4F
+#define EFI_IFR_CONDITIONAL_OP 0x50
+#define EFI_IFR_QUESTION_REF3_OP 0x51
+#define EFI_IFR_ZERO_OP 0x52
+#define EFI_IFR_ONE_OP 0x53
+#define EFI_IFR_ONES_OP 0x54
+#define EFI_IFR_UNDEFINED_OP 0x55
+#define EFI_IFR_LENGTH_OP 0x56
+#define EFI_IFR_DUP_OP 0x57
+#define EFI_IFR_THIS_OP 0x58
+#define EFI_IFR_SPAN_OP 0x59
+#define EFI_IFR_VALUE_OP 0x5A
+#define EFI_IFR_DEFAULT_OP 0x5B
+#define EFI_IFR_DEFAULTSTORE_OP 0x5C
+#define EFI_IFR_FORM_MAP_OP 0x5D
+#define EFI_IFR_CATENATE_OP 0x5E
+#define EFI_IFR_GUID_OP 0x5F
+#define EFI_IFR_SECURITY_OP 0x60
+#define EFI_IFR_MODAL_TAG_OP 0x61
+#define EFI_IFR_REFRESH_ID_OP 0x62
+#define EFI_IFR_WARNING_IF_OP 0x63
+#define EFI_IFR_MATCH2_OP 0x64
//
// Definitions of IFR Standard Headers
@@ -806,529 +798,530 @@
//
typedef struct _EFI_IFR_OP_HEADER {
- UINT8 OpCode;
- UINT8 Length:7;
- UINT8 Scope:1;
+ UINT8 OpCode;
+ UINT8 Length : 7;
+ UINT8 Scope : 1;
} EFI_IFR_OP_HEADER;
typedef struct _EFI_IFR_STATEMENT_HEADER {
- EFI_STRING_ID Prompt;
- EFI_STRING_ID Help;
+ EFI_STRING_ID Prompt;
+ EFI_STRING_ID Help;
} EFI_IFR_STATEMENT_HEADER;
typedef struct _EFI_IFR_QUESTION_HEADER {
- EFI_IFR_STATEMENT_HEADER Header;
- EFI_QUESTION_ID QuestionId;
- EFI_VARSTORE_ID VarStoreId;
+ EFI_IFR_STATEMENT_HEADER Header;
+ EFI_QUESTION_ID QuestionId;
+ EFI_VARSTORE_ID VarStoreId;
union {
- EFI_STRING_ID VarName;
- UINT16 VarOffset;
+ EFI_STRING_ID VarName;
+ UINT16 VarOffset;
} VarStoreInfo;
- UINT8 Flags;
+ UINT8 Flags;
} EFI_IFR_QUESTION_HEADER;
//
// Flag values of EFI_IFR_QUESTION_HEADER
//
-#define EFI_IFR_FLAG_READ_ONLY 0x01
-#define EFI_IFR_FLAG_CALLBACK 0x04
-#define EFI_IFR_FLAG_RESET_REQUIRED 0x10
-#define EFI_IFR_FLAG_RECONNECT_REQUIRED 0x40
-#define EFI_IFR_FLAG_OPTIONS_ONLY 0x80
+#define EFI_IFR_FLAG_READ_ONLY 0x01
+#define EFI_IFR_FLAG_CALLBACK 0x04
+#define EFI_IFR_FLAG_RESET_REQUIRED 0x10
+#define EFI_IFR_FLAG_REST_STYLE 0x20
+#define EFI_IFR_FLAG_RECONNECT_REQUIRED 0x40
+#define EFI_IFR_FLAG_OPTIONS_ONLY 0x80
//
// Definition for Opcode Reference
// Section 27.3.8.3
//
typedef struct _EFI_IFR_DEFAULTSTORE {
- EFI_IFR_OP_HEADER Header;
- EFI_STRING_ID DefaultName;
- UINT16 DefaultId;
+ EFI_IFR_OP_HEADER Header;
+ EFI_STRING_ID DefaultName;
+ UINT16 DefaultId;
} EFI_IFR_DEFAULTSTORE;
//
// Default Identifier of default store
//
-#define EFI_HII_DEFAULT_CLASS_STANDARD 0x0000
-#define EFI_HII_DEFAULT_CLASS_MANUFACTURING 0x0001
-#define EFI_HII_DEFAULT_CLASS_SAFE 0x0002
-#define EFI_HII_DEFAULT_CLASS_PLATFORM_BEGIN 0x4000
-#define EFI_HII_DEFAULT_CLASS_PLATFORM_END 0x7fff
-#define EFI_HII_DEFAULT_CLASS_HARDWARE_BEGIN 0x8000
-#define EFI_HII_DEFAULT_CLASS_HARDWARE_END 0xbfff
-#define EFI_HII_DEFAULT_CLASS_FIRMWARE_BEGIN 0xc000
-#define EFI_HII_DEFAULT_CLASS_FIRMWARE_END 0xffff
+#define EFI_HII_DEFAULT_CLASS_STANDARD 0x0000
+#define EFI_HII_DEFAULT_CLASS_MANUFACTURING 0x0001
+#define EFI_HII_DEFAULT_CLASS_SAFE 0x0002
+#define EFI_HII_DEFAULT_CLASS_PLATFORM_BEGIN 0x4000
+#define EFI_HII_DEFAULT_CLASS_PLATFORM_END 0x7fff
+#define EFI_HII_DEFAULT_CLASS_HARDWARE_BEGIN 0x8000
+#define EFI_HII_DEFAULT_CLASS_HARDWARE_END 0xbfff
+#define EFI_HII_DEFAULT_CLASS_FIRMWARE_BEGIN 0xc000
+#define EFI_HII_DEFAULT_CLASS_FIRMWARE_END 0xffff
typedef struct _EFI_IFR_VARSTORE {
- EFI_IFR_OP_HEADER Header;
- EFI_GUID Guid;
- EFI_VARSTORE_ID VarStoreId;
- UINT16 Size;
- UINT8 Name[1];
+ EFI_IFR_OP_HEADER Header;
+ EFI_GUID Guid;
+ EFI_VARSTORE_ID VarStoreId;
+ UINT16 Size;
+ UINT8 Name[1];
} EFI_IFR_VARSTORE;
typedef struct _EFI_IFR_VARSTORE_EFI {
- EFI_IFR_OP_HEADER Header;
- EFI_VARSTORE_ID VarStoreId;
- EFI_GUID Guid;
- UINT32 Attributes;
- UINT16 Size;
- UINT8 Name[1];
+ EFI_IFR_OP_HEADER Header;
+ EFI_VARSTORE_ID VarStoreId;
+ EFI_GUID Guid;
+ UINT32 Attributes;
+ UINT16 Size;
+ UINT8 Name[1];
} EFI_IFR_VARSTORE_EFI;
typedef struct _EFI_IFR_VARSTORE_NAME_VALUE {
- EFI_IFR_OP_HEADER Header;
- EFI_VARSTORE_ID VarStoreId;
- EFI_GUID Guid;
+ EFI_IFR_OP_HEADER Header;
+ EFI_VARSTORE_ID VarStoreId;
+ EFI_GUID Guid;
} EFI_IFR_VARSTORE_NAME_VALUE;
typedef struct _EFI_IFR_FORM_SET {
- EFI_IFR_OP_HEADER Header;
- EFI_GUID Guid;
- EFI_STRING_ID FormSetTitle;
- EFI_STRING_ID Help;
- UINT8 Flags;
+ EFI_IFR_OP_HEADER Header;
+ EFI_GUID Guid;
+ EFI_STRING_ID FormSetTitle;
+ EFI_STRING_ID Help;
+ UINT8 Flags;
// EFI_GUID ClassGuid[];
} EFI_IFR_FORM_SET;
typedef struct _EFI_IFR_END {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_END;
typedef struct _EFI_IFR_FORM {
- EFI_IFR_OP_HEADER Header;
- UINT16 FormId;
- EFI_STRING_ID FormTitle;
+ EFI_IFR_OP_HEADER Header;
+ UINT16 FormId;
+ EFI_STRING_ID FormTitle;
} EFI_IFR_FORM;
typedef struct _EFI_IFR_IMAGE {
- EFI_IFR_OP_HEADER Header;
- EFI_IMAGE_ID Id;
+ EFI_IFR_OP_HEADER Header;
+ EFI_IMAGE_ID Id;
} EFI_IFR_IMAGE;
typedef struct _EFI_IFR_MODAL_TAG {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_MODAL_TAG;
typedef struct _EFI_IFR_LOCKED {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_LOCKED;
typedef struct _EFI_IFR_RULE {
- EFI_IFR_OP_HEADER Header;
- UINT8 RuleId;
+ EFI_IFR_OP_HEADER Header;
+ UINT8 RuleId;
} EFI_IFR_RULE;
typedef struct _EFI_IFR_DEFAULT {
- EFI_IFR_OP_HEADER Header;
- UINT16 DefaultId;
- UINT8 Type;
- EFI_IFR_TYPE_VALUE Value;
+ EFI_IFR_OP_HEADER Header;
+ UINT16 DefaultId;
+ UINT8 Type;
+ EFI_IFR_TYPE_VALUE Value;
} EFI_IFR_DEFAULT;
typedef struct _EFI_IFR_DEFAULT_2 {
- EFI_IFR_OP_HEADER Header;
- UINT16 DefaultId;
- UINT8 Type;
+ EFI_IFR_OP_HEADER Header;
+ UINT16 DefaultId;
+ UINT8 Type;
} EFI_IFR_DEFAULT_2;
typedef struct _EFI_IFR_VALUE {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_VALUE;
typedef struct _EFI_IFR_SUBTITLE {
- EFI_IFR_OP_HEADER Header;
- EFI_IFR_STATEMENT_HEADER Statement;
- UINT8 Flags;
+ EFI_IFR_OP_HEADER Header;
+ EFI_IFR_STATEMENT_HEADER Statement;
+ UINT8 Flags;
} EFI_IFR_SUBTITLE;
-#define EFI_IFR_FLAGS_HORIZONTAL 0x01
+#define EFI_IFR_FLAGS_HORIZONTAL 0x01
typedef struct _EFI_IFR_CHECKBOX {
- EFI_IFR_OP_HEADER Header;
- EFI_IFR_QUESTION_HEADER Question;
- UINT8 Flags;
+ EFI_IFR_OP_HEADER Header;
+ EFI_IFR_QUESTION_HEADER Question;
+ UINT8 Flags;
} EFI_IFR_CHECKBOX;
-#define EFI_IFR_CHECKBOX_DEFAULT 0x01
-#define EFI_IFR_CHECKBOX_DEFAULT_MFG 0x02
+#define EFI_IFR_CHECKBOX_DEFAULT 0x01
+#define EFI_IFR_CHECKBOX_DEFAULT_MFG 0x02
typedef struct _EFI_IFR_TEXT {
- EFI_IFR_OP_HEADER Header;
- EFI_IFR_STATEMENT_HEADER Statement;
- EFI_STRING_ID TextTwo;
+ EFI_IFR_OP_HEADER Header;
+ EFI_IFR_STATEMENT_HEADER Statement;
+ EFI_STRING_ID TextTwo;
} EFI_IFR_TEXT;
typedef struct _EFI_IFR_REF {
- EFI_IFR_OP_HEADER Header;
- EFI_IFR_QUESTION_HEADER Question;
- EFI_FORM_ID FormId;
+ EFI_IFR_OP_HEADER Header;
+ EFI_IFR_QUESTION_HEADER Question;
+ EFI_FORM_ID FormId;
} EFI_IFR_REF;
typedef struct _EFI_IFR_REF2 {
- EFI_IFR_OP_HEADER Header;
- EFI_IFR_QUESTION_HEADER Question;
- EFI_FORM_ID FormId;
- EFI_QUESTION_ID QuestionId;
+ EFI_IFR_OP_HEADER Header;
+ EFI_IFR_QUESTION_HEADER Question;
+ EFI_FORM_ID FormId;
+ EFI_QUESTION_ID QuestionId;
} EFI_IFR_REF2;
typedef struct _EFI_IFR_REF3 {
- EFI_IFR_OP_HEADER Header;
- EFI_IFR_QUESTION_HEADER Question;
- EFI_FORM_ID FormId;
- EFI_QUESTION_ID QuestionId;
- EFI_GUID FormSetId;
+ EFI_IFR_OP_HEADER Header;
+ EFI_IFR_QUESTION_HEADER Question;
+ EFI_FORM_ID FormId;
+ EFI_QUESTION_ID QuestionId;
+ EFI_GUID FormSetId;
} EFI_IFR_REF3;
typedef struct _EFI_IFR_REF4 {
- EFI_IFR_OP_HEADER Header;
- EFI_IFR_QUESTION_HEADER Question;
- EFI_FORM_ID FormId;
- EFI_QUESTION_ID QuestionId;
- EFI_GUID FormSetId;
- EFI_STRING_ID DevicePath;
+ EFI_IFR_OP_HEADER Header;
+ EFI_IFR_QUESTION_HEADER Question;
+ EFI_FORM_ID FormId;
+ EFI_QUESTION_ID QuestionId;
+ EFI_GUID FormSetId;
+ EFI_STRING_ID DevicePath;
} EFI_IFR_REF4;
typedef struct _EFI_IFR_REF5 {
- EFI_IFR_OP_HEADER Header;
- EFI_IFR_QUESTION_HEADER Question;
+ EFI_IFR_OP_HEADER Header;
+ EFI_IFR_QUESTION_HEADER Question;
} EFI_IFR_REF5;
typedef struct _EFI_IFR_RESET_BUTTON {
- EFI_IFR_OP_HEADER Header;
- EFI_IFR_STATEMENT_HEADER Statement;
- EFI_DEFAULT_ID DefaultId;
+ EFI_IFR_OP_HEADER Header;
+ EFI_IFR_STATEMENT_HEADER Statement;
+ EFI_DEFAULT_ID DefaultId;
} EFI_IFR_RESET_BUTTON;
typedef struct _EFI_IFR_ACTION {
- EFI_IFR_OP_HEADER Header;
- EFI_IFR_QUESTION_HEADER Question;
- EFI_STRING_ID QuestionConfig;
+ EFI_IFR_OP_HEADER Header;
+ EFI_IFR_QUESTION_HEADER Question;
+ EFI_STRING_ID QuestionConfig;
} EFI_IFR_ACTION;
typedef struct _EFI_IFR_ACTION_1 {
- EFI_IFR_OP_HEADER Header;
- EFI_IFR_QUESTION_HEADER Question;
+ EFI_IFR_OP_HEADER Header;
+ EFI_IFR_QUESTION_HEADER Question;
} EFI_IFR_ACTION_1;
typedef struct _EFI_IFR_DATE {
- EFI_IFR_OP_HEADER Header;
- EFI_IFR_QUESTION_HEADER Question;
- UINT8 Flags;
+ EFI_IFR_OP_HEADER Header;
+ EFI_IFR_QUESTION_HEADER Question;
+ UINT8 Flags;
} EFI_IFR_DATE;
//
// Flags that describe the behavior of the question.
//
-#define EFI_QF_DATE_YEAR_SUPPRESS 0x01
-#define EFI_QF_DATE_MONTH_SUPPRESS 0x02
-#define EFI_QF_DATE_DAY_SUPPRESS 0x04
+#define EFI_QF_DATE_YEAR_SUPPRESS 0x01
+#define EFI_QF_DATE_MONTH_SUPPRESS 0x02
+#define EFI_QF_DATE_DAY_SUPPRESS 0x04
-#define EFI_QF_DATE_STORAGE 0x30
-#define QF_DATE_STORAGE_NORMAL 0x00
-#define QF_DATE_STORAGE_TIME 0x10
-#define QF_DATE_STORAGE_WAKEUP 0x20
+#define EFI_QF_DATE_STORAGE 0x30
+#define QF_DATE_STORAGE_NORMAL 0x00
+#define QF_DATE_STORAGE_TIME 0x10
+#define QF_DATE_STORAGE_WAKEUP 0x20
typedef union {
struct {
- UINT8 MinValue;
- UINT8 MaxValue;
- UINT8 Step;
+ UINT8 MinValue;
+ UINT8 MaxValue;
+ UINT8 Step;
} u8;
struct {
- UINT16 MinValue;
- UINT16 MaxValue;
- UINT16 Step;
+ UINT16 MinValue;
+ UINT16 MaxValue;
+ UINT16 Step;
} u16;
struct {
- UINT32 MinValue;
- UINT32 MaxValue;
- UINT32 Step;
+ UINT32 MinValue;
+ UINT32 MaxValue;
+ UINT32 Step;
} u32;
struct {
- UINT64 MinValue;
- UINT64 MaxValue;
- UINT64 Step;
+ UINT64 MinValue;
+ UINT64 MaxValue;
+ UINT64 Step;
} u64;
} MINMAXSTEP_DATA;
typedef struct _EFI_IFR_NUMERIC {
- EFI_IFR_OP_HEADER Header;
- EFI_IFR_QUESTION_HEADER Question;
- UINT8 Flags;
- MINMAXSTEP_DATA data;
+ EFI_IFR_OP_HEADER Header;
+ EFI_IFR_QUESTION_HEADER Question;
+ UINT8 Flags;
+ MINMAXSTEP_DATA data;
} EFI_IFR_NUMERIC;
//
// Flags related to the numeric question
//
-#define EFI_IFR_NUMERIC_SIZE 0x03
-#define EFI_IFR_NUMERIC_SIZE_1 0x00
-#define EFI_IFR_NUMERIC_SIZE_2 0x01
-#define EFI_IFR_NUMERIC_SIZE_4 0x02
-#define EFI_IFR_NUMERIC_SIZE_8 0x03
+#define EFI_IFR_NUMERIC_SIZE 0x03
+#define EFI_IFR_NUMERIC_SIZE_1 0x00
+#define EFI_IFR_NUMERIC_SIZE_2 0x01
+#define EFI_IFR_NUMERIC_SIZE_4 0x02
+#define EFI_IFR_NUMERIC_SIZE_8 0x03
-#define EFI_IFR_DISPLAY 0x30
-#define EFI_IFR_DISPLAY_INT_DEC 0x00
-#define EFI_IFR_DISPLAY_UINT_DEC 0x10
-#define EFI_IFR_DISPLAY_UINT_HEX 0x20
+#define EFI_IFR_DISPLAY 0x30
+#define EFI_IFR_DISPLAY_INT_DEC 0x00
+#define EFI_IFR_DISPLAY_UINT_DEC 0x10
+#define EFI_IFR_DISPLAY_UINT_HEX 0x20
typedef struct _EFI_IFR_ONE_OF {
- EFI_IFR_OP_HEADER Header;
- EFI_IFR_QUESTION_HEADER Question;
- UINT8 Flags;
- MINMAXSTEP_DATA data;
+ EFI_IFR_OP_HEADER Header;
+ EFI_IFR_QUESTION_HEADER Question;
+ UINT8 Flags;
+ MINMAXSTEP_DATA data;
} EFI_IFR_ONE_OF;
typedef struct _EFI_IFR_STRING {
- EFI_IFR_OP_HEADER Header;
- EFI_IFR_QUESTION_HEADER Question;
- UINT8 MinSize;
- UINT8 MaxSize;
- UINT8 Flags;
+ EFI_IFR_OP_HEADER Header;
+ EFI_IFR_QUESTION_HEADER Question;
+ UINT8 MinSize;
+ UINT8 MaxSize;
+ UINT8 Flags;
} EFI_IFR_STRING;
-#define EFI_IFR_STRING_MULTI_LINE 0x01
+#define EFI_IFR_STRING_MULTI_LINE 0x01
typedef struct _EFI_IFR_PASSWORD {
- EFI_IFR_OP_HEADER Header;
- EFI_IFR_QUESTION_HEADER Question;
- UINT16 MinSize;
- UINT16 MaxSize;
+ EFI_IFR_OP_HEADER Header;
+ EFI_IFR_QUESTION_HEADER Question;
+ UINT16 MinSize;
+ UINT16 MaxSize;
} EFI_IFR_PASSWORD;
typedef struct _EFI_IFR_ORDERED_LIST {
- EFI_IFR_OP_HEADER Header;
- EFI_IFR_QUESTION_HEADER Question;
- UINT8 MaxContainers;
- UINT8 Flags;
+ EFI_IFR_OP_HEADER Header;
+ EFI_IFR_QUESTION_HEADER Question;
+ UINT8 MaxContainers;
+ UINT8 Flags;
} EFI_IFR_ORDERED_LIST;
-#define EFI_IFR_UNIQUE_SET 0x01
-#define EFI_IFR_NO_EMPTY_SET 0x02
+#define EFI_IFR_UNIQUE_SET 0x01
+#define EFI_IFR_NO_EMPTY_SET 0x02
typedef struct _EFI_IFR_TIME {
- EFI_IFR_OP_HEADER Header;
- EFI_IFR_QUESTION_HEADER Question;
- UINT8 Flags;
+ EFI_IFR_OP_HEADER Header;
+ EFI_IFR_QUESTION_HEADER Question;
+ UINT8 Flags;
} EFI_IFR_TIME;
//
// A bit-mask that determines which unique settings are active for this opcode.
//
-#define QF_TIME_HOUR_SUPPRESS 0x01
-#define QF_TIME_MINUTE_SUPPRESS 0x02
-#define QF_TIME_SECOND_SUPPRESS 0x04
+#define QF_TIME_HOUR_SUPPRESS 0x01
+#define QF_TIME_MINUTE_SUPPRESS 0x02
+#define QF_TIME_SECOND_SUPPRESS 0x04
-#define QF_TIME_STORAGE 0x30
-#define QF_TIME_STORAGE_NORMAL 0x00
-#define QF_TIME_STORAGE_TIME 0x10
-#define QF_TIME_STORAGE_WAKEUP 0x20
+#define QF_TIME_STORAGE 0x30
+#define QF_TIME_STORAGE_NORMAL 0x00
+#define QF_TIME_STORAGE_TIME 0x10
+#define QF_TIME_STORAGE_WAKEUP 0x20
typedef struct _EFI_IFR_DISABLE_IF {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_DISABLE_IF;
typedef struct _EFI_IFR_SUPPRESS_IF {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_SUPPRESS_IF;
typedef struct _EFI_IFR_GRAY_OUT_IF {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_GRAY_OUT_IF;
typedef struct _EFI_IFR_INCONSISTENT_IF {
- EFI_IFR_OP_HEADER Header;
- EFI_STRING_ID Error;
+ EFI_IFR_OP_HEADER Header;
+ EFI_STRING_ID Error;
} EFI_IFR_INCONSISTENT_IF;
typedef struct _EFI_IFR_NO_SUBMIT_IF {
- EFI_IFR_OP_HEADER Header;
- EFI_STRING_ID Error;
+ EFI_IFR_OP_HEADER Header;
+ EFI_STRING_ID Error;
} EFI_IFR_NO_SUBMIT_IF;
typedef struct _EFI_IFR_WARNING_IF {
- EFI_IFR_OP_HEADER Header;
- EFI_STRING_ID Warning;
- UINT8 TimeOut;
+ EFI_IFR_OP_HEADER Header;
+ EFI_STRING_ID Warning;
+ UINT8 TimeOut;
} EFI_IFR_WARNING_IF;
typedef struct _EFI_IFR_REFRESH {
- EFI_IFR_OP_HEADER Header;
- UINT8 RefreshInterval;
+ EFI_IFR_OP_HEADER Header;
+ UINT8 RefreshInterval;
} EFI_IFR_REFRESH;
typedef struct _EFI_IFR_VARSTORE_DEVICE {
- EFI_IFR_OP_HEADER Header;
- EFI_STRING_ID DevicePath;
+ EFI_IFR_OP_HEADER Header;
+ EFI_STRING_ID DevicePath;
} EFI_IFR_VARSTORE_DEVICE;
typedef struct _EFI_IFR_ONE_OF_OPTION {
- EFI_IFR_OP_HEADER Header;
- EFI_STRING_ID Option;
- UINT8 Flags;
- UINT8 Type;
- EFI_IFR_TYPE_VALUE Value;
+ EFI_IFR_OP_HEADER Header;
+ EFI_STRING_ID Option;
+ UINT8 Flags;
+ UINT8 Type;
+ EFI_IFR_TYPE_VALUE Value;
} EFI_IFR_ONE_OF_OPTION;
//
// Types of the option's value.
//
-#define EFI_IFR_TYPE_NUM_SIZE_8 0x00
-#define EFI_IFR_TYPE_NUM_SIZE_16 0x01
-#define EFI_IFR_TYPE_NUM_SIZE_32 0x02
-#define EFI_IFR_TYPE_NUM_SIZE_64 0x03
-#define EFI_IFR_TYPE_BOOLEAN 0x04
-#define EFI_IFR_TYPE_TIME 0x05
-#define EFI_IFR_TYPE_DATE 0x06
-#define EFI_IFR_TYPE_STRING 0x07
-#define EFI_IFR_TYPE_OTHER 0x08
-#define EFI_IFR_TYPE_UNDEFINED 0x09
-#define EFI_IFR_TYPE_ACTION 0x0A
-#define EFI_IFR_TYPE_BUFFER 0x0B
-#define EFI_IFR_TYPE_REF 0x0C
+#define EFI_IFR_TYPE_NUM_SIZE_8 0x00
+#define EFI_IFR_TYPE_NUM_SIZE_16 0x01
+#define EFI_IFR_TYPE_NUM_SIZE_32 0x02
+#define EFI_IFR_TYPE_NUM_SIZE_64 0x03
+#define EFI_IFR_TYPE_BOOLEAN 0x04
+#define EFI_IFR_TYPE_TIME 0x05
+#define EFI_IFR_TYPE_DATE 0x06
+#define EFI_IFR_TYPE_STRING 0x07
+#define EFI_IFR_TYPE_OTHER 0x08
+#define EFI_IFR_TYPE_UNDEFINED 0x09
+#define EFI_IFR_TYPE_ACTION 0x0A
+#define EFI_IFR_TYPE_BUFFER 0x0B
+#define EFI_IFR_TYPE_REF 0x0C
-#define EFI_IFR_OPTION_DEFAULT 0x10
-#define EFI_IFR_OPTION_DEFAULT_MFG 0x20
+#define EFI_IFR_OPTION_DEFAULT 0x10
+#define EFI_IFR_OPTION_DEFAULT_MFG 0x20
typedef struct _EFI_IFR_GUID {
- EFI_IFR_OP_HEADER Header;
- EFI_GUID Guid;
- //Optional Data Follows
+ EFI_IFR_OP_HEADER Header;
+ EFI_GUID Guid;
+ // Optional Data Follows
} EFI_IFR_GUID;
typedef struct _EFI_IFR_REFRESH_ID {
- EFI_IFR_OP_HEADER Header;
- EFI_GUID RefreshEventGroupId;
+ EFI_IFR_OP_HEADER Header;
+ EFI_GUID RefreshEventGroupId;
} EFI_IFR_REFRESH_ID;
typedef struct _EFI_IFR_DUP {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_DUP;
typedef struct _EFI_IFR_EQ_ID_ID {
- EFI_IFR_OP_HEADER Header;
- EFI_QUESTION_ID QuestionId1;
- EFI_QUESTION_ID QuestionId2;
+ EFI_IFR_OP_HEADER Header;
+ EFI_QUESTION_ID QuestionId1;
+ EFI_QUESTION_ID QuestionId2;
} EFI_IFR_EQ_ID_ID;
typedef struct _EFI_IFR_EQ_ID_VAL {
- EFI_IFR_OP_HEADER Header;
- EFI_QUESTION_ID QuestionId;
- UINT16 Value;
+ EFI_IFR_OP_HEADER Header;
+ EFI_QUESTION_ID QuestionId;
+ UINT16 Value;
} EFI_IFR_EQ_ID_VAL;
typedef struct _EFI_IFR_EQ_ID_VAL_LIST {
- EFI_IFR_OP_HEADER Header;
- EFI_QUESTION_ID QuestionId;
- UINT16 ListLength;
- UINT16 ValueList[1];
+ EFI_IFR_OP_HEADER Header;
+ EFI_QUESTION_ID QuestionId;
+ UINT16 ListLength;
+ UINT16 ValueList[1];
} EFI_IFR_EQ_ID_VAL_LIST;
typedef struct _EFI_IFR_UINT8 {
- EFI_IFR_OP_HEADER Header;
- UINT8 Value;
+ EFI_IFR_OP_HEADER Header;
+ UINT8 Value;
} EFI_IFR_UINT8;
typedef struct _EFI_IFR_UINT16 {
- EFI_IFR_OP_HEADER Header;
- UINT16 Value;
+ EFI_IFR_OP_HEADER Header;
+ UINT16 Value;
} EFI_IFR_UINT16;
typedef struct _EFI_IFR_UINT32 {
- EFI_IFR_OP_HEADER Header;
- UINT32 Value;
+ EFI_IFR_OP_HEADER Header;
+ UINT32 Value;
} EFI_IFR_UINT32;
typedef struct _EFI_IFR_UINT64 {
- EFI_IFR_OP_HEADER Header;
- UINT64 Value;
+ EFI_IFR_OP_HEADER Header;
+ UINT64 Value;
} EFI_IFR_UINT64;
typedef struct _EFI_IFR_QUESTION_REF1 {
- EFI_IFR_OP_HEADER Header;
- EFI_QUESTION_ID QuestionId;
+ EFI_IFR_OP_HEADER Header;
+ EFI_QUESTION_ID QuestionId;
} EFI_IFR_QUESTION_REF1;
typedef struct _EFI_IFR_QUESTION_REF2 {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_QUESTION_REF2;
typedef struct _EFI_IFR_QUESTION_REF3 {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_QUESTION_REF3;
typedef struct _EFI_IFR_QUESTION_REF3_2 {
- EFI_IFR_OP_HEADER Header;
- EFI_STRING_ID DevicePath;
+ EFI_IFR_OP_HEADER Header;
+ EFI_STRING_ID DevicePath;
} EFI_IFR_QUESTION_REF3_2;
typedef struct _EFI_IFR_QUESTION_REF3_3 {
- EFI_IFR_OP_HEADER Header;
- EFI_STRING_ID DevicePath;
- EFI_GUID Guid;
+ EFI_IFR_OP_HEADER Header;
+ EFI_STRING_ID DevicePath;
+ EFI_GUID Guid;
} EFI_IFR_QUESTION_REF3_3;
typedef struct _EFI_IFR_RULE_REF {
- EFI_IFR_OP_HEADER Header;
- UINT8 RuleId;
+ EFI_IFR_OP_HEADER Header;
+ UINT8 RuleId;
} EFI_IFR_RULE_REF;
typedef struct _EFI_IFR_STRING_REF1 {
- EFI_IFR_OP_HEADER Header;
- EFI_STRING_ID StringId;
+ EFI_IFR_OP_HEADER Header;
+ EFI_STRING_ID StringId;
} EFI_IFR_STRING_REF1;
typedef struct _EFI_IFR_STRING_REF2 {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_STRING_REF2;
typedef struct _EFI_IFR_THIS {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_THIS;
typedef struct _EFI_IFR_TRUE {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_TRUE;
typedef struct _EFI_IFR_FALSE {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_FALSE;
typedef struct _EFI_IFR_ONE {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_ONE;
typedef struct _EFI_IFR_ONES {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_ONES;
typedef struct _EFI_IFR_ZERO {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_ZERO;
typedef struct _EFI_IFR_UNDEFINED {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_UNDEFINED;
typedef struct _EFI_IFR_VERSION {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_VERSION;
typedef struct _EFI_IFR_LENGTH {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_LENGTH;
typedef struct _EFI_IFR_NOT {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_NOT;
typedef struct _EFI_IFR_BITWISE_NOT {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_BITWISE_NOT;
typedef struct _EFI_IFR_TO_BOOLEAN {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_TO_BOOLEAN;
///
@@ -1339,10 +1332,10 @@
/// 2 = hexadecimal (lower-case alpha).
/// 3 = hexadecimal (upper-case alpha).
///@{
-#define EFI_IFR_STRING_UNSIGNED_DEC 0
-#define EFI_IFR_STRING_SIGNED_DEC 1
-#define EFI_IFR_STRING_LOWERCASE_HEX 2
-#define EFI_IFR_STRING_UPPERCASE_HEX 3
+#define EFI_IFR_STRING_UNSIGNED_DEC 0
+#define EFI_IFR_STRING_SIGNED_DEC 1
+#define EFI_IFR_STRING_LOWERCASE_HEX 2
+#define EFI_IFR_STRING_UPPERCASE_HEX 3
///@}
///
@@ -1350,110 +1343,110 @@
/// 0 = ASCII.
/// 8 = Unicode.
///@{
-#define EFI_IFR_STRING_ASCII 0
-#define EFI_IFR_STRING_UNICODE 8
+#define EFI_IFR_STRING_ASCII 0
+#define EFI_IFR_STRING_UNICODE 8
///@}
typedef struct _EFI_IFR_TO_STRING {
- EFI_IFR_OP_HEADER Header;
- UINT8 Format;
+ EFI_IFR_OP_HEADER Header;
+ UINT8 Format;
} EFI_IFR_TO_STRING;
typedef struct _EFI_IFR_TO_UINT {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_TO_UINT;
typedef struct _EFI_IFR_TO_UPPER {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_TO_UPPER;
typedef struct _EFI_IFR_TO_LOWER {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_TO_LOWER;
typedef struct _EFI_IFR_ADD {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_ADD;
typedef struct _EFI_IFR_AND {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_AND;
typedef struct _EFI_IFR_BITWISE_AND {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_BITWISE_AND;
typedef struct _EFI_IFR_BITWISE_OR {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_BITWISE_OR;
typedef struct _EFI_IFR_CATENATE {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_CATENATE;
typedef struct _EFI_IFR_DIVIDE {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_DIVIDE;
typedef struct _EFI_IFR_EQUAL {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_EQUAL;
typedef struct _EFI_IFR_GREATER_EQUAL {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_GREATER_EQUAL;
typedef struct _EFI_IFR_GREATER_THAN {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_GREATER_THAN;
typedef struct _EFI_IFR_LESS_EQUAL {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_LESS_EQUAL;
typedef struct _EFI_IFR_LESS_THAN {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_LESS_THAN;
typedef struct _EFI_IFR_MATCH {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_MATCH;
typedef struct _EFI_IFR_MATCH2 {
- EFI_IFR_OP_HEADER Header;
- EFI_GUID SyntaxType;
+ EFI_IFR_OP_HEADER Header;
+ EFI_GUID SyntaxType;
} EFI_IFR_MATCH2;
typedef struct _EFI_IFR_MULTIPLY {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_MULTIPLY;
typedef struct _EFI_IFR_MODULO {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_MODULO;
typedef struct _EFI_IFR_NOT_EQUAL {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_NOT_EQUAL;
typedef struct _EFI_IFR_OR {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_OR;
typedef struct _EFI_IFR_SHIFT_LEFT {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_SHIFT_LEFT;
typedef struct _EFI_IFR_SHIFT_RIGHT {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_SHIFT_RIGHT;
typedef struct _EFI_IFR_SUBTRACT {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_SUBTRACT;
typedef struct _EFI_IFR_CONDITIONAL {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_CONDITIONAL;
//
@@ -1463,39 +1456,39 @@
#define EFI_IFR_FF_CASE_INSENSITIVE 0x01
typedef struct _EFI_IFR_FIND {
- EFI_IFR_OP_HEADER Header;
- UINT8 Format;
+ EFI_IFR_OP_HEADER Header;
+ UINT8 Format;
} EFI_IFR_FIND;
typedef struct _EFI_IFR_MID {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_MID;
typedef struct _EFI_IFR_TOKEN {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_TOKEN;
//
// Flags specifying whether to find the first matching string
// or the first non-matching string.
//
-#define EFI_IFR_FLAGS_FIRST_MATCHING 0x00
-#define EFI_IFR_FLAGS_FIRST_NON_MATCHING 0x01
+#define EFI_IFR_FLAGS_FIRST_MATCHING 0x00
+#define EFI_IFR_FLAGS_FIRST_NON_MATCHING 0x01
typedef struct _EFI_IFR_SPAN {
- EFI_IFR_OP_HEADER Header;
- UINT8 Flags;
+ EFI_IFR_OP_HEADER Header;
+ UINT8 Flags;
} EFI_IFR_SPAN;
typedef struct _EFI_IFR_SECURITY {
///
/// Standard opcode header, where Header.Op = EFI_IFR_SECURITY_OP.
///
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
///
/// Security permission level.
///
- EFI_GUID Permissions;
+ EFI_GUID Permissions;
} EFI_IFR_SECURITY;
typedef struct _EFI_IFR_FORM_MAP_METHOD {
@@ -1503,12 +1496,12 @@
/// The string identifier which provides the human-readable name of
/// the configuration method for this standards map form.
///
- EFI_STRING_ID MethodTitle;
+ EFI_STRING_ID MethodTitle;
///
/// Identifier which uniquely specifies the configuration methods
/// associated with this standards map form.
///
- EFI_GUID MethodIdentifier;
+ EFI_GUID MethodIdentifier;
} EFI_IFR_FORM_MAP_METHOD;
typedef struct _EFI_IFR_FORM_MAP {
@@ -1516,11 +1509,11 @@
/// The sequence that defines the type of opcode as well as the length
/// of the opcode being defined. Header.OpCode = EFI_IFR_FORM_MAP_OP.
///
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
///
/// The unique identifier for this particular form.
///
- EFI_FORM_ID FormId;
+ EFI_FORM_ID FormId;
///
/// One or more configuration method's name and unique identifier.
///
@@ -1532,12 +1525,12 @@
/// The sequence that defines the type of opcode as well as the length
/// of the opcode being defined. Header.OpCode = EFI_IFR_SET_OP.
///
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
///
/// Specifies the identifier of a previously declared variable store to
/// use when storing the question's value.
///
- EFI_VARSTORE_ID VarStoreId;
+ EFI_VARSTORE_ID VarStoreId;
union {
///
/// A 16-bit Buffer Storage offset.
@@ -1551,7 +1544,7 @@
///
/// Specifies the type used for storage.
///
- UINT8 VarStoreType;
+ UINT8 VarStoreType;
} EFI_IFR_SET;
typedef struct _EFI_IFR_GET {
@@ -1559,12 +1552,12 @@
/// The sequence that defines the type of opcode as well as the length
/// of the opcode being defined. Header.OpCode = EFI_IFR_GET_OP.
///
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
///
/// Specifies the identifier of a previously declared variable store to
/// use when retrieving the value.
///
- EFI_VARSTORE_ID VarStoreId;
+ EFI_VARSTORE_ID VarStoreId;
union {
///
/// A 16-bit Buffer Storage offset.
@@ -1578,19 +1571,19 @@
///
/// Specifies the type used for storage.
///
- UINT8 VarStoreType;
+ UINT8 VarStoreType;
} EFI_IFR_GET;
typedef struct _EFI_IFR_READ {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_READ;
typedef struct _EFI_IFR_WRITE {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_WRITE;
typedef struct _EFI_IFR_MAP {
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
} EFI_IFR_MAP;
//
// Definitions for Keyboard Package
@@ -1712,37 +1705,37 @@
///
/// Used to describe a physical key on a keyboard.
///
- EFI_KEY Key;
+ EFI_KEY Key;
///
/// Unicode character code for the Key.
///
- CHAR16 Unicode;
+ CHAR16 Unicode;
///
/// Unicode character code for the key with the shift key being held down.
///
- CHAR16 ShiftedUnicode;
+ CHAR16 ShiftedUnicode;
///
/// Unicode character code for the key with the Alt-GR being held down.
///
- CHAR16 AltGrUnicode;
+ CHAR16 AltGrUnicode;
///
/// Unicode character code for the key with the Alt-GR and shift keys being held down.
///
- CHAR16 ShiftedAltGrUnicode;
+ CHAR16 ShiftedAltGrUnicode;
///
/// Modifier keys are defined to allow for special functionality that is not necessarily
/// accomplished by a printable character. Many of these modifier keys are flags to toggle
/// certain state bits on and off inside of a keyboard driver.
///
- UINT16 Modifier;
- UINT16 AffectedAttribute;
+ UINT16 Modifier;
+ UINT16 AffectedAttribute;
} EFI_KEY_DESCRIPTOR;
///
/// A key which is affected by all the standard shift modifiers.
/// Most keys would be expected to have this bit active.
///
-#define EFI_AFFECTED_BY_STANDARD_SHIFT 0x0001
+#define EFI_AFFECTED_BY_STANDARD_SHIFT 0x0001
///
/// This key is affected by the caps lock so that if a keyboard driver
@@ -1750,65 +1743,65 @@
/// versus an "a" character. Having this bit turned on would tell
/// the keyboard driver to use the appropriate shifted state or not.
///
-#define EFI_AFFECTED_BY_CAPS_LOCK 0x0002
+#define EFI_AFFECTED_BY_CAPS_LOCK 0x0002
///
/// Similar to the case of CAPS lock, if this bit is active, the key
/// is affected by the num lock being turned on.
///
-#define EFI_AFFECTED_BY_NUM_LOCK 0x0004
+#define EFI_AFFECTED_BY_NUM_LOCK 0x0004
typedef struct {
- UINT16 LayoutLength;
- EFI_GUID Guid;
- UINT32 LayoutDescriptorStringOffset;
- UINT8 DescriptorCount;
+ UINT16 LayoutLength;
+ EFI_GUID Guid;
+ UINT32 LayoutDescriptorStringOffset;
+ UINT8 DescriptorCount;
// EFI_KEY_DESCRIPTOR Descriptors[];
} EFI_HII_KEYBOARD_LAYOUT;
typedef struct {
- EFI_HII_PACKAGE_HEADER Header;
- UINT16 LayoutCount;
+ EFI_HII_PACKAGE_HEADER Header;
+ UINT16 LayoutCount;
// EFI_HII_KEYBOARD_LAYOUT Layout[];
} EFI_HII_KEYBOARD_PACKAGE_HDR;
//
// Modifier values
//
-#define EFI_NULL_MODIFIER 0x0000
-#define EFI_LEFT_CONTROL_MODIFIER 0x0001
-#define EFI_RIGHT_CONTROL_MODIFIER 0x0002
-#define EFI_LEFT_ALT_MODIFIER 0x0003
-#define EFI_RIGHT_ALT_MODIFIER 0x0004
-#define EFI_ALT_GR_MODIFIER 0x0005
-#define EFI_INSERT_MODIFIER 0x0006
-#define EFI_DELETE_MODIFIER 0x0007
-#define EFI_PAGE_DOWN_MODIFIER 0x0008
-#define EFI_PAGE_UP_MODIFIER 0x0009
-#define EFI_HOME_MODIFIER 0x000A
-#define EFI_END_MODIFIER 0x000B
-#define EFI_LEFT_SHIFT_MODIFIER 0x000C
-#define EFI_RIGHT_SHIFT_MODIFIER 0x000D
-#define EFI_CAPS_LOCK_MODIFIER 0x000E
-#define EFI_NUM_LOCK_MODIFIER 0x000F
-#define EFI_LEFT_ARROW_MODIFIER 0x0010
-#define EFI_RIGHT_ARROW_MODIFIER 0x0011
-#define EFI_DOWN_ARROW_MODIFIER 0x0012
-#define EFI_UP_ARROW_MODIFIER 0x0013
-#define EFI_NS_KEY_MODIFIER 0x0014
-#define EFI_NS_KEY_DEPENDENCY_MODIFIER 0x0015
-#define EFI_FUNCTION_KEY_ONE_MODIFIER 0x0016
-#define EFI_FUNCTION_KEY_TWO_MODIFIER 0x0017
-#define EFI_FUNCTION_KEY_THREE_MODIFIER 0x0018
-#define EFI_FUNCTION_KEY_FOUR_MODIFIER 0x0019
-#define EFI_FUNCTION_KEY_FIVE_MODIFIER 0x001A
-#define EFI_FUNCTION_KEY_SIX_MODIFIER 0x001B
-#define EFI_FUNCTION_KEY_SEVEN_MODIFIER 0x001C
-#define EFI_FUNCTION_KEY_EIGHT_MODIFIER 0x001D
-#define EFI_FUNCTION_KEY_NINE_MODIFIER 0x001E
-#define EFI_FUNCTION_KEY_TEN_MODIFIER 0x001F
-#define EFI_FUNCTION_KEY_ELEVEN_MODIFIER 0x0020
-#define EFI_FUNCTION_KEY_TWELVE_MODIFIER 0x0021
+#define EFI_NULL_MODIFIER 0x0000
+#define EFI_LEFT_CONTROL_MODIFIER 0x0001
+#define EFI_RIGHT_CONTROL_MODIFIER 0x0002
+#define EFI_LEFT_ALT_MODIFIER 0x0003
+#define EFI_RIGHT_ALT_MODIFIER 0x0004
+#define EFI_ALT_GR_MODIFIER 0x0005
+#define EFI_INSERT_MODIFIER 0x0006
+#define EFI_DELETE_MODIFIER 0x0007
+#define EFI_PAGE_DOWN_MODIFIER 0x0008
+#define EFI_PAGE_UP_MODIFIER 0x0009
+#define EFI_HOME_MODIFIER 0x000A
+#define EFI_END_MODIFIER 0x000B
+#define EFI_LEFT_SHIFT_MODIFIER 0x000C
+#define EFI_RIGHT_SHIFT_MODIFIER 0x000D
+#define EFI_CAPS_LOCK_MODIFIER 0x000E
+#define EFI_NUM_LOCK_MODIFIER 0x000F
+#define EFI_LEFT_ARROW_MODIFIER 0x0010
+#define EFI_RIGHT_ARROW_MODIFIER 0x0011
+#define EFI_DOWN_ARROW_MODIFIER 0x0012
+#define EFI_UP_ARROW_MODIFIER 0x0013
+#define EFI_NS_KEY_MODIFIER 0x0014
+#define EFI_NS_KEY_DEPENDENCY_MODIFIER 0x0015
+#define EFI_FUNCTION_KEY_ONE_MODIFIER 0x0016
+#define EFI_FUNCTION_KEY_TWO_MODIFIER 0x0017
+#define EFI_FUNCTION_KEY_THREE_MODIFIER 0x0018
+#define EFI_FUNCTION_KEY_FOUR_MODIFIER 0x0019
+#define EFI_FUNCTION_KEY_FIVE_MODIFIER 0x001A
+#define EFI_FUNCTION_KEY_SIX_MODIFIER 0x001B
+#define EFI_FUNCTION_KEY_SEVEN_MODIFIER 0x001C
+#define EFI_FUNCTION_KEY_EIGHT_MODIFIER 0x001D
+#define EFI_FUNCTION_KEY_NINE_MODIFIER 0x001E
+#define EFI_FUNCTION_KEY_TEN_MODIFIER 0x001F
+#define EFI_FUNCTION_KEY_ELEVEN_MODIFIER 0x0020
+#define EFI_FUNCTION_KEY_TWELVE_MODIFIER 0x0021
//
// Keys that have multiple control functions based on modifier
@@ -1817,15 +1810,15 @@
// is still a nonprinting character, but might have an alternate
// control function like SYSREQUEST
//
-#define EFI_PRINT_MODIFIER 0x0022
-#define EFI_SYS_REQUEST_MODIFIER 0x0023
-#define EFI_SCROLL_LOCK_MODIFIER 0x0024
-#define EFI_PAUSE_MODIFIER 0x0025
-#define EFI_BREAK_MODIFIER 0x0026
+#define EFI_PRINT_MODIFIER 0x0022
+#define EFI_SYS_REQUEST_MODIFIER 0x0023
+#define EFI_SCROLL_LOCK_MODIFIER 0x0024
+#define EFI_PAUSE_MODIFIER 0x0025
+#define EFI_BREAK_MODIFIER 0x0026
-#define EFI_LEFT_LOGO_MODIFIER 0x0027
-#define EFI_RIGHT_LOGO_MODIFIER 0x0028
-#define EFI_MENU_MODIFIER 0x0029
+#define EFI_LEFT_LOGO_MODIFIER 0x0027
+#define EFI_RIGHT_LOGO_MODIFIER 0x0028
+#define EFI_MENU_MODIFIER 0x0029
///
/// Animation IFR opcode
@@ -1835,11 +1828,11 @@
/// Standard opcode header, where Header.OpCode is
/// EFI_IFR_ANIMATION_OP.
///
- EFI_IFR_OP_HEADER Header;
+ EFI_IFR_OP_HEADER Header;
///
/// Animation identifier in the HII database.
///
- EFI_ANIMATION_ID Id;
+ EFI_ANIMATION_ID Id;
} EFI_IFR_ANIMATION;
///
@@ -1849,12 +1842,12 @@
///
/// Standard package header, where Header.Type = EFI_HII_PACKAGE_ANIMATIONS.
///
- EFI_HII_PACKAGE_HEADER Header;
+ EFI_HII_PACKAGE_HEADER Header;
///
/// Offset, relative to this header, of the animation information. If
/// this is zero, then there are no animation sequences in the package.
///
- UINT32 AnimationInfoOffset;
+ UINT32 AnimationInfoOffset;
} EFI_HII_ANIMATION_PACKAGE_HDR;
///
@@ -1862,26 +1855,26 @@
/// with each block prefixed by a single byte header EFI_HII_ANIMATION_BLOCK.
///
typedef struct _EFI_HII_ANIMATION_BLOCK {
- UINT8 BlockType;
- //UINT8 BlockBody[];
+ UINT8 BlockType;
+ // UINT8 BlockBody[];
} EFI_HII_ANIMATION_BLOCK;
///
/// Animation block types.
///
-#define EFI_HII_AIBT_END 0x00
-#define EFI_HII_AIBT_OVERLAY_IMAGES 0x10
-#define EFI_HII_AIBT_CLEAR_IMAGES 0x11
-#define EFI_HII_AIBT_RESTORE_SCRN 0x12
-#define EFI_HII_AIBT_OVERLAY_IMAGES_LOOP 0x18
-#define EFI_HII_AIBT_CLEAR_IMAGES_LOOP 0x19
-#define EFI_HII_AIBT_RESTORE_SCRN_LOOP 0x1A
-#define EFI_HII_AIBT_DUPLICATE 0x20
-#define EFI_HII_AIBT_SKIP2 0x21
-#define EFI_HII_AIBT_SKIP1 0x22
-#define EFI_HII_AIBT_EXT1 0x30
-#define EFI_HII_AIBT_EXT2 0x31
-#define EFI_HII_AIBT_EXT4 0x32
+#define EFI_HII_AIBT_END 0x00
+#define EFI_HII_AIBT_OVERLAY_IMAGES 0x10
+#define EFI_HII_AIBT_CLEAR_IMAGES 0x11
+#define EFI_HII_AIBT_RESTORE_SCRN 0x12
+#define EFI_HII_AIBT_OVERLAY_IMAGES_LOOP 0x18
+#define EFI_HII_AIBT_CLEAR_IMAGES_LOOP 0x19
+#define EFI_HII_AIBT_RESTORE_SCRN_LOOP 0x1A
+#define EFI_HII_AIBT_DUPLICATE 0x20
+#define EFI_HII_AIBT_SKIP2 0x21
+#define EFI_HII_AIBT_SKIP1 0x22
+#define EFI_HII_AIBT_EXT1 0x30
+#define EFI_HII_AIBT_EXT2 0x31
+#define EFI_HII_AIBT_EXT4 0x32
///
/// Extended block headers used for variable sized animation records
@@ -1892,45 +1885,45 @@
///
/// Standard animation header, where Header.BlockType = EFI_HII_AIBT_EXT1.
///
- EFI_HII_ANIMATION_BLOCK Header;
+ EFI_HII_ANIMATION_BLOCK Header;
///
/// The block type.
///
- UINT8 BlockType2;
+ UINT8 BlockType2;
///
/// Size of the animation block, in bytes, including the animation block header.
///
- UINT8 Length;
+ UINT8 Length;
} EFI_HII_AIBT_EXT1_BLOCK;
typedef struct _EFI_HII_AIBT_EXT2_BLOCK {
///
/// Standard animation header, where Header.BlockType = EFI_HII_AIBT_EXT2.
///
- EFI_HII_ANIMATION_BLOCK Header;
+ EFI_HII_ANIMATION_BLOCK Header;
///
/// The block type
///
- UINT8 BlockType2;
+ UINT8 BlockType2;
///
/// Size of the animation block, in bytes, including the animation block header.
///
- UINT16 Length;
+ UINT16 Length;
} EFI_HII_AIBT_EXT2_BLOCK;
typedef struct _EFI_HII_AIBT_EXT4_BLOCK {
///
/// Standard animation header, where Header.BlockType = EFI_HII_AIBT_EXT4.
///
- EFI_HII_ANIMATION_BLOCK Header;
+ EFI_HII_ANIMATION_BLOCK Header;
///
/// The block type
///
- UINT8 BlockType2;
+ UINT8 BlockType2;
///
/// Size of the animation block, in bytes, including the animation block header.
///
- UINT32 Length;
+ UINT32 Length;
} EFI_HII_AIBT_EXT4_BLOCK;
typedef struct _EFI_HII_ANIMATION_CELL {
@@ -1938,23 +1931,23 @@
/// The X offset from the upper left hand corner of the logical
/// window to position the indexed image.
///
- UINT16 OffsetX;
+ UINT16 OffsetX;
///
/// The Y offset from the upper left hand corner of the logical
/// window to position the indexed image.
///
- UINT16 OffsetY;
+ UINT16 OffsetY;
///
/// The image to display at the specified offset from the upper left
/// hand corner of the logical window.
///
- EFI_IMAGE_ID ImageId;
+ EFI_IMAGE_ID ImageId;
///
/// The number of milliseconds to delay after displaying the indexed
/// image and before continuing on to the next linked image. If value
/// is zero, no delay.
///
- UINT16 Delay;
+ UINT16 Delay;
} EFI_HII_ANIMATION_CELL;
///
@@ -1970,24 +1963,24 @@
/// image that can be displayed alone. If the value is zero, no image
/// is displayed.
///
- EFI_IMAGE_ID DftImageId;
+ EFI_IMAGE_ID DftImageId;
///
/// The overall width of the set of images (logical window width).
///
- UINT16 Width;
+ UINT16 Width;
///
/// The overall height of the set of images (logical window height).
///
- UINT16 Height;
+ UINT16 Height;
///
/// The number of EFI_HII_ANIMATION_CELL contained in the
/// animation sequence.
///
- UINT16 CellCount;
+ UINT16 CellCount;
///
/// An array of CellCount animation cells.
///
- EFI_HII_ANIMATION_CELL AnimationCell[1];
+ EFI_HII_ANIMATION_CELL AnimationCell[1];
} EFI_HII_AIBT_OVERLAY_IMAGES_BLOCK;
///
@@ -2004,29 +1997,29 @@
/// image that can be displayed alone. If the value is zero, no image
/// is displayed.
///
- EFI_IMAGE_ID DftImageId;
+ EFI_IMAGE_ID DftImageId;
///
/// The overall width of the set of images (logical window width).
///
- UINT16 Width;
+ UINT16 Width;
///
/// The overall height of the set of images (logical window height).
///
- UINT16 Height;
+ UINT16 Height;
///
/// The number of EFI_HII_ANIMATION_CELL contained in the
/// animation sequence.
///
- UINT16 CellCount;
+ UINT16 CellCount;
///
/// The color to clear the logical window to before displaying the
/// indexed image.
///
- EFI_HII_RGB_PIXEL BackgndColor;
+ EFI_HII_RGB_PIXEL BackgndColor;
///
/// An array of CellCount animation cells.
///
- EFI_HII_ANIMATION_CELL AnimationCell[1];
+ EFI_HII_ANIMATION_CELL AnimationCell[1];
} EFI_HII_AIBT_CLEAR_IMAGES_BLOCK;
///
@@ -2043,45 +2036,45 @@
/// image that can be displayed alone. If the value is zero, no image
/// is displayed.
///
- EFI_IMAGE_ID DftImageId;
+ EFI_IMAGE_ID DftImageId;
///
/// The overall width of the set of images (logical window width).
///
- UINT16 Width;
+ UINT16 Width;
///
/// The overall height of the set of images (logical window height).
///
- UINT16 Height;
+ UINT16 Height;
///
/// The number of EFI_HII_ANIMATION_CELL contained in the
/// animation sequence.
///
- UINT16 CellCount;
+ UINT16 CellCount;
///
/// An array of CellCount animation cells.
///
- EFI_HII_ANIMATION_CELL AnimationCell[1];
+ EFI_HII_ANIMATION_CELL AnimationCell[1];
} EFI_HII_AIBT_RESTORE_SCRN_BLOCK;
///
/// An animation block to describe an animation sequence that continuously cycles,
/// and where one image is simply displayed over the previous image.
///
-typedef EFI_HII_AIBT_OVERLAY_IMAGES_BLOCK EFI_HII_AIBT_OVERLAY_IMAGES_LOOP_BLOCK;
+typedef EFI_HII_AIBT_OVERLAY_IMAGES_BLOCK EFI_HII_AIBT_OVERLAY_IMAGES_LOOP_BLOCK;
///
/// An animation block to describe an animation sequence that continuously cycles,
/// and where the logical window is cleared to the specified color before
/// the next image is displayed.
///
-typedef EFI_HII_AIBT_CLEAR_IMAGES_BLOCK EFI_HII_AIBT_CLEAR_IMAGES_LOOP_BLOCK;
+typedef EFI_HII_AIBT_CLEAR_IMAGES_BLOCK EFI_HII_AIBT_CLEAR_IMAGES_LOOP_BLOCK;
///
/// An animation block to describe an animation sequence that continuously cycles,
/// and where the screen is restored to the original state before
/// the next image is displayed.
///
-typedef EFI_HII_AIBT_RESTORE_SCRN_BLOCK EFI_HII_AIBT_RESTORE_SCRN_LOOP_BLOCK;
+typedef EFI_HII_AIBT_RESTORE_SCRN_BLOCK EFI_HII_AIBT_RESTORE_SCRN_LOOP_BLOCK;
///
/// Assigns a new character value to a previously defined animation sequence.
@@ -2091,7 +2084,7 @@
/// The previously defined animation ID with the exact same
/// animation information.
///
- EFI_ANIMATION_ID AnimationId;
+ EFI_ANIMATION_ID AnimationId;
} EFI_HII_AIBT_DUPLICATE_BLOCK;
///
@@ -2101,7 +2094,7 @@
///
/// The unsigned 8-bit value to add to AnimationIdCurrent.
///
- UINT8 SkipCount;
+ UINT8 SkipCount;
} EFI_HII_AIBT_SKIP1_BLOCK;
///
@@ -2111,13 +2104,11 @@
///
/// The unsigned 16-bit value to add to AnimationIdCurrent.
///
- UINT16 SkipCount;
+ UINT16 SkipCount;
} EFI_HII_AIBT_SKIP2_BLOCK;
#pragma pack()
-
-
///
/// References to string tokens must use this macro to enable scanning for
/// token usages.
@@ -2126,12 +2117,12 @@
/// STRING_TOKEN is not defined in UEFI specification. But it is placed
/// here for the easy access by C files and VFR source files.
///
-#define STRING_TOKEN(t) t
+#define STRING_TOKEN(t) t
///
/// IMAGE_TOKEN is not defined in UEFI specification. But it is placed
/// here for the easy access by C files and VFR source files.
///
-#define IMAGE_TOKEN(t) t
+#define IMAGE_TOKEN(t) t
#endif
diff --git a/src/include/ipxe/efi/Uefi/UefiMultiPhase.h b/src/include/ipxe/efi/Uefi/UefiMultiPhase.h
index 38ec09f..4ac7604 100644
--- a/src/include/ipxe/efi/Uefi/UefiMultiPhase.h
+++ b/src/include/ipxe/efi/Uefi/UefiMultiPhase.h
@@ -1,23 +1,39 @@
/** @file
This includes some definitions introduced in UEFI that will be used in both PEI and DXE phases.
-Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __UEFI_MULTIPHASE_H__
#define __UEFI_MULTIPHASE_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
-#include <ipxe/efi/Guid/WinCertificate.h>
+///
+/// Attributes of variable.
+///
+#define EFI_VARIABLE_NON_VOLATILE 0x00000001
+#define EFI_VARIABLE_BOOTSERVICE_ACCESS 0x00000002
+#define EFI_VARIABLE_RUNTIME_ACCESS 0x00000004
+///
+/// This attribute is identified by the mnemonic 'HR'
+/// elsewhere in this specification.
+///
+#define EFI_VARIABLE_HARDWARE_ERROR_RECORD 0x00000008
+///
+/// Attributes of Authenticated Variable
+///
+#define EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS 0x00000020
+#define EFI_VARIABLE_APPEND_WRITE 0x00000040
+///
+/// NOTE: EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS is deprecated and should be considered reserved.
+///
+#define EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS 0x00000010
+
+#ifndef VFRCOMPILE
+ #include <ipxe/efi/Guid/WinCertificate.h>
///
/// Enumeration of memory types introduced in UEFI.
///
@@ -89,6 +105,11 @@
/// however it happens to also support byte-addressable non-volatility.
///
EfiPersistentMemory,
+ ///
+ /// A memory region that describes system memory that has not been accepted
+ /// by a corresponding call to the underlying isolation architecture.
+ ///
+ EfiUnacceptedMemoryType,
EfiMaxMemoryType
} EFI_MEMORY_TYPE;
@@ -134,49 +155,30 @@
/// Unique signatures have been generated for the EFI System Table,
/// the EFI Boot Services Table, and the EFI Runtime Services Table.
///
- UINT64 Signature;
+ UINT64 Signature;
///
/// The revision of the EFI Specification to which this table
/// conforms. The upper 16 bits of this field contain the major
/// revision value, and the lower 16 bits contain the minor revision
/// value. The minor revision values are limited to the range of 00..99.
///
- UINT32 Revision;
+ UINT32 Revision;
///
/// The size, in bytes, of the entire table including the EFI_TABLE_HEADER.
///
- UINT32 HeaderSize;
+ UINT32 HeaderSize;
///
/// The 32-bit CRC for the entire table. This value is computed by
/// setting this field to 0, and computing the 32-bit CRC for HeaderSize bytes.
///
- UINT32 CRC32;
+ UINT32 CRC32;
///
/// Reserved field that must be set to 0.
///
- UINT32 Reserved;
+ UINT32 Reserved;
} EFI_TABLE_HEADER;
///
-/// Attributes of variable.
-///
-#define EFI_VARIABLE_NON_VOLATILE 0x00000001
-#define EFI_VARIABLE_BOOTSERVICE_ACCESS 0x00000002
-#define EFI_VARIABLE_RUNTIME_ACCESS 0x00000004
-///
-/// This attribute is identified by the mnemonic 'HR'
-/// elsewhere in this specification.
-///
-#define EFI_VARIABLE_HARDWARE_ERROR_RECORD 0x00000008
-///
-/// Attributes of Authenticated Variable
-///
-#define EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS 0x00000010
-#define EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS 0x00000020
-#define EFI_VARIABLE_APPEND_WRITE 0x00000040
-
-
-///
/// AuthInfo is a WIN_CERTIFICATE using the wCertificateType
/// WIN_CERTIFICATE_UEFI_GUID and the CertType
/// EFI_CERT_TYPE_RSA2048_SHA256_GUID. If the attribute specifies
@@ -198,7 +200,7 @@
/// replay. Incremented during each
/// "Write" access.
///
- UINT64 MonotonicCount;
+ UINT64 MonotonicCount;
///
/// Provides the authorization for the variable
/// access. It is a signature across the
@@ -207,7 +209,7 @@
/// associated with a public key that has been
/// provisioned via the key exchange.
///
- WIN_CERTIFICATE_UEFI_GUID AuthInfo;
+ WIN_CERTIFICATE_UEFI_GUID AuthInfo;
} EFI_VARIABLE_AUTHENTICATION;
///
@@ -223,11 +225,12 @@
/// For the TimeStamp value, components Pad1, Nanosecond, TimeZone, Daylight and
/// Pad2 shall be set to 0. This means that the time shall always be expressed in GMT.
///
- EFI_TIME TimeStamp;
+ EFI_TIME TimeStamp;
///
/// Only a CertType of EFI_CERT_TYPE_PKCS7_GUID is accepted.
///
- WIN_CERTIFICATE_UEFI_GUID AuthInfo;
- } EFI_VARIABLE_AUTHENTICATION_2;
+ WIN_CERTIFICATE_UEFI_GUID AuthInfo;
+} EFI_VARIABLE_AUTHENTICATION_2;
+#endif // VFRCOMPILE
#endif
diff --git a/src/include/ipxe/efi/Uefi/UefiPxe.h b/src/include/ipxe/efi/Uefi/UefiPxe.h
index 6ed5c9a..b4366ed 100644
--- a/src/include/ipxe/efi/Uefi/UefiPxe.h
+++ b/src/include/ipxe/efi/Uefi/UefiPxe.h
@@ -3,14 +3,8 @@
structure prototypes, global variables and constants that
are needed for porting PXE to EFI.
-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
32/64-bit PXE specification:
@@ -21,7 +15,7 @@
#ifndef __EFI_PXE_H__
#define __EFI_PXE_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#pragma pack(1)
@@ -34,15 +28,15 @@
///
/// UNDI ROM ID and devive ID signature.
///
-#define PXE_BUSTYPE_PXE PXE_BUSTYPE ('!', 'P', 'X', 'E')
+#define PXE_BUSTYPE_PXE PXE_BUSTYPE ('!', 'P', 'X', 'E')
///
/// BUS ROM ID signatures.
///
-#define PXE_BUSTYPE_PCI PXE_BUSTYPE ('P', 'C', 'I', 'R')
-#define PXE_BUSTYPE_PC_CARD PXE_BUSTYPE ('P', 'C', 'C', 'R')
-#define PXE_BUSTYPE_USB PXE_BUSTYPE ('U', 'S', 'B', 'R')
-#define PXE_BUSTYPE_1394 PXE_BUSTYPE ('1', '3', '9', '4')
+#define PXE_BUSTYPE_PCI PXE_BUSTYPE ('P', 'C', 'I', 'R')
+#define PXE_BUSTYPE_PC_CARD PXE_BUSTYPE ('P', 'C', 'C', 'R')
+#define PXE_BUSTYPE_USB PXE_BUSTYPE ('U', 'S', 'B', 'R')
+#define PXE_BUSTYPE_1394 PXE_BUSTYPE ('1', '3', '9', '4')
#define PXE_SWAP_UINT16(n) ((((PXE_UINT16) (n) & 0x00FF) << 8) | (((PXE_UINT16) (n) & 0xFF00) >> 8))
@@ -62,31 +56,30 @@
(((PXE_UINT64)(n) & 0x00FF000000000000ULL) >> 40) | \
(((PXE_UINT64)(n) & 0xFF00000000000000ULL) >> 56))
-
#define PXE_CPBSIZE_NOT_USED 0 ///< zero
#define PXE_DBSIZE_NOT_USED 0 ///< zero
#define PXE_CPBADDR_NOT_USED (PXE_UINT64) 0 ///< zero
#define PXE_DBADDR_NOT_USED (PXE_UINT64) 0 ///< zero
#define PXE_CONST CONST
-#define PXE_VOLATILE volatile
+#define PXE_VOLATILE volatile
-typedef VOID PXE_VOID;
-typedef UINT8 PXE_UINT8;
-typedef UINT16 PXE_UINT16;
-typedef UINT32 PXE_UINT32;
-typedef UINTN PXE_UINTN;
+typedef VOID PXE_VOID;
+typedef UINT8 PXE_UINT8;
+typedef UINT16 PXE_UINT16;
+typedef UINT32 PXE_UINT32;
+typedef UINTN PXE_UINTN;
///
/// Typedef unsigned long PXE_UINT64.
///
-typedef UINT64 PXE_UINT64;
+typedef UINT64 PXE_UINT64;
typedef PXE_UINT8 PXE_BOOL;
-#define PXE_FALSE 0 ///< zero
-#define PXE_TRUE (!PXE_FALSE)
+#define PXE_FALSE 0 ///< zero
+#define PXE_TRUE (!PXE_FALSE)
-typedef PXE_UINT16 PXE_OPCODE;
+typedef PXE_UINT16 PXE_OPCODE;
///
/// Return UNDI operational state.
@@ -101,7 +94,7 @@
///
/// Change UNDI operational state from Started to Stopped.
///
-#define PXE_OPCODE_STOP 0x0002
+#define PXE_OPCODE_STOP 0x0002
///
/// Get UNDI initialization information.
@@ -116,7 +109,7 @@
///
/// Changed UNDI operational state from Started to Initialized.
///
-#define PXE_OPCODE_INITIALIZE 0x0005
+#define PXE_OPCODE_INITIALIZE 0x0005
///
/// Re-initialize the NIC H/W.
@@ -126,7 +119,7 @@
///
/// Change the UNDI operational state from Initialized to Started.
///
-#define PXE_OPCODE_SHUTDOWN 0x0007
+#define PXE_OPCODE_SHUTDOWN 0x0007
///
/// Read & change state of external interrupt enables.
@@ -146,7 +139,7 @@
///
/// Read traffic statistics.
///
-#define PXE_OPCODE_STATISTICS 0x000B
+#define PXE_OPCODE_STATISTICS 0x000B
///
/// Convert multicast IP address to multicast MAC address.
@@ -156,12 +149,12 @@
///
/// Read or change non-volatile storage on the NIC.
///
-#define PXE_OPCODE_NVDATA 0x000D
+#define PXE_OPCODE_NVDATA 0x000D
///
/// Get & clear interrupt status.
///
-#define PXE_OPCODE_GET_STATUS 0x000E
+#define PXE_OPCODE_GET_STATUS 0x000E
///
/// Fill media header in packet for transmit.
@@ -171,7 +164,7 @@
///
/// Transmit packet(s).
///
-#define PXE_OPCODE_TRANSMIT 0x0010
+#define PXE_OPCODE_TRANSMIT 0x0010
///
/// Receive packet.
@@ -181,9 +174,9 @@
///
/// Last valid PXE UNDI OpCode number.
///
-#define PXE_OPCODE_LAST_VALID 0x0011
+#define PXE_OPCODE_LAST_VALID 0x0011
-typedef PXE_UINT16 PXE_OPFLAGS;
+typedef PXE_UINT16 PXE_OPFLAGS;
#define PXE_OPFLAGS_NOT_USED 0x0000
@@ -239,16 +232,16 @@
/// Select whether to enable or disable external interrupt signals.
/// Setting both enable and disable will return PXE_STATCODE_INVALID_OPFLAGS.
///
-#define PXE_OPFLAGS_INTERRUPT_OPMASK 0xC000
-#define PXE_OPFLAGS_INTERRUPT_ENABLE 0x8000
-#define PXE_OPFLAGS_INTERRUPT_DISABLE 0x4000
-#define PXE_OPFLAGS_INTERRUPT_READ 0x0000
+#define PXE_OPFLAGS_INTERRUPT_OPMASK 0xC000
+#define PXE_OPFLAGS_INTERRUPT_ENABLE 0x8000
+#define PXE_OPFLAGS_INTERRUPT_DISABLE 0x4000
+#define PXE_OPFLAGS_INTERRUPT_READ 0x0000
///
/// Enable receive interrupts. An external interrupt will be generated
/// after a complete non-error packet has been received.
///
-#define PXE_OPFLAGS_INTERRUPT_RECEIVE 0x0001
+#define PXE_OPFLAGS_INTERRUPT_RECEIVE 0x0001
///
/// Enable transmit interrupts. An external interrupt will be generated
@@ -260,7 +253,7 @@
/// Enable command interrupts. An external interrupt will be generated
/// when command execution stops.
///
-#define PXE_OPFLAGS_INTERRUPT_COMMAND 0x0004
+#define PXE_OPFLAGS_INTERRUPT_COMMAND 0x0004
///
/// Generate software interrupt. Setting this bit generates an external
@@ -284,7 +277,7 @@
/// To reset the contents of the multicast MAC address filter list,
/// set this OpFlag:
///
-#define PXE_OPFLAGS_RECEIVE_FILTER_RESET_MCAST_LIST 0x2000
+#define PXE_OPFLAGS_RECEIVE_FILTER_RESET_MCAST_LIST 0x2000
///
/// Enable unicast packet receiving. Packets sent to the current station
@@ -303,7 +296,7 @@
/// of the multicast MAC addresses in the multicast MAC address filter
/// list will be received. If the filter list is empty, no multicast
///
-#define PXE_OPFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004
+#define PXE_OPFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004
///
/// Enable promiscuous packet receiving. All packets will be received.
@@ -345,9 +338,9 @@
///
/// Select the type of non-volatile data operation.
///
-#define PXE_OPFLAGS_NVDATA_OPMASK 0x0001
-#define PXE_OPFLAGS_NVDATA_READ 0x0000
-#define PXE_OPFLAGS_NVDATA_WRITE 0x0001
+#define PXE_OPFLAGS_NVDATA_OPMASK 0x0001
+#define PXE_OPFLAGS_NVDATA_READ 0x0000
+#define PXE_OPFLAGS_NVDATA_WRITE 0x0001
///
/// UNDI Get Status.
@@ -368,12 +361,12 @@
/// buffers. Do not plan on getting one buffer per interrupt. Some
/// NICs and UNDIs may transmit multiple buffers per interrupt.
///
-#define PXE_OPFLAGS_GET_TRANSMITTED_BUFFERS 0x0002
+#define PXE_OPFLAGS_GET_TRANSMITTED_BUFFERS 0x0002
///
/// Return current media status.
///
-#define PXE_OPFLAGS_GET_MEDIA_STATUS 0x0004
+#define PXE_OPFLAGS_GET_MEDIA_STATUS 0x0004
///
/// UNDI Fill Header.
@@ -394,9 +387,9 @@
#define PXE_OPFLAGS_TRANSMIT_BLOCK 0x0001
#define PXE_OPFLAGS_TRANSMIT_DONT_BLOCK 0x0000
-#define PXE_OPFLAGS_TRANSMIT_OPMASK 0x0002
-#define PXE_OPFLAGS_TRANSMIT_FRAGMENTED 0x0002
-#define PXE_OPFLAGS_TRANSMIT_WHOLE 0x0000
+#define PXE_OPFLAGS_TRANSMIT_OPMASK 0x0002
+#define PXE_OPFLAGS_TRANSMIT_FRAGMENTED 0x0002
+#define PXE_OPFLAGS_TRANSMIT_WHOLE 0x0000
///
/// UNDI Receive.
@@ -407,7 +400,7 @@
///
/// PXE STATFLAGS.
///
-typedef PXE_UINT16 PXE_STATFLAGS;
+typedef PXE_UINT16 PXE_STATFLAGS;
#define PXE_STATFLAGS_INITIALIZE 0x0000
@@ -427,10 +420,10 @@
///
/// UNDI Get State.
///
-#define PXE_STATFLAGS_GET_STATE_MASK 0x0003
-#define PXE_STATFLAGS_GET_STATE_INITIALIZED 0x0002
-#define PXE_STATFLAGS_GET_STATE_STARTED 0x0001
-#define PXE_STATFLAGS_GET_STATE_STOPPED 0x0000
+#define PXE_STATFLAGS_GET_STATE_MASK 0x0003
+#define PXE_STATFLAGS_GET_STATE_INITIALIZED 0x0002
+#define PXE_STATFLAGS_GET_STATE_STARTED 0x0001
+#define PXE_STATFLAGS_GET_STATE_STOPPED 0x0000
///
/// UNDI Start.
@@ -470,7 +463,7 @@
///
/// If set, receive interrupts are enabled.
///
-#define PXE_STATFLAGS_INTERRUPT_RECEIVE 0x0001
+#define PXE_STATFLAGS_INTERRUPT_RECEIVE 0x0001
///
/// If set, transmit interrupts are enabled.
@@ -480,7 +473,7 @@
///
/// If set, command interrupts are enabled.
///
-#define PXE_STATFLAGS_INTERRUPT_COMMAND 0x0004
+#define PXE_STATFLAGS_INTERRUPT_COMMAND 0x0004
///
/// UNDI Receive Filters.
@@ -500,7 +493,7 @@
/// If set, multicast packets that match up with the multicast address
/// filter list will be received.
///
-#define PXE_STATFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004
+#define PXE_STATFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004
///
/// If set, all packets will be received.
@@ -542,8 +535,8 @@
///
/// Use to determine if an interrupt has occurred.
///
-#define PXE_STATFLAGS_GET_STATUS_INTERRUPT_MASK 0x000F
-#define PXE_STATFLAGS_GET_STATUS_NO_INTERRUPTS 0x0000
+#define PXE_STATFLAGS_GET_STATUS_INTERRUPT_MASK 0x000F
+#define PXE_STATFLAGS_GET_STATUS_NO_INTERRUPTS 0x0000
///
/// If set, at least one receive interrupt occurred.
@@ -553,7 +546,7 @@
///
/// If set, at least one transmit interrupt occurred.
///
-#define PXE_STATFLAGS_GET_STATUS_TRANSMIT 0x0002
+#define PXE_STATFLAGS_GET_STATUS_TRANSMIT 0x0002
///
/// If set, at least one command interrupt occurred.
@@ -563,7 +556,7 @@
///
/// If set, at least one software interrupt occurred.
///
-#define PXE_STATFLAGS_GET_STATUS_SOFTWARE 0x0008
+#define PXE_STATFLAGS_GET_STATUS_SOFTWARE 0x0008
///
/// This flag is set if the transmitted buffer queue is empty. This flag
@@ -595,20 +588,20 @@
///
/// UNDI Receive
-///.
+/// .
///
/// No additional StatFlags.
///
-typedef PXE_UINT16 PXE_STATCODE;
+typedef PXE_UINT16 PXE_STATCODE;
-#define PXE_STATCODE_INITIALIZE 0x0000
+#define PXE_STATCODE_INITIALIZE 0x0000
///
/// Common StatCodes returned by all UNDI commands, UNDI protocol functions
/// and BC protocol functions.
///
-#define PXE_STATCODE_SUCCESS 0x0000
+#define PXE_STATCODE_SUCCESS 0x0000
#define PXE_STATCODE_INVALID_CDB 0x0001
#define PXE_STATCODE_INVALID_CPB 0x0002
@@ -630,20 +623,20 @@
#define PXE_STATCODE_NOT_ENOUGH_MEMORY 0x0012
#define PXE_STATCODE_NO_DATA 0x0013
-typedef PXE_UINT16 PXE_IFNUM;
+typedef PXE_UINT16 PXE_IFNUM;
///
/// This interface number must be passed to the S/W UNDI Start command.
///
-#define PXE_IFNUM_START 0x0000
+#define PXE_IFNUM_START 0x0000
///
/// This interface number is returned by the S/W UNDI Get State and
/// Start commands if information in the CDB, CPB or DB is invalid.
///
-#define PXE_IFNUM_INVALID 0x0000
+#define PXE_IFNUM_INVALID 0x0000
-typedef PXE_UINT16 PXE_CONTROL;
+typedef PXE_UINT16 PXE_CONTROL;
///
/// Setting this flag directs the UNDI to queue this command for later
@@ -652,7 +645,7 @@
/// is returned. If the queue is full, a PXE_STATCODE_CDB_QUEUE_FULL
/// error is returned.
///
-#define PXE_CONTROL_QUEUE_IF_BUSY 0x0002
+#define PXE_CONTROL_QUEUE_IF_BUSY 0x0002
///
/// These two bit values are used to determine if there are more UNDI
@@ -664,26 +657,26 @@
#define PXE_CONTROL_LINK 0x0001
#define PXE_CONTROL_LAST_CDB_IN_LIST 0x0000
-typedef PXE_UINT8 PXE_FRAME_TYPE;
+typedef PXE_UINT8 PXE_FRAME_TYPE;
-#define PXE_FRAME_TYPE_NONE 0x00
-#define PXE_FRAME_TYPE_UNICAST 0x01
-#define PXE_FRAME_TYPE_BROADCAST 0x02
-#define PXE_FRAME_TYPE_FILTERED_MULTICAST 0x03
-#define PXE_FRAME_TYPE_PROMISCUOUS 0x04
-#define PXE_FRAME_TYPE_PROMISCUOUS_MULTICAST 0x05
+#define PXE_FRAME_TYPE_NONE 0x00
+#define PXE_FRAME_TYPE_UNICAST 0x01
+#define PXE_FRAME_TYPE_BROADCAST 0x02
+#define PXE_FRAME_TYPE_FILTERED_MULTICAST 0x03
+#define PXE_FRAME_TYPE_PROMISCUOUS 0x04
+#define PXE_FRAME_TYPE_PROMISCUOUS_MULTICAST 0x05
-#define PXE_FRAME_TYPE_MULTICAST PXE_FRAME_TYPE_FILTERED_MULTICAST
+#define PXE_FRAME_TYPE_MULTICAST PXE_FRAME_TYPE_FILTERED_MULTICAST
-typedef PXE_UINT32 PXE_IPV4;
+typedef PXE_UINT32 PXE_IPV4;
-typedef PXE_UINT32 PXE_IPV6[4];
+typedef PXE_UINT32 PXE_IPV6[4];
#define PXE_MAC_LENGTH 32
-typedef PXE_UINT8 PXE_MAC_ADDR[PXE_MAC_LENGTH];
+typedef PXE_UINT8 PXE_MAC_ADDR[PXE_MAC_LENGTH];
-typedef PXE_UINT8 PXE_IFTYPE;
-typedef UINT16 PXE_MEDIA_PROTOCOL;
+typedef PXE_UINT8 PXE_IFTYPE;
+typedef UINT16 PXE_MEDIA_PROTOCOL;
///
/// This information is from the ARP section of RFC 1700.
@@ -717,16 +710,16 @@
#define PXE_IFTYPE_FIBRE_CHANNEL 0x12
typedef struct s_pxe_hw_undi {
- PXE_UINT32 Signature; ///< PXE_ROMID_SIGNATURE.
- PXE_UINT8 Len; ///< sizeof(PXE_HW_UNDI).
- PXE_UINT8 Fudge; ///< makes 8-bit cksum equal zero.
- PXE_UINT8 Rev; ///< PXE_ROMID_REV.
- PXE_UINT8 IFcnt; ///< physical connector count lower byte.
- PXE_UINT8 MajorVer; ///< PXE_ROMID_MAJORVER.
- PXE_UINT8 MinorVer; ///< PXE_ROMID_MINORVER.
- PXE_UINT8 IFcntExt; ///< physical connector count upper byte.
- PXE_UINT8 reserved; ///< zero, not used.
- PXE_UINT32 Implementation; ///< implementation flags.
+ PXE_UINT32 Signature; ///< PXE_ROMID_SIGNATURE.
+ PXE_UINT8 Len; ///< sizeof(PXE_HW_UNDI).
+ PXE_UINT8 Fudge; ///< makes 8-bit cksum equal zero.
+ PXE_UINT8 Rev; ///< PXE_ROMID_REV.
+ PXE_UINT8 IFcnt; ///< physical connector count lower byte.
+ PXE_UINT8 MajorVer; ///< PXE_ROMID_MAJORVER.
+ PXE_UINT8 MinorVer; ///< PXE_ROMID_MINORVER.
+ PXE_UINT8 IFcntExt; ///< physical connector count upper byte.
+ PXE_UINT8 reserved; ///< zero, not used.
+ PXE_UINT32 Implementation; ///< implementation flags.
///< reserved ///< vendor use.
///< UINT32 Status; ///< status port.
///< UINT32 Command; ///< command port.
@@ -750,32 +743,32 @@
///
/// If set, last command failed.
///
-#define PXE_HWSTAT_COMMAND_FAILED 0x20000000
+#define PXE_HWSTAT_COMMAND_FAILED 0x20000000
///
/// If set, identifies enabled receive filters.
///
-#define PXE_HWSTAT_PROMISCUOUS_MULTICAST_RX_ENABLED 0x00001000
-#define PXE_HWSTAT_PROMISCUOUS_RX_ENABLED 0x00000800
-#define PXE_HWSTAT_BROADCAST_RX_ENABLED 0x00000400
-#define PXE_HWSTAT_MULTICAST_RX_ENABLED 0x00000200
-#define PXE_HWSTAT_UNICAST_RX_ENABLED 0x00000100
+#define PXE_HWSTAT_PROMISCUOUS_MULTICAST_RX_ENABLED 0x00001000
+#define PXE_HWSTAT_PROMISCUOUS_RX_ENABLED 0x00000800
+#define PXE_HWSTAT_BROADCAST_RX_ENABLED 0x00000400
+#define PXE_HWSTAT_MULTICAST_RX_ENABLED 0x00000200
+#define PXE_HWSTAT_UNICAST_RX_ENABLED 0x00000100
///
/// If set, identifies enabled external interrupts.
///
-#define PXE_HWSTAT_SOFTWARE_INT_ENABLED 0x00000080
-#define PXE_HWSTAT_TX_COMPLETE_INT_ENABLED 0x00000040
-#define PXE_HWSTAT_PACKET_RX_INT_ENABLED 0x00000020
-#define PXE_HWSTAT_CMD_COMPLETE_INT_ENABLED 0x00000010
+#define PXE_HWSTAT_SOFTWARE_INT_ENABLED 0x00000080
+#define PXE_HWSTAT_TX_COMPLETE_INT_ENABLED 0x00000040
+#define PXE_HWSTAT_PACKET_RX_INT_ENABLED 0x00000020
+#define PXE_HWSTAT_CMD_COMPLETE_INT_ENABLED 0x00000010
///
/// If set, identifies pending interrupts.
///
-#define PXE_HWSTAT_SOFTWARE_INT_PENDING 0x00000008
-#define PXE_HWSTAT_TX_COMPLETE_INT_PENDING 0x00000004
-#define PXE_HWSTAT_PACKET_RX_INT_PENDING 0x00000002
-#define PXE_HWSTAT_CMD_COMPLETE_INT_PENDING 0x00000001
+#define PXE_HWSTAT_SOFTWARE_INT_PENDING 0x00000008
+#define PXE_HWSTAT_TX_COMPLETE_INT_PENDING 0x00000004
+#define PXE_HWSTAT_PACKET_RX_INT_PENDING 0x00000002
+#define PXE_HWSTAT_CMD_COMPLETE_INT_PENDING 0x00000001
///
/// Command port definitions.
@@ -791,19 +784,19 @@
///
/// Use these to enable/disable receive filters.
///
-#define PXE_HWCMD_PROMISCUOUS_MULTICAST_RX_ENABLE 0x00001000
-#define PXE_HWCMD_PROMISCUOUS_RX_ENABLE 0x00000800
-#define PXE_HWCMD_BROADCAST_RX_ENABLE 0x00000400
-#define PXE_HWCMD_MULTICAST_RX_ENABLE 0x00000200
-#define PXE_HWCMD_UNICAST_RX_ENABLE 0x00000100
+#define PXE_HWCMD_PROMISCUOUS_MULTICAST_RX_ENABLE 0x00001000
+#define PXE_HWCMD_PROMISCUOUS_RX_ENABLE 0x00000800
+#define PXE_HWCMD_BROADCAST_RX_ENABLE 0x00000400
+#define PXE_HWCMD_MULTICAST_RX_ENABLE 0x00000200
+#define PXE_HWCMD_UNICAST_RX_ENABLE 0x00000100
///
/// Use these to enable/disable external interrupts.
///
-#define PXE_HWCMD_SOFTWARE_INT_ENABLE 0x00000080
-#define PXE_HWCMD_TX_COMPLETE_INT_ENABLE 0x00000040
-#define PXE_HWCMD_PACKET_RX_INT_ENABLE 0x00000020
-#define PXE_HWCMD_CMD_COMPLETE_INT_ENABLE 0x00000010
+#define PXE_HWCMD_SOFTWARE_INT_ENABLE 0x00000080
+#define PXE_HWCMD_TX_COMPLETE_INT_ENABLE 0x00000040
+#define PXE_HWCMD_PACKET_RX_INT_ENABLE 0x00000020
+#define PXE_HWCMD_CMD_COMPLETE_INT_ENABLE 0x00000010
///
/// Use these to clear pending external interrupts.
@@ -814,44 +807,44 @@
#define PXE_HWCMD_CLEAR_CMD_COMPLETE_INT 0x00000001
typedef struct s_pxe_sw_undi {
- PXE_UINT32 Signature; ///< PXE_ROMID_SIGNATURE.
- PXE_UINT8 Len; ///< sizeof(PXE_SW_UNDI).
- PXE_UINT8 Fudge; ///< makes 8-bit cksum zero.
- PXE_UINT8 Rev; ///< PXE_ROMID_REV.
- PXE_UINT8 IFcnt; ///< physical connector count lower byte.
- PXE_UINT8 MajorVer; ///< PXE_ROMID_MAJORVER.
- PXE_UINT8 MinorVer; ///< PXE_ROMID_MINORVER.
- PXE_UINT8 IFcntExt; ///< physical connector count upper byte.
- PXE_UINT8 reserved1; ///< zero, not used.
- PXE_UINT32 Implementation; ///< Implementation flags.
- PXE_UINT64 EntryPoint; ///< API entry point.
- PXE_UINT8 reserved2[3]; ///< zero, not used.
- PXE_UINT8 BusCnt; ///< number of bustypes supported.
- PXE_UINT32 BusType[1]; ///< list of supported bustypes.
+ PXE_UINT32 Signature; ///< PXE_ROMID_SIGNATURE.
+ PXE_UINT8 Len; ///< sizeof(PXE_SW_UNDI).
+ PXE_UINT8 Fudge; ///< makes 8-bit cksum zero.
+ PXE_UINT8 Rev; ///< PXE_ROMID_REV.
+ PXE_UINT8 IFcnt; ///< physical connector count lower byte.
+ PXE_UINT8 MajorVer; ///< PXE_ROMID_MAJORVER.
+ PXE_UINT8 MinorVer; ///< PXE_ROMID_MINORVER.
+ PXE_UINT8 IFcntExt; ///< physical connector count upper byte.
+ PXE_UINT8 reserved1; ///< zero, not used.
+ PXE_UINT32 Implementation; ///< Implementation flags.
+ PXE_UINT64 EntryPoint; ///< API entry point.
+ PXE_UINT8 reserved2[3]; ///< zero, not used.
+ PXE_UINT8 BusCnt; ///< number of bustypes supported.
+ PXE_UINT32 BusType[1]; ///< list of supported bustypes.
} PXE_SW_UNDI;
typedef union u_pxe_undi {
- PXE_HW_UNDI hw;
- PXE_SW_UNDI sw;
+ PXE_HW_UNDI hw;
+ PXE_SW_UNDI sw;
} PXE_UNDI;
///
/// Signature of !PXE structure.
///
-#define PXE_ROMID_SIGNATURE PXE_BUSTYPE ('!', 'P', 'X', 'E')
+#define PXE_ROMID_SIGNATURE PXE_BUSTYPE ('!', 'P', 'X', 'E')
///
/// !PXE structure format revision
-///.
-#define PXE_ROMID_REV 0x02
+/// .
+#define PXE_ROMID_REV 0x02
///
/// UNDI command interface revision. These are the values that get sent
/// in option 94 (Client Network Interface Identifier) in the DHCP Discover
/// and PXE Boot Server Request packets.
///
-#define PXE_ROMID_MAJORVER 0x03
-#define PXE_ROMID_MINORVER 0x01
+#define PXE_ROMID_MAJORVER 0x03
+#define PXE_ROMID_MINORVER 0x01
///
/// Implementation flags.
@@ -880,21 +873,21 @@
#define PXE_ROMID_IMP_CMD_COMPLETE_INT_SUPPORTED 0x00000001
typedef struct s_pxe_cdb {
- PXE_OPCODE OpCode;
- PXE_OPFLAGS OpFlags;
- PXE_UINT16 CPBsize;
- PXE_UINT16 DBsize;
- PXE_UINT64 CPBaddr;
- PXE_UINT64 DBaddr;
- PXE_STATCODE StatCode;
- PXE_STATFLAGS StatFlags;
- PXE_UINT16 IFnum;
- PXE_CONTROL Control;
+ PXE_OPCODE OpCode;
+ PXE_OPFLAGS OpFlags;
+ PXE_UINT16 CPBsize;
+ PXE_UINT16 DBsize;
+ PXE_UINT64 CPBaddr;
+ PXE_UINT64 DBaddr;
+ PXE_STATCODE StatCode;
+ PXE_STATFLAGS StatFlags;
+ PXE_UINT16 IFnum;
+ PXE_CONTROL Control;
} PXE_CDB;
typedef union u_pxe_ip_addr {
- PXE_IPV6 IPv6;
- PXE_IPV4 IPv4;
+ PXE_IPV6 IPv6;
+ PXE_IPV4 IPv4;
} PXE_IP_ADDR;
typedef union pxe_device {
@@ -909,26 +902,24 @@
/// See S/W UNDI ROMID structure definition for PCI and
/// PCC BusType definitions.
///
- PXE_UINT32 BusType;
+ PXE_UINT32 BusType;
///
/// Bus, device & function numbers that locate this device.
///
- PXE_UINT16 Bus;
- PXE_UINT8 Device;
- PXE_UINT8 Function;
- }
- PCI, PCC;
-
+ PXE_UINT16 Bus;
+ PXE_UINT8 Device;
+ PXE_UINT8 Function;
+ } PCI, PCC;
} PXE_DEVICE;
///
/// cpb and db definitions
///
-#define MAX_PCI_CONFIG_LEN 64 ///< # of dwords.
-#define MAX_EEPROM_LEN 128 ///< # of dwords.
-#define MAX_XMIT_BUFFERS 32 ///< recycling Q length for xmit_done.
-#define MAX_MCAST_ADDRESS_CNT 8
+#define MAX_PCI_CONFIG_LEN 64 ///< # of dwords.
+#define MAX_EEPROM_LEN 128 ///< # of dwords.
+#define MAX_XMIT_BUFFERS 32 ///< recycling Q length for xmit_done.
+#define MAX_MCAST_ADDRESS_CNT 8
typedef struct s_pxe_cpb_start_30 {
///
@@ -941,7 +932,7 @@
///
/// This field cannot be set to zero.
///
- UINT64 Delay;
+ UINT64 Delay;
///
/// PXE_VOID Block(UINT32 enable);
@@ -957,7 +948,7 @@
///
/// This field cannot be set to zero.
///
- UINT64 Block;
+ UINT64 Block;
///
/// PXE_VOID Virt2Phys(UINT64 virtual, UINT64 physical_ptr);
@@ -971,7 +962,7 @@
/// This field can be set to zero if virtual and physical addresses
/// are equal.
///
- UINT64 Virt2Phys;
+ UINT64 Virt2Phys;
///
/// PXE_VOID Mem_IO(UINT8 read_write, UINT8 len, UINT64 port,
/// UINT64 buf_addr);
@@ -982,7 +973,7 @@
///
/// This field can not be set to zero.
///
- UINT64 Mem_IO;
+ UINT64 Mem_IO;
} PXE_CPB_START_30;
typedef struct s_pxe_cpb_start_31 {
@@ -996,7 +987,7 @@
///
/// This field cannot be set to zero.
///
- UINT64 Delay;
+ UINT64 Delay;
///
/// PXE_VOID Block(UINT64 unq_id, UINT32 enable);
@@ -1012,7 +1003,7 @@
///
/// This field cannot be set to zero.
///
- UINT64 Block;
+ UINT64 Block;
///
/// PXE_VOID Virt2Phys(UINT64 UnqId, UINT64 virtual, UINT64 physical_ptr);
@@ -1026,7 +1017,7 @@
/// This field can be set to zero if virtual and physical addresses
/// are equal.
///
- UINT64 Virt2Phys;
+ UINT64 Virt2Phys;
///
/// PXE_VOID Mem_IO(UINT64 UnqId, UINT8 read_write, UINT8 len, UINT64 port,
/// UINT64 buf_addr);
@@ -1037,7 +1028,7 @@
///
/// This field can not be set to zero.
///
- UINT64 Mem_IO;
+ UINT64 Mem_IO;
///
/// PXE_VOID Map_Mem(UINT64 unq_id, UINT64 virtual_addr, UINT32 size,
/// UINT32 Direction, UINT64 mapped_addr);
@@ -1054,7 +1045,7 @@
///
/// This field can be set to zero if there is no mapping service available.
///
- UINT64 Map_Mem;
+ UINT64 Map_Mem;
///
/// PXE_VOID UnMap_Mem(UINT64 unq_id, UINT64 virtual_addr, UINT32 size,
@@ -1065,7 +1056,7 @@
///
/// This field can be set to zero if there is no unmapping service available.
///
- UINT64 UnMap_Mem;
+ UINT64 UnMap_Mem;
///
/// PXE_VOID Sync_Mem(UINT64 unq_id, UINT64 virtual,
@@ -1077,7 +1068,7 @@
///
/// This field can be set to zero if there is no service available.
///
- UINT64 Sync_Mem;
+ UINT64 Sync_Mem;
///
/// protocol driver can provide anything for this Unique_ID, UNDI remembers
@@ -1085,19 +1076,19 @@
/// the ifnum and gives it back as a parameter to all the call-back routines
/// when calling for that interface!
///
- UINT64 Unique_ID;
+ UINT64 Unique_ID;
} PXE_CPB_START_31;
-#define TO_AND_FROM_DEVICE 0
-#define FROM_DEVICE 1
-#define TO_DEVICE 2
+#define TO_AND_FROM_DEVICE 0
+#define FROM_DEVICE 1
+#define TO_DEVICE 2
-#define PXE_DELAY_MILLISECOND 1000
-#define PXE_DELAY_SECOND 1000000
-#define PXE_IO_READ 0
-#define PXE_IO_WRITE 1
-#define PXE_MEM_READ 2
-#define PXE_MEM_WRITE 4
+#define PXE_DELAY_MILLISECOND 1000
+#define PXE_DELAY_SECOND 1000000
+#define PXE_IO_READ 0
+#define PXE_IO_WRITE 1
+#define PXE_MEM_READ 2
+#define PXE_MEM_WRITE 4
typedef struct s_pxe_db_get_init_info {
///
@@ -1108,47 +1099,47 @@
/// If MemoryRequired is zero, the UNDI does not need and will not
/// use system memory to receive and transmit packets.
///
- PXE_UINT32 MemoryRequired;
+ PXE_UINT32 MemoryRequired;
///
/// Maximum frame data length for Tx/Rx excluding the media header.
///
- PXE_UINT32 FrameDataLen;
+ PXE_UINT32 FrameDataLen;
///
/// Supported link speeds are in units of mega bits. Common ethernet
/// values are 10, 100 and 1000. Unused LinkSpeeds[] entries are zero
/// filled.
///
- PXE_UINT32 LinkSpeeds[4];
+ PXE_UINT32 LinkSpeeds[4];
///
/// Number of non-volatile storage items.
///
- PXE_UINT32 NvCount;
+ PXE_UINT32 NvCount;
///
/// Width of non-volatile storage item in bytes. 0, 1, 2 or 4
///
- PXE_UINT16 NvWidth;
+ PXE_UINT16 NvWidth;
///
/// Media header length. This is the typical media header length for
/// this UNDI. This information is needed when allocating receive
/// and transmit buffers.
///
- PXE_UINT16 MediaHeaderLen;
+ PXE_UINT16 MediaHeaderLen;
///
/// Number of bytes in the NIC hardware (MAC) address.
///
- PXE_UINT16 HWaddrLen;
+ PXE_UINT16 HWaddrLen;
///
/// Maximum number of multicast MAC addresses in the multicast
/// MAC address filter list.
///
- PXE_UINT16 MCastFilterCnt;
+ PXE_UINT16 MCastFilterCnt;
///
/// Default number and size of transmit and receive buffers that will
@@ -1157,63 +1148,63 @@
/// command. If MemoryRequired is zero, this allocation will come out of
/// memory on the NIC.
///
- PXE_UINT16 TxBufCnt;
- PXE_UINT16 TxBufSize;
- PXE_UINT16 RxBufCnt;
- PXE_UINT16 RxBufSize;
+ PXE_UINT16 TxBufCnt;
+ PXE_UINT16 TxBufSize;
+ PXE_UINT16 RxBufCnt;
+ PXE_UINT16 RxBufSize;
///
/// Hardware interface types defined in the Assigned Numbers RFC
/// and used in DHCP and ARP packets.
/// See the PXE_IFTYPE typedef and PXE_IFTYPE_xxx macros.
///
- PXE_UINT8 IFtype;
+ PXE_UINT8 IFtype;
///
/// Supported duplex. See PXE_DUPLEX_xxxxx #defines below.
///
- PXE_UINT8 SupportedDuplexModes;
+ PXE_UINT8 SupportedDuplexModes;
///
/// Supported loopback options. See PXE_LOOPBACK_xxxxx #defines below.
///
- PXE_UINT8 SupportedLoopBackModes;
+ PXE_UINT8 SupportedLoopBackModes;
} PXE_DB_GET_INIT_INFO;
-#define PXE_MAX_TXRX_UNIT_ETHER 1500
+#define PXE_MAX_TXRX_UNIT_ETHER 1500
-#define PXE_HWADDR_LEN_ETHER 0x0006
-#define PXE_MAC_HEADER_LEN_ETHER 0x000E
+#define PXE_HWADDR_LEN_ETHER 0x0006
+#define PXE_MAC_HEADER_LEN_ETHER 0x000E
#define PXE_DUPLEX_ENABLE_FULL_SUPPORTED 1
#define PXE_DUPLEX_FORCE_FULL_SUPPORTED 2
-#define PXE_LOOPBACK_INTERNAL_SUPPORTED 1
-#define PXE_LOOPBACK_EXTERNAL_SUPPORTED 2
+#define PXE_LOOPBACK_INTERNAL_SUPPORTED 1
+#define PXE_LOOPBACK_EXTERNAL_SUPPORTED 2
typedef struct s_pxe_pci_config_info {
///
/// This is the flag field for the PXE_DB_GET_CONFIG_INFO union.
/// For PCI bus devices, this field is set to PXE_BUSTYPE_PCI.
///
- UINT32 BusType;
+ UINT32 BusType;
///
/// This identifies the PCI network device that this UNDI interface.
/// is bound to.
///
- UINT16 Bus;
- UINT8 Device;
- UINT8 Function;
+ UINT16 Bus;
+ UINT8 Device;
+ UINT8 Function;
///
/// This is a copy of the PCI configuration space for this
/// network device.
///
union {
- UINT8 Byte[256];
- UINT16 Word[128];
- UINT32 Dword[64];
+ UINT8 Byte[256];
+ UINT16 Word[128];
+ UINT32 Dword[64];
} Config;
} PXE_PCI_CONFIG_INFO;
@@ -1222,30 +1213,30 @@
/// This is the flag field for the PXE_DB_GET_CONFIG_INFO union.
/// For PCC bus devices, this field is set to PXE_BUSTYPE_PCC.
///
- PXE_UINT32 BusType;
+ PXE_UINT32 BusType;
///
/// This identifies the PCC network device that this UNDI interface
/// is bound to.
///
- PXE_UINT16 Bus;
- PXE_UINT8 Device;
- PXE_UINT8 Function;
+ PXE_UINT16 Bus;
+ PXE_UINT8 Device;
+ PXE_UINT8 Function;
///
/// This is a copy of the PCC configuration space for this
/// network device.
///
union {
- PXE_UINT8 Byte[256];
- PXE_UINT16 Word[128];
- PXE_UINT32 Dword[64];
+ PXE_UINT8 Byte[256];
+ PXE_UINT16 Word[128];
+ PXE_UINT32 Dword[64];
} Config;
} PXE_PCC_CONFIG_INFO;
typedef union u_pxe_db_get_config_info {
- PXE_PCI_CONFIG_INFO pci;
- PXE_PCC_CONFIG_INFO pcc;
+ PXE_PCI_CONFIG_INFO pci;
+ PXE_PCC_CONFIG_INFO pcc;
} PXE_DB_GET_CONFIG_INFO;
typedef struct s_pxe_cpb_initialize {
@@ -1254,20 +1245,20 @@
/// be in contiguous physical memory and cannot be swapped out. The UNDI
/// will be using this for transmit and receive buffering.
///
- PXE_UINT64 MemoryAddr;
+ PXE_UINT64 MemoryAddr;
///
/// MemoryLength must be greater than or equal to MemoryRequired
/// returned by the Get Init Info command.
///
- PXE_UINT32 MemoryLength;
+ PXE_UINT32 MemoryLength;
///
/// Desired link speed in Mbit/sec. Common ethernet values are 10, 100
/// and 1000. Setting a value of zero will auto-detect and/or use the
/// default link speed (operation depends on UNDI/NIC functionality).
///
- PXE_UINT32 LinkSpeed;
+ PXE_UINT32 LinkSpeed;
///
/// Suggested number and size of receive and transmit buffers to
@@ -1279,29 +1270,29 @@
/// If these fields are set to zero, the UNDI will allocate buffer
/// counts and sizes as it sees fit.
///
- PXE_UINT16 TxBufCnt;
- PXE_UINT16 TxBufSize;
- PXE_UINT16 RxBufCnt;
- PXE_UINT16 RxBufSize;
+ PXE_UINT16 TxBufCnt;
+ PXE_UINT16 TxBufSize;
+ PXE_UINT16 RxBufCnt;
+ PXE_UINT16 RxBufSize;
///
/// The following configuration parameters are optional and must be zero
/// to use the default values.
///
- PXE_UINT8 DuplexMode;
+ PXE_UINT8 DuplexMode;
- PXE_UINT8 LoopBackMode;
+ PXE_UINT8 LoopBackMode;
} PXE_CPB_INITIALIZE;
-#define PXE_DUPLEX_DEFAULT 0x00
-#define PXE_FORCE_FULL_DUPLEX 0x01
-#define PXE_ENABLE_FULL_DUPLEX 0x02
-#define PXE_FORCE_HALF_DUPLEX 0x04
-#define PXE_DISABLE_FULL_DUPLEX 0x08
+#define PXE_DUPLEX_DEFAULT 0x00
+#define PXE_FORCE_FULL_DUPLEX 0x01
+#define PXE_ENABLE_FULL_DUPLEX 0x02
+#define PXE_FORCE_HALF_DUPLEX 0x04
+#define PXE_DISABLE_FULL_DUPLEX 0x08
-#define LOOPBACK_NORMAL 0
-#define LOOPBACK_INTERNAL 1
-#define LOOPBACK_EXTERNAL 2
+#define LOOPBACK_NORMAL 0
+#define LOOPBACK_INTERNAL 1
+#define LOOPBACK_EXTERNAL 2
typedef struct s_pxe_db_initialize {
///
@@ -1312,16 +1303,16 @@
/// Memory used by the UNDI and network device is allocated from the
/// lowest memory buffer address.
///
- PXE_UINT32 MemoryUsed;
+ PXE_UINT32 MemoryUsed;
///
/// Actual number and size of receive and transmit buffers that were
/// allocated.
///
- PXE_UINT16 TxBufCnt;
- PXE_UINT16 TxBufSize;
- PXE_UINT16 RxBufCnt;
- PXE_UINT16 RxBufSize;
+ PXE_UINT16 TxBufCnt;
+ PXE_UINT16 TxBufSize;
+ PXE_UINT16 RxBufCnt;
+ PXE_UINT16 RxBufSize;
} PXE_DB_INITIALIZE;
typedef struct s_pxe_cpb_receive_filters {
@@ -1329,14 +1320,14 @@
/// List of multicast MAC addresses. This list, if present, will
/// replace the existing multicast MAC address filter list.
///
- PXE_MAC_ADDR MCastList[MAX_MCAST_ADDRESS_CNT];
+ PXE_MAC_ADDR MCastList[MAX_MCAST_ADDRESS_CNT];
} PXE_CPB_RECEIVE_FILTERS;
typedef struct s_pxe_db_receive_filters {
///
/// Filtered multicast MAC address list.
///
- PXE_MAC_ADDR MCastList[MAX_MCAST_ADDRESS_CNT];
+ PXE_MAC_ADDR MCastList[MAX_MCAST_ADDRESS_CNT];
} PXE_DB_RECEIVE_FILTERS;
typedef struct s_pxe_cpb_station_address {
@@ -1344,24 +1335,24 @@
/// If supplied and supported, the current station MAC address
/// will be changed.
///
- PXE_MAC_ADDR StationAddr;
+ PXE_MAC_ADDR StationAddr;
} PXE_CPB_STATION_ADDRESS;
typedef struct s_pxe_dpb_station_address {
///
/// Current station MAC address.
///
- PXE_MAC_ADDR StationAddr;
+ PXE_MAC_ADDR StationAddr;
///
/// Station broadcast MAC address.
///
- PXE_MAC_ADDR BroadcastAddr;
+ PXE_MAC_ADDR BroadcastAddr;
///
/// Permanent station MAC address.
///
- PXE_MAC_ADDR PermanentAddr;
+ PXE_MAC_ADDR PermanentAddr;
} PXE_DB_STATION_ADDRESS;
typedef struct s_pxe_db_statistics {
@@ -1374,12 +1365,12 @@
/// If bit 0x21 is set, Data[0x21] is collected.
/// Etc.
///
- PXE_UINT64 Supported;
+ PXE_UINT64 Supported;
///
/// Statistic data.
///
- PXE_UINT64 Data[64];
+ PXE_UINT64 Data[64];
} PXE_DB_STATISTICS;
///
@@ -1391,7 +1382,7 @@
///
/// Number of valid frames received and copied into receive buffers.
///
-#define PXE_STATISTICS_RX_GOOD_FRAMES 0x01
+#define PXE_STATISTICS_RX_GOOD_FRAMES 0x01
///
/// Number of frames below the minimum length for the media.
@@ -1403,7 +1394,7 @@
/// Number of frames longer than the maxminum length for the
/// media. This would be >1500 for ethernet.
///
-#define PXE_STATISTICS_RX_OVERSIZE_FRAMES 0x03
+#define PXE_STATISTICS_RX_OVERSIZE_FRAMES 0x03
///
/// Valid frames that were dropped because receive buffers were full.
@@ -1434,7 +1425,7 @@
/// Total number of bytes received. Includes frames with errors
/// and dropped frames.
///
-#define PXE_STATISTICS_RX_TOTAL_BYTES 0x09
+#define PXE_STATISTICS_RX_TOTAL_BYTES 0x09
///
/// Transmit statistics.
@@ -1453,45 +1444,45 @@
///
/// Number of collisions detection on this subnet.
///
-#define PXE_STATISTICS_COLLISIONS 0x14
+#define PXE_STATISTICS_COLLISIONS 0x14
///
/// Number of frames destined for unsupported protocol.
///
-#define PXE_STATISTICS_UNSUPPORTED_PROTOCOL 0x15
+#define PXE_STATISTICS_UNSUPPORTED_PROTOCOL 0x15
///
/// Number of valid frames received that were duplicated.
///
-#define PXE_STATISTICS_RX_DUPLICATED_FRAMES 0x16
+#define PXE_STATISTICS_RX_DUPLICATED_FRAMES 0x16
///
/// Number of encrypted frames received that failed to decrypt.
///
-#define PXE_STATISTICS_RX_DECRYPT_ERROR_FRAMES 0x17
+#define PXE_STATISTICS_RX_DECRYPT_ERROR_FRAMES 0x17
///
/// Number of frames that failed to transmit after exceeding the retry limit.
///
-#define PXE_STATISTICS_TX_ERROR_FRAMES 0x18
+#define PXE_STATISTICS_TX_ERROR_FRAMES 0x18
///
/// Number of frames transmitted successfully after more than one attempt.
///
-#define PXE_STATISTICS_TX_RETRY_FRAMES 0x19
+#define PXE_STATISTICS_TX_RETRY_FRAMES 0x19
typedef struct s_pxe_cpb_mcast_ip_to_mac {
///
/// Multicast IP address to be converted to multicast MAC address.
///
- PXE_IP_ADDR IP;
+ PXE_IP_ADDR IP;
} PXE_CPB_MCAST_IP_TO_MAC;
typedef struct s_pxe_db_mcast_ip_to_mac {
///
/// Multicast MAC address.
///
- PXE_MAC_ADDR MAC;
+ PXE_MAC_ADDR MAC;
} PXE_DB_MCAST_IP_TO_MAC;
typedef struct s_pxe_cpb_nvdata_sparse {
@@ -1502,15 +1493,15 @@
///
/// Non-volatile storage address to be changed.
///
- PXE_UINT32 Addr;
+ PXE_UINT32 Addr;
///
/// Data item to write into above storage address.
///
union {
- PXE_UINT8 Byte;
- PXE_UINT16 Word;
- PXE_UINT32 Dword;
+ PXE_UINT8 Byte;
+ PXE_UINT16 Word;
+ PXE_UINT32 Dword;
} Data;
} Item[MAX_EEPROM_LEN];
} PXE_CPB_NVDATA_SPARSE;
@@ -1523,17 +1514,17 @@
///
/// Array of byte-wide data items.
///
- PXE_UINT8 Byte[MAX_EEPROM_LEN << 2];
+ PXE_UINT8 Byte[MAX_EEPROM_LEN << 2];
///
/// Array of word-wide data items.
///
- PXE_UINT16 Word[MAX_EEPROM_LEN << 1];
+ PXE_UINT16 Word[MAX_EEPROM_LEN << 1];
///
/// Array of dword-wide data items.
///
- PXE_UINT32 Dword[MAX_EEPROM_LEN];
+ PXE_UINT32 Dword[MAX_EEPROM_LEN];
} PXE_CPB_NVDATA_BULK;
typedef struct s_pxe_db_nvdata {
@@ -1544,17 +1535,17 @@
///
/// Array of byte-wide data items.
///
- PXE_UINT8 Byte[MAX_EEPROM_LEN << 2];
+ PXE_UINT8 Byte[MAX_EEPROM_LEN << 2];
///
/// Array of word-wide data items.
///
- PXE_UINT16 Word[MAX_EEPROM_LEN << 1];
+ PXE_UINT16 Word[MAX_EEPROM_LEN << 1];
///
/// Array of dword-wide data items.
///
- PXE_UINT32 Dword[MAX_EEPROM_LEN];
+ PXE_UINT32 Dword[MAX_EEPROM_LEN];
} Data;
} PXE_DB_NVDATA;
@@ -1563,17 +1554,17 @@
/// Length of next receive frame (header + data). If this is zero,
/// there is no next receive frame available.
///
- PXE_UINT32 RxFrameLen;
+ PXE_UINT32 RxFrameLen;
///
/// Reserved, set to zero.
///
- PXE_UINT32 reserved;
+ PXE_UINT32 reserved;
///
/// Addresses of transmitted buffers that need to be recycled.
///
- PXE_UINT64 TxBuffer[MAX_XMIT_BUFFERS];
+ PXE_UINT64 TxBuffer[MAX_XMIT_BUFFERS];
} PXE_DB_GET_STATUS;
typedef struct s_pxe_cpb_fill_header {
@@ -1581,71 +1572,71 @@
/// Source and destination MAC addresses. These will be copied into
/// the media header without doing byte swapping.
///
- PXE_MAC_ADDR SrcAddr;
- PXE_MAC_ADDR DestAddr;
+ PXE_MAC_ADDR SrcAddr;
+ PXE_MAC_ADDR DestAddr;
///
/// Address of first byte of media header. The first byte of packet data
/// follows the last byte of the media header.
///
- PXE_UINT64 MediaHeader;
+ PXE_UINT64 MediaHeader;
///
/// Length of packet data in bytes (not including the media header).
///
- PXE_UINT32 PacketLen;
+ PXE_UINT32 PacketLen;
///
/// Protocol type. This will be copied into the media header without
/// doing byte swapping. Protocol type numbers can be obtained from
/// the Assigned Numbers RFC 1700.
///
- PXE_UINT16 Protocol;
+ PXE_UINT16 Protocol;
///
/// Length of the media header in bytes.
///
- PXE_UINT16 MediaHeaderLen;
+ PXE_UINT16 MediaHeaderLen;
} PXE_CPB_FILL_HEADER;
-#define PXE_PROTOCOL_ETHERNET_IP 0x0800
-#define PXE_PROTOCOL_ETHERNET_ARP 0x0806
-#define MAX_XMIT_FRAGMENTS 16
+#define PXE_PROTOCOL_ETHERNET_IP 0x0800
+#define PXE_PROTOCOL_ETHERNET_ARP 0x0806
+#define MAX_XMIT_FRAGMENTS 16
typedef struct s_pxe_cpb_fill_header_fragmented {
///
/// Source and destination MAC addresses. These will be copied into
/// the media header without doing byte swapping.
///
- PXE_MAC_ADDR SrcAddr;
- PXE_MAC_ADDR DestAddr;
+ PXE_MAC_ADDR SrcAddr;
+ PXE_MAC_ADDR DestAddr;
///
/// Length of packet data in bytes (not including the media header).
///
- PXE_UINT32 PacketLen;
+ PXE_UINT32 PacketLen;
///
/// Protocol type. This will be copied into the media header without
/// doing byte swapping. Protocol type numbers can be obtained from
/// the Assigned Numbers RFC 1700.
///
- PXE_MEDIA_PROTOCOL Protocol;
+ PXE_MEDIA_PROTOCOL Protocol;
///
/// Length of the media header in bytes.
///
- PXE_UINT16 MediaHeaderLen;
+ PXE_UINT16 MediaHeaderLen;
///
/// Number of packet fragment descriptors.
///
- PXE_UINT16 FragCnt;
+ PXE_UINT16 FragCnt;
///
/// Reserved, must be set to zero.
///
- PXE_UINT16 reserved;
+ PXE_UINT16 reserved;
///
/// Array of packet fragment descriptors. The first byte of the media
@@ -1655,60 +1646,59 @@
///
/// Address of this packet fragment.
///
- PXE_UINT64 FragAddr;
+ PXE_UINT64 FragAddr;
///
/// Length of this packet fragment.
///
- PXE_UINT32 FragLen;
+ PXE_UINT32 FragLen;
///
/// Reserved, must be set to zero.
///
- PXE_UINT32 reserved;
+ PXE_UINT32 reserved;
} FragDesc[MAX_XMIT_FRAGMENTS];
-}
-PXE_CPB_FILL_HEADER_FRAGMENTED;
+} PXE_CPB_FILL_HEADER_FRAGMENTED;
typedef struct s_pxe_cpb_transmit {
///
/// Address of first byte of frame buffer. This is also the first byte
/// of the media header.
///
- PXE_UINT64 FrameAddr;
+ PXE_UINT64 FrameAddr;
///
/// Length of the data portion of the frame buffer in bytes. Do not
/// include the length of the media header.
///
- PXE_UINT32 DataLen;
+ PXE_UINT32 DataLen;
///
/// Length of the media header in bytes.
///
- PXE_UINT16 MediaheaderLen;
+ PXE_UINT16 MediaheaderLen;
///
/// Reserved, must be zero.
///
- PXE_UINT16 reserved;
+ PXE_UINT16 reserved;
} PXE_CPB_TRANSMIT;
typedef struct s_pxe_cpb_transmit_fragments {
///
/// Length of packet data in bytes (not including the media header).
///
- PXE_UINT32 FrameLen;
+ PXE_UINT32 FrameLen;
///
/// Length of the media header in bytes.
///
- PXE_UINT16 MediaheaderLen;
+ PXE_UINT16 MediaheaderLen;
///
/// Number of packet fragment descriptors.
///
- PXE_UINT16 FragCnt;
+ PXE_UINT16 FragCnt;
///
/// Array of frame fragment descriptors. The first byte of the first
@@ -1718,75 +1708,73 @@
///
/// Address of this frame fragment.
///
- PXE_UINT64 FragAddr;
+ PXE_UINT64 FragAddr;
///
/// Length of this frame fragment.
///
- PXE_UINT32 FragLen;
+ PXE_UINT32 FragLen;
///
/// Reserved, must be set to zero.
///
- PXE_UINT32 reserved;
+ PXE_UINT32 reserved;
} FragDesc[MAX_XMIT_FRAGMENTS];
-}
-PXE_CPB_TRANSMIT_FRAGMENTS;
+} PXE_CPB_TRANSMIT_FRAGMENTS;
typedef struct s_pxe_cpb_receive {
///
/// Address of first byte of receive buffer. This is also the first byte
/// of the frame header.
///
- PXE_UINT64 BufferAddr;
+ PXE_UINT64 BufferAddr;
///
/// Length of receive buffer. This must be large enough to hold the
/// received frame (media header + data). If the length of smaller than
/// the received frame, data will be lost.
///
- PXE_UINT32 BufferLen;
+ PXE_UINT32 BufferLen;
///
/// Reserved, must be set to zero.
///
- PXE_UINT32 reserved;
+ PXE_UINT32 reserved;
} PXE_CPB_RECEIVE;
typedef struct s_pxe_db_receive {
///
/// Source and destination MAC addresses from media header.
///
- PXE_MAC_ADDR SrcAddr;
- PXE_MAC_ADDR DestAddr;
+ PXE_MAC_ADDR SrcAddr;
+ PXE_MAC_ADDR DestAddr;
///
/// Length of received frame. May be larger than receive buffer size.
/// The receive buffer will not be overwritten. This is how to tell
/// if data was lost because the receive buffer was too small.
///
- PXE_UINT32 FrameLen;
+ PXE_UINT32 FrameLen;
///
/// Protocol type from media header.
///
- PXE_MEDIA_PROTOCOL Protocol;
+ PXE_MEDIA_PROTOCOL Protocol;
///
/// Length of media header in received frame.
///
- PXE_UINT16 MediaHeaderLen;
+ PXE_UINT16 MediaHeaderLen;
///
/// Type of receive frame.
///
- PXE_FRAME_TYPE Type;
+ PXE_FRAME_TYPE Type;
///
/// Reserved, must be zero.
///
- PXE_UINT8 reserved[7];
-
+ PXE_UINT8 reserved[7];
} PXE_DB_RECEIVE;
#pragma pack()
diff --git a/src/include/ipxe/efi/Uefi/UefiSpec.h b/src/include/ipxe/efi/Uefi/UefiSpec.h
index 27edf43..3ef66da 100644
--- a/src/include/ipxe/efi/Uefi/UefiSpec.h
+++ b/src/include/ipxe/efi/Uefi/UefiSpec.h
@@ -1,25 +1,22 @@
/** @file
Include file that supports UEFI.
- This include file must contain things defined in the UEFI 2.6 specification.
- If a code construct is defined in the UEFI 2.6 specification it must be included
+ This include file must contain things defined in the UEFI 2.7 specification.
+ If a code construct is defined in the UEFI 2.7 specification it must be included
by this include file.
-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
+Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>
+Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __UEFI_SPEC_H__
#define __UEFI_SPEC_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
#include <ipxe/efi/Uefi/UefiMultiPhase.h>
@@ -65,69 +62,103 @@
//
// Memory cacheability attributes
//
-#define EFI_MEMORY_UC 0x0000000000000001ULL
-#define EFI_MEMORY_WC 0x0000000000000002ULL
-#define EFI_MEMORY_WT 0x0000000000000004ULL
-#define EFI_MEMORY_WB 0x0000000000000008ULL
-#define EFI_MEMORY_UCE 0x0000000000000010ULL
+#define EFI_MEMORY_UC 0x0000000000000001ULL
+#define EFI_MEMORY_WC 0x0000000000000002ULL
+#define EFI_MEMORY_WT 0x0000000000000004ULL
+#define EFI_MEMORY_WB 0x0000000000000008ULL
+#define EFI_MEMORY_UCE 0x0000000000000010ULL
//
// Physical memory protection attributes
//
// Note: UEFI spec 2.5 and following: use EFI_MEMORY_RO as write-protected physical memory
// protection attribute. Also, EFI_MEMORY_WP means cacheability attribute.
//
-#define EFI_MEMORY_WP 0x0000000000001000ULL
-#define EFI_MEMORY_RP 0x0000000000002000ULL
-#define EFI_MEMORY_XP 0x0000000000004000ULL
-#define EFI_MEMORY_RO 0x0000000000020000ULL
+#define EFI_MEMORY_WP 0x0000000000001000ULL
+#define EFI_MEMORY_RP 0x0000000000002000ULL
+#define EFI_MEMORY_XP 0x0000000000004000ULL
+#define EFI_MEMORY_RO 0x0000000000020000ULL
//
// Physical memory persistence attribute.
// The memory region supports byte-addressable non-volatility.
//
-#define EFI_MEMORY_NV 0x0000000000008000ULL
+#define EFI_MEMORY_NV 0x0000000000008000ULL
//
// The memory region provides higher reliability relative to other memory in the system.
// If all memory has the same reliability, then this bit is not used.
//
-#define EFI_MEMORY_MORE_RELIABLE 0x0000000000010000ULL
+#define EFI_MEMORY_MORE_RELIABLE 0x0000000000010000ULL
+
+//
+// Note: UEFI spec 2.8 and following:
+//
+// Specific-purpose memory (SPM). The memory is earmarked for
+// specific purposes such as for specific device drivers or applications.
+// The SPM attribute serves as a hint to the OS to avoid allocating this
+// memory for core OS data or code that can not be relocated.
+//
+#define EFI_MEMORY_SP 0x0000000000040000ULL
+//
+// If this flag is set, the memory region is capable of being
+// protected with the CPU's memory cryptographic
+// capabilities. If this flag is clear, the memory region is not
+// capable of being protected with the CPU's memory
+// cryptographic capabilities or the CPU does not support CPU
+// memory cryptographic capabilities.
+//
+#define EFI_MEMORY_CPU_CRYPTO 0x0000000000080000ULL
+
//
// Runtime memory attribute
//
-#define EFI_MEMORY_RUNTIME 0x8000000000000000ULL
+#define EFI_MEMORY_RUNTIME 0x8000000000000000ULL
+
+//
+// Attributes bitmasks, grouped by type
+//
+#define EFI_CACHE_ATTRIBUTE_MASK (EFI_MEMORY_UC | EFI_MEMORY_WC | EFI_MEMORY_WT | EFI_MEMORY_WB | EFI_MEMORY_UCE | EFI_MEMORY_WP)
+#define EFI_MEMORY_ACCESS_MASK (EFI_MEMORY_RP | EFI_MEMORY_XP | EFI_MEMORY_RO)
+#define EFI_MEMORY_ATTRIBUTE_MASK (EFI_MEMORY_ACCESS_MASK | EFI_MEMORY_SP | EFI_MEMORY_CPU_CRYPTO)
///
/// Memory descriptor version number.
///
-#define EFI_MEMORY_DESCRIPTOR_VERSION 1
+#define EFI_MEMORY_DESCRIPTOR_VERSION 1
///
/// Definition of an EFI memory descriptor.
///
typedef struct {
///
- /// Type of the memory region. See EFI_MEMORY_TYPE.
+ /// Type of the memory region.
+ /// Type EFI_MEMORY_TYPE is defined in the
+ /// AllocatePages() function description.
///
- UINT32 Type;
+ UINT32 Type;
///
- /// Physical address of the first byte of the memory region. Must aligned
- /// on a 4 KB boundary.
+ /// Physical address of the first byte in the memory region. PhysicalStart must be
+ /// aligned on a 4 KiB boundary, and must not be above 0xfffffffffffff000. Type
+ /// EFI_PHYSICAL_ADDRESS is defined in the AllocatePages() function description
///
- EFI_PHYSICAL_ADDRESS PhysicalStart;
+ EFI_PHYSICAL_ADDRESS PhysicalStart;
///
- /// Virtual address of the first byte of the memory region. Must aligned
- /// on a 4 KB boundary.
+ /// Virtual address of the first byte in the memory region.
+ /// VirtualStart must be aligned on a 4 KiB boundary,
+ /// and must not be above 0xfffffffffffff000.
///
- EFI_VIRTUAL_ADDRESS VirtualStart;
+ EFI_VIRTUAL_ADDRESS VirtualStart;
///
- /// Number of 4KB pages in the memory region.
+ /// NumberOfPagesNumber of 4 KiB pages in the memory region.
+ /// NumberOfPages must not be 0, and must not be any value
+ /// that would represent a memory page with a start address,
+ /// either physical or virtual, above 0xfffffffffffff000.
///
- UINT64 NumberOfPages;
+ UINT64 NumberOfPages;
///
/// Attributes of the memory region that describe the bit mask of capabilities
/// for that memory region, and not necessarily the current settings for that
/// memory region.
///
- UINT64 Attribute;
+ UINT64 Attribute;
} EFI_MEMORY_DESCRIPTOR;
/**
@@ -190,7 +221,7 @@
On output, it is the size of the buffer returned by the firmware if
the buffer was large enough, or the size of the buffer needed to contain
the map if the buffer was too small.
- @param[in, out] MemoryMap A pointer to the buffer in which firmware places the current memory
+ @param[out] MemoryMap A pointer to the buffer in which firmware places the current memory
map.
@param[out] MapKey A pointer to the location in which firmware returns the key for the
current memory map.
@@ -211,7 +242,7 @@
EFI_STATUS
(EFIAPI *EFI_GET_MEMORY_MAP)(
IN OUT UINTN *MemoryMapSize,
- IN OUT EFI_MEMORY_DESCRIPTOR *MemoryMap,
+ OUT EFI_MEMORY_DESCRIPTOR *MemoryMap,
OUT UINTN *MapKey,
OUT UINTN *DescriptorSize,
OUT UINT32 *DescriptorVersion
@@ -316,8 +347,8 @@
EFI_STATUS
(EFIAPI *EFI_CONNECT_CONTROLLER)(
IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE *DriverImageHandle, OPTIONAL
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath, OPTIONAL
+ IN EFI_HANDLE *DriverImageHandle OPTIONAL,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath OPTIONAL,
IN BOOLEAN Recursive
);
@@ -349,16 +380,14 @@
EFI_STATUS
(EFIAPI *EFI_DISCONNECT_CONTROLLER)(
IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE DriverImageHandle, OPTIONAL
+ IN EFI_HANDLE DriverImageHandle OPTIONAL,
IN EFI_HANDLE ChildHandle OPTIONAL
);
-
-
//
// ConvertPointer DebugDisposition type.
//
-#define EFI_OPTIONAL_PTR 0x00000001
+#define EFI_OPTIONAL_PTR 0x00000001
/**
Determines the new virtual address that is to be used on subsequent memory accesses.
@@ -382,27 +411,25 @@
IN OUT VOID **Address
);
-
//
// These types can be ORed together as needed - for example,
// EVT_TIMER might be Ored with EVT_NOTIFY_WAIT or
// EVT_NOTIFY_SIGNAL.
//
-#define EVT_TIMER 0x80000000
-#define EVT_RUNTIME 0x40000000
-#define EVT_NOTIFY_WAIT 0x00000100
-#define EVT_NOTIFY_SIGNAL 0x00000200
+#define EVT_TIMER 0x80000000
+#define EVT_RUNTIME 0x40000000
+#define EVT_NOTIFY_WAIT 0x00000100
+#define EVT_NOTIFY_SIGNAL 0x00000200
-#define EVT_SIGNAL_EXIT_BOOT_SERVICES 0x00000201
-#define EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE 0x60000202
+#define EVT_SIGNAL_EXIT_BOOT_SERVICES 0x00000201
+#define EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE 0x60000202
//
// The event's NotifyContext pointer points to a runtime memory
// address.
// The event is deprecated in UEFI2.0 and later specifications.
//
-#define EVT_RUNTIME_CONTEXT 0x20000000
-
+#define EVT_RUNTIME_CONTEXT 0x20000000
/**
Invoke a notification event
@@ -583,15 +610,13 @@
IN EFI_EVENT Event
);
-
//
// Task priority level
//
-#define TPL_APPLICATION 4
-#define TPL_CALLBACK 8
-#define TPL_NOTIFY 16
-#define TPL_HIGH_LEVEL 31
-
+#define TPL_APPLICATION 4
+#define TPL_CALLBACK 8
+#define TPL_NOTIFY 16
+#define TPL_HIGH_LEVEL 31
/**
Raises a task's priority level and returns its previous level.
@@ -648,7 +673,7 @@
(EFIAPI *EFI_GET_VARIABLE)(
IN CHAR16 *VariableName,
IN EFI_GUID *VendorGuid,
- OUT UINT32 *Attributes, OPTIONAL
+ OUT UINT32 *Attributes OPTIONAL,
IN OUT UINTN *DataSize,
OUT VOID *Data OPTIONAL
);
@@ -656,7 +681,8 @@
/**
Enumerates the current variable names.
- @param[in, out] VariableNameSize The size of the VariableName buffer.
+ @param[in, out] VariableNameSize The size of the VariableName buffer. The size must be large
+ enough to fit input string supplied in VariableName buffer.
@param[in, out] VariableName On input, supplies the last VariableName that was returned
by GetNextVariableName(). On output, returns the Nullterminated
string of the current variable.
@@ -667,9 +693,14 @@
@retval EFI_SUCCESS The function completed successfully.
@retval EFI_NOT_FOUND The next variable was not found.
@retval EFI_BUFFER_TOO_SMALL The VariableNameSize is too small for the result.
+ VariableNameSize has been updated with the size needed to complete the request.
@retval EFI_INVALID_PARAMETER VariableNameSize is NULL.
@retval EFI_INVALID_PARAMETER VariableName is NULL.
@retval EFI_INVALID_PARAMETER VendorGuid is NULL.
+ @retval EFI_INVALID_PARAMETER The input values of VariableName and VendorGuid are not a name and
+ GUID of an existing variable.
+ @retval EFI_INVALID_PARAMETER Null-terminator is not found in the first VariableNameSize bytes of
+ the input VariableName buffer.
@retval EFI_DEVICE_ERROR The variable could not be retrieved due to a hardware error.
**/
@@ -690,8 +721,7 @@
then EFI_INVALID_PARAMETER is returned.
@param[in] VendorGuid A unique identifier for the vendor.
@param[in] Attributes Attributes bitmask to set for the variable.
- @param[in] DataSize The size in bytes of the Data buffer. Unless the EFI_VARIABLE_APPEND_WRITE,
- EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS, or
+ @param[in] DataSize The size in bytes of the Data buffer. Unless the EFI_VARIABLE_APPEND_WRITE or
EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS attribute is set, a size of zero
causes the variable to be deleted. When the EFI_VARIABLE_APPEND_WRITE attribute is
set, then a SetVariable() call with a DataSize of zero will not cause any change to
@@ -710,9 +740,8 @@
@retval EFI_DEVICE_ERROR The variable could not be retrieved due to a hardware error.
@retval EFI_WRITE_PROTECTED The variable in question is read-only.
@retval EFI_WRITE_PROTECTED The variable in question cannot be deleted.
- @retval EFI_SECURITY_VIOLATION The variable could not be written due to EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS
- or EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACESS being set, but the AuthInfo
- does NOT pass the validation check carried out by the firmware.
+ @retval EFI_SECURITY_VIOLATION The variable could not be written due to EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACESS being set,
+ but the AuthInfo does NOT pass the validation check carried out by the firmware.
@retval EFI_NOT_FOUND The variable trying to be updated or deleted was not found.
@@ -727,7 +756,6 @@
IN VOID *Data
);
-
///
/// This provides the capabilities of the
/// real time clock device as exposed through the EFI interfaces.
@@ -739,14 +767,14 @@
/// value would be 1 Hz, or 1, to indicate that the device only reports
/// the time to the resolution of 1 second.
///
- UINT32 Resolution;
+ UINT32 Resolution;
///
/// Provides the timekeeping accuracy of the real-time clock in an
/// error rate of 1E-6 parts per million. For a clock with an accuracy
/// of 50 parts per million, the value in this field would be
/// 50,000,000.
///
- UINT32 Accuracy;
+ UINT32 Accuracy;
///
/// A TRUE indicates that a time set operation clears the device's
/// time below the Resolution reporting level. A FALSE
@@ -754,7 +782,7 @@
/// device is not cleared when the time is set. Normal PC-AT CMOS
/// RTC devices set this value to FALSE.
///
- BOOLEAN SetsToZero;
+ BOOLEAN SetsToZero;
} EFI_TIME_CAPABILITIES;
/**
@@ -1011,10 +1039,10 @@
EfiResetShutdown the data buffer starts with a Null-terminated
string, optionally followed by additional binary data.
The string is a description that the caller may use to further
- indicate the reason for the system reset. ResetData is only
- valid if ResetStatus is something other than EFI_SUCCESS
- unless the ResetType is EfiResetPlatformSpecific
- where a minimum amount of ResetData is always required.
+ indicate the reason for the system reset.
+ For a ResetType of EfiResetPlatformSpecific the data buffer
+ also starts with a Null-terminated string that is followed
+ by an EFI_GUID that describes the specific type of reset to perform.
**/
typedef
VOID
@@ -1267,12 +1295,12 @@
OUT VOID **Interface
);
-#define EFI_OPEN_PROTOCOL_BY_HANDLE_PROTOCOL 0x00000001
-#define EFI_OPEN_PROTOCOL_GET_PROTOCOL 0x00000002
-#define EFI_OPEN_PROTOCOL_TEST_PROTOCOL 0x00000004
-#define EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER 0x00000008
-#define EFI_OPEN_PROTOCOL_BY_DRIVER 0x00000010
-#define EFI_OPEN_PROTOCOL_EXCLUSIVE 0x00000020
+#define EFI_OPEN_PROTOCOL_BY_HANDLE_PROTOCOL 0x00000001
+#define EFI_OPEN_PROTOCOL_GET_PROTOCOL 0x00000002
+#define EFI_OPEN_PROTOCOL_TEST_PROTOCOL 0x00000004
+#define EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER 0x00000008
+#define EFI_OPEN_PROTOCOL_BY_DRIVER 0x00000010
+#define EFI_OPEN_PROTOCOL_EXCLUSIVE 0x00000020
/**
Queries a handle to determine if it supports a specified protocol. If the protocol is supported by the
@@ -1306,13 +1334,12 @@
(EFIAPI *EFI_OPEN_PROTOCOL)(
IN EFI_HANDLE Handle,
IN EFI_GUID *Protocol,
- OUT VOID **Interface, OPTIONAL
+ OUT VOID **Interface OPTIONAL,
IN EFI_HANDLE AgentHandle,
IN EFI_HANDLE ControllerHandle,
IN UINT32 Attributes
);
-
/**
Closes a protocol on a handle that was opened using OpenProtocol().
@@ -1347,10 +1374,10 @@
/// EFI Oprn Protocol Information Entry
///
typedef struct {
- EFI_HANDLE AgentHandle;
- EFI_HANDLE ControllerHandle;
- UINT32 Attributes;
- UINT32 OpenCount;
+ EFI_HANDLE AgentHandle;
+ EFI_HANDLE ControllerHandle;
+ UINT32 Attributes;
+ UINT32 OpenCount;
} EFI_OPEN_PROTOCOL_INFORMATION_ENTRY;
/**
@@ -1474,8 +1501,8 @@
EFI_STATUS
(EFIAPI *EFI_LOCATE_HANDLE)(
IN EFI_LOCATE_SEARCH_TYPE SearchType,
- IN EFI_GUID *Protocol, OPTIONAL
- IN VOID *SearchKey, OPTIONAL
+ IN EFI_GUID *Protocol OPTIONAL,
+ IN VOID *SearchKey OPTIONAL,
IN OUT UINTN *BufferSize,
OUT EFI_HANDLE *Buffer
);
@@ -1531,7 +1558,7 @@
@param[in] Protocol Provides the protocol to search by.
This parameter is only valid for a SearchType of ByProtocol.
@param[in] SearchKey Supplies the search key depending on the SearchType.
- @param[in, out] NoHandles The number of handles returned in Buffer.
+ @param[out] NoHandles The number of handles returned in Buffer.
@param[out] Buffer A pointer to the buffer to return the requested array of handles that
support Protocol.
@@ -1547,9 +1574,9 @@
EFI_STATUS
(EFIAPI *EFI_LOCATE_HANDLE_BUFFER)(
IN EFI_LOCATE_SEARCH_TYPE SearchType,
- IN EFI_GUID *Protocol, OPTIONAL
- IN VOID *SearchKey, OPTIONAL
- IN OUT UINTN *NoHandles,
+ IN EFI_GUID *Protocol OPTIONAL,
+ IN VOID *SearchKey OPTIONAL,
+ OUT UINTN *NoHandles,
OUT EFI_HANDLE **Buffer
);
@@ -1567,13 +1594,14 @@
@retval EFI_NOT_FOUND No protocol instances were found that match Protocol and
Registration.
@retval EFI_INVALID_PARAMETER Interface is NULL.
+ Protocol is NULL.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_LOCATE_PROTOCOL)(
IN EFI_GUID *Protocol,
- IN VOID *Registration, OPTIONAL
+ IN VOID *Registration OPTIONAL,
OUT VOID **Interface
);
@@ -1584,20 +1612,20 @@
///
/// Length in bytes of the data pointed to by DataBlock/ContinuationPointer.
///
- UINT64 Length;
+ UINT64 Length;
union {
///
/// Physical address of the data block. This member of the union is
/// used if Length is not equal to zero.
///
- EFI_PHYSICAL_ADDRESS DataBlock;
+ EFI_PHYSICAL_ADDRESS DataBlock;
///
/// Physical address of another block of
/// EFI_CAPSULE_BLOCK_DESCRIPTOR structures. This
/// member of the union is used if Length is equal to zero. If
/// ContinuationPointer is zero this entry represents the end of the list.
///
- EFI_PHYSICAL_ADDRESS ContinuationPointer;
+ EFI_PHYSICAL_ADDRESS ContinuationPointer;
} Union;
} EFI_CAPSULE_BLOCK_DESCRIPTOR;
@@ -1608,23 +1636,23 @@
///
/// A GUID that defines the contents of a capsule.
///
- EFI_GUID CapsuleGuid;
+ EFI_GUID CapsuleGuid;
///
/// The size of the capsule header. This may be larger than the size of
/// the EFI_CAPSULE_HEADER since CapsuleGuid may imply
/// extended header entries
///
- UINT32 HeaderSize;
+ UINT32 HeaderSize;
///
/// Bit-mapped list describing the capsule attributes. The Flag values
/// of 0x0000 - 0xFFFF are defined by CapsuleGuid. Flag values
/// of 0x10000 - 0xFFFFFFFF are defined by this specification
///
- UINT32 Flags;
+ UINT32 Flags;
///
/// Size in bytes of the capsule.
///
- UINT32 CapsuleImageSize;
+ UINT32 CapsuleImageSize;
} EFI_CAPSULE_HEADER;
///
@@ -1636,16 +1664,16 @@
///
/// the size of the array of capsules.
///
- UINT32 CapsuleArrayNumber;
+ UINT32 CapsuleArrayNumber;
///
/// Point to an array of capsules that contain the same CapsuleGuid value.
///
- VOID* CapsulePtr[1];
+ VOID *CapsulePtr[1];
} EFI_CAPSULE_TABLE;
-#define CAPSULE_FLAGS_PERSIST_ACROSS_RESET 0x00010000
-#define CAPSULE_FLAGS_POPULATE_SYSTEM_TABLE 0x00020000
-#define CAPSULE_FLAGS_INITIATE_RESET 0x00040000
+#define CAPSULE_FLAGS_PERSIST_ACROSS_RESET 0x00010000
+#define CAPSULE_FLAGS_POPULATE_SYSTEM_TABLE 0x00020000
+#define CAPSULE_FLAGS_INITIATE_RESET 0x00040000
/**
Passes capsules to the firmware with both virtual and physical mapping. Depending on the intended
@@ -1757,11 +1785,14 @@
#define EFI_OS_INDICATIONS_FMP_CAPSULE_SUPPORTED 0x0000000000000008
#define EFI_OS_INDICATIONS_CAPSULE_RESULT_VAR_SUPPORTED 0x0000000000000010
#define EFI_OS_INDICATIONS_START_PLATFORM_RECOVERY 0x0000000000000040
+#define EFI_OS_INDICATIONS_JSON_CONFIG_DATA_REFRESH 0x0000000000000080
//
// EFI Runtime Services Table
//
#define EFI_SYSTEM_TABLE_SIGNATURE SIGNATURE_64 ('I','B','I',' ','S','Y','S','T')
+#define EFI_2_80_SYSTEM_TABLE_REVISION ((2 << 16) | (80))
+#define EFI_2_70_SYSTEM_TABLE_REVISION ((2 << 16) | (70))
#define EFI_2_60_SYSTEM_TABLE_REVISION ((2 << 16) | (60))
#define EFI_2_50_SYSTEM_TABLE_REVISION ((2 << 16) | (50))
#define EFI_2_40_SYSTEM_TABLE_REVISION ((2 << 16) | (40))
@@ -1772,7 +1803,7 @@
#define EFI_2_00_SYSTEM_TABLE_REVISION ((2 << 16) | (00))
#define EFI_1_10_SYSTEM_TABLE_REVISION ((1 << 16) | (10))
#define EFI_1_02_SYSTEM_TABLE_REVISION ((1 << 16) | (02))
-#define EFI_SYSTEM_TABLE_REVISION EFI_2_60_SYSTEM_TABLE_REVISION
+#define EFI_SYSTEM_TABLE_REVISION EFI_2_70_SYSTEM_TABLE_REVISION
#define EFI_SPECIFICATION_VERSION EFI_SYSTEM_TABLE_REVISION
#define EFI_RUNTIME_SERVICES_SIGNATURE SIGNATURE_64 ('R','U','N','T','S','E','R','V')
@@ -1785,50 +1816,49 @@
///
/// The table header for the EFI Runtime Services Table.
///
- EFI_TABLE_HEADER Hdr;
+ EFI_TABLE_HEADER Hdr;
//
// Time Services
//
- EFI_GET_TIME GetTime;
- EFI_SET_TIME SetTime;
- EFI_GET_WAKEUP_TIME GetWakeupTime;
- EFI_SET_WAKEUP_TIME SetWakeupTime;
+ EFI_GET_TIME GetTime;
+ EFI_SET_TIME SetTime;
+ EFI_GET_WAKEUP_TIME GetWakeupTime;
+ EFI_SET_WAKEUP_TIME SetWakeupTime;
//
// Virtual Memory Services
//
- EFI_SET_VIRTUAL_ADDRESS_MAP SetVirtualAddressMap;
- EFI_CONVERT_POINTER ConvertPointer;
+ EFI_SET_VIRTUAL_ADDRESS_MAP SetVirtualAddressMap;
+ EFI_CONVERT_POINTER ConvertPointer;
//
// Variable Services
//
- EFI_GET_VARIABLE GetVariable;
- EFI_GET_NEXT_VARIABLE_NAME GetNextVariableName;
- EFI_SET_VARIABLE SetVariable;
+ EFI_GET_VARIABLE GetVariable;
+ EFI_GET_NEXT_VARIABLE_NAME GetNextVariableName;
+ EFI_SET_VARIABLE SetVariable;
//
// Miscellaneous Services
//
- EFI_GET_NEXT_HIGH_MONO_COUNT GetNextHighMonotonicCount;
- EFI_RESET_SYSTEM ResetSystem;
+ EFI_GET_NEXT_HIGH_MONO_COUNT GetNextHighMonotonicCount;
+ EFI_RESET_SYSTEM ResetSystem;
//
// UEFI 2.0 Capsule Services
//
- EFI_UPDATE_CAPSULE UpdateCapsule;
- EFI_QUERY_CAPSULE_CAPABILITIES QueryCapsuleCapabilities;
+ EFI_UPDATE_CAPSULE UpdateCapsule;
+ EFI_QUERY_CAPSULE_CAPABILITIES QueryCapsuleCapabilities;
//
// Miscellaneous UEFI 2.0 Service
//
- EFI_QUERY_VARIABLE_INFO QueryVariableInfo;
+ EFI_QUERY_VARIABLE_INFO QueryVariableInfo;
} EFI_RUNTIME_SERVICES;
-
-#define EFI_BOOT_SERVICES_SIGNATURE SIGNATURE_64 ('B','O','O','T','S','E','R','V')
-#define EFI_BOOT_SERVICES_REVISION EFI_SPECIFICATION_VERSION
+#define EFI_BOOT_SERVICES_SIGNATURE SIGNATURE_64 ('B','O','O','T','S','E','R','V')
+#define EFI_BOOT_SERVICES_REVISION EFI_SPECIFICATION_VERSION
///
/// EFI Boot Services Table.
@@ -1837,95 +1867,95 @@
///
/// The table header for the EFI Boot Services Table.
///
- EFI_TABLE_HEADER Hdr;
+ EFI_TABLE_HEADER Hdr;
//
// Task Priority Services
//
- EFI_RAISE_TPL RaiseTPL;
- EFI_RESTORE_TPL RestoreTPL;
+ EFI_RAISE_TPL RaiseTPL;
+ EFI_RESTORE_TPL RestoreTPL;
//
// Memory Services
//
- EFI_ALLOCATE_PAGES AllocatePages;
- EFI_FREE_PAGES FreePages;
- EFI_GET_MEMORY_MAP GetMemoryMap;
- EFI_ALLOCATE_POOL AllocatePool;
- EFI_FREE_POOL FreePool;
+ EFI_ALLOCATE_PAGES AllocatePages;
+ EFI_FREE_PAGES FreePages;
+ EFI_GET_MEMORY_MAP GetMemoryMap;
+ EFI_ALLOCATE_POOL AllocatePool;
+ EFI_FREE_POOL FreePool;
//
// Event & Timer Services
//
- EFI_CREATE_EVENT CreateEvent;
- EFI_SET_TIMER SetTimer;
- EFI_WAIT_FOR_EVENT WaitForEvent;
- EFI_SIGNAL_EVENT SignalEvent;
- EFI_CLOSE_EVENT CloseEvent;
- EFI_CHECK_EVENT CheckEvent;
+ EFI_CREATE_EVENT CreateEvent;
+ EFI_SET_TIMER SetTimer;
+ EFI_WAIT_FOR_EVENT WaitForEvent;
+ EFI_SIGNAL_EVENT SignalEvent;
+ EFI_CLOSE_EVENT CloseEvent;
+ EFI_CHECK_EVENT CheckEvent;
//
// Protocol Handler Services
//
- EFI_INSTALL_PROTOCOL_INTERFACE InstallProtocolInterface;
- EFI_REINSTALL_PROTOCOL_INTERFACE ReinstallProtocolInterface;
- EFI_UNINSTALL_PROTOCOL_INTERFACE UninstallProtocolInterface;
- EFI_HANDLE_PROTOCOL HandleProtocol;
- VOID *Reserved;
- EFI_REGISTER_PROTOCOL_NOTIFY RegisterProtocolNotify;
- EFI_LOCATE_HANDLE LocateHandle;
- EFI_LOCATE_DEVICE_PATH LocateDevicePath;
- EFI_INSTALL_CONFIGURATION_TABLE InstallConfigurationTable;
+ EFI_INSTALL_PROTOCOL_INTERFACE InstallProtocolInterface;
+ EFI_REINSTALL_PROTOCOL_INTERFACE ReinstallProtocolInterface;
+ EFI_UNINSTALL_PROTOCOL_INTERFACE UninstallProtocolInterface;
+ EFI_HANDLE_PROTOCOL HandleProtocol;
+ VOID *Reserved;
+ EFI_REGISTER_PROTOCOL_NOTIFY RegisterProtocolNotify;
+ EFI_LOCATE_HANDLE LocateHandle;
+ EFI_LOCATE_DEVICE_PATH LocateDevicePath;
+ EFI_INSTALL_CONFIGURATION_TABLE InstallConfigurationTable;
//
// Image Services
//
- EFI_IMAGE_LOAD LoadImage;
- EFI_IMAGE_START StartImage;
- EFI_EXIT Exit;
- EFI_IMAGE_UNLOAD UnloadImage;
- EFI_EXIT_BOOT_SERVICES ExitBootServices;
+ EFI_IMAGE_LOAD LoadImage;
+ EFI_IMAGE_START StartImage;
+ EFI_EXIT Exit;
+ EFI_IMAGE_UNLOAD UnloadImage;
+ EFI_EXIT_BOOT_SERVICES ExitBootServices;
//
// Miscellaneous Services
//
- EFI_GET_NEXT_MONOTONIC_COUNT GetNextMonotonicCount;
- EFI_STALL Stall;
- EFI_SET_WATCHDOG_TIMER SetWatchdogTimer;
+ EFI_GET_NEXT_MONOTONIC_COUNT GetNextMonotonicCount;
+ EFI_STALL Stall;
+ EFI_SET_WATCHDOG_TIMER SetWatchdogTimer;
//
// DriverSupport Services
//
- EFI_CONNECT_CONTROLLER ConnectController;
- EFI_DISCONNECT_CONTROLLER DisconnectController;
+ EFI_CONNECT_CONTROLLER ConnectController;
+ EFI_DISCONNECT_CONTROLLER DisconnectController;
//
// Open and Close Protocol Services
//
- EFI_OPEN_PROTOCOL OpenProtocol;
- EFI_CLOSE_PROTOCOL CloseProtocol;
- EFI_OPEN_PROTOCOL_INFORMATION OpenProtocolInformation;
+ EFI_OPEN_PROTOCOL OpenProtocol;
+ EFI_CLOSE_PROTOCOL CloseProtocol;
+ EFI_OPEN_PROTOCOL_INFORMATION OpenProtocolInformation;
//
// Library Services
//
- EFI_PROTOCOLS_PER_HANDLE ProtocolsPerHandle;
- EFI_LOCATE_HANDLE_BUFFER LocateHandleBuffer;
- EFI_LOCATE_PROTOCOL LocateProtocol;
- EFI_INSTALL_MULTIPLE_PROTOCOL_INTERFACES InstallMultipleProtocolInterfaces;
- EFI_UNINSTALL_MULTIPLE_PROTOCOL_INTERFACES UninstallMultipleProtocolInterfaces;
+ EFI_PROTOCOLS_PER_HANDLE ProtocolsPerHandle;
+ EFI_LOCATE_HANDLE_BUFFER LocateHandleBuffer;
+ EFI_LOCATE_PROTOCOL LocateProtocol;
+ EFI_INSTALL_MULTIPLE_PROTOCOL_INTERFACES InstallMultipleProtocolInterfaces;
+ EFI_UNINSTALL_MULTIPLE_PROTOCOL_INTERFACES UninstallMultipleProtocolInterfaces;
//
// 32-bit CRC Services
//
- EFI_CALCULATE_CRC32 CalculateCrc32;
+ EFI_CALCULATE_CRC32 CalculateCrc32;
//
// Miscellaneous Services
//
- EFI_COPY_MEM CopyMem;
- EFI_SET_MEM SetMem;
- EFI_CREATE_EVENT_EX CreateEventEx;
+ EFI_COPY_MEM CopyMem;
+ EFI_SET_MEM SetMem;
+ EFI_CREATE_EVENT_EX CreateEventEx;
} EFI_BOOT_SERVICES;
///
@@ -1936,11 +1966,11 @@
///
/// The 128-bit GUID value that uniquely identifies the system configuration table.
///
- EFI_GUID VendorGuid;
+ EFI_GUID VendorGuid;
///
/// A pointer to the table associated with VendorGuid.
///
- VOID *VendorTable;
+ VOID *VendorTable;
} EFI_CONFIGURATION_TABLE;
///
@@ -1950,63 +1980,63 @@
///
/// The table header for the EFI System Table.
///
- EFI_TABLE_HEADER Hdr;
+ EFI_TABLE_HEADER Hdr;
///
/// A pointer to a null terminated string that identifies the vendor
/// that produces the system firmware for the platform.
///
- CHAR16 *FirmwareVendor;
+ CHAR16 *FirmwareVendor;
///
/// A firmware vendor specific value that identifies the revision
/// of the system firmware for the platform.
///
- UINT32 FirmwareRevision;
+ UINT32 FirmwareRevision;
///
/// The handle for the active console input device. This handle must support
/// EFI_SIMPLE_TEXT_INPUT_PROTOCOL and EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL.
///
- EFI_HANDLE ConsoleInHandle;
+ EFI_HANDLE ConsoleInHandle;
///
/// A pointer to the EFI_SIMPLE_TEXT_INPUT_PROTOCOL interface that is
/// associated with ConsoleInHandle.
///
- EFI_SIMPLE_TEXT_INPUT_PROTOCOL *ConIn;
+ EFI_SIMPLE_TEXT_INPUT_PROTOCOL *ConIn;
///
/// The handle for the active console output device.
///
- EFI_HANDLE ConsoleOutHandle;
+ EFI_HANDLE ConsoleOutHandle;
///
/// A pointer to the EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL interface
/// that is associated with ConsoleOutHandle.
///
- EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *ConOut;
+ EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *ConOut;
///
/// The handle for the active standard error console device.
/// This handle must support the EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL.
///
- EFI_HANDLE StandardErrorHandle;
+ EFI_HANDLE StandardErrorHandle;
///
/// A pointer to the EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL interface
/// that is associated with StandardErrorHandle.
///
- EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *StdErr;
+ EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *StdErr;
///
/// A pointer to the EFI Runtime Services Table.
///
- EFI_RUNTIME_SERVICES *RuntimeServices;
+ EFI_RUNTIME_SERVICES *RuntimeServices;
///
/// A pointer to the EFI Boot Services Table.
///
- EFI_BOOT_SERVICES *BootServices;
+ EFI_BOOT_SERVICES *BootServices;
///
/// The number of system configuration tables in the buffer ConfigurationTable.
///
- UINTN NumberOfTableEntries;
+ UINTN NumberOfTableEntries;
///
/// A pointer to the system configuration tables.
/// The number of entries in the table is NumberOfTableEntries.
///
- EFI_CONFIGURATION_TABLE *ConfigurationTable;
+ EFI_CONFIGURATION_TABLE *ConfigurationTable;
} EFI_SYSTEM_TABLE;
/**
@@ -2041,13 +2071,13 @@
/// The attributes for this load option entry. All unused bits must be zero
/// and are reserved by the UEFI specification for future growth.
///
- UINT32 Attributes;
+ UINT32 Attributes;
///
/// Length in bytes of the FilePathList. OptionalData starts at offset
/// sizeof(UINT32) + sizeof(UINT16) + StrSize(Description) + FilePathListLength
/// of the EFI_LOAD_OPTION descriptor.
///
- UINT16 FilePathListLength;
+ UINT16 FilePathListLength;
///
/// The user readable description for the load option.
/// This field ends with a Null character.
@@ -2079,18 +2109,18 @@
//
// EFI Load Options Attributes
//
-#define LOAD_OPTION_ACTIVE 0x00000001
-#define LOAD_OPTION_FORCE_RECONNECT 0x00000002
-#define LOAD_OPTION_HIDDEN 0x00000008
-#define LOAD_OPTION_CATEGORY 0x00001F00
+#define LOAD_OPTION_ACTIVE 0x00000001
+#define LOAD_OPTION_FORCE_RECONNECT 0x00000002
+#define LOAD_OPTION_HIDDEN 0x00000008
+#define LOAD_OPTION_CATEGORY 0x00001F00
-#define LOAD_OPTION_CATEGORY_BOOT 0x00000000
-#define LOAD_OPTION_CATEGORY_APP 0x00000100
+#define LOAD_OPTION_CATEGORY_BOOT 0x00000000
+#define LOAD_OPTION_CATEGORY_APP 0x00000100
-#define EFI_BOOT_OPTION_SUPPORT_KEY 0x00000001
-#define EFI_BOOT_OPTION_SUPPORT_APP 0x00000002
-#define EFI_BOOT_OPTION_SUPPORT_SYSPREP 0x00000010
-#define EFI_BOOT_OPTION_SUPPORT_COUNT 0x00000300
+#define EFI_BOOT_OPTION_SUPPORT_KEY 0x00000001
+#define EFI_BOOT_OPTION_SUPPORT_APP 0x00000002
+#define EFI_BOOT_OPTION_SUPPORT_SYSPREP 0x00000010
+#define EFI_BOOT_OPTION_SUPPORT_COUNT 0x00000300
///
/// EFI Boot Key Data
@@ -2100,40 +2130,40 @@
///
/// Indicates the revision of the EFI_KEY_OPTION structure. This revision level should be 0.
///
- UINT32 Revision : 8;
+ UINT32 Revision : 8;
///
/// Either the left or right Shift keys must be pressed (1) or must not be pressed (0).
///
- UINT32 ShiftPressed : 1;
+ UINT32 ShiftPressed : 1;
///
/// Either the left or right Control keys must be pressed (1) or must not be pressed (0).
///
- UINT32 ControlPressed : 1;
+ UINT32 ControlPressed : 1;
///
/// Either the left or right Alt keys must be pressed (1) or must not be pressed (0).
///
- UINT32 AltPressed : 1;
+ UINT32 AltPressed : 1;
///
/// Either the left or right Logo keys must be pressed (1) or must not be pressed (0).
///
- UINT32 LogoPressed : 1;
+ UINT32 LogoPressed : 1;
///
/// The Menu key must be pressed (1) or must not be pressed (0).
///
- UINT32 MenuPressed : 1;
+ UINT32 MenuPressed : 1;
///
/// The SysReq key must be pressed (1) or must not be pressed (0).
///
- UINT32 SysReqPressed : 1;
- UINT32 Reserved : 16;
+ UINT32 SysReqPressed : 1;
+ UINT32 Reserved : 16;
///
/// Specifies the actual number of entries in EFI_KEY_OPTION.Keys, from 0-3. If
/// zero, then only the shift state is considered. If more than one, then the boot option will
/// only be launched if all of the specified keys are pressed with the same shift state.
///
- UINT32 InputKeyCount : 2;
+ UINT32 InputKeyCount : 2;
} Options;
- UINT32 PackedValue;
+ UINT32 PackedValue;
} EFI_BOOT_KEY_DATA;
///
@@ -2144,51 +2174,62 @@
///
/// Specifies options about how the key will be processed.
///
- EFI_BOOT_KEY_DATA KeyData;
+ EFI_BOOT_KEY_DATA KeyData;
///
/// The CRC-32 which should match the CRC-32 of the entire EFI_LOAD_OPTION to
/// which BootOption refers. If the CRC-32s do not match this value, then this key
/// option is ignored.
///
- UINT32 BootOptionCrc;
+ UINT32 BootOptionCrc;
///
/// The Boot#### option which will be invoked if this key is pressed and the boot option
/// is active (LOAD_OPTION_ACTIVE is set).
///
- UINT16 BootOption;
+ UINT16 BootOption;
///
/// The key codes to compare against those returned by the
/// EFI_SIMPLE_TEXT_INPUT and EFI_SIMPLE_TEXT_INPUT_EX protocols.
/// The number of key codes (0-3) is specified by the EFI_KEY_CODE_COUNT field in KeyOptions.
///
- //EFI_INPUT_KEY Keys[];
+ // EFI_INPUT_KEY Keys[];
} EFI_KEY_OPTION;
#pragma pack()
//
// EFI File location to boot from on removable media devices
//
-#define EFI_REMOVABLE_MEDIA_FILE_NAME_IA32 L"\\EFI\\BOOT\\BOOTIA32.EFI"
-#define EFI_REMOVABLE_MEDIA_FILE_NAME_IA64 L"\\EFI\\BOOT\\BOOTIA64.EFI"
-#define EFI_REMOVABLE_MEDIA_FILE_NAME_X64 L"\\EFI\\BOOT\\BOOTX64.EFI"
-#define EFI_REMOVABLE_MEDIA_FILE_NAME_ARM L"\\EFI\\BOOT\\BOOTARM.EFI"
-#define EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64 L"\\EFI\\BOOT\\BOOTAA64.EFI"
+#define EFI_REMOVABLE_MEDIA_FILE_NAME_IA32 L"\\EFI\\BOOT\\BOOTIA32.EFI"
+#define EFI_REMOVABLE_MEDIA_FILE_NAME_IA64 L"\\EFI\\BOOT\\BOOTIA64.EFI"
+#define EFI_REMOVABLE_MEDIA_FILE_NAME_X64 L"\\EFI\\BOOT\\BOOTX64.EFI"
+#define EFI_REMOVABLE_MEDIA_FILE_NAME_ARM L"\\EFI\\BOOT\\BOOTARM.EFI"
+#define EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64 L"\\EFI\\BOOT\\BOOTAA64.EFI"
+#define EFI_REMOVABLE_MEDIA_FILE_NAME_RISCV64 L"\\EFI\\BOOT\\BOOTRISCV64.EFI"
+#define EFI_REMOVABLE_MEDIA_FILE_NAME_LOONGARCH64 L"\\EFI\\BOOT\\BOOTLOONGARCH64.EFI"
-#if defined (MDE_CPU_IA32)
- #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_IA32
-#elif defined (MDE_CPU_IPF)
- #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_IA64
-#elif defined (MDE_CPU_X64)
- #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_X64
-#elif defined (MDE_CPU_EBC)
-#elif defined (MDE_CPU_ARM)
- #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_ARM
-#elif defined (MDE_CPU_AARCH64)
- #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64
-#else
- #error Unknown Processor Type
+#if !defined (EFI_REMOVABLE_MEDIA_FILE_NAME)
+ #if defined (MDE_CPU_IA32)
+#define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_IA32
+ #elif defined (MDE_CPU_X64)
+#define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_X64
+ #elif defined (MDE_CPU_EBC)
+ #elif defined (MDE_CPU_ARM)
+#define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_ARM
+ #elif defined (MDE_CPU_AARCH64)
+#define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64
+ #elif defined (MDE_CPU_RISCV64)
+#define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_RISCV64
+ #elif defined (MDE_CPU_LOONGARCH64)
+#define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_LOONGARCH64
+ #else
+ #error Unknown Processor Type
+ #endif
#endif
+//
+// The directory within the active EFI System Partition defined for delivery of capsule to firmware
+//
+#define EFI_CAPSULE_FILE_DIRECTORY L"\\EFI\\UpdateCapsule\\"
+
#include <ipxe/efi/Uefi/UefiPxe.h>
#include <ipxe/efi/Uefi/UefiGpt.h>
#include <ipxe/efi/Uefi/UefiInternalFormRepresentation.h>
diff --git a/src/include/ipxe/efi/X64/ProcessorBind.h b/src/include/ipxe/efi/X64/ProcessorBind.h
index 9f02e0c..fa53404 100644
--- a/src/include/ipxe/efi/X64/ProcessorBind.h
+++ b/src/include/ipxe/efi/X64/ProcessorBind.h
@@ -1,21 +1,15 @@
/** @file
Processor or Compiler specific defines and types x64 (Intel 64, AMD64).
- Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __PROCESSOR_BIND_H__
#define __PROCESSOR_BIND_H__
-FILE_LICENCE ( BSD3 );
+FILE_LICENCE ( BSD2_PATENT );
///
/// Define the processor type so other code can make processor based choices
@@ -25,11 +19,11 @@
//
// Make sure we are using the correct packing rules per EFI specification
//
-#if !defined(__GNUC__)
-#pragma pack()
+#if !defined (__GNUC__)
+ #pragma pack()
#endif
-#if defined(__GNUC__) && defined(__pic__) && !defined(USING_LTO)
+#if defined (__GNUC__) && defined (__pic__) && !defined (USING_LTO) && !defined (__APPLE__)
//
// Mark all symbol declarations and references as hidden, meaning they will
// not be subject to symbol preemption. This allows the compiler to refer to
@@ -40,38 +34,37 @@
// references can be resolved locally, and so there is no need to set the
// pragma in that case (and doing so will cause other issues).
//
-#pragma GCC visibility push (hidden)
+ #pragma GCC visibility push (hidden)
#endif
-#if defined(__INTEL_COMPILER)
+#if defined (__INTEL_COMPILER)
//
// Disable ICC's remark #869: "Parameter" was never referenced warning.
// This is legal ANSI C code so we disable the remark that is turned on with -Wall
//
-#pragma warning ( disable : 869 )
+ #pragma warning ( disable : 869 )
//
// Disable ICC's remark #1418: external function definition with no prior declaration.
// This is legal ANSI C code so we disable the remark that is turned on with /W4
//
-#pragma warning ( disable : 1418 )
+ #pragma warning ( disable : 1418 )
//
// Disable ICC's remark #1419: external declaration in primary source file
// This is legal ANSI C code so we disable the remark that is turned on with /W4
//
-#pragma warning ( disable : 1419 )
+ #pragma warning ( disable : 1419 )
//
// Disable ICC's remark #593: "Variable" was set but never used.
// This is legal ANSI C code so we disable the remark that is turned on with /W4
//
-#pragma warning ( disable : 593 )
+ #pragma warning ( disable : 593 )
#endif
-
-#if defined(_MSC_EXTENSIONS)
+#if defined (_MSC_EXTENSIONS)
//
// Disable warning that make it impossible to compile at /W4
@@ -81,35 +74,35 @@
//
// Disabling bitfield type checking warnings.
//
-#pragma warning ( disable : 4214 )
+ #pragma warning ( disable : 4214 )
//
// Disabling the unreferenced formal parameter warnings.
//
-#pragma warning ( disable : 4100 )
+ #pragma warning ( disable : 4100 )
//
// Disable slightly different base types warning as CHAR8 * can not be set
// to a constant string.
//
-#pragma warning ( disable : 4057 )
+ #pragma warning ( disable : 4057 )
//
// ASSERT(FALSE) or while (TRUE) are legal constructs so suppress this warning
//
-#pragma warning ( disable : 4127 )
+ #pragma warning ( disable : 4127 )
//
// This warning is caused by functions defined but not used. For precompiled header only.
//
-#pragma warning ( disable : 4505 )
+ #pragma warning ( disable : 4505 )
//
// This warning is caused by empty (after preprocessing) source file. For precompiled header only.
//
-#pragma warning ( disable : 4206 )
+ #pragma warning ( disable : 4206 )
-#if _MSC_VER == 1800 || _MSC_VER == 1900
+ #if defined (_MSC_VER) && _MSC_VER >= 1800
//
// Disable these warnings for VS2013.
@@ -119,130 +112,128 @@
// This warning is for potentially uninitialized local variable, and it may cause false
// positive issues in VS2013 and VS2015 build
//
-#pragma warning ( disable : 4701 )
+ #pragma warning ( disable : 4701 )
//
// This warning is for potentially uninitialized local pointer variable, and it may cause
// false positive issues in VS2013 and VS2015 build
//
-#pragma warning ( disable : 4703 )
+ #pragma warning ( disable : 4703 )
+
+ #endif
#endif
-#endif
+#if defined (_MSC_EXTENSIONS)
+//
+// use Microsoft C compiler dependent integer width types
+//
-
-#if defined(_MSC_EXTENSIONS)
- //
- // use Microsoft C compiler dependent integer width types
- //
-
- ///
- /// 8-byte unsigned value
- ///
- typedef unsigned __int64 UINT64;
- ///
- /// 8-byte signed value
- ///
- typedef __int64 INT64;
- ///
- /// 4-byte unsigned value
- ///
- typedef unsigned __int32 UINT32;
- ///
- /// 4-byte signed value
- ///
- typedef __int32 INT32;
- ///
- /// 2-byte unsigned value
- ///
- typedef unsigned short UINT16;
- ///
- /// 2-byte Character. Unless otherwise specified all strings are stored in the
- /// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 standards.
- ///
- typedef unsigned short CHAR16;
- ///
- /// 2-byte signed value
- ///
- typedef short INT16;
- ///
- /// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other
- /// values are undefined.
- ///
- typedef unsigned char BOOLEAN;
- ///
- /// 1-byte unsigned value
- ///
- typedef unsigned char UINT8;
- ///
- /// 1-byte Character
- ///
- typedef char CHAR8;
- ///
- /// 1-byte signed value
- ///
- typedef signed char INT8;
+///
+/// 8-byte unsigned value
+///
+typedef unsigned __int64 UINT64;
+///
+/// 8-byte signed value
+///
+typedef __int64 INT64;
+///
+/// 4-byte unsigned value
+///
+typedef unsigned __int32 UINT32;
+///
+/// 4-byte signed value
+///
+typedef __int32 INT32;
+///
+/// 2-byte unsigned value
+///
+typedef unsigned short UINT16;
+///
+/// 2-byte Character. Unless otherwise specified all strings are stored in the
+/// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 standards.
+///
+typedef unsigned short CHAR16;
+///
+/// 2-byte signed value
+///
+typedef short INT16;
+///
+/// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other
+/// values are undefined.
+///
+typedef unsigned char BOOLEAN;
+///
+/// 1-byte unsigned value
+///
+typedef unsigned char UINT8;
+///
+/// 1-byte Character
+///
+typedef char CHAR8;
+///
+/// 1-byte signed value
+///
+typedef signed char INT8;
#else
- ///
- /// 8-byte unsigned value
- ///
- typedef unsigned long long UINT64;
- ///
- /// 8-byte signed value
- ///
- typedef long long INT64;
- ///
- /// 4-byte unsigned value
- ///
- typedef unsigned int UINT32;
- ///
- /// 4-byte signed value
- ///
- typedef int INT32;
- ///
- /// 2-byte unsigned value
- ///
- typedef unsigned short UINT16;
- ///
- /// 2-byte Character. Unless otherwise specified all strings are stored in the
- /// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 standards.
- ///
- typedef unsigned short CHAR16;
- ///
- /// 2-byte signed value
- ///
- typedef short INT16;
- ///
- /// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other
- /// values are undefined.
- ///
- typedef unsigned char BOOLEAN;
- ///
- /// 1-byte unsigned value
- ///
- typedef unsigned char UINT8;
- ///
- /// 1-byte Character
- ///
- typedef char CHAR8;
- ///
- /// 1-byte signed value
- ///
- typedef signed char INT8;
+///
+/// 8-byte unsigned value
+///
+typedef unsigned long long UINT64;
+///
+/// 8-byte signed value
+///
+typedef long long INT64;
+///
+/// 4-byte unsigned value
+///
+typedef unsigned int UINT32;
+///
+/// 4-byte signed value
+///
+typedef int INT32;
+///
+/// 2-byte unsigned value
+///
+typedef unsigned short UINT16;
+///
+/// 2-byte Character. Unless otherwise specified all strings are stored in the
+/// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 standards.
+///
+typedef unsigned short CHAR16;
+///
+/// 2-byte signed value
+///
+typedef short INT16;
+///
+/// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE. Other
+/// values are undefined.
+///
+typedef unsigned char BOOLEAN;
+///
+/// 1-byte unsigned value
+///
+typedef unsigned char UINT8;
+///
+/// 1-byte Character
+///
+typedef char CHAR8;
+///
+/// 1-byte signed value
+///
+typedef signed char INT8;
#endif
///
/// Unsigned value of native width. (4 bytes on supported 32-bit processor instructions,
/// 8 bytes on supported 64-bit processor instructions)
///
-typedef UINT64 UINTN;
+typedef UINT64 UINTN;
///
/// Signed value of native width. (4 bytes on supported 32-bit processor instructions,
/// 8 bytes on supported 64-bit processor instructions)
///
-typedef INT64 INTN;
-
+typedef INT64 INTN;
//
// Processor specific defines
@@ -251,7 +242,7 @@
///
/// A value of native width with the highest bit set.
///
-#define MAX_BIT 0x8000000000000000ULL
+#define MAX_BIT 0x8000000000000000ULL
///
/// A value of native width with the two highest bits set.
///
@@ -260,7 +251,12 @@
///
/// Maximum legal x64 address
///
-#define MAX_ADDRESS 0xFFFFFFFFFFFFFFFFULL
+#define MAX_ADDRESS 0xFFFFFFFFFFFFFFFFULL
+
+///
+/// Maximum usable address at boot time
+///
+#define MAX_ALLOC_ADDRESS MAX_ADDRESS
///
/// Maximum legal x64 INTN and UINTN values.
@@ -269,15 +265,20 @@
#define MAX_UINTN ((UINTN)0xFFFFFFFFFFFFFFFFULL)
///
+/// Minimum legal x64 INTN value.
+///
+#define MIN_INTN (((INTN)-9223372036854775807LL) - 1)
+
+///
/// The stack alignment required for x64
///
-#define CPU_STACK_ALIGNMENT 16
+#define CPU_STACK_ALIGNMENT 16
///
/// Page allocation granularity for x64
///
-#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000)
-#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x1000)
+#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000)
+#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x1000)
//
// Modifier to ensure that all protocol member functions and EFI intrinsics
@@ -285,38 +286,38 @@
// EFI intrinsics are required to modify their member functions with EFIAPI.
//
#ifdef EFIAPI
- ///
- /// If EFIAPI is already defined, then we use that definition.
- ///
-#elif defined(_MSC_EXTENSIONS)
- ///
- /// Microsoft* compiler specific method for EFIAPI calling convention.
- ///
- #define EFIAPI __cdecl
-#elif defined(__GNUC__)
- ///
- /// Define the standard calling convention regardless of optimization level.
- /// The GCC support assumes a GCC compiler that supports the EFI ABI. The EFI
- /// ABI is much closer to the x64 Microsoft* ABI than standard x64 (x86-64)
- /// GCC ABI. Thus a standard x64 (x86-64) GCC compiler can not be used for
- /// x64. Warning the assembly code in the MDE x64 does not follow the correct
- /// ABI for the standard x64 (x86-64) GCC.
- ///
- #define EFIAPI
+///
+/// If EFIAPI is already defined, then we use that definition.
+///
+#elif defined (_MSC_EXTENSIONS)
+///
+/// Microsoft* compiler specific method for EFIAPI calling convention.
+///
+#define EFIAPI __cdecl
+#elif defined (__GNUC__)
+///
+/// Define the standard calling convention regardless of optimization level.
+/// The GCC support assumes a GCC compiler that supports the EFI ABI. The EFI
+/// ABI is much closer to the x64 Microsoft* ABI than standard x64 (x86-64)
+/// GCC ABI. Thus a standard x64 (x86-64) GCC compiler can not be used for
+/// x64. Warning the assembly code in the MDE x64 does not follow the correct
+/// ABI for the standard x64 (x86-64) GCC.
+///
+#define EFIAPI
#else
- ///
- /// The default for a non Microsoft* or GCC compiler is to assume the EFI ABI
- /// is the standard.
- ///
- #define EFIAPI
+///
+/// The default for a non Microsoft* or GCC compiler is to assume the EFI ABI
+/// is the standard.
+///
+#define EFIAPI
#endif
-#if defined(__GNUC__)
- ///
- /// For GNU assembly code, .global or .globl can declare global symbols.
- /// Define this macro to unify the usage.
- ///
- #define ASM_GLOBAL .globl
+#if defined (__GNUC__) || defined (__clang__)
+///
+/// For GNU assembly code, .global or .globl can declare global symbols.
+/// Define this macro to unify the usage.
+///
+#define ASM_GLOBAL .globl
#endif
/**
@@ -329,11 +330,10 @@
@return The pointer to the first instruction of a function given a function pointer.
**/
-#define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID *)(UINTN)(FunctionPointer)
+#define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID *)(UINTN)(FunctionPointer)
#ifndef __USER_LABEL_PREFIX__
#define __USER_LABEL_PREFIX__
#endif
#endif
-
