)]}'
{
  "commit": "af9604576d05fdfb37ab8c86712cb8e7809692d0",
  "tree": "2d1f814f423aede2f1f6c2437137f5c842d3989a",
  "parents": [
    "aef505b82393fc202b05da1b3e057404d268445b"
  ],
  "author": {
    "name": "Michael Brown",
    "email": "mcb30@ipxe.org",
    "time": "Sun Sep 06 12:53:20 2026 +0100"
  },
  "committer": {
    "name": "Michael Brown",
    "email": "mcb30@ipxe.org",
    "time": "Sun Sep 06 15:13:38 2026 +0100"
  },
  "message": "[librm] Remove conditionalisation of the Tivoli VMM workaround\n\nCommit 71560d1 (\"[librm] Preserve FPU, MMX and SSE state across calls\nto virt_call()\") originally introduced the use of \"fxsave\" and\n\"fxrstor\" to work around a bug in the implementation of memcpy()\nwithin the IBM Tivoli Provisioning Manager\u0027s VMM.  This commit assumed\n(with justification given in the commit message) that SSE support\ncould be assumed to be present on any realistic in-scope CPU, and so\nthese instructions may safely be assumed to be supported.\n\nCommit dd9a14d (\"[librm] Conditionalize the workaround for the Tivoli\nVMM\u0027s SSE garbling\") then made this workaround a compile-time\nconditional, to work around a missing feature in QEMU that caused the\nuse of \"fxsave\" and \"fxrstor\" to fail in QEMU VMs on some host CPUs.\n\nCommit 900f1f9 (\"[librm] Test for FXSAVE/FXRSTOR instruction support\")\nthen added a runtime CPUID check for the FXSR feature, to allow the\nunmodified iPXE binary to be used on older CPUs.\n\nSupporting AES hardware acceleration via AES-NI will require setting\nthe CR4.OSFXSR control bit, which in turn must be conditionalised upon\nthe same runtime CPUID check for the FXSR feature.\n\nPerform the runtime check unconditionally, and assume that we no\nlonger need the compile-time conditional (i.e. assume either that\nnewer versions of QEMU emulate \"fxsave\" and \"fxrstor\" when needed, or\nthat QEMU reports via CPUID that FXSR is not supported if it cannot\nsupport those instructions).\n\nSigned-off-by: Michael Brown \u003cmcb30@ipxe.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "566e19794d247827c3adb92bcdfc1a38d8a11d80",
      "old_mode": 33188,
      "old_path": "src/arch/x86/transitions/librm.S",
      "new_id": "1b804f13d782a9acccafb484189143b1f0ba2c0f",
      "new_mode": 33188,
      "new_path": "src/arch/x86/transitions/librm.S"
    },
    {
      "type": "modify",
      "old_id": "45c5c9c30c385d6e84d6a767abe93bafafe3736c",
      "old_mode": 33188,
      "old_path": "src/config/general.h",
      "new_id": "43858dceb324b5ea222cc7b98b44e3e95bfbec43",
      "new_mode": 33188,
      "new_path": "src/config/general.h"
    },
    {
      "type": "modify",
      "old_id": "a084497359fe57acc16f51e357aaa67ee6a9f1ea",
      "old_mode": 33188,
      "old_path": "src/config/qemu/general.h",
      "new_id": "30f60d3f704a3837374528dbbcc1a513286f78f4",
      "new_mode": 33188,
      "new_path": "src/config/qemu/general.h"
    }
  ]
}