[riscv] Add missing volatile qualifiers on timer and seed CSR accesses

The timer and entropy seed CSRs will, by design, return different
values each time they are read.

Add the missing volatile qualifiers on the inline assembly to prevent
gcc from assuming that repeated invocations may be elided.

Signed-off-by: Michael Brown <mcb30@ipxe.org>
2 files changed
tree: fd6c0ff3a5b136c025eee6011a8975766612499c
  1. .github/
  2. contrib/
  3. src/
  4. COPYING
  5. COPYING.GPLv2
  6. COPYING.UBDL
  7. README