)]}' { "log": [ { "commit": "b9d8871d3432048a47371e39f5b7413a40e4a774", "tree": "cec8de333b6bbcbcb8affc5967922c8f5dcc289f", "parents": [ "e788c5a39dff773a545a728a01f07ae6bf614729" ], "author": { "name": "Mattia Giambirtone", "email": "nocturn9x@nocturn9x.space", "time": "Thu Nov 05 13:16:01 2026 +0100" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Fri Nov 06 01:42:08 2026 +0000" }, "message": "MdeModulePkg: Use unsigned memory type bounds checks\n\nSome compilers treat EFI_MEMORY_TYPE as signed. OS-reserved memory\ntypes with bit 31 set can therefore pass a signed comparison against\nEfiMaxMemoryType and index outside the memory type statistics array.\n\nCast the memory type to UINT32 before checking the array bound in\nCoreTerminateMemoryMap and InternalBuildMemoryAllocationHob, matching\nthe existing guards in the page, pool, and memory bin code.\n\nFixes: https://github.com/tianocore/edk2/issues/13451\nSigned-off-by: Mattia Giambirtone \u003cnocturn9x@nocturn9x.space\u003e\n" }, { "commit": "e788c5a39dff773a545a728a01f07ae6bf614729", "tree": "329c1098ef533c557cb15d0ac98b5f6a839d7864", "parents": [ "e4771cff158b8bcbe3ea9f79e1809f0a48877bfc" ], "author": { "name": "Kevin Loughlin", "email": "kevinloughlin@google.com", "time": "Wed Nov 04 20:28:48 2026 +0000" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Nov 05 09:37:23 2026 +0000" }, "message": "OvmfPkg/PlatformCI: Verify serial console and PS/2 keyboard in boot test\n\nCurrently, FlashRomImage() in PlatformBuildLib.py boots OVMF in QEMU\nwith -debugcon stdio and a startup.nsh script, but only checks the QEMU\nprocess exit code. The UEFI Shell still executes startup.nsh and shuts\ndown cleanly even when ConIn and ConOut fail to connect on the ISA/LPC\nbridge. Because -serial output is neither captured nor inspected,\nregressions in ISA serial (PNP0501) or PS/2 keyboard (PNP0303) console\ninitialization go undetected in CI.\n\nWhen MAKE_STARTUP_NSH\u003dTRUE:\n1. Redirect QEMU serial output to \u003cBUILD_OUTPUT_BASE\u003e/serial.log via\n -serial file:\u003cpath\u003e.\n2. Run \"dh -d -v -p SimpleTextIn\" in startup.nsh before \"reset -s\".\n3. After QEMU exits, verify that serial.log contains \"Serial(0x0)\"\n (the UefiDevicePathLib text representation of EISA_PNP_ID(0x0501)),\n \"Acpi(PNP0303,0x0)\", and \"BOOT SUCCESS !!!\".\n\nSigned-off-by: Kevin Loughlin \u003ckevinloughlin@google.com\u003e\n" }, { "commit": "e4771cff158b8bcbe3ea9f79e1809f0a48877bfc", "tree": "649386acd5079174a0e480a089c2f22d5f9890b2", "parents": [ "561c006ac6bb962d8e53b369b6a6a01d2d9ae579" ], "author": { "name": "Kevin Loughlin", "email": "kevinloughlin@google.com", "time": "Wed Nov 04 16:54:01 2026 +0000" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Nov 05 09:37:23 2026 +0000" }, "message": "OvmfPkg/PlatformBootManagerLib: Enable PCI decoding on LPC bridge\n\nCommit 01bd046e7b4b (\"OvmfPkg/PlatformBootManagerLib: Remove blanket PCI\ndevice enablement\") removed the unconditional PciIo-\u003eAttributes()\nEFI_PCI_DEVICE_ENABLE call across all PCI devices in\nDetectAndPreparePlatformPciDevicePath().\n\nUnlike PCI-to-PCI bridges (which PciBusDxe enables automatically in\nStartPciDevicesOnBridge()), the PCI-to-ISA (LPC) bridge requires\nEFI_PCI_DEVICE_ENABLE in DetectAndPreparePlatformPciDevicePath() for two\nreasons:\n1. SioBusDriverBindingSupported() in OvmfPkg/SioBusDxe is the only\n DriverBindingSupported() implementation in edk2 that checks\n Pci.Hdr.Command. It requires PCI I/O and memory space decoding\n ((Pci.Hdr.Command \u0026 0x03) \u003d\u003d 0x03) to already be enabled on the\n bridge before binding, so ISA serial (PNP0501) and PS/2 keyboard\n (PNP0303) console initialization fail without it.\n2. Guest operating systems access legacy I/O ports behind the LPC/ISA\n bridge directly without a dedicated PCI driver for the LPC bridge\n device itself.\n\nRe-enable EFI_PCI_DEVICE_ENABLE specifically when the LPC bridge is\ndetected in DetectAndPreparePlatformPciDevicePath() in\nPlatformBootManagerLib and PlatformBootManagerLibBhyve.\n\nSuggested-by: Ard Biesheuvel \u003cardb+tianocore@kernel.org\u003e\nSigned-off-by: Kevin Loughlin \u003ckevinloughlin@google.com\u003e\n" }, { "commit": "561c006ac6bb962d8e53b369b6a6a01d2d9ae579", "tree": "aff36e03e61ba4468e4030a01be046f42e9a8042", "parents": [ "087a07536de8b8561c7ae5ed974e60c80a9ed4ae" ], "author": { "name": "Ard Biesheuvel", "email": "ardb@kernel.org", "time": "Sun Nov 01 16:11:37 2026 +0100" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Nov 05 07:13:36 2026 +0000" }, "message": "ArmPkg/ArmPsciMpServicesDxe: Clean the image to the PoC after init\n\nThe APs load gTcr, gMair, gTtbr0 and gHcr in ApEntryPoint before they\nenable their MMU and caches, i.e., using non-cacheable accesses that are\nnot coherent with the BSP\u0027s data cache. The driver cleans its image to\nthe PoC in its entry point to cater for this, but it does so before\ncalling MpServicesInitialize(), which is where these variables are\nassigned. Of these, only gHcr is cleaned explicitly afterwards, and so\ngTcr, gMair and gTtbr0 only make it to the PoC if they happen to share a\ncache line with gHcr. This is the case in an ArmVirtQemu DEBUG build\nwith GCC 15, for instance, but it is not guaranteed in general.\n\nNote that this cannot be reproduced under TCG, which does not model\ncaches, nor under KVM on hosts with FEAT_S2FWB, where the MMU-off\naccesses are cacheable.\n\nSo move the cache maintenance on the entire image to after the call to\nMpServicesInitialize(), which covers all the global variables accessed\nby the APs, and drop the explicit cleaning of individual variables, as\nit is now redundant.\n\nWhile at it, drop the cleaning of the gProcessorIDs array as well: it is\nallocated from pool memory, and so it is not covered by the cache\nmaintenance on the image, but the APs only access it after enabling\ntheir MMU and caches, i.e., using cacheable accesses that are coherent\nwith the BSP\u0027s data cache.\n\nSigned-off-by: Ard Biesheuvel \u003cardb@kernel.org\u003e\n" }, { "commit": "087a07536de8b8561c7ae5ed974e60c80a9ed4ae", "tree": "162f767d65ec3ac3eb9f7f45bbafda0d5682bfa5", "parents": [ "f4e2af190443b116a327ba017f8b2612b01fbb08" ], "author": { "name": "Aaron Pop", "email": "aaronpop@microsoft.com", "time": "Fri Oct 23 15:34:42 2026 -0700" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Nov 05 04:06:27 2026 +0000" }, "message": "Revert \"MdeModulePkg/PciBusDxe: Preserve physical BAR numbering\"\n\nThis reverts commit 0e7dad44bae663193b580adeb9d942c2559166f6.\n\nSigned-off-by: Aaron Pop \u003caaronpop@microsoft.com\u003e\n" }, { "commit": "f4e2af190443b116a327ba017f8b2612b01fbb08", "tree": "1118bbe5ad8e9eb08155eccaf8603d31cdcf8e7d", "parents": [ "965f4c22530d43147a456977705545874674aa0f" ], "author": { "name": "Aaron Pop", "email": "aaronpop@microsoft.com", "time": "Fri Oct 23 15:31:12 2026 -0700" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Nov 05 04:06:27 2026 +0000" }, "message": "Revert \"MdeModulePkg/PciBusDxe: Add Google Tests for BAR parsing\"\n\nThis reverts commit 0d61209231b2ec50ca6f6b96825baaa07c280854.\n\nSigned-off-by: Aaron Pop \u003caaronpop@microsoft.com\u003e\n" }, { "commit": "965f4c22530d43147a456977705545874674aa0f", "tree": "1a553ed00ed4af89145e7aa1cb7beb7a4f2d0393", "parents": [ "6e3d7df43d56d3870b06828d94348371f752e282" ], "author": { "name": "Phil Noh", "email": "Phil.Noh@amd.com", "time": "Fri Oct 30 15:32:49 2026 -0500" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Nov 05 03:28:06 2026 +0000" }, "message": "MdeModulePkg/CapsulePei: Print 64-bit capsule addresses in DEBUG logs\n\nThree DEBUG messages in CapsulePei print capsule addresses: the coalesce\nmemory range, the free memory range, and the capsule copy source and\ndestination. All three used the \"0x%8X\" format specifier with UINTN\narguments. On X64, this truncates the printed value to 32 bits, so when\nthe capsule coalesce buffer is allocated above 4GB, the logs show a\nmisleading address.\n\nChange these messages to use the \"0x%lX\" specifier and cast the\narguments to UINT64 so that the full 64-bit address and size are printed\non X64 while remaining correct on IA32.\n\nSigned-off-by: Phil Noh \u003cPhil.Noh@amd.com\u003e\n" }, { "commit": "6e3d7df43d56d3870b06828d94348371f752e282", "tree": "b9555251127b68904cc763e3a2ef135a5dcc8201", "parents": [ "2bcdc4c1ab5292b153b592eb11711f4025688545" ], "author": { "name": "Aaron Pop", "email": "aaronpop@microsoft.com", "time": "Wed Sep 09 13:37:54 2026 -0700" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Wed Nov 04 19:35:46 2026 +0000" }, "message": "NetworkPkg/IScsiDxe: Check bounds before root path access\n\nCodeQL static analysis reports out-of-bounds reads in the iSCSI DHCP\nroot path parsing loops. The loop conditions read TmpStr[Index] before\nchecking Index against Length.\n\nWhen a delimiter is absent before the end of the root path, Index\nreaches Length and the old conditions perform a one-past-end read before\nterminating. DHCP root paths are externally supplied, so the parser must\nvalidate the index before accessing the buffer.\n\nReorder the conditions in the IPv4 and IPv6 parsing paths so the bounds\ncheck short-circuits the buffer access. This prevents the out-of-bounds\nreads and resolves the CodeQL static scanning failures.\n\nSigned-off-by: Aaron Pop \u003caaronpop@microsoft.com\u003e\n" }, { "commit": "2bcdc4c1ab5292b153b592eb11711f4025688545", "tree": "234effee341add1f2be7eb3a5af8b5d1d6f07993", "parents": [ "4e6323eb1f019c2190245958a78fa6ffaa658e36" ], "author": { "name": "Aaron Pop", "email": "aaronpop@microsoft.com", "time": "Wed Sep 02 14:26:43 2026 -0700" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Wed Nov 04 19:35:46 2026 +0000" }, "message": "NetworkPkg/IScsiDxe: Align attempt count types\n\nDefine the attempt count and loop index as UINT8 to match\nPcdMaxIScsiAttemptNumber and the stored attempt index type. This avoids\ncomparing the attempt index against a wider integer type.\n\nSigned-off-by: Aaron Pop \u003caaronpop@microsoft.com\u003e\n" }, { "commit": "4e6323eb1f019c2190245958a78fa6ffaa658e36", "tree": "9cd54559b57a272f77c00361b2b5eb82e60f94ba", "parents": [ "44b61d98518aa05467e0b215c41274ff2e2fb707" ], "author": { "name": "Aaron Pop", "email": "aaronpop@microsoft.com", "time": "Wed Sep 02 13:11:25 2026 -0700" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Wed Nov 04 19:35:46 2026 +0000" }, "message": "NetworkPkg/TcpDxe: Check ICMP error status\n\nCall SOCK_ERROR only when the translated ICMP status is an EFI error\nand socket notification is requested. This prevents a successful status\nfrom being reported as a socket error.\n\nSigned-off-by: Aaron Pop \u003caaronpop@microsoft.com\u003e\n" }, { "commit": "44b61d98518aa05467e0b215c41274ff2e2fb707", "tree": "c4128d0c5583f9b81c9d52cff9b9c0af3c902f08", "parents": [ "b99701bed992788f8d517079e78a6a89e5e0ffff" ], "author": { "name": "Aaron Pop", "email": "aaronpop@microsoft.com", "time": "Mon Aug 31 15:19:24 2026 -0700" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Wed Nov 04 19:35:46 2026 +0000" }, "message": "NetworkPkg/HttpDxe: Fix packet buffer leaks\n\nFree PacketOut when NetbufAllocSpace() fails in the TLS connection,\nshutdown, and HTTPS receive paths. Otherwise, the error paths return\nwithout releasing the previously allocated network buffer.\n\nSigned-off-by: Aaron Pop \u003caaronpop@microsoft.com\u003e\n" }, { "commit": "b99701bed992788f8d517079e78a6a89e5e0ffff", "tree": "5762b5dead437dcb755f9e0ee832a8392bff48a2", "parents": [ "bd9f82490195ee4a23b309f07b0dcbfe498da271" ], "author": { "name": "Aaron Pop", "email": "aaronpop@microsoft.com", "time": "Mon Aug 31 12:45:59 2026 -0700" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Wed Nov 04 19:35:46 2026 +0000" }, "message": "NetworkPkg: Fix loop index type mismatches\n\nUse loop index types that can represent the corresponding count or\nbuffer size. This prevents truncation and wraparound when loop bounds\nexceed the range of the narrower index type.\n\nSigned-off-by: Aaron Pop \u003caaronpop@microsoft.com\u003e\n" }, { "commit": "bd9f82490195ee4a23b309f07b0dcbfe498da271", "tree": "4a673373bb4d3dd6c754aa632c66b5888ff2e1d3", "parents": [ "cc2e91a26ebe7b9d834acdeec3217d82fb27477f" ], "author": { "name": "Kajal Agarwal", "email": "kajal.agarwal@arm.com", "time": "Mon Nov 02 07:00:15 2026 +0000" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Wed Nov 04 11:47:56 2026 +0000" }, "message": "StandaloneMmPkg: Remove invalid alignment return documentation\n\nRemove the statement about returning NULL for invalid alignment when\nassertions are disabled from both Standalone MM allocation libraries.\nRetain the alignment ASSERT and page count overflow documentation.\n\nSigned-off-by: Kajal Agarwal \u003ckajal.agarwal@arm.com\u003e\n" }, { "commit": "cc2e91a26ebe7b9d834acdeec3217d82fb27477f", "tree": "dfc9fd30f896973b4b58c8545a0e722ea5f1bab5", "parents": [ "756d4a324d8fb1f500c02668905b466a51656c00" ], "author": { "name": "Kajal Agarwal", "email": "kajal.agarwal@arm.com", "time": "Wed Oct 21 13:11:11 2026 +0000" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Wed Nov 04 11:47:56 2026 +0000" }, "message": "StandaloneMmPkg: Reject aligned page count overflow\n\nThe aligned page allocation helpers in both Standalone MM allocation\nlibraries add alignment pages without runtime overflow handling. The\nexisting ASSERT does not protect release builds, so a wrapped page count\ncan result in an undersized allocation and incorrect page-free operations.\n\nCheck for overflow before calculating RealPages and return NULL if the\ntotal page count cannot be represented by UINTN. Keep EFI_SIZE_TO_PAGES\nfor the alignment-page calculation.\n\nRetain the alignment assertion and reject invalid alignment values at\nruntime when assertions are disabled. Make InternalAllocateAlignedPages\nSTATIC, remove the redundant post-addition assertion, and document the\nruntime failure behavior. Preserve allocation behavior for valid inputs.\n\nSigned-off-by: Kajal Agarwal \u003ckajal.agarwal@arm.com\u003e\n" }, { "commit": "756d4a324d8fb1f500c02668905b466a51656c00", "tree": "9871d14e446ddfeeb5f06e9dc272e24acea39cc0", "parents": [ "d05ad866fc7082e689bead58c7b45378f13ac9f7" ], "author": { "name": "Poncho Figueroa Esqueda", "email": "poncho.figueroa.esqueda@intel.com", "time": "Thu Oct 29 12:52:30 2026 -0700" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Tue Nov 03 23:10:33 2026 +0000" }, "message": "IntelFsp2Pkg: Support Python 3.14 AST constants\n\nPython 3.14 no longer dispatches ast.Constant nodes to the deprecated\nvisit_Num() and visit_NameConstant() methods. Replace them with\nvisit_Constant(). Use Constant.value instead of the removed Constant.s\nalias when extracting offset() and length() variable names.\n\nvisit_Constant() accepts int, float, complex, and None. Since bool is a\nsubclass of int, True and False are also accepted by the isinstance()\ncheck. Other constant values, including strings, bytes, and Ellipsis,\ncontinue to be rejected through generic_visit().\n\nFixes: https://github.com/tianocore/edk2/issues/13413\n\nSigned-off-by: Poncho Figueroa Esqueda \u003cponcho.figueroa.esqueda@intel.com\u003e\n" }, { "commit": "d05ad866fc7082e689bead58c7b45378f13ac9f7", "tree": "2571e6db72d3943305b68ec01da986d89cab1186", "parents": [ "011eca2e8f8bba9b59a60f100368ad287c99a181" ], "author": { "name": "abuthahirm", "email": "abuthahirm@ami.com", "time": "Wed Aug 26 15:09:35 2026 +0530" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Tue Nov 03 17:51:51 2026 +0000" }, "message": "NetworkPkg/DnsDxe: Add NULL guards after ASSERT in ParseDnsResponse\n\nCoverity reports four potential null-dereference defects in\nParseDnsResponse in DnsImpl.c where variables are asserted non-NULL\nand then immediately dereferenced. In release builds where ASSERT\ncompiles to a no-op, the assert provides no protection and the\ndereference can occur with a NULL pointer.\n\n1 \u0026 2. Item (IPv4 and IPv6 branches): After IsValidDnsResponse()\n returns TRUE, Item is asserted non-NULL and then used to obtain\n the token entry. Add an explicit NULL check for Item in both the\n IP_VERSION_4 and IP_VERSION_6 branches; if NULL, set\n *Completed \u003d FALSE and return EFI_ABORTED via ON_EXIT.\n\n3 \u0026 4. Dns4TokenEntry / Dns6TokenEntry (switch cases): In the\n DNS_TYPE_A and DNS_TYPE_AAAA cases of the answer-parsing loop,\n Dns4TokenEntry and Dns6TokenEntry are asserted non-NULL and then\n dereferenced to access response data. Add matching NULL guards\n that return EFI_ABORTED via ON_EXIT if the pointer is NULL.\n\nAlso remove the redundant Status \u003d EFI_SUCCESS initialization at the\ntop of the function, since every other code path assigns Status\nbefore it is read. To keep this true, explicitly set\nStatus \u003d EFI_SUCCESS in the DNS_TYPE_CNAME case, which previously\nrelied on the removed initialization to leave Status successful when\na CNAME record is the only or first answer processed.\n\nCoverity CID: null pointer dereference, uninitialized variable.\n\nCc: Saloni Kasbekar \u003csaloni.kasbekar@intel.com\u003e\nCc: Zachary Clark-williams \u003czachary.clark-williams@intel.com\u003e\nCc: Mike Beaton \u003cmjsbeaton@gmail.com\u003e\nSigned-off-by: Abuthahir M \u003cabuthahirm@ami.com\u003e\n" }, { "commit": "011eca2e8f8bba9b59a60f100368ad287c99a181", "tree": "cff02fbb8a6c8cb385eba85e880fcd3e5ba49dfd", "parents": [ "859d22b8ef45e43b91716eeab60fae855a6c617b" ], "author": { "name": "Baraneedharan Anbazhagan", "email": "anbazhagan@hp.com", "time": "Sun Oct 25 08:43:16 2026 -0500" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Tue Nov 03 02:27:05 2026 +0000" }, "message": "MdeModulePkg: Fix OptionOrder double free\n\nRemove the duplicate OptionOrder free on reallocation failure in\nEfiBootManagerGetLoadOptions().\n\nSigned-off-by: Anbazhagan Baraneedharan \u003canbazhagan@hp.com\u003e\n" }, { "commit": "859d22b8ef45e43b91716eeab60fae855a6c617b", "tree": "4abe1414c1a0e5ddaf66a4324cae1f8552f600e1", "parents": [ "22418168e581a4e6ec8eece329a5259006166b6a" ], "author": { "name": "Baraneedharan Anbazhagan", "email": "anbazhagan@hp.com", "time": "Sun Oct 25 08:43:05 2026 -0500" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Tue Nov 03 02:27:05 2026 +0000" }, "message": "MdeModulePkg: Fix GOP device path pool double free\n\nFree the previous GOP device path pool only once when the recursive\nsearch returns a path to append. If it returns NULL, preserve paths\ncollected from earlier children instead of freeing the pool.\n\nSigned-off-by: Anbazhagan Baraneedharan \u003canbazhagan@hp.com\u003e\n" }, { "commit": "22418168e581a4e6ec8eece329a5259006166b6a", "tree": "99304799a1f93a85965553678b96a90e6efe167b", "parents": [ "12ff0d7e1a6993c65d826bc49af365e58f924689" ], "author": { "name": "Sachin Ganesh", "email": "sachinganesh@ami.com", "time": "Wed Oct 28 15:01:37 2026 +0530" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Mon Nov 02 19:56:34 2026 +0000" }, "message": "SecurityPkg/SpdmSecurityLib: Untrack device context on destroy\n\nDestroySpdmDeviceContext freed the SPDM_DEVICE_CONTEXT without removing\nits node from mSpdmDeviceContextList, leaving a dangling pointer that\nGetSpdmIoProtocolViaSpdmContext could later dereference on systems with\nmultiple DOE devices (use-after-free), plus a leak of the per-device\nlist wrapper. Remove the matching list entry and free its wrapper before\nfreeing the device context.\n\nSigned-off-by: Sachin Ganesh \u003csachinganesh@ami.com\u003e\n" }, { "commit": "12ff0d7e1a6993c65d826bc49af365e58f924689", "tree": "f1e64fe91c19c3f64c7c7c69718a02de8b37bf67", "parents": [ "d2ab889263633857cc228c5b7593c40e4ad73d1f" ], "author": { "name": "Leif Lindholm", "email": "leif.lindholm@oss.qualcomm.com", "time": "Thu Oct 29 16:44:48 2026 +0000" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Mon Nov 02 18:40:07 2026 +0000" }, "message": "NetworkPkg/Ip4Dxe: rework request string handling in Ip4FormExtractConfig\n\nConfigRequest is either newly created in this function (if needed), or is\ninitialized to point to same location as Request.\n\nA boolean was used to determine whether allocation had happened and\nrequired freeing. Drop that and compare the pointers instead.\n\nAlso set ConfigRequest \u003d Request only in the else case, not always and\nthen override.\n\nSigned-off-by: Leif Lindholm \u003cleif.lindholm@oss.qualcomm.com\u003e\n" }, { "commit": "d2ab889263633857cc228c5b7593c40e4ad73d1f", "tree": "fe0abb9a76f5b6bc498bbfd48249504dd33ca294", "parents": [ "70e47971f136ac952aa94cadf7f9db48ec399ce6" ], "author": { "name": "Leif Lindholm", "email": "leif.lindholm@oss.qualcomm.com", "time": "Thu Oct 29 16:44:31 2026 +0000" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Mon Nov 02 18:40:07 2026 +0000" }, "message": "NetworkPkg/Ip4Dxe: use scope-local variables in Ip4FormExtractConfig\n\nSome variables are only used in the case where a new Request string\nis allocated, so move them into that scope.\n\nSigned-off-by: Leif Lindholm \u003cleif.lindholm@oss.qualcomm.com\u003e\n" }, { "commit": "70e47971f136ac952aa94cadf7f9db48ec399ce6", "tree": "618842884eeafd9234d94089393735032bb49564", "parents": [ "f864752298e5c85b68fb81bc831ae04da08ace0a" ], "author": { "name": "Leif Lindholm", "email": "leif.lindholm@oss.qualcomm.com", "time": "Thu Oct 29 17:39:41 2026 +0000" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Mon Nov 02 18:40:07 2026 +0000" }, "message": "NetworkPkg/Ip4Dxe: drop BufferSize variable in Ip4FormExtractConfig\n\nBufferSize is only used twice in the function, as shorthand for\nsizeof (IP4_CONFIG2_IFR_NVDATA). The code is clearer without it,\nwith the sizeofs inline.\n\nSigned-off-by: Leif Lindholm \u003cleif.lindholm@oss.qualcomm.com\u003e\n" }, { "commit": "f864752298e5c85b68fb81bc831ae04da08ace0a", "tree": "fd849e8d05205644c6acb1e8b6119a61b81110d2", "parents": [ "7ac14c3c2cfb892f2a764674207744764d161cfb" ], "author": { "name": "Leif Lindholm", "email": "leif.lindholm@oss.qualcomm.com", "time": "Thu Oct 29 17:33:13 2026 +0000" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Mon Nov 02 18:40:07 2026 +0000" }, "message": "NetworkPkg/Ip4Dxe: skip redundant NULL-init in Ip4FormExtractConfig\n\nFormResult is only used on the success path, where it is always\ninitialized, so drop the dummy NULL-initialization.\n\nIfrFormNvData was always unconditionally initialized anyway, so\ndrop the redundant NULL-initialization.\n\nSigned-off-by: Leif Lindholm \u003cleif.lindholm@oss.qualcomm.com\u003e\n" }, { "commit": "7ac14c3c2cfb892f2a764674207744764d161cfb", "tree": "9d5fa3d4d0f944e8002ac8c09f803311b62b9268", "parents": [ "a89ea171d7c57018d5534777f9c0c6fb98e57e13" ], "author": { "name": "Leif Lindholm", "email": "leif.lindholm@oss.qualcomm.com", "time": "Thu Oct 29 16:24:16 2026 +0000" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Mon Nov 02 18:40:07 2026 +0000" }, "message": "NetworkPkg/Ip4Dxe: drop live-coded numbers in Ip4FormExtractConfig\n\nReplace a numeric calculation of a substring length with a sizeof call.\n\nSigned-off-by: Leif Lindholm \u003cleif.lindholm@oss.qualcomm.com\u003e\n" }, { "commit": "a89ea171d7c57018d5534777f9c0c6fb98e57e13", "tree": "7d9e55b8405aa1409e6936a3a610927a7bcc46a5", "parents": [ "078d65d9cc588f17179648a233d54d29160571eb" ], "author": { "name": "Vishal Oliyil Kunnil", "email": "vishalo@qti.qualcomm.com", "time": "Mon Oct 26 16:13:13 2026 -0700" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Mon Nov 02 16:21:24 2026 +0000" }, "message": "ArmVirtPkg: Enable ArmPsciMpServicesDxe\n\nAdd ArmPsciMpServicesDxe to the QEMU builds so the MP Services\nProtocol is installed for SMP guests. The CPUs are taken from the\ngArmMpCoreInfoGuid HOB that PlatformPeiLib builds from the device\ntree.\n\nThe driver is not included by default. Build with\n-D MP_SERVICES_ENABLE\u003dTRUE to enable it.\n\nSigned-off-by: Vishal Oliyil Kunnil \u003cvishalo@qti.qualcomm.com\u003e\n" }, { "commit": "078d65d9cc588f17179648a233d54d29160571eb", "tree": "bc8e9b204db2451e6ff4d1f9bd4ee8e79f19944e", "parents": [ "4a8d76c6b7bb278db6935768848fc98b4fbbf334" ], "author": { "name": "Vishal Oliyil Kunnil", "email": "vishalo@qti.qualcomm.com", "time": "Mon Oct 26 16:13:13 2026 -0700" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Mon Nov 02 16:21:24 2026 +0000" }, "message": "ArmVirtPkg/PlatformPeiLib: Create gArmMpCoreInfoGuid HOB from QEMU FDT\n\nBuild gArmMpCoreInfoGuid HOB from enabled CPU nodes in the\ndevice tree. Each entry takes its MPIDR from the CPU node\u0027s reg\nproperty.\n\nThis allows enabling MP Services Protocol when Qemu is launched\nwith SMP support.\n\nSigned-off-by: Vishal Oliyil Kunnil \u003cvishalo@qti.qualcomm.com\u003e\n" }, { "commit": "4a8d76c6b7bb278db6935768848fc98b4fbbf334", "tree": "c3aeb05b3843a25f93b4ad7ada33dece84e487c6", "parents": [ "bc69793351be35dc6897afc239f4d071bc2e2ef1" ], "author": { "name": "Vishal Oliyil Kunnil", "email": "vishalo@qti.qualcomm.com", "time": "Sun Nov 01 10:42:34 2026 -0800" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Mon Nov 02 16:21:24 2026 +0000" }, "message": "ArmPkg/ArmPsciMpServicesDxe: Use ArmMonitorLib for PSCI calls\n\nArmPsciMpServicesDxe issues PSCI CPU_ON and CPU_OFF calls via\nArmCallSmc(), which hardcodes SMC as the conduit. When PSCI is\nprovided by a hypervisor, e.g. QEMU mach-virt without\nvirtualization\u003don, the conduit is HVC and executing\nSMC at EL1 raises a synchronous exception.\n\nUse ArmMonitorCall() instead, so the conduit is selected by the\nplatform\u0027s ArmMonitorLib mapping.\n\nPlatforms using the default ArmPkg ArmMonitorLib keep issuing\nSMC unless PcdMonitorConduitHvc is set, so their behaviour is\nunchanged.\n\nArmSmcLib is no longer used by the driver, so drop it.\n\nAdd an ArmMonitorLib resolution to ArmPkg.dsc so the driver still\nbuilds as part of ArmPkg.\n\nSigned-off-by: Vishal Oliyil Kunnil \u003cvishalo@qti.qualcomm.com\u003e\n" }, { "commit": "bc69793351be35dc6897afc239f4d071bc2e2ef1", "tree": "acca55c8afccbe92d9d1506b740033e195807b73", "parents": [ "7d52439664efe6ae540f260033957d1815c73e41" ], "author": { "name": "Vishal Oliyil Kunnil", "email": "vishalo@qti.qualcomm.com", "time": "Sun Nov 01 10:42:34 2026 -0800" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Mon Nov 02 16:21:24 2026 +0000" }, "message": "ArmPkg/ArmPsciMpServicesDxe: Use ApCpuOff() when the MPIDR is not found\n\nWhen ApEntryPoint does not find its MPIDR in gProcessorIDs, it turns\nthe processor off with a hardcoded SMC instruction.\n\nSwitch to the stack passed in context_id and call ApCpuOff() instead,\nso that all PSCI CPU_OFF calls go through the same C code.\n\nNo functional change.\n\nSigned-off-by: Vishal Oliyil Kunnil \u003cvishalo@qti.qualcomm.com\u003e\n" }, { "commit": "7d52439664efe6ae540f260033957d1815c73e41", "tree": "6ae5094bb075ad770c629f3b4aade6f9d6f5a2e6", "parents": [ "78b95c4e4ab7aaf3604eb456bda9cf69d2eb201b" ], "author": { "name": "Vishal Oliyil Kunnil", "email": "vishalo@qti.qualcomm.com", "time": "Sun Nov 01 10:42:33 2026 -0800" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Mon Nov 02 16:21:24 2026 +0000" }, "message": "ArmPkg/ArmPsciMpServicesDxe: Pass the AP stack via PSCI context_id\n\nApEntryPoint computes its stack address in assembly from\ngApStacksBase, gApStackSize and the index of its MPIDR in\ngProcessorIDs, duplicating the layout used when allocating the\nstacks.\n\nInstead, compute the stack top in DispatchCpu() and pass it as the\ncontext_id argument of PSCI CPU_ON, which the AP receives in x0.\nApEntryPoint keeps it in x19, a callee-saved register, across the\nMMU and cache setup calls.\n\nThis keeps the stack address calculation in one place, and gives\nthe AP a stack before it looks up its MPIDR.\n\nAs ApEntryPoint no longer references gApStacksBase and gApStackSize,\nmake the stack base a STATIC mApStacksBase, replace gApStackSize with\nAP_STACK_SIZE, and drop the now unneeded cache clean of the stack base\npointer.\n\nNo functional change.\n\nSigned-off-by: Vishal Oliyil Kunnil \u003cvishalo@qti.qualcomm.com\u003e\n" }, { "commit": "78b95c4e4ab7aaf3604eb456bda9cf69d2eb201b", "tree": "abfd35b38c41867bc454b3ef64b6bdd1cadd90da", "parents": [ "00b4e158c5c1b9d0a3338a9d673916b13b2ba33d" ], "author": { "name": "Vishal Oliyil Kunnil", "email": "vishalo@qti.qualcomm.com", "time": "Sun Nov 01 10:42:33 2026 -0800" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Mon Nov 02 16:21:24 2026 +0000" }, "message": "ArmPkg/ArmPsciMpServicesDxe: Move CPU_OFF into a helper function\n\nApExceptionHandler() and ApProcedure() both end with the same PSCI\nCPU_OFF sequence. Move it into a new ApCpuOff() function.\n\nNo functional change.\n\nSigned-off-by: Vishal Oliyil Kunnil \u003cvishalo@qti.qualcomm.com\u003e\n" }, { "commit": "00b4e158c5c1b9d0a3338a9d673916b13b2ba33d", "tree": "397e1f50e7f09d2f762e5bdfd3ef1802344df643", "parents": [ "ec82c96152507d64055a8965fe261fb9aaca3279" ], "author": { "name": "Vishal Oliyil Kunnil", "email": "vishalo@qti.qualcomm.com", "time": "Sun Nov 01 10:42:33 2026 -0800" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Mon Nov 02 16:21:24 2026 +0000" }, "message": "ArmPkg/ArmPsciMpServicesDxe: Zero-initialize PSCI call arguments\n\nDispatchCpu(), ApExceptionHandler() and ApProcedure() only set the\narguments used by the PSCI function they call, leaving the remaining\nfields of the arguments structure uninitialized. They are still\nloaded into registers and passed to the firmware.\n\nZero the structure before each call.\n\nSigned-off-by: Vishal Oliyil Kunnil \u003cvishalo@qti.qualcomm.com\u003e\n" }, { "commit": "ec82c96152507d64055a8965fe261fb9aaca3279", "tree": "7c13f0a10c969a24c5c500213856821122e05f82", "parents": [ "54e6a551912db30cf516954ce36f3fd6beac2207" ], "author": { "name": "INDIA\\kanagavels", "email": "kanagvaels@ami.com", "time": "Wed Oct 28 17:51:10 2026 +0530" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Mon Nov 02 12:35:05 2026 +0000" }, "message": "CryptoPkg/BaseCryptLibNull: Add missing null library instances\n\nAdd missing null library files in the BaseCryptLibNull.inf file. The\nCryptMlDsaNull.c and CryptSlhDsaNull.c file entries are missed in the\nBaseCryptLibNull.inf file, and the CryptSlhDsaNull.c file instance.\n\nSigned-off-by: Kanagavel \u003ckanagavels@ami.com\u003e\n" }, { "commit": "54e6a551912db30cf516954ce36f3fd6beac2207", "tree": "e86c174bff0458a748d445abed7b3f9e68abfbf1", "parents": [ "496fd85f26d40871c97c5835bf5ed849b6eb8a70" ], "author": { "name": "Ruben Hakobyan", "email": "hruben@meta.com", "time": "Tue Sep 22 09:31:26 2026 -0700" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Mon Nov 02 10:18:18 2026 +0000" }, "message": "ArmVirtPkg: CloudHv: Dynamically choose SMCCC conduit from VMM\n\nCurrently the SMCCC conduit type used by CloudHv is decided during build\ntime, which is always HVC.\n\nIntroduced in 059676e4faef (\"ArmVirtPkg/ArmVirtQemu: Implement\nArmMonitorLib for QEMU specifically\"), ArmVirtMonitorLib selects\nthe conduit type (SMC or HVC) based on what is advertised by the VMM.\n\nCloud Hypervisor exposes SMC when the guest is launched in EL2 mode\n(i.e. it supports nested virtualisation).\n\nUse ArmVirtMonitorLib for CloudHv, so we select the SMCCC conduit\nbased on the PSCI method advertised by the Cloud Hypervisor.\n\nSigned-off-by: Ruben Hakobyan \u003chruben@meta.com\u003e\n" }, { "commit": "496fd85f26d40871c97c5835bf5ed849b6eb8a70", "tree": "fbdc68761451fff904fffeb29c3dcaf94bcafcd5", "parents": [ "33663d6d0971b567aaa369242987cfaecbcbd68d" ], "author": { "name": "Ming Huang", "email": "huangming@linux.alibaba.com", "time": "Fri Oct 23 12:05:21 2026 +0800" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Mon Nov 02 03:24:56 2026 +0000" }, "message": "EmbeddedPkg/PrePiLib: drop DstBuffer adjustment in FfsProcessSection\n\nThe DstBuffer adjustment in FfsProcessSection() was added in the\nBeagleBoard era (2ef2b01e07), when the decompressed section stream\nplaced the encapsulated section data directly after the 4/8 byte\nEFI_COMMON_SECTION_HEADER. Bumping DstBuffer forward by\nEFI_PAGE_SIZE - sizeof (EFI_COMMON_SECTION_HEADER) put the section\ndata back on a page boundary at the cost of one extra page.\n\nFor FV images this compensation is obsolete and harmful:\n\n- GenFds aligns the FV_IMAGE section data inside the stream to the\n FvAlignment recorded in the inner FV header, by emitting a RAW pad\n section in front of the FV_IMAGE section. With a page aligned\n DstBuffer, the decompressed FV therefore already starts at a\n FvAlignment-aligned offset (e.g. DstBuffer + 0x10 for a typical\n FvAlignment \u003d 16 build).\n\n- The forward bump instead moves the FV to\n DstBuffer + EFI_PAGE_SIZE - sizeof (EFI_COMMON_SECTION_HEADER) + pad,\n which is 12 bytes off for FvAlignment \u003d 16. FfsProcessFvFile() then\n takes its misalignment fallback and AllocateAlignedPages() a second\n buffer to CopyMem() the entire FV, doubling the temporary RAM\n footprint of the decompressed DXEFV.\n\nOn platforms with a modest SEC temporary RAM pool this is fatal: a\nRISC-V platform with a 16 MiB pool and a ~9 MiB LZMA compressed DXEFV\nfails to boot with EFI_OUT_OF_RESOURCES from DecompressFirstFv(),\nbecause the redundant aligned copy no longer fits. The same FDF\npattern (FvAlignment \u003d 16 DXEFV wrapped in the LZMA GUIDED section)\nis used by OvmfPkg/RiscVVirt, which gets away with it only because\nof its more generous memory layout, and pays a full extra copy of\nthe FV on every boot.\n\nRemove the adjustment, and the extra page that was reserved for it,\nso the decompressed FV keeps its natural, build-time guaranteed\nalignment. Verified on the affected RISC-V platform: the FV now\nlands 16-byte aligned, the fallback copy is not taken, and boot\nsucceeds in both RELEASE and DEBUG builds.\n\nCc: Leif Lindholm \u003cleif.lindholm@oss.qualcomm.com\u003e\nCc: Ard Biesheuvel \u003cardb+tianocore@kernel.org\u003e\nCc: Abner Chang \u003cabner.chang@amd.com\u003e\nSigned-off-by: Ming Huang \u003chuangming@linux.alibaba.com\u003e\n" }, { "commit": "33663d6d0971b567aaa369242987cfaecbcbd68d", "tree": "aaefa84d1dd10e9565b3e7c97b2e80b0dc8ee689", "parents": [ "37b18eca7958215fcf81b297e313adf60c0a70cb" ], "author": { "name": "Yang Gang", "email": "yanggang.uefi@gmail.com", "time": "Wed Oct 28 18:26:54 2026 +0800" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Sun Nov 01 19:20:34 2026 +0000" }, "message": "MdePkg: Fix typo in UefiSpec.h\n\nCorrect \"Oprn\" to \"Open\"\n\nSigned-off-by: Yang Gang \u003cyanggang.uefi@gmail.com\u003e\n" }, { "commit": "37b18eca7958215fcf81b297e313adf60c0a70cb", "tree": "a5948cdaf9fdaa849fc275c3dac321305d6e0922", "parents": [ "10ef465ee2d6d42803e60075399aafb4ec0fa9a2" ], "author": { "name": "Antaeus Kleinert-Strand", "email": "antklein@microsoft.com", "time": "Tue Oct 06 11:27:09 2026 -0700" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Sat Oct 31 02:12:04 2026 +0000" }, "message": "BaseTools: Preserve quoted paths in workspace macro expansion\n\nWhitespace-based tokenization breaks quoted paths containing spaces\nand prevents correct package path resolution. It also collapses\nwhitespace between compiler options.\n\nResolve workspace macros while preserving quotes, option prefixes,\nwhitespace, and Windows backslashes. Prefer existing workspace paths,\nthen search package roots in order. Keep missing paths rooted in the\nworkspace instead of falling back to the last package root.\n\nAdd regression tests covering quoting, spaces, search precedence,\nmissing paths, and Windows-style paths. Register the tests alongside\nthe existing Python tools test suites.\n\nSigned-off-by: Antaeus Kleinert-Strand \u003cantklein@microsoft.com\u003e\n" }, { "commit": "10ef465ee2d6d42803e60075399aafb4ec0fa9a2", "tree": "9e03dc59f8e14c252f4f303d548a86b802e73aef", "parents": [ "e76e710ad875c13413b55b94bf3599dbb377a025" ], "author": { "name": "Antaeus Kleinert-Strand", "email": "antklein@microsoft.com", "time": "Tue Oct 27 11:23:25 2026 -0700" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Sat Oct 31 02:12:04 2026 +0000" }, "message": "BaseTools: Rename workspace os alias and clean up imports\n\nRename the LongFilePathOs import alias from os to Os and update its\nreferences without changing workspace behavior.\n\nRemove unused os and sys imports from the Python test runner and\nnormalize blank lines in both files.\n\nSigned-off-by: Antaeus Kleinert-Strand \u003cantklein@microsoft.com\u003e\n" }, { "commit": "e76e710ad875c13413b55b94bf3599dbb377a025", "tree": "d5db6712fc5b4799e5d288cfa07fbd01b12ab661", "parents": [ "7eee9931c8074b20ff1c0f1c08f20bb7c2d81803" ], "author": { "name": "Aaron Pop", "email": "aaronpop@microsoft.com", "time": "Thu Oct 15 13:13:40 2026 -0700" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Fri Oct 30 23:41:08 2026 +0000" }, "message": "PrmPkg/PrmConfigDxe: Mark runtime MMIO ranges execute-protected\n\nExplicitly set EFI_MEMORY_XP on PRM runtime MMIO ranges so they do not\nremain executable. Include the XP capability when adding missing MMIO\nranges and enable it on existing ranges before setting attributes.\n\nApply EFI_MEMORY_RUNTIME | EFI_MEMORY_XP to provide read/write access\nwithout execute permission, clearing any existing RP or RO attributes.\nSkip the attribute update only when the range is already runtime,\nexecute-protected, and neither read-protected nor read-only.\n\nFound while running a paging audit on a system consuming PRM.\n\nSigned-off-by: Aaron Pop \u003caaronpop@microsoft.com\u003e\n" }, { "commit": "7eee9931c8074b20ff1c0f1c08f20bb7c2d81803", "tree": "25bd00746fa36bfc81202df07eca7be1bae9230f", "parents": [ "9e48864f96684ed040995c31740d59e75d654f7e" ], "author": { "name": "Antaeus Kleinert-Strand", "email": "antklein@microsoft.com", "time": "Thu Oct 29 14:36:38 2026 -0700" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Fri Oct 30 21:47:16 2026 +0000" }, "message": "Maintainers.txt: Add Antaeus Kleinert-Strand as NetworkPkg maintainer\n\nAdd Antaeus Kleinert-Strand to the NetworkPkg maintainer list.\n\nSigned-off-by: Antaeus Kleinert-Strand \u003cantklein@microsoft.com\u003e\n" }, { "commit": "9e48864f96684ed040995c31740d59e75d654f7e", "tree": "11aca967ce7e44eb81c6abe138e3e1708dff6ccd", "parents": [ "17fe0a6fbc8b369773927d5f62ae3f73cfb10e3b" ], "author": { "name": "Amrathesh", "email": "amrathesh@arm.com", "time": "Mon Oct 26 11:43:20 2026 +0000" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Fri Oct 30 13:52:39 2026 +0000" }, "message": "ArmPlatformPkg/PlatformPei: Check event size and payload bounds\n\nEventLogIteratorGetNext() reads EventSize after the digest list\nwithout checking that the field fits within the event-log buffer.\nIt also trusts the payload length when calculating the event size,\nwhich can cause an out-of-bounds read when copying the event to a HOB.\n\nCheck that the EventSize field and declared payload fit within the\nremaining log bytes. Return EFI_INVALID_PARAMETER for truncated\nentries before reading the field or advancing over the payload.\n\nSigned-off-by: Amrathesh \u003camrathesh@arm.com\u003e\n" }, { "commit": "17fe0a6fbc8b369773927d5f62ae3f73cfb10e3b", "tree": "2955d34e89050ca5f68885d84c493e3c6cafc977", "parents": [ "777a4fdfe96adcdb68e364c4d691bfb0c2b1b4dc" ], "author": { "name": "Amrathesh", "email": "amrathesh@arm.com", "time": "Mon Oct 26 08:35:22 2026 +0000" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Fri Oct 30 13:52:39 2026 +0000" }, "message": "ArmPlatformPkg/PlatformPei: Bound digest list parsing to event log\n\nGetDigestListSize() walks the packed digest list without checking\navailable bytes. A truncated list or excessive digest count can cause\nan out-of-bounds read of the next hash algorithm ID.\n\nPass the remaining event-log length from EventLogIteratorGetNext().\nCheck the initial fields, each digest length, and each subsequent\nalgorithm ID against the available bytes. Return zero if parsing\nwould exceed the supplied boundary.\n\nSigned-off-by: Amrathesh \u003camrathesh@arm.com\u003e\n" }, { "commit": "777a4fdfe96adcdb68e364c4d691bfb0c2b1b4dc", "tree": "d749e11bebfaf5c10ac1e49b425502a5c04434eb", "parents": [ "bf826fc19f5de7d6ac0ea8f68ea093272b21529d" ], "author": { "name": "Jakov Zauzolkov", "email": "jakov.zauzolkov@aisec.fraunhofer.de", "time": "Tue Jun 23 09:09:11 2026 +0200" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Fri Oct 30 11:33:04 2026 +0000" }, "message": "OvmfPkg/BaseMemEncryptSevLib: remove static encryption mask\n\nThe static variables `EncryptionMask` and `mAddressEncMask` are set once\ninside `InternalGetMemEncryptionAddressMask()` and read consecutively in\nthe same function at later points in time. The variable values are kept\nin the .bss section. Due to the code being executed before Tcg2Pei\nmeasured the PEIFV as loaded to RAM into TPM PCR0, which includes the\nrespective .bss section, the values end up measured into PCR0, preventing\nthe reproducibility of the PCR0 measurement.\n\nReplacing the global variables with local variables that are set newly\nin each call solves the problem.\n\nCo-authored-by: Simon Ott \u003csimon.ott@aisec.fraunhofer.de\u003e\nSigned-off-by: Jakov Zauzolkov \u003cjakov.zauzolkov@aisec.fraunhofer.de\u003e\n" }, { "commit": "bf826fc19f5de7d6ac0ea8f68ea093272b21529d", "tree": "427b9ef2555dbabba8db7e1db07bfdf33f8aceb1", "parents": [ "36867eca076d3b9a08e9fb6aa95ae3ad061f172b" ], "author": { "name": "Gerd Hoffmann", "email": "kraxel@redhat.com", "time": "Fri Sep 04 08:24:01 2026 +0200" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Fri Oct 30 09:59:52 2026 +0000" }, "message": "OvmfPkg/IntelTdx: use GenericQemuLoadImageLib\n\nReplace X86QemuLoadImageLib with GenericQemuLoadImageLib. This removes\nthe legacy linux kernel loader and effectively renders prehistoric linux\nkernels (which do not have the EFI stub and can not be loaded as EFI\nbinaries) unsupported.\n\nRunning in a TDX guest requires a relatively recent linux kernel anyway,\nso there is little reason to care about backward compatibility with very\nold linux kernels.\n\nSigned-off-by: Gerd Hoffmann \u003ckraxel@redhat.com\u003e\n" }, { "commit": "36867eca076d3b9a08e9fb6aa95ae3ad061f172b", "tree": "fee3ac29970eb842bc60ddbd0c739d7b98382668", "parents": [ "d12baf708151294ec02ef3c8fc21561d78ba8222" ], "author": { "name": "Jean-Philippe Brucker", "email": "jean-philippe@linaro.org", "time": "Thu May 04 12:37:40 2023 +0100" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 23:58:55 2026 +0000" }, "message": "ArmVirtPkg/ArmVirtQemu: Use BlobVerifierLibArmCca\n\nUse the Arm CCA BlobVerifier to add hashes of FwCfg images to the realm\nmeasurement.\n\nSigned-off-by: Jean-Philippe Brucker \u003cjean-philippe@linaro.org\u003e\n" }, { "commit": "d12baf708151294ec02ef3c8fc21561d78ba8222", "tree": "9adb659cd722ab60d037bc288f02b633742e7bfe", "parents": [ "b5203fefd29d649391e85e5ace9d19fb60078980" ], "author": { "name": "Jean-Philippe Brucker", "email": "jean-philippe@linaro.org", "time": "Thu May 04 12:37:39 2023 +0100" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 23:58:55 2026 +0000" }, "message": "ArmVirtPkg: Add BlobVerifierLibArmCca library\n\nThe ArmVirtQemu guest firmware loads the kernel and initrd images from\nthe host through the FwCfg device. When running in a realm, measure\nthose images and add them to the realm measurement, so that the realm\nowner can later authenticate them.\n\nSigned-off-by: Jean-Philippe Brucker \u003cjean-philippe@linaro.org\u003e\n" }, { "commit": "b5203fefd29d649391e85e5ace9d19fb60078980", "tree": "159f1e4b5657abf9f7a5d0366ac4473ead32ea8a", "parents": [ "dc11554340ea4b79499d2427ed33c38353f06a2f" ], "author": { "name": "Jean-Philippe Brucker", "email": "jean-philippe@linaro.org", "time": "Thu Nov 23 14:51:14 2023 +0000" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 23:58:55 2026 +0000" }, "message": "OvmfPkg: Include IoMmuDxe in RiscVVirtQemu and LoongArchVirtQemu\n\nAs the ArmVirtQemu platforms are getting support for confidential\ncomputing, they needs to start supporting IOMMU protocols that share\nand unshare DMA buffers with the host. This means we\u0027ll need to ensure\nthat the driver that provides the IOMMU protocol and client drivers\nthat perform DMA are loaded in the right order. For instance\nQemuFwCfgLibMmio needs new Depex entries so that drivers including\nthis library are loaded after either gEdkiiIoMmuProtocolGuid or\ngIoMmuAbsentProtocolGuid get produced.\n\nSince RiscVVirtQemu and LoongArchVirtQemu uses QemuFwCfgLibMmio, it\nnow needs something that produces gIoMmuAbsentProtocolGuid. Include\nIoMmuAbsentDxe for this purpose.\n\nSigned-off-by: Jean-Philippe Brucker \u003cjean-philippe@linaro.org\u003e\n---\nOnly build-tested\n" }, { "commit": "dc11554340ea4b79499d2427ed33c38353f06a2f", "tree": "15ea0704d01358504e9ad0f62979ce37659d048f", "parents": [ "3308eb7646d1f493908a5f3a7bcca19a60b6c390" ], "author": { "name": "Sami Mujawar", "email": "sami.mujawar@arm.com", "time": "Tue Mar 03 16:40:35 2026 +0000" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 23:58:55 2026 +0000" }, "message": "OvmfPkg: Publish IoMmuAbsentProtocol for non-CC VMs\n\nAdd support for publishing gIoMmuAbsentProtocolGuid on platforms\nthat do not implement Confidential Computing (CC).\n\nA previous change enabling CC support for ArmVirtQemu, see patch\n \"QemuFwCfgLibMmio: Use IOMMU for DMA buffers\"\nupdated QemuFwCfgLibMmio to rely on the IOMMU protocol for DMA\nbuffer handling. As a result, dependent drivers now require\neither gEdkiiIoMmuProtocolGuid or gIoMmuAbsentProtocolGuid to\nbe installed for proper dispatch.\n\nRiscVVirtQemu and LoongArchVirtQemu firmware also uses\nQemuFwCfgLibMmio but does not implement support for CC.\nWithout publishing one of the required protocols, dependent\ndrivers are not dispatched. To address this, introduce a DXE\ndriver IoMmuAbsentDxe that installs gIoMmuAbsentProtocolGuid\nfor architectures without CC support.\n\nSigned-off-by: Sami Mujawar \u003csami.mujawar@arm.com\u003e\n" }, { "commit": "3308eb7646d1f493908a5f3a7bcca19a60b6c390", "tree": "0cb5ce6d965a058c7b4597abb6f44225af4b5250", "parents": [ "3749668f7b83f89da8dbf655690a1e7573b3c613" ], "author": { "name": "Jean-Philippe Brucker", "email": "jean-philippe@linaro.org", "time": "Thu May 04 12:37:37 2023 +0100" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 23:58:55 2026 +0000" }, "message": "OvmfPkg/QemuFwCfgLibMmio: Use IOMMU for DMA buffers\n\nWhen running in a realm, we must explicitly share DMA buffers with the\nhost. Use the IoMmuProtocol when available.\n\nSigned-off-by: Jean-Philippe Brucker \u003cjean-philippe@linaro.org\u003e\n" }, { "commit": "3749668f7b83f89da8dbf655690a1e7573b3c613", "tree": "bf249c7262743d579a4fa2ea339e8de09e388f52", "parents": [ "23465a66a6e128340c7b99c8158ed6aa7c39c981" ], "author": { "name": "Jean-Philippe Brucker", "email": "jean-philippe@linaro.org", "time": "Thu May 04 12:37:12 2023 +0100" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 23:58:55 2026 +0000" }, "message": "ArmVirtPkg/ArmVirtQemu: Add RAMP and CcaIommu\n\nTo ensure I/O buffers are shared with the host, add those libs\n\nSigned-off-by: Jean-Philippe Brucker \u003cjean-philippe@linaro.org\u003e\n" }, { "commit": "23465a66a6e128340c7b99c8158ed6aa7c39c981", "tree": "16ae715a2b7db85c084b087289779148c1ed0976", "parents": [ "a3ff3baab01d8adb7a81b72c299637aa6db8d3c4" ], "author": { "name": "Sami Mujawar", "email": "sami.mujawar@arm.com", "time": "Mon Oct 19 08:44:10 2026 +0100" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 22:07:05 2026 +0000" }, "message": "ArmVirtPkg: Fix KvmtoolPlatformPeiLib LIBRARY CLASS and BASE name\n\nSet the KvmtoolPlatformPeiLib INF BASE_NAME to the library instance\nname and set LIBRARY_CLASS to the PlatformPeiLib class it implements.\n\nSigned-off-by: Sami Mujawar \u003csami.mujawar@arm.com\u003e\n" }, { "commit": "a3ff3baab01d8adb7a81b72c299637aa6db8d3c4", "tree": "edb4225f262212b4373aa9b667a564d3c28e8d2c", "parents": [ "59732135477538ca860150659a3a5c0b7fb55a10" ], "author": { "name": "Jean-Philippe Brucker", "email": "jean-philippe@linaro.org", "time": "Wed Nov 15 12:28:17 2023 +0000" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 22:07:05 2026 +0000" }, "message": "ArmVirtPkg/QemuVirtMemInfoLib: Share the MMIO space with the VMM under CCA\n\nA Realm guest needs to access peripherals emulated with the host with the\n\u0027unprotected\u0027 attribute bit set (most significant bit of the Intermediate\nPhysical Address). Initialize the page tables with all device mappings.\n\nUse ArmCcaGetMemoryProtectionAttribute() to apply the CCA protection\nattribute to the UART and FwCfg MMIO physical mappings when building the\nQEMU virtual memory map. Add the ArmMmuLib dependency required for the\nhelper.\n\nSigned-off-by: Jean-Philippe Brucker \u003cjean-philippe@linaro.org\u003e\n" }, { "commit": "59732135477538ca860150659a3a5c0b7fb55a10", "tree": "8dccc0b9e4fe185198d5a612f697f6446da92b96", "parents": [ "9fe9bb4cce4baa8d662f6b729ffc6173cfc641b2" ], "author": { "name": "Sami Mujawar", "email": "sami.mujawar@arm.com", "time": "Thu Mar 26 14:32:36 2026 +0000" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 22:07:05 2026 +0000" }, "message": "ArmVirtPkg/ArmVirtQemu: Init Arm CCA HOBs in PlatformPeim()\n\nArmCcaInitialiseHobs() creates GUID HOBs that cache the\nRealm state and Realm IPA width.\n\nCall ArmCcaInitialiseHobs() from PlatformPeim() so later\nArmCcaLib users can use the cached CCA values instead of\nquerying RSI directly.\n\nSigned-off-by: Sami Mujawar \u003csami.mujawar@arm.com\u003e\n" }, { "commit": "9fe9bb4cce4baa8d662f6b729ffc6173cfc641b2", "tree": "31101d3c6593a7426be4c8db6ec4325dc84d39ce", "parents": [ "0c4442819df0e0421c586186f4a1b88767203907" ], "author": { "name": "Sami Mujawar", "email": "sami.mujawar@arm.com", "time": "Fri Oct 16 11:33:13 2026 +0100" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 22:07:05 2026 +0000" }, "message": "ArmVirtPkg: Disable early PL011 serial output in CCA Realms\n\nEarlyFdtPL011SerialPortLib writes to the PL011 UART before the device\nMMIO range has been configured for Realm access. In an Arm CCA Realm,\nthat early access can fault because the UART is host-provided MMIO and\nmust be mapped through the unprotected IPA space first.\n\nSkip early PL011 serial access when running in a Realm. Later serial\noutput can resume once the platform has configured the UART MMIO mapping\nfor Realm access.\n\nSigned-off-by: Sami Mujawar \u003csami.mujawar@arm.com\u003e\n" }, { "commit": "0c4442819df0e0421c586186f4a1b88767203907", "tree": "f3846230ac139cac3c1d78a3c411ca7d6c9a088d", "parents": [ "15afeecc4d61bfcc4b4fa8650a2e6848f91a07d7" ], "author": { "name": "Sami Mujawar", "email": "sami.mujawar@arm.com", "time": "Thu Oct 15 20:39:18 2026 +0100" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 22:07:05 2026 +0000" }, "message": "ArmVirtPkg: Disable early PL011 debug output in CCA Realms\n\nDebugLibFdtPL011UartFlash writes to the PL011 UART before the device MMIO\nrange has been configured for Realm access. In an Arm CCA Realm, that\nearly MMIO access can fault because the UART is host-provided MMIO and\nmust be mapped through the unprotected IPA space first.\n\nSkip early PL011 debug writes when running in a Realm. Later serial\nlogging can resume once the platform has configured the UART MMIO mapping\nfor Realm access.\n\nSigned-off-by: Sami Mujawar \u003csami.mujawar@arm.com\u003e\n" }, { "commit": "15afeecc4d61bfcc4b4fa8650a2e6848f91a07d7", "tree": "09e865793787e72a7e92bd9e08a75077d5b36b2a", "parents": [ "3620d617c16f2bf8ada8d46b71a48d1be684b588" ], "author": { "name": "Sami Mujawar", "email": "sami.mujawar@arm.com", "time": "Thu May 04 12:37:03 2023 +0100" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 22:07:05 2026 +0000" }, "message": "ArmVirtPkg: Add Arm CCA library mappings\n\nAdd the Arm CCA library mappings required by ArmVirtPkg.\n\nUse ArmCcaLib and ArmCcaRsiLib for common code, and use the early\nArmCcaLib instance in SEC and PEI phases where the HOB list may not yet\nbe available. Also select the real ArmCcaInitPeiLib instance so CCA\ninitialization can create the cached Realm state and IPA width HOBs.\n\nRemove the duplicate Arm CCA mappings from ArmVirtKvmTool.dsc now that\nthey are provided by ArmVirt.dsc.inc.\n\nSigned-off-by: Sami Mujawar \u003csami.mujawar@arm.com\u003e\n" }, { "commit": "3620d617c16f2bf8ada8d46b71a48d1be684b588", "tree": "f837beacec610f1b30ab06bfb8317c74ca4cca11", "parents": [ "d28b48d44783321eff3256463aa13f85d3ec2c9b" ], "author": { "name": "Sami Mujawar", "email": "sami.mujawar@arm.com", "time": "Fri Oct 16 11:35:29 2026 +0100" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 22:07:05 2026 +0000" }, "message": "MdeModulePkg: Add an early ArmCcaLib instance\n\nThe existing ArmCcaLib instance uses GUID HOBs to read the cached\nIsRealm status and Realm IPA width. This does not work during early SEC\nexecution, where GetHobList() can fail because the HOB list has not yet\nbeen set up.\n\nSplit the direct RSI query helpers into common code and add an early\nArmCcaLib instance for SEC and PEI users. The early instance implements\nArmCcaIsRealm() and ArmCcaGetIpaWidth() by querying RSI directly,\nwithout relying on cached HOB data.\n\nKeep the existing ArmCcaLib instance for DXE and later phases, where the\ncached HOB values can be used. Also make ArmCcaMemRangeIsProtectedMmio()\nreturn RETURN_UNSUPPORTED when called outside a Realm.\n\nSigned-off-by: Sami Mujawar \u003csami.mujawar@arm.com\u003e\n" }, { "commit": "d28b48d44783321eff3256463aa13f85d3ec2c9b", "tree": "28efb7fe5205609a86dd1fdd9628d6ee2bd0313c", "parents": [ "4d5eddf35be4f9e558f47e9515ef474595753c0a" ], "author": { "name": "Sami Mujawar", "email": "sami.mujawar@arm.com", "time": "Mon Sep 21 11:55:46 2026 +0100" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 22:07:05 2026 +0000" }, "message": "ArmPlatformPkg/Sec: Preserve TransferList address in TPIDRRO_EL0\n\nThe TransferList base address is passed in x3 when the handoff register\nassignment matches the Transfer List specification. SEC currently keeps\nthat value in x10 until it calls CEntryPoint, but x10 is caller-saved and\ncan be clobbered by ArmPlatformPeiBootAction.\n\nStore the TransferList base address in TPIDRRO_EL0 before calling the\nplatform early boot hook, and read it back when passing the value to\nCEntryPoint. Clear TPIDRRO_EL0 by default so platforms without a valid\nTransferList handoff pass NULL.\n\nSigned-off-by: Sami Mujawar \u003csami.mujawar@arm.com\u003e\n" }, { "commit": "4d5eddf35be4f9e558f47e9515ef474595753c0a", "tree": "9b93dc181b22b9d67d4bd6a0f9408ce241e81eb6", "parents": [ "6f97b7951ee7a456b90a2927970b56065fd1e6c9" ], "author": { "name": "Sami Mujawar", "email": "sami.mujawar@arm.com", "time": "Tue Sep 15 23:05:46 2026 +0100" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 21:00:25 2026 +0000" }, "message": "OvmfPkg/VirtNorFlashDxe: Unload when no flash is found\n\nQEMU does not expose a flash device when spawning an Arm confidential VM,\nbecause read-only mappings are not available in that configuration.\n\nMake FdtNorFlashQemuLib return EFI_NOT_FOUND when it discovers no usable\nNOR flash devices. Treat that status as a non-fatal absence of hardware in\nVirtNorFlashDxe and return EFI_REQUEST_UNLOAD_IMAGE so the driver unloads\ncleanly instead of remaining loaded without publishing flash instances.\n\nDocument VirtNorFlashPlatformGetDevices() while updating its error\ncontract.\n\nSigned-off-by: Sami Mujawar \u003csami.mujawar@arm.com\u003e\n" }, { "commit": "6f97b7951ee7a456b90a2927970b56065fd1e6c9", "tree": "615f905cd542f4a9f933d00e0b5971a4f7ef50ec", "parents": [ "4182484f5da296da905c7f5a8cf30ce20e6da0d6" ], "author": { "name": "Jean-Philippe Brucker", "email": "jean-philippe@linaro.org", "time": "Wed Oct 04 15:10:07 2023 +0100" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 21:00:25 2026 +0000" }, "message": "ArmVirtPkg/ArmVirtQemu: Dispatch variable store emulation when necessary\n\nAdd QemuPlatformDxe to perform QEMU-specific platform initialization.\n\nThe driver checks the FDT for a cfi-flash node. If no flash device is\npresent, enable emulated variable storage and install\ngEdkiiNvVarStoreFormattedGuid so the variable driver can be dispatched.\n\nIf a CFI flash device is present in an Arm CCA Realm, treat that as an\ninvalid configuration because host-provided flash is outside the Realm\ntrust boundary.\n\nSigned-off-by: Jean-Philippe Brucker \u003cjean-philippe@linaro.org\u003e\n" }, { "commit": "4182484f5da296da905c7f5a8cf30ce20e6da0d6", "tree": "c2fd956563f03ffccf9d853f247fc9df3080f84e", "parents": [ "58206682fe3212b80f662f6a62c375cce85d595e" ], "author": { "name": "Jean-Philippe Brucker", "email": "jean-philippe@linaro.org", "time": "Wed Oct 04 14:21:36 2023 +0100" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 21:00:25 2026 +0000" }, "message": "ArmVirtPkg, OvmfPkg, UefiPayloadPkg: Configure emu variable mode PCD\n\nQEMU does not include a flash device when spawning a confidential VM on\nArm, because it cannot do read-only mappings. To support VMs without NOR\nflash, falling back to the emulated variable store would be necessary.\n\nPrepare QEMU platforms to select emulated runtime variable storage when NOR\nflash is unavailable by adding explicit dynamic defaults for\nPcdEmuVariableNvModeEnable.\n\nMove UefiPayloadPkg\u0027s VARIABLE_SUPPORT-dependent setting from the fixed PCD\nsection to the dynamic PCD section, matching the PCD declaration and allowing\nthe variable driver to consume the selected mode correctly.\n\nContinuous-integration-options: PatchCheck.ignore-multi-package\nSigned-off-by: Jean-Philippe Brucker \u003cjean-philippe@linaro.org\u003e\n" }, { "commit": "58206682fe3212b80f662f6a62c375cce85d595e", "tree": "7539eaf67f80239ce9af8b63fff1ad0fd1f7dd57", "parents": [ "4bfe98b3af83f3d85148082cf33883c37deefde3" ], "author": { "name": "Leif Lindholm", "email": "leif.lindholm@oss.qualcomm.com", "time": "Fri Oct 16 23:23:02 2026 +0100" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 16:33:49 2026 +0000" }, "message": "BaseTools/GenFv: handle NetBSD/OpenBSD libuuid include path\n\nNetBSD/OpenBSD use same installation path for libuuid header as FreeBSD,\nso add || conditions for that.\n\nSigned-off-by: Leif Lindholm \u003cleif.lindholm@oss.qualcomm.com\u003e\n" }, { "commit": "4bfe98b3af83f3d85148082cf33883c37deefde3", "tree": "1b2546f94c989c841cbea997d4ca27a38f59bf00", "parents": [ "d8e0a196a64818084046860cbdcbd9b95a77ee57" ], "author": { "name": "Leif Lindholm", "email": "leif.lindholm@oss.qualcomm.com", "time": "Fri Oct 16 23:18:03 2026 +0100" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 16:33:49 2026 +0000" }, "message": "BaseTools/CommonLib: drop unused \"strlwr\" function\n\nCompilation of strlwr fails on NetBSD 11/GCC 12.5 build error with\nerror: array subscript has type \u0027char\u0027 [-Werror\u003dchar-subscripts]\ndue to use of undefined char signedness.\n\nThere are however no remaining callers in BaseTools, and I think\nthe last user may have been deleted in 2008 with 808def96aa45.\nSo drop the function.\n\nSigned-off-by: Leif Lindholm \u003cleif.lindholm@oss.qualcomm.com\u003e\n" }, { "commit": "d8e0a196a64818084046860cbdcbd9b95a77ee57", "tree": "9a3f309ebfc6a76cc08a98044405704fb02aefd6", "parents": [ "03dac0f49546268c0bbb3a4d60cec9ce70b1579c" ], "author": { "name": "Khalid Ali", "email": "khaliidcaliy@gmail.com", "time": "Thu Oct 29 10:22:12 2026 +0000" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 12:30:49 2026 +0000" }, "message": "OvmfPkg/CloudHv: Add AmdSysCallLib to fix build failure\n\nThe PiSmmCpuDxeSmm depends on AmdSysCallLib but not included which makes\nbuild to fail. Add the library instance to the library class of\nPiSmmCpuDxeSmm.\n\nSigned-off-by: Khalid Ali \u003ckhaliidcaliy@gmail.com\u003e\n" }, { "commit": "03dac0f49546268c0bbb3a4d60cec9ce70b1579c", "tree": "e874820971722addd593817a6751d9020491885f", "parents": [ "6b7ef05adbdea9e8b3868a09b78e42b83fb0efa1" ], "author": { "name": "Khalid Ali", "email": "khaliidcaliy@gmail.com", "time": "Thu Oct 29 10:09:23 2026 +0000" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 12:30:49 2026 +0000" }, "message": "OvmfPkg/CloudHv: Add MmSaveStateLib to fix build failure\n\nThe PiSmmCpuDxeSmm driver depends on MmSaveStateLib library, however it\nis not included which makes build to fail. Add the library class to it\u0027s\ndependency.\n\nSigned-off-by: Khalid Ali \u003ckhaliidcaliy@gmail.com\u003e\n" }, { "commit": "6b7ef05adbdea9e8b3868a09b78e42b83fb0efa1", "tree": "c8ef779d88f77debf483d855ff7db83f452472a0", "parents": [ "de8dc9853cc5f70e48e87a8829cea7702e7d3715" ], "author": { "name": "Khalid Ali", "email": "khaliidcaliy@gmail.com", "time": "Thu Oct 29 09:59:57 2026 +0000" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 12:30:49 2026 +0000" }, "message": "OvmfPkg/CloudHv: Add QemuFwCfgS3Lib to fix build failure\n\nWhen SMM is enabled SmmControl2Dxe depends on QemuFwCfgS3Lib. However\nthe library is missing in the DSC file for DXE_RUNTIME_DRIVER. This\nchange adds the library for DXE_RUNTIME_DRIVER which is the module type\nof SmmControl2Dxe.\n\nSigned-off-by: Khalid Ali \u003ckhaliidcaliy@gmail.com\u003e\n" }, { "commit": "de8dc9853cc5f70e48e87a8829cea7702e7d3715", "tree": "bf481699f3efac0e1f05fc0acc2c166f4475ad5d", "parents": [ "58ad5f876c99fd268d01a673efb8f1106d9458b9" ], "author": { "name": "Gerd Hoffmann", "email": "kraxel@redhat.com", "time": "Tue Sep 01 12:59:13 2026 +0200" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 11:57:34 2026 +0000" }, "message": "OvmfPkg/QemuKernelLoaderFsDxe: do not error out on GetTime failures\n\nDowngrade GetTime failures from \u0027ERROR\u0027 to \u0027WARN\u0027. Do not return early.\nThis prevents DoS attacks by the host (by manipulating the rtc) and\nalso improves robustness in general.\n\nSigned-off-by: Gerd Hoffmann \u003ckraxel@redhat.com\u003e\n" }, { "commit": "58ad5f876c99fd268d01a673efb8f1106d9458b9", "tree": "3df7003f364d97a9f9ef60ee27cb8a83440e427d", "parents": [ "6e82232f15acaa76529329caae30cbfd769e6deb" ], "author": { "name": "Pierre Gondois", "email": "pierre.gondois@arm.com", "time": "Wed Aug 12 16:53:51 2026 +0200" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 11:12:38 2026 +0000" }, "message": "EmbeddedPkg/MmcDxe: Fix MmcIoBlocks() when MultiBlock() is not supported\n\nBlockCount is used as both:\n- maximum number of blocks possible to access\n- number of blocks accessed in the current loop iteration\nIf MultiBlock() is not supported, accessing more than 1 block\ncan lead to BlockCount\u003d0 and an infinite loop.\n\nRationalize the variables as:\n- MaxBlock: maximum number of blocks to access\n- BlockCount: number of blocks accessed in the current loop iteration\n\nSigned-off-by: Pierre Gondois \u003cpierre.gondois@arm.com\u003e\n" }, { "commit": "6e82232f15acaa76529329caae30cbfd769e6deb", "tree": "842ba7d1ab3a2c3420f12c3e31ecc08aadb828a0", "parents": [ "fb0f2f86fea4bfc9e3a8784e3c1ceb9eeefc174f" ], "author": { "name": "K Kavya Sravanthi", "email": "k.kavyax.sravanthi@intel.com", "time": "Fri Oct 23 11:47:20 2026 +0530" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 10:15:11 2026 +0000" }, "message": "ShellPkg/UefiShellDebug1CommandsLib: Add MIPI I3C subclass entry\n\n\u0027pci\u0027 shell command prints \"UNDEFINED\" for I3C Controller as there is\nno entry for subclass 0xA (MIPI I3C Host Controller Interface) in\nPCI class-name table.\n\nReference:\n1. MIPI I3C Host Controller Interface Specification -\n https://www.mipi.org/specifications/i3c-hci\n2. PCI Code and ID Assignment Specification Revision 1.19\n\nSigned-off-by: K Kavya Sravanthi \u003ck.kavyax.sravanthi@intel.com\u003e\n" }, { "commit": "fb0f2f86fea4bfc9e3a8784e3c1ceb9eeefc174f", "tree": "9026f276cb253913c5309e509b3da25c561a71b8", "parents": [ "e32965dfc13dfba04f69824c8c92412d94878b42" ], "author": { "name": "Ilya Somkin", "email": "onto1024b@gmail.com", "time": "Mon Oct 19 18:45:34 2026 +0300" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 09:14:34 2026 +0000" }, "message": "DynamicTablesPkg/AcpiPcctLib: Fix AddressLength range check\n\n`AddressLength` is a `UINT64` and `MAX_UINT32` is defined as\n`((UINT32)0xFFFFFFFF)`, so `~MAX_UINT32` is a 32-bit zero and\n`(AddressLength \u0026 ~MAX_UINT32) \u003d\u003d 0` is always `TRUE`.\nCompare `AddressLength` directly against `MAX_UINT32` to ensure that any\nlength truncation caused by the `UINT32` cast to the extended PCC\nsubspace Address Length field is properly detected.\n\nSigned-off-by: Ilya Somkin \u003conto1024b@gmail.com\u003e\n" }, { "commit": "e32965dfc13dfba04f69824c8c92412d94878b42", "tree": "2744eb9c362cc11ad968ca79cdd030ebb0ded960", "parents": [ "fde052fbd89c35617e14f628ca96e2d9ceff6c6f" ], "author": { "name": "Ilya Somkin", "email": "onto1024b@gmail.com", "time": "Mon Oct 19 18:45:34 2026 +0300" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 09:14:34 2026 +0000" }, "message": "DynamicTablesPkg/AcpiSsdtPcieLib: Fix 32-bit memory window checks\n\n`MAX_UINT32` is defined as `((UINT32)0xFFFFFFFF)`, so `~MAX_UINT32`\nevaluates to a 32-bit zero. The condition `(Value \u0026 ~MAX_UINT32) \u003d\u003d 0`\nevaluates to `TRUE` for any `UINT64` Value. As a result, the range\nchecks for the `PCI_SS_M32` and `PCI_SS_M32_UC` windows are never\ntriggered and out-of-range values are silently truncated by the `UINT32`\ncasts passed to `AmlCodeGenRdDWordMemory ()`.\n\nAlso when a 32-bit memory window is mapped to a CPU address above 4GB,\nits translation offset does not fit the DWord memory descriptor: the\ngenerated `_TRA` loses the upper 32 bits and the OS accesses the window\nat a wrong address. The same applies to a CPU address below the PCI\naddress.\n\nLikewise, a 32-bit window covering the whole 4GB has a range length\nof 0x100000000, which the DWord descriptor truncates to zero.\n\nReturn `EFI_INVALID_PARAMETER` if the PCI address range of a 32-bit\nwindow is empty or does not lie below 4GB. When the range length or the\ntranslation offset does not fit 32 bits, fall through to the\n`PCI_SS_M64` or `PCI_SS_M64_UC`, which uses the QWord memory descriptor.\n\nSigned-off-by: Ilya Somkin \u003conto1024b@gmail.com\u003e\n" }, { "commit": "fde052fbd89c35617e14f628ca96e2d9ceff6c6f", "tree": "6aa461900580e1a9577fb944a30ca60644cbd634", "parents": [ "3b54a25765919289f1bc38261b6b2bddb7b20a21" ], "author": { "name": "abuthahirm", "email": "abuthahirm@ami.com", "time": "Wed Aug 26 21:31:05 2026 +0530" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 06:21:14 2026 +0000" }, "message": "NetworkPkg/ArpDxe: Fix Coverity null-deref and integer overflow\n\nTwo Coverity-reported defects in ArpImpl.c:\n\n1. ArpSendFrame: When AllocatePool returns NULL, the existing code logs\n an error and asserts, but then falls through and dereferences the NULL\n Packet pointer into TmpPtr. In release builds where ASSERT is a no-op\n this causes a null-dereference. Add \u0027goto CLEAN_EXIT\u0027 to exit cleanly.\n\n2. ArpFindCacheEntry: AllocatePool is called with \u0027FoundCount *\n FoundEntryLength\u0027 where both operands are UINT32, so the\n multiplication is done in 32 bits and can overflow before the result\n is widened to UINTN. The root cause is that the UINTN value returned\n by NetMapGetCount() is silently truncated to UINT32 when stored in\n FoundCount.\n\n Declare FoundCount as UINTN and drop the truncating cast on the\n NetMapGetCount() return value, so the multiplication is performed at\n pointer width. Since the EntryCount output parameter is a UINT32,\n return EFI_OUT_OF_RESOURCES if FoundCount does not fit in 32 bits\n instead of silently truncating it, and make the narrowing assignment\n to *EntryCount explicit.\n\nCc: Saloni Kasbekar \u003csaloni.kasbekar@intel.com\u003e\nCc: Zachary Clark-williams \u003czachary.clark-williams@intel.com\u003e\nCc: Mike Beaton \u003cmjsbeaton@gmail.com\u003e\nSigned-off-by: Abuthahir M \u003cabuthahirm@ami.com\u003e\n" }, { "commit": "3b54a25765919289f1bc38261b6b2bddb7b20a21", "tree": "994e10a6333240f23087fb8a3f7e3f516b2fb6a2", "parents": [ "850eac1d1932b7e64bc7ba6122df7c9dabf44e81" ], "author": { "name": "Kun Qin", "email": "kuqin@microsoft.com", "time": "Wed Feb 16 20:10:34 2022 +0000" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Thu Oct 29 03:36:10 2026 +0000" }, "message": "MdeModulePkg: PiSmmCore: Decouple MM core mailbox data\n\nCurrent `gSmmCorePrivate` data used in PiSmmCore is a shared data\nstructure initialized and used by PiSmmIpl. Thus the content is exposed\nto normal DXE environment.\n\nSpecifically, `SmmDispatcher` actively uses `gSmmCorePrivate` to\ndetermine dispatch behavior. As a result, the potential attack surface is\nexposed from SMM initialization through the SMM Ready-to-Lock event.\n\nThis change decouple Core private data from and IPL mailbox at the\nentrypoint of each MMI handle routine. It is a preventative fix to\neliminate hot access to gSmmCorePrivate within the SMM core.\n\nSigned-off-by: Kun Qin \u003ckun.qin@microsoft.com\u003e\n" }, { "commit": "850eac1d1932b7e64bc7ba6122df7c9dabf44e81", "tree": "fd08df15814c14bc009ba57e640f6d319ad07d04", "parents": [ "e3c74a5cb68c156cd434916baaa202f7277fe06b" ], "author": { "name": "Baraneedharan Anbazhagan", "email": "anbazhagan@hp.com", "time": "Wed Oct 21 13:54:15 2026 -0500" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Wed Oct 28 23:12:13 2026 +0000" }, "message": "MdeModulePkg: Use OpenProtocol for protocol lookup\n\nReplace HandleProtocol with OpenProtocol using\nEFI_OPEN_PROTOCOL_GET_PROTOCOL in SmmCorePerformanceLib.\n\nSigned-off-by: Anbazhagan Baraneedharan \u003canbazhagan@hp.com\u003e\n" }, { "commit": "e3c74a5cb68c156cd434916baaa202f7277fe06b", "tree": "dac3321da41462916402013c068a60c4aeffedde", "parents": [ "7af9d049380a791f843458d0c85157e3f0d9f4f6" ], "author": { "name": "Baraneedharan Anbazhagan", "email": "anbazhagan@hp.com", "time": "Tue Oct 20 17:00:55 2026 -0500" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Wed Oct 28 23:12:13 2026 +0000" }, "message": "MdeModulePkg: Fix SMM performance UI-name lookup\n\nSMM images without embedded PDB paths trigger a UI-name fallback\nthat incorrectly treats PiSmmCore\u0027s private-context pointer as a\nDXE image handle, causing an assertion or invalid memory access.\n\nRead the UI section from the target image\u0027s firmware-volume\nDeviceHandle instead.\n\nSigned-off-by: Anbazhagan Baraneedharan \u003canbazhagan@hp.com\u003e\n" }, { "commit": "7af9d049380a791f843458d0c85157e3f0d9f4f6", "tree": "cdf2a1f624d5bd6a05b6df32c40b8247fff9c1f0", "parents": [ "30acc60ed311d9b81dc0d8979a477faafabfda2d" ], "author": { "name": "Gaggery Tsai", "email": "gaggery.tsai@intel.com", "time": "Wed Oct 14 18:43:32 2026 -0700" }, "committer": { "name": "Nate DeSimone", "email": "nathaniel.l.desimone@intel.com", "time": "Wed Oct 28 10:56:36 2026 -0700" }, "message": "IntelFsp2WrapperPkg: Measure the original FSP ImageBase\n\nAn FSP wrapper that loads an FSP component to memory writes the load\naddress into FSP_INFO_HEADER.ImageBase. When that address depends on\nthe boot, for example when the PEI memory layout changes after the\nMemoryTypeInformation variable is updated, the FSP digest and PCR0\nchange from boot to boot although the FSP binary is the same.\n\nAdd FSP_IMAGE_BASE_HOB. With BIT30 and BIT31 set, FspsWrapperPeim and\nFspiWrapperPeim save ImageBase before writing the load address.\nName BIT30 FSP_MEASURE_ORIGINAL_IMAGEBASE. When the measured FSP\nhas ImageBase equal to its base address, BaseFspMeasurementLib\nhashes the saved value in place of the four ImageBase bytes.\nIf all other measured bytes are unchanged, this reproduces the\noriginal FSP code digest with the existing UPD exclusion.\nWithout a matching HOB, with conflicting HOBs, or with any other\nImageBase value, the library measures ImageBase as found in memory.\nThe default behavior, UPD measurement and event payloads are\nunchanged.\n\nA field left at the saved original value produces the same digest\nas substitution. This does not validate the runtime ImageBase.\nOnly ImageBase is restored; changes made by RebaseFspFv are not\nundone and can still make the digest depend on the load address.\n\nSigned-off-by: Gaggery Tsai \u003cgaggery.tsai@intel.com\u003e\n" }, { "commit": "30acc60ed311d9b81dc0d8979a477faafabfda2d", "tree": "c46de137e5198bdb3d975258fc2833c3bafe613c", "parents": [ "6351ea3d16f465127b6449b07f1f3ce88295270a" ], "author": { "name": "Michael D Kinney", "email": "michael.d.kinney@intel.com", "time": "Mon Oct 26 17:08:52 2026 -0700" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Wed Oct 28 15:59:17 2026 +0000" }, "message": "MdeModulePkg/Core/Pei: Test AllocatePages memory reuse\n\nAdd a PEI Core host-test target and register it in\nMdeModulePkgHostTest.dsc. Cover Temporary Memory reuse after\nPeiFreePages(), search suppression without free events, active-range\npriority during a pending stack switch, and Permanent Memory top-down\nordering.\n\nTest early best-fit selection, padding-HOB reuse, and aligned 4 KiB,\n16 KiB, and 64 KiB allocation. Cover invalid memory types and unrestricted\nfallback for out-of-PHIT and adjacent coalesced HOBs. Verify final-fallback\nbest-fit and HOB-list tie order. Skip padding-HOB integration when runtime\ngranularity is no larger than default.\n\nSigned-off-by: Michael D Kinney \u003cmichael.d.kinney@intel.com\u003e\n" }, { "commit": "6351ea3d16f465127b6449b07f1f3ce88295270a", "tree": "bf6e54459829af51c16b589d174b5c59511ecaaa", "parents": [ "931973afa488b9bc3debee3aa9390e184a460870" ], "author": { "name": "Michael D Kinney", "email": "michael.d.kinney@intel.com", "time": "Wed Sep 30 17:40:25 2026 -0700" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Wed Oct 28 15:59:17 2026 +0000" }, "message": "MdeModulePkg/Core/Pei: Gate early page reuse on free events\n\nTrack TemporaryMemoryPagesFreed in PEI_CORE_INSTANCE. Set it after a\nsuccessful PeiFreePages() call while PEI uses Temporary Memory or creation\nof an alignment-padding HOB, and leave it set after ranges are reused.\n\nWhen PEI uses Temporary Memory and PeiMemoryInstalled and\nSwitchStackSignal are FALSE, search conventional-memory allocation HOBs\nbefore consuming the active top-down range. Select the smallest suitable\nHOB, preserve HOB-list order for ties, and merge adjacent free HOBs on\ndemand when no candidate fits. Share the best-fit helper with the final\nunrestricted fallback.\n\nWhile the stack switch to Permanent Memory is pending, suppress the early\nsearch and use the active physical-memory range first. Preserve Permanent\nMemory top-down/bin-first priority and the existing unrestricted fallback.\n\nSigned-off-by: Michael D Kinney \u003cmichael.d.kinney@intel.com\u003e\n" }, { "commit": "931973afa488b9bc3debee3aa9390e184a460870", "tree": "6e867d3aced548625623b6be93e9d70274eac5f7", "parents": [ "96b044d6b5bbe466e0fc1f320973e077568fa9d9" ], "author": { "name": "Ilya Somkin", "email": "onto1024b@gmail.com", "time": "Tue Oct 27 15:26:51 2026 +0300" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Wed Oct 28 12:27:40 2026 +0000" }, "message": "DynamicTablesPkg/AcpiSpcrLib: Use a fully qualified NameSpaceString\n\nThe `SPCR` specification describes `NamespaceString[]` as \"a fully\nqualified reference to the object that represents this device in the\nACPI namespace\". The generator sets it to `COM1`, the name of the\ndevice in the `SSDT` built along with the `SPCR` table, which is not a\nfully qualified path, so set it to `\\_SB_.COM1`.\n\nSigned-off-by: Ilya Somkin \u003conto1024b@gmail.com\u003e\n" }, { "commit": "96b044d6b5bbe466e0fc1f320973e077568fa9d9", "tree": "6f82afa6bf8355ef2fbd61bc2270348c78d6ec4a", "parents": [ "541e5611d624fc65d7c61936e97032410db8d431" ], "author": { "name": "Barath M", "email": "barathm@ami.com", "time": "Fri Oct 23 17:23:44 2026 +0530" }, "committer": { "name": "pierregondois", "email": "41638958+pierregondois@users.noreply.github.com", "time": "Wed Oct 28 11:40:08 2026 +0100" }, "message": "ShellPkg: Add missing smbios type 38 field messages\n\nREF: https://github.com/tianocore/edk2/issues/13174\n\nSigned-off-by: Barath \u003cbarathm@ami.com\u003e\n" }, { "commit": "541e5611d624fc65d7c61936e97032410db8d431", "tree": "1382e896c36053363623bcf8601a18cb0bcde8aa", "parents": [ "07b0a29928373eed213ba5965eae0be2a09b0a74" ], "author": { "name": "Nate DeSimone", "email": "nathaniel.l.desimone@intel.com", "time": "Tue Oct 27 10:41:44 2026 -0700" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Wed Oct 28 09:57:15 2026 +0000" }, "message": "BaseTools/set_vsprefix_envs.bat: Fix VS2019/VS2022 falling into VS2026\n\nAdding VS2026 support left the :SetWinDDK label and code block between\n:SetVS2022 and :SetVS2026. The \"goto SetWinDDK\" taken after VS2019 or VS2022\nsetup then fell through into :SetVS2026, so VS2026 was also initialized and its\nenvironment variables (VCINSTALLDIR, PATH) overrode the requested version.\n\nThe fix is to remove the intermediate :SetWinDDK block, so the goto\nstatements land on the single remaining copy of the :SetWinDDK block at the\nend of the file.\n\nSigned-off-by: Nate DeSimone \u003cnathaniel.l.desimone@intel.com\u003e\n" }, { "commit": "07b0a29928373eed213ba5965eae0be2a09b0a74", "tree": "c307220bef172805cea00b85fe21d2eb9c10c3f9", "parents": [ "490feed6d804e25c16eee5d1f1145b8e92edcfdf" ], "author": { "name": "Qihang Gao", "email": "gaoqihang@loongson.cn", "time": "Thu Oct 22 20:18:02 2026 +0800" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Wed Oct 28 02:03:31 2026 +0000" }, "message": "OvmfPkg/LoongArchVirt: Enable stack check function for Loongarch64\n\nStack protector for Loongarch64 has been supported since https://github.com/tianocore/edk2/pull/12677.\nThis patch enables stack check function by setting build option\nCUSTOM_STACK_CHECK_LIB to DYNAMIC in LoongArchVirtQemu.dsc.\n\nSigned-off-by: Qihang Gao \u003cgaoqihang@loongson.cn\u003e\nCc: Chao Li \u003clichao@loongson.cn\u003e\nCc: Dongyan Qian \u003cqiandongyan@loongson.cn\u003e\n" }, { "commit": "490feed6d804e25c16eee5d1f1145b8e92edcfdf", "tree": "d93272db5f4f0410295fe936afd21305256eba1b", "parents": [ "f884ecc80e7b601821874b197c0979b8999d7411" ], "author": { "name": "Patrick Rudolph", "email": "patrick.rudolph@9elements.com", "time": "Tue Sep 29 07:09:20 2026 +0200" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Tue Oct 27 21:35:34 2026 +0000" }, "message": "UefiPayloadPkg: Disable PcdFirstTimeWakeUpAPsBySipi\n\nThe bootloader might have used the \u0027hlt\u0027 instruction to stop the APs,\nbefore jumping to UefiPayload, where after they don\u0027t respond to\nSIPI any more.\n\nWith PcdFirstTimeWakeUpAPsBySipi defaulting to TRUE, the first WakeUpAP\ncall will not see any APs and only init memory for the BSP, while\nsubsequent WakeUpAP will use the INIT-SIPI-SIPI sequence where the APs are\nin an undefined state, causing undefined system behaviour.\n\nDisable PcdFirstTimeWakeUpAPsBySipi to use INIT-SIPI-SIPI sequence to\nwakeup APs.\n\nTEST\u003dCan boot UefiPayload with coreboot as bootloader, without seeing\n random crashes.\n\nSigned-off-by: Patrick Rudolph \u003cpatrick.rudolph@9elements.com\u003e\n" }, { "commit": "f884ecc80e7b601821874b197c0979b8999d7411", "tree": "b36943f488d1dbaeacc0ddf4e274960296259b47", "parents": [ "447c415c2678a2bab107d5d529b879e3d7713830" ], "author": { "name": "Nate DeSimone", "email": "nathaniel.l.desimone@intel.com", "time": "Fri Oct 23 15:06:33 2026 -0700" }, "committer": { "name": "Nate DeSimone", "email": "nathaniel.l.desimone@intel.com", "time": "Tue Oct 27 14:09:48 2026 -0700" }, "message": "BaseTools/GenFw: Remove unused mPhdrBase variable\n\nClang 23 detects that mPhdrBase is unused via the\n-Wunused-but-set-global warning, which breaks the BaseTools\nbuild.\n\nSigned-off-by: Nate DeSimone \u003cnathaniel.l.desimone@intel.com\u003e\n" }, { "commit": "447c415c2678a2bab107d5d529b879e3d7713830", "tree": "12c706cfdd520c0b326369b365422b6e5005bbb5", "parents": [ "c6ee316435166b74d98b6a72edf916dc2f7f327a" ], "author": { "name": "Ard Biesheuvel", "email": "ardb@kernel.org", "time": "Thu Sep 24 17:32:00 2026 +0200" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Tue Oct 27 11:59:48 2026 +0000" }, "message": "MdeModulePkg/PciBusDxe: Honour fixed bus numbers of EA bridges\n\nThe Enhanced Allocation capability of a PCI-PCI bridge carries an\nadditional DWORD describing the fixed secondary and subordinate bus\nnumbers used by the bridge, if it does not rely on its bus number\nregisters. Such a bridge only forwards configuration transactions for\nits fixed bus numbers, and so they must be assigned to it during bus\nenumeration.\n\nRecord the fixed bus numbers when parsing the EA capability, and assign\nthem in PciScanBus () instead of allocating the next available bus\nnumber. The buses below the bridge are numbered from its fixed secondary\nbus number onwards, and the entire fixed range is consumed, regardless\nof how many buses are actually in use below the bridge. Hot plug bus\npadding does not apply to such bridges.\n\nAs bus numbers are assigned in ascending order, the fixed bus numbers\ncannot be honoured if they have already been assigned to another\nbridge, if they are not covered by a single bus number range of the root\nbridge, or if they are not nested inside the fixed bus numbers of an\nupstream bridge. In this case, do not scan behind the bridge, and set\nits primary bus number to an invalid value, so that the device info\ncollector pass does not scan behind it either: its bus number registers\nare likely hardwired, and so the hierarchy behind it may remain visible\non buses that are assigned to other bridges.\n\nReport an error if buses below a bridge with fixed bus numbers end up\noutside of its fixed range, as those will be unreachable.\n\nSigned-off-by: Ard Biesheuvel \u003cardb@kernel.org\u003e\n" }, { "commit": "c6ee316435166b74d98b6a72edf916dc2f7f327a", "tree": "8b4fb427ca243a41c63a9f4a48646c9e31b87c46", "parents": [ "f531283dee7df7e6a53f17704be217fb5f7096ce" ], "author": { "name": "Ard Biesheuvel", "email": "ardb@kernel.org", "time": "Thu Sep 24 16:41:01 2026 +0200" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Tue Oct 27 11:59:48 2026 +0000" }, "message": "MdeModulePkg/PciBusDxe: Support EA fixed bridge windows\n\nA PCI-PCI bridge that implements the Enhanced Allocation (EA) capability\nmay use entries with BEI 6 to describe fixed I/O, memory and prefetchable\nmemory ranges that it forwards to its secondary side, regardless of the\ncontents of its Base/Limit registers.\n\nSo record such windows when parsing the EA capability of a bridge, and\ntreat the corresponding decodes as supported so that resources are not\ndegraded to a different type on account of the Base/Limit registers not\nbeing implemented.\n\nWhen calculating the aperture of such a bridge window, pin it to the fixed\nrange. Fixed resources below the bridge must reside inside that range, and\nare dropped otherwise. Relocatable resources are placed inside the range at\nthe offsets calculated for them, provided that the window does not hold any\nfixed resources, and is large enough, suitably aligned and, if it resides\nabove 4 GB, only covers resources that may be placed above 4 GB. Otherwise,\nthey are dropped.\n\nPinned EA windows are not programmed into the Base/Limit registers, and\npropagate upwards as fixed resources, like any other pinned bridge window.\n\nThe on-chip bridges of some SoCs (e.g., Cavium/Marvell ThunderX family)\nimplement the EA capability only to describe their fixed bus numbers, and\ncarry no BEI 6 entries at all. The fixed BARs below such bridges are 64-bit\nnon-prefetchable ranges above 4 GB, and those below different bridges are\ninterleaved, as each device has BARs in multiple distinct regions. Covering\nthem with pinned windows does not work: the 32-bit non-prefetchable window\ncannot describe them, and the pinned windows of sibling bridges overlap.\nEvidently, such bridges forward the fixed ranges below them regardless of\ntheir Base/Limit registers.\n\nSo assume that a bridge that implements the EA capability but has no BEI 6\nentry for a certain type of window passes through the fixed resources of\nthat type below it: move them to the resource nodes of the upstream bus,\nrestoring the original BAR type of fixed device resources, and leave the\nbridge window to the relocatable resources below it, if any. Bridges that\ndo not implement the EA capability are unaffected.\n\nSigned-off-by: Ard Biesheuvel \u003cardb@kernel.org\u003e\n" }, { "commit": "f531283dee7df7e6a53f17704be217fb5f7096ce", "tree": "53d42ca9e9c55531c9530eca7b3f2a6414a87e51", "parents": [ "c91bedce833efc472ac78ac5cfd7866a86576141" ], "author": { "name": "Ard Biesheuvel", "email": "ardb@kernel.org", "time": "Thu Sep 24 16:32:21 2026 +0200" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Tue Oct 27 11:59:48 2026 +0000" }, "message": "MdeModulePkg/PciBusDxe: Submit fixed ranges to the host bridge\n\nAfter submitting the resource requirements for a root bridge, pass the\nfixed ranges below it to the host bridge driver via the EDKII PCI Host\nBridge Fixed Resource protocol, if it is implemented. These are the fixed\nBARs of devices on the root bus, and the pinned windows of PCI-PCI bridges\nthat cover fixed BARs further down the hierarchy.\n\nIf the protocol is not implemented, log the fixed ranges, as they need to\nbe reserved by the platform in that case.\n\nSigned-off-by: Ard Biesheuvel \u003cardb@kernel.org\u003e\n" }, { "commit": "c91bedce833efc472ac78ac5cfd7866a86576141", "tree": "195da86a006a9be726bf6a03d62ca1fb7780da73", "parents": [ "0ed21804f9626bdab1c0f3541951021180329317" ], "author": { "name": "Ard Biesheuvel", "email": "ardb@kernel.org", "time": "Thu Sep 24 16:32:20 2026 +0200" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Tue Oct 27 11:59:48 2026 +0000" }, "message": "MdeModulePkg/PciHostBridgeDxe: Implement the Fixed Resource protocol\n\nImplement the EDKII PCI Host Bridge Fixed Resource protocol, and install\nit alongside the resource allocation protocol.\n\nFixed ranges submitted for a root bridge are validated against its\napertures, and claimed in GCD at their host address before any of the\nroot bridge windows are allocated, so that the allocator will steer clear\nof them. Failure to claim a range is not treated as an error, given that\nthe platform may have reserved it already. The claimed ranges are released\nagain when the resources are freed or the enumeration is restarted.\n\nThe fixed ranges are appended to the resource descriptors returned by the\nroot bridge\u0027s Configuration () method, which permits the PCI bus driver to\nresolve the translation offset for BARs that decode a fixed range.\n\nSigned-off-by: Ard Biesheuvel \u003cardb@kernel.org\u003e\n" }, { "commit": "0ed21804f9626bdab1c0f3541951021180329317", "tree": "93eb531c5d6e50ec8e421b35264a2b76a3c3a395", "parents": [ "fe00f5464caa773d578426307980f869b0f011a3" ], "author": { "name": "Ard Biesheuvel", "email": "ardb@kernel.org", "time": "Thu Sep 24 16:32:20 2026 +0200" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Tue Oct 27 11:59:48 2026 +0000" }, "message": "MdeModulePkg: Add EDKII PCI Host Bridge Fixed Resource protocol\n\nIntroduce a protocol that permits the PCI bus driver to inform the PCI\nhost bridge driver about ranges below a root bridge that are decoded at a\nfixed address, e.g., BARs described by an Enhanced Allocation capability,\nor PCI-PCI bridge windows that cover them.\n\nThe host bridge driver is expected to keep these ranges clear when\nallocating the root bridge windows, and to report them via the\nConfiguration () method of the root bridge I/O protocol, so that\ntranslation offsets can be resolved for them.\n\nThe protocol is optional: in its absence, the platform is expected to\nreserve such fixed ranges itself.\n\nSigned-off-by: Ard Biesheuvel \u003cardb@kernel.org\u003e\n" }, { "commit": "fe00f5464caa773d578426307980f869b0f011a3", "tree": "32eb6125ff5496d1c0ecf3bce8e2fe13bf7512fc", "parents": [ "d293b1e9d9051def25e0fa7b6eb17fa8601f38d4" ], "author": { "name": "Ard Biesheuvel", "email": "ardb@kernel.org", "time": "Thu Sep 24 16:32:07 2026 +0200" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Tue Oct 27 11:59:48 2026 +0000" }, "message": "MdeModulePkg/PciBusDxe: Honour fixed BARs in the resource allocator\n\nBARs described by an Enhanced Allocation capability decode a fixed address\nrange, and so they must be excluded from the ordinary resource allocation,\nwhich assigns relocatable ranges by packing BARs at offsets from the base\nof the enclosing window.\n\nSo represent such BARs as fixed resource nodes, which are not taken into\naccount when calculating the size of the enclosing window, and which are\nnot programmed into the BAR registers.\n\nA PCI-PCI bridge window that covers fixed resource nodes must itself be\npinned to a range that covers all of them. Relocatable resources of the\nsame type below such a bridge cannot be accommodated, and are dropped with\nan error. The pinned windows are programmed before the rest of the\nhierarchy, and are propagated upwards as fixed nodes.\n\nFinally, permit PciIo to fall back to a translation offset of 0 for fixed\nBARs that are not covered by any of the root bridge\u0027s resource windows,\ngiven that the platform may have reserved these ranges by other means.\n\nFixed resources don\u0027t occupy any of the relocatable aperture of the\nenclosing window, and so a window or root bridge resource pool that only\nholds fixed resources does not request any resources. So don\u0027t submit a\nresource request for it, and don\u0027t treat the absence of an allocated base\nas an error when programming the resources below it. This is the case,\ne.g., for root bridges whose devices only have fixed BARs.\n\nSigned-off-by: Ard Biesheuvel \u003cardb@kernel.org\u003e\n" }, { "commit": "d293b1e9d9051def25e0fa7b6eb17fa8601f38d4", "tree": "8b8c4d256ad482f40f5088e71b307227a06597fa", "parents": [ "e6e048381472fc3ec1c0b7175905afa20aa24cf7" ], "author": { "name": "Ard Biesheuvel", "email": "ardb@kernel.org", "time": "Thu Sep 24 16:31:58 2026 +0200" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Tue Oct 27 11:59:48 2026 +0000" }, "message": "MdeModulePkg/PciBusDxe: Parse the Enhanced Allocation capability\n\nDevices that implement the PCI Enhanced Allocation (EA) capability may\nhave BARs that are hardwired to a fixed address range, and that cannot be\nsized or relocated via the ordinary BAR registers.\n\nSo when gathering device and PCI-PCI bridge information, parse the EA\ncapability if it exists, and use each enabled entry for BEI 0-5 (0-1 for\nbridges) to override the information obtained from the corresponding BAR:\nrecord the fixed base address and size, and mark the BAR as having a fixed\naddress, so that the resource allocator can take this into account.\n\nDo the same after resizable BARs have been adjusted, as this re-parses the\nBAR registers, and ensure that UpdatePciInfo () leaves such BARs alone.\n\nSigned-off-by: Ard Biesheuvel \u003cardb@kernel.org\u003e\n" }, { "commit": "e6e048381472fc3ec1c0b7175905afa20aa24cf7", "tree": "5eeac4438054cee3bb67d61cae209d4bbd83fef1", "parents": [ "13cb2f1d98573fd2c7bd2797f2007ce51ba1716a" ], "author": { "name": "Ard Biesheuvel", "email": "ardb@kernel.org", "time": "Thu Sep 24 16:31:42 2026 +0200" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Tue Oct 27 11:59:48 2026 +0000" }, "message": "MdePkg/IndustryStandard: Add PCI Enhanced Allocation definitions\n\nAdd the capability ID and the register layout of the PCI Enhanced\nAllocation (EA) capability, as defined in the PCI Local Bus Specification\nECN \"Enhanced Allocation\", so that drivers can discover BARs and bridge\nwindows that are hardwired to fixed addresses.\n\nSigned-off-by: Ard Biesheuvel \u003cardb@kernel.org\u003e\n" }, { "commit": "13cb2f1d98573fd2c7bd2797f2007ce51ba1716a", "tree": "ef1e2ff4bf67475fcf25cc1d7e96c653dcbca8b7", "parents": [ "dd87bafc40adb36d96e2bcc96ae1be464709db69" ], "author": { "name": "Shubham Aggarwal", "email": "shubagga@google.com", "time": "Mon Oct 26 10:52:25 2026 +0000" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Tue Oct 27 09:04:14 2026 +0000" }, "message": "CryptoPkg/BaseCryptLib: Use SHA512_Final() in Sha512Final()\n\nSha512Final() finalizes the SHA-512 context with SHA384_Final() instead\nof SHA512_Final(). This has been the case since the file was added in\ncommit 2ac68e8b549b (\"CryptoPkg Updates to support RFC3161 timestamp\nsignature verification.\"). All the other functions in the file call the\nSHA384_*() or SHA512_*() functions of their own algorithm, including\nSha512HashAll(), which has used SHA512_Init(), SHA512_Update() and\nSHA512_Final() since commit f335d91a3bfe (\"CryptoPkg/BaseCryptLib:\navoid using SHA512()\").\n\nWith OpenSSL, this happens to work: SHA384_Final() simply calls\nSHA512_Final(), which writes as many bytes as the md_len field of the\ncontext specifies, so a context set up by SHA512_Init() still yields\nthe full 64-byte SHA-512 digest.\n\nHowever, SHA384_Final() is meant to be paired with SHA384_Init(), and\nto produce the 48-byte SHA-384 digest. Crypto libraries that implement\nthe same API may enforce this, by asserting that md_len is the SHA-384\ndigest size and writing only 48 bytes. With an OpensslLib instance\nbased on such a library, every SHA-512 digest computed by\nSha512Final(), such as the one returned by Hash2DxeCrypto for\nEFI_HASH2_PROTOCOL, either triggers the assertion or, if assertions are\ndisabled, is truncated to 48 bytes, leaving the last 16 bytes of the\nHashValue buffer unwritten.\n\nUse SHA512_Final(), which matches the SHA512_Init() and SHA512_Update()\ncalls in Sha512Init() and Sha512Update(). There is no functional change\nwith OpenSSL.\n\nSigned-off-by: Shubham Aggarwal \u003cshubagga@google.com\u003e\n" }, { "commit": "dd87bafc40adb36d96e2bcc96ae1be464709db69", "tree": "0a11f2c84aaef9a4f2bf0a5a14d565ed2af2e2b4", "parents": [ "01bd046e7b4bf3087821945a480c9ec90c6fb35a" ], "author": { "name": "Kevin Loughlin", "email": "kevinloughlin@google.com", "time": "Wed Oct 21 15:34:24 2026 +0000" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Mon Oct 26 20:45:42 2026 +0000" }, "message": "OvmfPkg/PlatformBootManagerLib: Avoid full 64-byte PCI header reads in BDS\n\nVisitingAPciInstance() currently reads the entire 64-byte PCI_TYPE00\nconfiguration header (16 32-bit reads per device) on every invocation of\nVisitAllPciInstances(). Under virtualization (especially confidential\ncomputing guests such as SEV-SNP and TDX where each config-space access\ntriggers a #VC/#VE exit to the VMM), reading all 16 DWORDs per device\nacross multiple BDS passes adds significant unnecessary exit overhead:\n\n1. SetPciIntLine() only inspects the 1-byte InterruptPin register\n (PCI_INT_PIN_OFFSET, 0x3D). Convert SetPciIntLine() to a\n PROTOCOL_INSTANCE_CALLBACK invoked via VisitAllInstancesOfProtocol()\n that reads PCI_INT_PIN_OFFSET directly with a single 8-bit read,\n eliminating 15 config-space reads per PCI device during\n PciAcpiInitialization().\n2. With SetPciIntLine() converted, all remaining VisitAllPciInstances()\n callbacks (DetectAndPreparePlatformPciDevicePath() and\n ConnectRecursivelyIfPciMassStorage()) only inspect fields within the\n 16-byte PCI_DEVICE_INDEPENDENT_REGION (Pci.Hdr). Update\n VisitingAPciInstance() to read only sizeof (Pci.Hdr) / sizeof (UINT32)\n (4 DWORDs instead of 16) while zeroing the remainder of PCI_TYPE00.\n\nSigned-off-by: Kevin Loughlin \u003ckevinloughlin@google.com\u003e\n" }, { "commit": "01bd046e7b4bf3087821945a480c9ec90c6fb35a", "tree": "2573bff939bb23601ec489417c27cc749078b4dd", "parents": [ "520f764655158e70ea7d165aec315ad653e8b41f" ], "author": { "name": "Kevin Loughlin", "email": "kevinloughlin@google.com", "time": "Wed Oct 21 15:32:54 2026 +0000" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Mon Oct 26 20:45:42 2026 +0000" }, "message": "OvmfPkg/PlatformBootManagerLib: Remove blanket PCI device enablement\n\nDetectAndPreparePlatformPciDevicePath() currently enables IO, MMIO, and\nbus master decoding (EFI_PCI_DEVICE_ENABLE) on every enumerated PCI\ndevice unconditionally during PlatformInitializeConsole() (invoked in\nPlatformBootManagerBeforeConsole()).\n\nEnabling PCI decoding and DMA across all devices in platform BDS before\ntheir respective UEFI drivers bind is contrary to the UEFI driver model:\nPCI bridges are enabled by PciBusDxe during StartPciDevicesOnBridge(),\nwhile endpoint drivers (including console and display drivers such as\nQemuVideoDxe, SioBusDxe, PciSioSerialDxe, and VirtioPciDeviceDxe) enable\nthe specific PCI attributes they require in DriverBindingStart() and\ndisable them in DriverBindingStop().\n\nRemove the blanket PciIo-\u003eAttributes() call from\nDetectAndPreparePlatformPciDevicePath() in PlatformBootManagerLib and\nPlatformBootManagerLibBhyve.\n\nSigned-off-by: Kevin Loughlin \u003ckevinloughlin@google.com\u003e\n" }, { "commit": "520f764655158e70ea7d165aec315ad653e8b41f", "tree": "412d5480bf1ca4ad1a2d612b8fbc00ab26d134b2", "parents": [ "f278f1a928052fa04d04105c4c43a1f1d62a0f21" ], "author": { "name": "Kevin Loughlin", "email": "kevinloughlin@google.com", "time": "Wed Oct 21 15:31:10 2026 +0000" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Mon Oct 26 20:45:42 2026 +0000" }, "message": "MdeModulePkg/PciBusDxe: Avoid redundant PCI register and bridge accesses\n\nCurrently, PciOperateRegister() unconditionally writes to the target PCI\nconfiguration register (Command or Bridge Control) on\nEFI_ENABLE_REGISTER and EFI_DISABLE_REGISTER operations even when the\nrequested bits are already in the target state or when Command is 0.\n\nSimilarly, PciIoAttributes() unconditionally invokes\nPCI_ENABLE_COMMAND_REGISTER() and PCI_DISABLE_COMMAND_REGISTER() even\nwhen Command is 0 (unlike BridgeControl, which is guarded by\nBridgeControl !\u003d 0), and unconditionally recurses into\nUpStreamBridge-\u003ePciIo.Attributes() even when UpStreamAttributes is 0\n(such as when enabling IO, MEMORY, or BUS_MASTER on an endpoint).\n\nUnder virtualization (especially confidential computing environments\nsuch as AMD SEV-SNP and Intel TDX), every PCI configuration space read\nor write traps to the hypervisor. Update PciOperateRegister() to skip\nno-op register reads/writes when Command is 0 or when the register value\nis unchanged, and update PciIoAttributes() to guard Command register\nupdates and upstream bridge recursion on non-zero masks.\n\nSuggested-by: Ard Biesheuvel \u003cardb+tianocore@kernel.org\u003e\nSigned-off-by: Kevin Loughlin \u003ckevinloughlin@google.com\u003e\n" }, { "commit": "f278f1a928052fa04d04105c4c43a1f1d62a0f21", "tree": "e47811a52a536cb3a7f427d0f278a1836a7a736e", "parents": [ "5c148d5a90825929283615136c20127bd7d14a69" ], "author": { "name": "João Andrade", "email": "659718+joaosa@users.noreply.github.com", "time": "Sat Oct 24 14:55:06 2026 +0100" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Mon Oct 26 16:53:54 2026 +0000" }, "message": "OvmfPkg/VirtioSerialDxe: unmap the ring before freeing it\n\nVirtioSerialUninitRing tests the ring mapping with the condition\ninverted: a mapped ring is never unmapped, and an unmapped one is\n\"unmapped\" with a NULL token. VirtioRingUninit then frees the ring\npages while the mapping stays registered with the VirtIo device.\n\nWith IoMmuDxe (SEV and TDX guests) that mapping owns a stash buffer and\na reserved shared-memory slot, both released when the ring is freed. At\nExitBootServices IoMmuUnmapAllMappings flushes the leftover mapping and\ncopies the slot into the long-freed stash buffer. On an SEV-SNP guest\nwith a virtio-serial console the write lands on live DXE heap and the\nRELEASE firmware faults with #UD in CoreFindFreePagesI (CR() on a\ngMemoryMap entry with a broken signature) before the kernel runs. With\nPcdHeapGuardPropertyMask freed-memory guard enabled the fault moves to\nthe CopyMem in IoMmuDxe, destination in a freed page, source in the\nreserved slot region.\n\nVirtioInputDxe has the same sequence with the test the right way round.\nFlip the condition so the ring is unmapped before it is freed.\n\nBoot-tested on SEV-SNP hardware with a virtio-serial console: the\nfirmware reaches the kernel, and the same build with the freed-memory\nguard shows no fault.\n\nCc: Ard Biesheuvel \u003cardb+tianocore@kernel.org\u003e\nCc: Jiewen Yao \u003cjiewen.yao@intel.com\u003e\nCc: Gerd Hoffmann \u003ckraxel@redhat.com\u003e\nSigned-off-by: João Andrade \u003c659718+joaosa@users.noreply.github.com\u003e\n" }, { "commit": "5c148d5a90825929283615136c20127bd7d14a69", "tree": "e926af38a7289625e39ae56cb2b88aff557bad59", "parents": [ "a9a4df268aa61c8d4bd9710d793fd1dbc32d3c8a" ], "author": { "name": "Qihang Gao", "email": "gaoqihang@loongson.cn", "time": "Mon Oct 26 15:14:57 2026 +0800" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Mon Oct 26 11:57:25 2026 +0000" }, "message": "BaseTools: Fix CLANGDWARF LoongArch64 ASLC build\n\nWhen building a module containing .aslc files on the CLANGDWARF LoongArch64\nplatform, errors occur because the target and linker are set incorrectly.\nTherefore, this patch:\n- Add the missing target triplet to ASLCC_FLAGS so ACPI objects are\ncompiled for LoongArch64 rather than the host architecture.\n- Add -fuse-ld\u003dlld to ASLDLINK_FLAGS so linking does not fall back to the\nGCC ld, which lacks elf64loongarch support.\n\nSigned-off-by: Qihang Gao \u003cgaoqihang@loongson.cn\u003e\nSigned-off-by: Chao Li \u003clichao@loongson.cn\u003e\n" }, { "commit": "a9a4df268aa61c8d4bd9710d793fd1dbc32d3c8a", "tree": "25e6ef741bf87fd2a198fa62a0c49a2a62300439", "parents": [ "0a503bc2f5bd37c7a5d39d0ba31008f446f0298d" ], "author": { "name": "Jakov Zauzolkov", "email": "jakov.zauzolkov@aisec.fraunhofer.de", "time": "Mon Oct 12 13:15:59 2026 +0200" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Mon Oct 26 09:49:55 2026 +0000" }, "message": "OvmfPkg/PlatformInitLib: Move \u0027First\u0027 variable to PlatformInfoHob\n\nThe static variable \u0027First\u0027 in function PlatformIgvmScanE820 in Igvm.c\nused for debugging is part of the .data section. Initially, the variable\nholds the boolean value 0x01, which changes during code execution to\n0x00. As this change happens before the PEIFV measurement, and the\nvariable is part of the measurement, the measured PEIFV, which is\nextended into PCR0, differs from the unbooted PEIFV. This difference\nprevents precomputation of the expected value for PCR0, needed for\nremote attestation.\n\nFix this by moving the variable into the PlatformInfoHob.\n\nCo-authored-by: Simon Ott \u003csimon.ott@aisec.fraunhofer.de\u003e\nSigned-off-by: Jakov Zauzolkov \u003cjakov.zauzolkov@aisec.fraunhofer.de\u003e\n" }, { "commit": "0a503bc2f5bd37c7a5d39d0ba31008f446f0298d", "tree": "22067de8bdc99bbe4704c2fe9431b7a7325f1d78", "parents": [ "02c1141a0e5b5c958630e81ac6ebb4b03c1e836f" ], "author": { "name": "Dongyan Qian", "email": "qiandongyan@loongson.cn", "time": "Tue Oct 20 18:39:34 2026 +0800" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Sat Oct 24 17:15:38 2026 +0000" }, "message": "MdePkg/BaseLib: Support IMPCTL1, IMPCTL2 and TLBRPRMD on LoongArch\n\nAdd CsrRead(), CsrWrite() and CsrXChg() support for IMPCTL1 (0x80),\nIMPCTL2 (0x81) and TLBRPRMD (0x8F). These selectors currently reach\nthe unsupported-selector trap instead of a CSR instruction.\n\nDefine the register numbers, add the IMPCTL1/2 dispatch range and\nextend the existing TLB refill range and instruction tables through\nTLBRPRMD. Preserve the existing handling of all other selectors.\n\nThe register definitions follow LoongArch Reference Manual Volume 1,\nversion 1.10, sections 7.4.18, 7.4.19 and 7.5.17. IMPCTL field semantics\nremain implementation-specific; this change only enables CSR access.\n\nLink: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html\nSigned-off-by: Dongyan Qian \u003cqiandongyan@loongson.cn\u003e\n" }, { "commit": "02c1141a0e5b5c958630e81ac6ebb4b03c1e836f", "tree": "fc8ec211abe15ba05e9a60cf7b812741e5e4f780", "parents": [ "929b5d83ddff8ac4fe6532db1d75c189c4355021" ], "author": { "name": "Michael D Kinney", "email": "michael.d.kinney@intel.com", "time": "Thu Oct 22 08:35:49 2026 -0700" }, "committer": { "name": "mergify[bot]", "email": "37929162+mergify[bot]@users.noreply.github.com", "time": "Sat Oct 24 02:01:56 2026 +0000" }, "message": "Maintainers.txt: Add Khalid Ali as PcAtChipsetPkg maintainer\n\nSigned-off-by: Michael D Kinney \u003cmichael.d.kinney@intel.com\u003e\n" } ], "next": "929b5d83ddff8ac4fe6532db1d75c189c4355021" }