)]}'
{
  "commit": "b8df7d9c8e1e370b862890ebda677278c4c6155f",
  "tree": "a37cab57dbc3412abae3ad9d96835f6a6b9aa398",
  "parents": [
    "d73615b24ba402b1625f03d6a83f183180f24a60"
  ],
  "author": {
    "name": "Ard Biesheuvel",
    "email": "ardb@kernel.org",
    "time": "Tue May 05 13:50:19 2026 +0200"
  },
  "committer": {
    "name": "Ard Biesheuvel",
    "email": "ardb@kernel.org",
    "time": "Wed May 06 08:24:39 2026 +0200"
  },
  "message": "ArmVirtPkg/ArmPlatformLibQemu: Support early ID map on LPA2 capable CPUs\n\nArmVirtQemu uses an initial early ID map in emulated NOR flash that is\nactivated right out of reset, in order to avoid running a good chunk of\nthe SEC and PEI stages with the MMU and caches disabled.\n\nThis early ID map is currently not compatible with LPA2, and the\nassociated startup code consciously omits 52-bit physical addressing, as\nit was not supported for 4k page sizes when this code was written.\n\nThis means that by the time ArmConfigureMmu() runs, the TCR control\nregister is already programmed with a value that reflects the non-LPA2\nnature of the active page tables. Given that the MMU is on at that\npoint, TCR cannot simply be updated to a value that enables LPA2. Yet\nthis is what happens currently, and so the boot hangs really early when\nrunning ArmVirtQemu on LPA2 capable CPUs.\n\nDisabling the MMU again at this point is problematic, because it would\nrequire cache maintenance on the stack and on other live RAM regions.\n\nGiven that the early page tables are in read-only NOR flash, updating\nthem on the fly to make them LPA2 compatible is impossible. So instead,\nprovide a second set of early page tables, but using 5 levels of paging\nfor LPA2, and omitting the shareability attributes in the page table\ndescriptors, as LPA2 repurposes these bits as physical address bits.\n\nAlso update the startup code to program TCR.IPS and TCR.DS\naccordingly, but only if LPA2 is supported and the PArange is 52 bits:\nthis reflects the logic in ArmConfigureMmu(), ensuring that the TCR\nvalue it calculates is identical to the one chosen by the early code.\n\nSigned-off-by: Ard Biesheuvel \u003cardb@kernel.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "55c01035bbc7f6a22747b001a9c34b046ebec66d",
      "old_mode": 33188,
      "old_path": "ArmVirtPkg/Library/ArmPlatformLibQemu/ArmPlatformHelper.S",
      "new_id": "e0c720a16da6f933938e1a7a398149e07b6f3958",
      "new_mode": 33188,
      "new_path": "ArmVirtPkg/Library/ArmPlatformLibQemu/ArmPlatformHelper.S"
    },
    {
      "type": "modify",
      "old_id": "d9dcaae2bf7fd0b1380da7e30ab7ea3dd7336068",
      "old_mode": 33188,
      "old_path": "ArmVirtPkg/Library/ArmPlatformLibQemu/IdMap.S",
      "new_id": "3c23957eb82b5ef9c68ff76b36c4d282d6eaf35b",
      "new_mode": 33188,
      "new_path": "ArmVirtPkg/Library/ArmPlatformLibQemu/IdMap.S"
    }
  ]
}