)]}'
{
  "commit": "14aa197f71cc7bc7bb7ecd8184dfb062fd581d03",
  "tree": "3c6c090e8239b32b1a505aa350abfd8e38dcf1fd",
  "parents": [
    "d2cbaefc082294eadaa30a3d5f0fa8ba264a574a"
  ],
  "author": {
    "name": "Abdul Lateef Attar",
    "email": "AbdulLateef.Attar@amd.com",
    "time": "Sun Dec 07 06:57:29 2025 +0000"
  },
  "committer": {
    "name": "mergify[bot]",
    "email": "37929162+mergify[bot]@users.noreply.github.com",
    "time": "Thu Dec 11 10:37:26 2025 +0000"
  },
  "message": "DynamicTablesPkg/AmlLib: Remove invalid ASSERT for IRQ macro generation\n\nThe ACPI specification does not require legacy IRQs (x86) to be\nActiveLow when EdgeTriggered or vice-versa.\n\nHence the ASSERT checking for ActiveLow when EdgeTriggered is\nremoved for IRQ macro generation non-ARM architecture.\n\nThe IRQNoFlags macro defaults to EdgeTrigger and ActiveHigh\nconfiguration, demonstrating that this combination is valid.\n\nReference: ACPI Specification 6.5\n- Section 19.6.66: IRQ (Interrupt Resource Descriptor Macro)\n- Section 19.6.67: IRQNoFlags (Interrupt Resource Descriptor Macro)\n\nSigned-off-by: Abdul Lateef Attar \u003cAbdulLateef.Attar@amd.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "8be5eabf3a9209558d4d2226dd5bf2dabc800891",
      "old_mode": 33188,
      "old_path": "DynamicTablesPkg/Library/Common/AmlLib/CodeGen/AmlResourceDataCodeGen.c",
      "new_id": "2984a65ad812e29d6c911f40fe22696763958160",
      "new_mode": 33188,
      "new_path": "DynamicTablesPkg/Library/Common/AmlLib/CodeGen/AmlResourceDataCodeGen.c"
    }
  ]
}