pci: program correct bridge limit registers during probe

According to the pci-to-pci bridge specification, memory/io limit
should be the last address of the window, while currently its set to
last + 1. It broke when the memory range was increased and hit 32-bit
limit. The last address in the window is 0xFFFF.FFFF and max-mmio is
0x1.0000.0000, because of the bug 0x0000 got programmed in the memory
limit register. All the mmio reads across the pci-to-pci bridge
started failing during probe.

All pci-bridge-set-[mmio,mem,io]-base sufferred from similar problem.

Suggested-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
1 file changed